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authorThomas Gleixner <tglx@linutronix.de>2011-05-14 06:06:36 -0400
committerThomas Gleixner <tglx@linutronix.de>2011-05-14 06:06:36 -0400
commita18f22a968de17b29f2310cdb7ba69163e65ec15 (patch)
treea7d56d88fad5e444d7661484109758a2f436129e /arch/microblaze
parenta1c57e0fec53defe745e64417eacdbd3618c3e66 (diff)
parent798778b8653f64b7b2162ac70eca10367cff6ce8 (diff)
Merge branch 'consolidate-clksrc-i8253' of master.kernel.org:~rmk/linux-2.6-arm into timers/clocksource
Conflicts: arch/ia64/kernel/cyclone.c arch/mips/kernel/i8253.c arch/x86/kernel/i8253.c Reason: Resolve conflicts so further cleanups do not conflict further Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/microblaze')
-rw-r--r--arch/microblaze/Kconfig18
-rw-r--r--arch/microblaze/Makefile2
-rw-r--r--arch/microblaze/include/asm/cacheflush.h13
-rw-r--r--arch/microblaze/include/asm/cpuinfo.h4
-rw-r--r--arch/microblaze/include/asm/entry.h36
-rw-r--r--arch/microblaze/include/asm/exceptions.h3
-rw-r--r--arch/microblaze/include/asm/futex.h31
-rw-r--r--arch/microblaze/include/asm/io.h2
-rw-r--r--arch/microblaze/include/asm/irq.h2
-rw-r--r--arch/microblaze/include/asm/pci-bridge.h14
-rw-r--r--arch/microblaze/include/asm/pci.h2
-rw-r--r--arch/microblaze/include/asm/pgtable.h2
-rw-r--r--arch/microblaze/include/asm/processor.h2
-rw-r--r--arch/microblaze/include/asm/prom.h15
-rw-r--r--arch/microblaze/include/asm/ptrace.h14
-rw-r--r--arch/microblaze/include/asm/syscall.h3
-rw-r--r--arch/microblaze/include/asm/syscalls.h8
-rw-r--r--arch/microblaze/include/asm/uaccess.h8
-rw-r--r--arch/microblaze/include/asm/unaligned.h11
-rw-r--r--arch/microblaze/include/asm/unistd.h6
-rw-r--r--arch/microblaze/kernel/Makefile1
-rw-r--r--arch/microblaze/kernel/cpu/Makefile2
-rw-r--r--arch/microblaze/kernel/cpu/cache.c18
-rw-r--r--arch/microblaze/kernel/cpu/cpuinfo.c1
-rw-r--r--arch/microblaze/kernel/dma.c1
-rw-r--r--arch/microblaze/kernel/entry-nommu.S4
-rw-r--r--arch/microblaze/kernel/entry.S325
-rw-r--r--arch/microblaze/kernel/exceptions.c2
-rw-r--r--arch/microblaze/kernel/ftrace.c10
-rw-r--r--arch/microblaze/kernel/head.S24
-rw-r--r--arch/microblaze/kernel/hw_exception_handler.S48
-rw-r--r--arch/microblaze/kernel/intc.c59
-rw-r--r--arch/microblaze/kernel/irq.c40
-rw-r--r--arch/microblaze/kernel/microblaze_ksyms.c12
-rw-r--r--arch/microblaze/kernel/process.c2
-rw-r--r--arch/microblaze/kernel/prom.c2
-rw-r--r--arch/microblaze/kernel/prom_parse.c77
-rw-r--r--arch/microblaze/kernel/ptrace.c3
-rw-r--r--arch/microblaze/kernel/setup.c12
-rw-r--r--arch/microblaze/kernel/signal.c8
-rw-r--r--arch/microblaze/kernel/sys_microblaze.c3
-rw-r--r--arch/microblaze/kernel/syscall_table.S4
-rw-r--r--arch/microblaze/kernel/timer.c6
-rw-r--r--arch/microblaze/kernel/unwind.c2
-rw-r--r--arch/microblaze/kernel/vmlinux.lds.S5
-rw-r--r--arch/microblaze/lib/Makefile6
-rw-r--r--arch/microblaze/lib/memcpy.c8
-rw-r--r--arch/microblaze/lib/memmove.c6
-rw-r--r--arch/microblaze/lib/memset.c2
-rw-r--r--arch/microblaze/lib/muldi3.c1
-rw-r--r--arch/microblaze/mm/consistent.c2
-rw-r--r--arch/microblaze/mm/fault.c2
-rw-r--r--arch/microblaze/pci/indirect_pci.c2
-rw-r--r--arch/microblaze/pci/pci-common.c3
-rw-r--r--arch/microblaze/pci/pci_32.c1
-rw-r--r--arch/microblaze/platform/generic/Kconfig.auto2
56 files changed, 417 insertions, 485 deletions
diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig
index 31680032053e..eccdefe70d4e 100644
--- a/arch/microblaze/Kconfig
+++ b/arch/microblaze/Kconfig
@@ -6,7 +6,6 @@ config MICROBLAZE
6 select HAVE_FUNCTION_GRAPH_TRACER 6 select HAVE_FUNCTION_GRAPH_TRACER
7 select HAVE_DYNAMIC_FTRACE 7 select HAVE_DYNAMIC_FTRACE
8 select HAVE_FTRACE_MCOUNT_RECORD 8 select HAVE_FTRACE_MCOUNT_RECORD
9 select USB_ARCH_HAS_EHCI
10 select ARCH_WANT_OPTIONAL_GPIOLIB 9 select ARCH_WANT_OPTIONAL_GPIOLIB
11 select HAVE_OPROFILE 10 select HAVE_OPROFILE
12 select HAVE_ARCH_KGDB 11 select HAVE_ARCH_KGDB
@@ -17,6 +16,7 @@ config MICROBLAZE
17 select OF_EARLY_FLATTREE 16 select OF_EARLY_FLATTREE
18 select HAVE_GENERIC_HARDIRQS 17 select HAVE_GENERIC_HARDIRQS
19 select GENERIC_IRQ_PROBE 18 select GENERIC_IRQ_PROBE
19 select GENERIC_IRQ_SHOW
20 20
21config SWAP 21config SWAP
22 def_bool n 22 def_bool n
@@ -36,6 +36,9 @@ config ARCH_HAS_ILOG2_U64
36config GENERIC_FIND_NEXT_BIT 36config GENERIC_FIND_NEXT_BIT
37 def_bool y 37 def_bool y
38 38
39config GENERIC_FIND_BIT_LE
40 def_bool y
41
39config GENERIC_HWEIGHT 42config GENERIC_HWEIGHT
40 def_bool y 43 def_bool y
41 44
@@ -183,6 +186,17 @@ config LOWMEM_SIZE
183 hex "Maximum low memory size (in bytes)" if LOWMEM_SIZE_BOOL 186 hex "Maximum low memory size (in bytes)" if LOWMEM_SIZE_BOOL
184 default "0x30000000" 187 default "0x30000000"
185 188
189config MANUAL_RESET_VECTOR
190 hex "Microblaze reset vector address setup"
191 default "0x0"
192 help
193 Set this option to have the kernel override the CPU Reset vector.
194 If zero, no change will be made to the MicroBlaze reset vector at
195 address 0x0.
196 If non-zero, a jump instruction to this address, will be written
197 to the reset vector at address 0x0.
198 If you are unsure, set it to default value 0x0.
199
186config KERNEL_START_BOOL 200config KERNEL_START_BOOL
187 bool "Set custom kernel base address" 201 bool "Set custom kernel base address"
188 depends on ADVANCED_OPTIONS 202 depends on ADVANCED_OPTIONS
@@ -247,7 +261,7 @@ endmenu
247 261
248source "mm/Kconfig" 262source "mm/Kconfig"
249 263
250menu "Exectuable file formats" 264menu "Executable file formats"
251 265
252source "fs/Kconfig.binfmt" 266source "fs/Kconfig.binfmt"
253 267
diff --git a/arch/microblaze/Makefile b/arch/microblaze/Makefile
index 6f432e6df9af..b23c40eb7a52 100644
--- a/arch/microblaze/Makefile
+++ b/arch/microblaze/Makefile
@@ -18,7 +18,7 @@ export CPU_VER CPU_MAJOR CPU_MINOR CPU_REV
18# rather than bools y/n 18# rather than bools y/n
19 19
20# Work out HW multipler support. This is tricky. 20# Work out HW multipler support. This is tricky.
21# 1. Spartan2 has no HW multiplers. 21# 1. Spartan2 has no HW multipliers.
22# 2. MicroBlaze v3.x always uses them, except in Spartan 2 22# 2. MicroBlaze v3.x always uses them, except in Spartan 2
23# 3. All other FPGa/CPU ver combos, we can trust the CONFIG_ settings 23# 3. All other FPGa/CPU ver combos, we can trust the CONFIG_ settings
24ifeq (,$(findstring spartan2,$(CONFIG_XILINX_MICROBLAZE0_FAMILY))) 24ifeq (,$(findstring spartan2,$(CONFIG_XILINX_MICROBLAZE0_FAMILY)))
diff --git a/arch/microblaze/include/asm/cacheflush.h b/arch/microblaze/include/asm/cacheflush.h
index 7ebd955460d9..0f553bc009a0 100644
--- a/arch/microblaze/include/asm/cacheflush.h
+++ b/arch/microblaze/include/asm/cacheflush.h
@@ -84,12 +84,13 @@ do { \
84#define flush_dcache_mmap_lock(mapping) do { } while (0) 84#define flush_dcache_mmap_lock(mapping) do { } while (0)
85#define flush_dcache_mmap_unlock(mapping) do { } while (0) 85#define flush_dcache_mmap_unlock(mapping) do { } while (0)
86 86
87
88#define flush_cache_dup_mm(mm) do { } while (0) 87#define flush_cache_dup_mm(mm) do { } while (0)
89#define flush_cache_vmap(start, end) do { } while (0) 88#define flush_cache_vmap(start, end) do { } while (0)
90#define flush_cache_vunmap(start, end) do { } while (0) 89#define flush_cache_vunmap(start, end) do { } while (0)
91#define flush_cache_mm(mm) do { } while (0) 90#define flush_cache_mm(mm) do { } while (0)
92#define flush_cache_page(vma, vmaddr, pfn) do { } while (0) 91
92#define flush_cache_page(vma, vmaddr, pfn) \
93 flush_dcache_range(pfn << PAGE_SHIFT, (pfn << PAGE_SHIFT) + PAGE_SIZE);
93 94
94/* MS: kgdb code use this macro, wrong len with FLASH */ 95/* MS: kgdb code use this macro, wrong len with FLASH */
95#if 0 96#if 0
@@ -104,9 +105,13 @@ do { \
104#define copy_to_user_page(vma, page, vaddr, dst, src, len) \ 105#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
105do { \ 106do { \
106 u32 addr = virt_to_phys(dst); \ 107 u32 addr = virt_to_phys(dst); \
107 invalidate_icache_range((unsigned) (addr), (unsigned) (addr) + (len));\
108 memcpy((dst), (src), (len)); \ 108 memcpy((dst), (src), (len)); \
109 flush_dcache_range((unsigned) (addr), (unsigned) (addr) + (len));\ 109 if (vma->vm_flags & VM_EXEC) { \
110 invalidate_icache_range((unsigned) (addr), \
111 (unsigned) (addr) + PAGE_SIZE); \
112 flush_dcache_range((unsigned) (addr), \
113 (unsigned) (addr) + PAGE_SIZE); \
114 } \
110} while (0) 115} while (0)
111 116
112#define copy_from_user_page(vma, page, vaddr, dst, src, len) \ 117#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
diff --git a/arch/microblaze/include/asm/cpuinfo.h b/arch/microblaze/include/asm/cpuinfo.h
index cd257537ae54..d8f013347a9e 100644
--- a/arch/microblaze/include/asm/cpuinfo.h
+++ b/arch/microblaze/include/asm/cpuinfo.h
@@ -96,8 +96,8 @@ void set_cpuinfo_pvr_full(struct cpuinfo *ci, struct device_node *cpu);
96 96
97static inline unsigned int fcpu(struct device_node *cpu, char *n) 97static inline unsigned int fcpu(struct device_node *cpu, char *n)
98{ 98{
99 int *val; 99 const __be32 *val;
100 return (val = (int *) of_get_property(cpu, n, NULL)) ? 100 return (val = of_get_property(cpu, n, NULL)) ?
101 be32_to_cpup(val) : 0; 101 be32_to_cpup(val) : 0;
102} 102}
103 103
diff --git a/arch/microblaze/include/asm/entry.h b/arch/microblaze/include/asm/entry.h
index ec89f2ad0fe1..af0144b91b79 100644
--- a/arch/microblaze/include/asm/entry.h
+++ b/arch/microblaze/include/asm/entry.h
@@ -31,40 +31,4 @@ DECLARE_PER_CPU(unsigned int, R11_SAVE); /* Temp variable for entry */
31DECLARE_PER_CPU(unsigned int, CURRENT_SAVE); /* Saved current pointer */ 31DECLARE_PER_CPU(unsigned int, CURRENT_SAVE); /* Saved current pointer */
32# endif /* __ASSEMBLY__ */ 32# endif /* __ASSEMBLY__ */
33 33
34#ifndef CONFIG_MMU
35
36/* noMMU hasn't any space for args */
37# define STATE_SAVE_ARG_SPACE (0)
38
39#else /* CONFIG_MMU */
40
41/* If true, system calls save and restore all registers (except result
42 * registers, of course). If false, then `call clobbered' registers
43 * will not be preserved, on the theory that system calls are basically
44 * function calls anyway, and the caller should be able to deal with it.
45 * This is a security risk, of course, as `internal' values may leak out
46 * after a system call, but that certainly doesn't matter very much for
47 * a processor with no MMU protection! For a protected-mode kernel, it
48 * would be faster to just zero those registers before returning.
49 *
50 * I can not rely on the glibc implementation. If you turn it off make
51 * sure that r11/r12 is saved in user-space. --KAA
52 *
53 * These are special variables using by the kernel trap/interrupt code
54 * to save registers in, at a time when there are no spare registers we
55 * can use to do so, and we can't depend on the value of the stack
56 * pointer. This means that they must be within a signed 16-bit
57 * displacement of 0x00000000.
58 */
59
60/* A `state save frame' is a struct pt_regs preceded by some extra space
61 * suitable for a function call stack frame. */
62
63/* Amount of room on the stack reserved for arguments and to satisfy the
64 * C calling conventions, in addition to the space used by the struct
65 * pt_regs that actually holds saved values. */
66#define STATE_SAVE_ARG_SPACE (6*4) /* Up to six arguments */
67
68#endif /* CONFIG_MMU */
69
70#endif /* _ASM_MICROBLAZE_ENTRY_H */ 34#endif /* _ASM_MICROBLAZE_ENTRY_H */
diff --git a/arch/microblaze/include/asm/exceptions.h b/arch/microblaze/include/asm/exceptions.h
index 6479097b802b..e6a8ddea1dca 100644
--- a/arch/microblaze/include/asm/exceptions.h
+++ b/arch/microblaze/include/asm/exceptions.h
@@ -66,6 +66,9 @@
66asmlinkage void full_exception(struct pt_regs *regs, unsigned int type, 66asmlinkage void full_exception(struct pt_regs *regs, unsigned int type,
67 int fsr, int addr); 67 int fsr, int addr);
68 68
69asmlinkage void sw_exception(struct pt_regs *regs);
70void bad_page_fault(struct pt_regs *regs, unsigned long address, int sig);
71
69void die(const char *str, struct pt_regs *fp, long err); 72void die(const char *str, struct pt_regs *fp, long err);
70void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr); 73void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr);
71 74
diff --git a/arch/microblaze/include/asm/futex.h b/arch/microblaze/include/asm/futex.h
index ad3fd61b2fe7..b0526d2716fa 100644
--- a/arch/microblaze/include/asm/futex.h
+++ b/arch/microblaze/include/asm/futex.h
@@ -29,7 +29,7 @@
29}) 29})
30 30
31static inline int 31static inline int
32futex_atomic_op_inuser(int encoded_op, int __user *uaddr) 32futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)
33{ 33{
34 int op = (encoded_op >> 28) & 7; 34 int op = (encoded_op >> 28) & 7;
35 int cmp = (encoded_op >> 24) & 15; 35 int cmp = (encoded_op >> 24) & 15;
@@ -39,7 +39,7 @@ futex_atomic_op_inuser(int encoded_op, int __user *uaddr)
39 if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28)) 39 if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
40 oparg = 1 << oparg; 40 oparg = 1 << oparg;
41 41
42 if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int))) 42 if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
43 return -EFAULT; 43 return -EFAULT;
44 44
45 pagefault_disable(); 45 pagefault_disable();
@@ -94,31 +94,34 @@ futex_atomic_op_inuser(int encoded_op, int __user *uaddr)
94} 94}
95 95
96static inline int 96static inline int
97futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval) 97futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
98 u32 oldval, u32 newval)
98{ 99{
99 int prev, cmp; 100 int ret = 0, cmp;
101 u32 prev;
100 102
101 if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int))) 103 if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
102 return -EFAULT; 104 return -EFAULT;
103 105
104 __asm__ __volatile__ ("1: lwx %0, %2, r0; \ 106 __asm__ __volatile__ ("1: lwx %1, %3, r0; \
105 cmp %1, %0, %3; \ 107 cmp %2, %1, %4; \
106 beqi %1, 3f; \ 108 beqi %2, 3f; \
107 2: swx %4, %2, r0; \ 109 2: swx %5, %3, r0; \
108 addic %1, r0, 0; \ 110 addic %2, r0, 0; \
109 bnei %1, 1b; \ 111 bnei %2, 1b; \
110 3: \ 112 3: \
111 .section .fixup,\"ax\"; \ 113 .section .fixup,\"ax\"; \
112 4: brid 3b; \ 114 4: brid 3b; \
113 addik %0, r0, %5; \ 115 addik %0, r0, %6; \
114 .previous; \ 116 .previous; \
115 .section __ex_table,\"a\"; \ 117 .section __ex_table,\"a\"; \
116 .word 1b,4b,2b,4b; \ 118 .word 1b,4b,2b,4b; \
117 .previous;" \ 119 .previous;" \
118 : "=&r" (prev), "=&r"(cmp) \ 120 : "+r" (ret), "=&r" (prev), "=&r"(cmp) \
119 : "r" (uaddr), "r" (oldval), "r" (newval), "i" (-EFAULT)); 121 : "r" (uaddr), "r" (oldval), "r" (newval), "i" (-EFAULT));
120 122
121 return prev; 123 *uval = prev;
124 return ret;
122} 125}
123 126
124#endif /* __KERNEL__ */ 127#endif /* __KERNEL__ */
diff --git a/arch/microblaze/include/asm/io.h b/arch/microblaze/include/asm/io.h
index eae32220f447..8cdac14b55b0 100644
--- a/arch/microblaze/include/asm/io.h
+++ b/arch/microblaze/include/asm/io.h
@@ -70,7 +70,7 @@ static inline void __raw_writeq(unsigned long v, volatile void __iomem *addr)
70 70
71/* 71/*
72 * read (readb, readw, readl, readq) and write (writeb, writew, 72 * read (readb, readw, readl, readq) and write (writeb, writew,
73 * writel, writeq) accessors are for PCI and thus littel endian. 73 * writel, writeq) accessors are for PCI and thus little endian.
74 * Linux 2.4 for Microblaze had this wrong. 74 * Linux 2.4 for Microblaze had this wrong.
75 */ 75 */
76static inline unsigned char readb(const volatile void __iomem *addr) 76static inline unsigned char readb(const volatile void __iomem *addr)
diff --git a/arch/microblaze/include/asm/irq.h b/arch/microblaze/include/asm/irq.h
index ec5583d6111c..cc54187f3d38 100644
--- a/arch/microblaze/include/asm/irq.h
+++ b/arch/microblaze/include/asm/irq.h
@@ -12,8 +12,6 @@
12#define NR_IRQS 32 12#define NR_IRQS 32
13#include <asm-generic/irq.h> 13#include <asm-generic/irq.h>
14 14
15#include <linux/interrupt.h>
16
17/* This type is the placeholder for a hardware interrupt number. It has to 15/* This type is the placeholder for a hardware interrupt number. It has to
18 * be big enough to enclose whatever representation is used by a given 16 * be big enough to enclose whatever representation is used by a given
19 * platform. 17 * platform.
diff --git a/arch/microblaze/include/asm/pci-bridge.h b/arch/microblaze/include/asm/pci-bridge.h
index 0c68764ab547..746df91e5796 100644
--- a/arch/microblaze/include/asm/pci-bridge.h
+++ b/arch/microblaze/include/asm/pci-bridge.h
@@ -76,7 +76,7 @@ struct pci_controller {
76 * Used for variants of PCI indirect handling and possible quirks: 76 * Used for variants of PCI indirect handling and possible quirks:
77 * SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1 77 * SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1
78 * EXT_REG - provides access to PCI-e extended registers 78 * EXT_REG - provides access to PCI-e extended registers
79 * SURPRESS_PRIMARY_BUS - we surpress the setting of PCI_PRIMARY_BUS 79 * SURPRESS_PRIMARY_BUS - we suppress the setting of PCI_PRIMARY_BUS
80 * on Freescale PCI-e controllers since they used the PCI_PRIMARY_BUS 80 * on Freescale PCI-e controllers since they used the PCI_PRIMARY_BUS
81 * to determine which bus number to match on when generating type0 81 * to determine which bus number to match on when generating type0
82 * config cycles 82 * config cycles
@@ -104,11 +104,22 @@ struct pci_controller {
104 int global_number; /* PCI domain number */ 104 int global_number; /* PCI domain number */
105}; 105};
106 106
107#ifdef CONFIG_PCI
107static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus) 108static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus)
108{ 109{
109 return bus->sysdata; 110 return bus->sysdata;
110} 111}
111 112
113static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
114{
115 struct pci_controller *host;
116
117 if (bus->self)
118 return pci_device_to_OF_node(bus->self);
119 host = pci_bus_to_host(bus);
120 return host ? host->dn : NULL;
121}
122
112static inline int isa_vaddr_is_ioport(void __iomem *address) 123static inline int isa_vaddr_is_ioport(void __iomem *address)
113{ 124{
114 /* No specific ISA handling on ppc32 at this stage, it 125 /* No specific ISA handling on ppc32 at this stage, it
@@ -116,6 +127,7 @@ static inline int isa_vaddr_is_ioport(void __iomem *address)
116 */ 127 */
117 return 0; 128 return 0;
118} 129}
130#endif /* CONFIG_PCI */
119 131
120/* These are used for config access before all the PCI probing 132/* These are used for config access before all the PCI probing
121 has been done. */ 133 has been done. */
diff --git a/arch/microblaze/include/asm/pci.h b/arch/microblaze/include/asm/pci.h
index 2232ff942ba9..ba65cf472544 100644
--- a/arch/microblaze/include/asm/pci.h
+++ b/arch/microblaze/include/asm/pci.h
@@ -158,7 +158,7 @@ extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
158extern void pcibios_setup_bus_devices(struct pci_bus *bus); 158extern void pcibios_setup_bus_devices(struct pci_bus *bus);
159extern void pcibios_setup_bus_self(struct pci_bus *bus); 159extern void pcibios_setup_bus_self(struct pci_bus *bus);
160 160
161/* This part of code was originaly in xilinx-pci.h */ 161/* This part of code was originally in xilinx-pci.h */
162#ifdef CONFIG_PCI_XILINX 162#ifdef CONFIG_PCI_XILINX
163extern void __init xilinx_pci_init(void); 163extern void __init xilinx_pci_init(void);
164#else 164#else
diff --git a/arch/microblaze/include/asm/pgtable.h b/arch/microblaze/include/asm/pgtable.h
index 885574a73f01..b2af42311a12 100644
--- a/arch/microblaze/include/asm/pgtable.h
+++ b/arch/microblaze/include/asm/pgtable.h
@@ -572,7 +572,7 @@ void __init *early_get_page(void);
572 572
573extern unsigned long ioremap_bot, ioremap_base; 573extern unsigned long ioremap_bot, ioremap_base;
574 574
575void *consistent_alloc(int gfp, size_t size, dma_addr_t *dma_handle); 575void *consistent_alloc(gfp_t gfp, size_t size, dma_addr_t *dma_handle);
576void consistent_free(size_t size, void *vaddr); 576void consistent_free(size_t size, void *vaddr);
577void consistent_sync(void *vaddr, size_t size, int direction); 577void consistent_sync(void *vaddr, size_t size, int direction);
578void consistent_sync_page(struct page *page, unsigned long offset, 578void consistent_sync_page(struct page *page, unsigned long offset,
diff --git a/arch/microblaze/include/asm/processor.h b/arch/microblaze/include/asm/processor.h
index 8eeb09211ece..aed2a6be8e27 100644
--- a/arch/microblaze/include/asm/processor.h
+++ b/arch/microblaze/include/asm/processor.h
@@ -155,7 +155,7 @@ unsigned long get_wchan(struct task_struct *p);
155# define task_regs(task) ((struct pt_regs *)task_tos(task) - 1) 155# define task_regs(task) ((struct pt_regs *)task_tos(task) - 1)
156 156
157# define task_pt_regs_plus_args(tsk) \ 157# define task_pt_regs_plus_args(tsk) \
158 (((void *)task_pt_regs(tsk)) - STATE_SAVE_ARG_SPACE) 158 ((void *)task_pt_regs(tsk))
159 159
160# define task_sp(task) (task_regs(task)->r1) 160# define task_sp(task) (task_regs(task)->r1)
161# define task_pc(task) (task_regs(task)->pc) 161# define task_pc(task) (task_regs(task)->pc)
diff --git a/arch/microblaze/include/asm/prom.h b/arch/microblaze/include/asm/prom.h
index 2e72af078b05..d0890d36ef61 100644
--- a/arch/microblaze/include/asm/prom.h
+++ b/arch/microblaze/include/asm/prom.h
@@ -64,21 +64,6 @@ extern void kdump_move_device_tree(void);
64/* CPU OF node matching */ 64/* CPU OF node matching */
65struct device_node *of_get_cpu_node(int cpu, unsigned int *thread); 65struct device_node *of_get_cpu_node(int cpu, unsigned int *thread);
66 66
67/**
68 * of_irq_map_pci - Resolve the interrupt for a PCI device
69 * @pdev: the device whose interrupt is to be resolved
70 * @out_irq: structure of_irq filled by this function
71 *
72 * This function resolves the PCI interrupt for a given PCI device. If a
73 * device-node exists for a given pci_dev, it will use normal OF tree
74 * walking. If not, it will implement standard swizzling and walk up the
75 * PCI tree until an device-node is found, at which point it will finish
76 * resolving using the OF tree walking.
77 */
78struct pci_dev;
79struct of_irq;
80extern int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq);
81
82#endif /* __ASSEMBLY__ */ 67#endif /* __ASSEMBLY__ */
83#endif /* __KERNEL__ */ 68#endif /* __KERNEL__ */
84 69
diff --git a/arch/microblaze/include/asm/ptrace.h b/arch/microblaze/include/asm/ptrace.h
index d74dbfb92c04..d9b66304d5dd 100644
--- a/arch/microblaze/include/asm/ptrace.h
+++ b/arch/microblaze/include/asm/ptrace.h
@@ -66,13 +66,13 @@ void show_regs(struct pt_regs *);
66#else /* __KERNEL__ */ 66#else /* __KERNEL__ */
67 67
68/* pt_regs offsets used by gdbserver etc in ptrace syscalls */ 68/* pt_regs offsets used by gdbserver etc in ptrace syscalls */
69#define PT_GPR(n) ((n) * sizeof(microblaze_reg_t)) 69#define PT_GPR(n) ((n) * sizeof(microblaze_reg_t))
70#define PT_PC (32 * sizeof(microblaze_reg_t)) 70#define PT_PC (32 * sizeof(microblaze_reg_t))
71#define PT_MSR (33 * sizeof(microblaze_reg_t)) 71#define PT_MSR (33 * sizeof(microblaze_reg_t))
72#define PT_EAR (34 * sizeof(microblaze_reg_t)) 72#define PT_EAR (34 * sizeof(microblaze_reg_t))
73#define PT_ESR (35 * sizeof(microblaze_reg_t)) 73#define PT_ESR (35 * sizeof(microblaze_reg_t))
74#define PT_FSR (36 * sizeof(microblaze_reg_t)) 74#define PT_FSR (36 * sizeof(microblaze_reg_t))
75#define PT_KERNEL_MODE (37 * sizeof(microblaze_reg_t)) 75#define PT_KERNEL_MODE (37 * sizeof(microblaze_reg_t))
76 76
77#endif /* __KERNEL */ 77#endif /* __KERNEL */
78 78
diff --git a/arch/microblaze/include/asm/syscall.h b/arch/microblaze/include/asm/syscall.h
index 048dfcd8d89d..9bc431783105 100644
--- a/arch/microblaze/include/asm/syscall.h
+++ b/arch/microblaze/include/asm/syscall.h
@@ -96,4 +96,7 @@ static inline void syscall_set_arguments(struct task_struct *task,
96 microblaze_set_syscall_arg(regs, i++, *args++); 96 microblaze_set_syscall_arg(regs, i++, *args++);
97} 97}
98 98
99asmlinkage long do_syscall_trace_enter(struct pt_regs *regs);
100asmlinkage void do_syscall_trace_leave(struct pt_regs *regs);
101
99#endif /* __ASM_MICROBLAZE_SYSCALL_H */ 102#endif /* __ASM_MICROBLAZE_SYSCALL_H */
diff --git a/arch/microblaze/include/asm/syscalls.h b/arch/microblaze/include/asm/syscalls.h
index 720761cc741f..27f2f4c0f39f 100644
--- a/arch/microblaze/include/asm/syscalls.h
+++ b/arch/microblaze/include/asm/syscalls.h
@@ -1,5 +1,13 @@
1#ifndef __ASM_MICROBLAZE_SYSCALLS_H 1#ifndef __ASM_MICROBLAZE_SYSCALLS_H
2 2
3asmlinkage long microblaze_vfork(struct pt_regs *regs);
4asmlinkage long microblaze_clone(int flags, unsigned long stack,
5 struct pt_regs *regs);
6asmlinkage long microblaze_execve(const char __user *filenamei,
7 const char __user *const __user *argv,
8 const char __user *const __user *envp,
9 struct pt_regs *regs);
10
3asmlinkage long sys_clone(int flags, unsigned long stack, struct pt_regs *regs); 11asmlinkage long sys_clone(int flags, unsigned long stack, struct pt_regs *regs);
4#define sys_clone sys_clone 12#define sys_clone sys_clone
5 13
diff --git a/arch/microblaze/include/asm/uaccess.h b/arch/microblaze/include/asm/uaccess.h
index d840f4a2d3c9..5bb95a11880d 100644
--- a/arch/microblaze/include/asm/uaccess.h
+++ b/arch/microblaze/include/asm/uaccess.h
@@ -120,16 +120,16 @@ static inline unsigned long __must_check __clear_user(void __user *to,
120{ 120{
121 /* normal memset with two words to __ex_table */ 121 /* normal memset with two words to __ex_table */
122 __asm__ __volatile__ ( \ 122 __asm__ __volatile__ ( \
123 "1: sb r0, %2, r0;" \ 123 "1: sb r0, %1, r0;" \
124 " addik %0, %0, -1;" \ 124 " addik %0, %0, -1;" \
125 " bneid %0, 1b;" \ 125 " bneid %0, 1b;" \
126 " addik %2, %2, 1;" \ 126 " addik %1, %1, 1;" \
127 "2: " \ 127 "2: " \
128 __EX_TABLE_SECTION \ 128 __EX_TABLE_SECTION \
129 ".word 1b,2b;" \ 129 ".word 1b,2b;" \
130 ".previous;" \ 130 ".previous;" \
131 : "=r"(n) \ 131 : "=r"(n), "=r"(to) \
132 : "0"(n), "r"(to) 132 : "0"(n), "1"(to)
133 ); 133 );
134 return n; 134 return n;
135} 135}
diff --git a/arch/microblaze/include/asm/unaligned.h b/arch/microblaze/include/asm/unaligned.h
index 2b97cbe500e9..b162ed880495 100644
--- a/arch/microblaze/include/asm/unaligned.h
+++ b/arch/microblaze/include/asm/unaligned.h
@@ -12,18 +12,19 @@
12 12
13# ifdef __KERNEL__ 13# ifdef __KERNEL__
14 14
15# include <linux/unaligned/be_byteshift.h>
16# include <linux/unaligned/le_byteshift.h>
17# include <linux/unaligned/generic.h>
18
19
20# ifdef __MICROBLAZEEL__ 15# ifdef __MICROBLAZEEL__
16# include <linux/unaligned/le_struct.h>
17# include <linux/unaligned/be_byteshift.h>
21# define get_unaligned __get_unaligned_le 18# define get_unaligned __get_unaligned_le
22# define put_unaligned __put_unaligned_le 19# define put_unaligned __put_unaligned_le
23# else 20# else
21# include <linux/unaligned/be_struct.h>
22# include <linux/unaligned/le_byteshift.h>
24# define get_unaligned __get_unaligned_be 23# define get_unaligned __get_unaligned_be
25# define put_unaligned __put_unaligned_be 24# define put_unaligned __put_unaligned_be
26# endif 25# endif
27 26
27# include <linux/unaligned/generic.h>
28
28# endif /* __KERNEL__ */ 29# endif /* __KERNEL__ */
29#endif /* _ASM_MICROBLAZE_UNALIGNED_H */ 30#endif /* _ASM_MICROBLAZE_UNALIGNED_H */
diff --git a/arch/microblaze/include/asm/unistd.h b/arch/microblaze/include/asm/unistd.h
index d770b00ec6b1..30edd61a6b8f 100644
--- a/arch/microblaze/include/asm/unistd.h
+++ b/arch/microblaze/include/asm/unistd.h
@@ -386,8 +386,12 @@
386#define __NR_fanotify_init 368 386#define __NR_fanotify_init 368
387#define __NR_fanotify_mark 369 387#define __NR_fanotify_mark 369
388#define __NR_prlimit64 370 388#define __NR_prlimit64 370
389#define __NR_name_to_handle_at 371
390#define __NR_open_by_handle_at 372
391#define __NR_clock_adjtime 373
392#define __NR_syncfs 374
389 393
390#define __NR_syscalls 371 394#define __NR_syscalls 375
391 395
392#ifdef __KERNEL__ 396#ifdef __KERNEL__
393#ifndef __ASSEMBLY__ 397#ifndef __ASSEMBLY__
diff --git a/arch/microblaze/kernel/Makefile b/arch/microblaze/kernel/Makefile
index f0cb5c26c81c..494b63b72dd7 100644
--- a/arch/microblaze/kernel/Makefile
+++ b/arch/microblaze/kernel/Makefile
@@ -10,6 +10,7 @@ CFLAGS_REMOVE_early_printk.o = -pg
10CFLAGS_REMOVE_selfmod.o = -pg 10CFLAGS_REMOVE_selfmod.o = -pg
11CFLAGS_REMOVE_heartbeat.o = -pg 11CFLAGS_REMOVE_heartbeat.o = -pg
12CFLAGS_REMOVE_ftrace.o = -pg 12CFLAGS_REMOVE_ftrace.o = -pg
13CFLAGS_REMOVE_process.o = -pg
13endif 14endif
14 15
15extra-y := head.o vmlinux.lds 16extra-y := head.o vmlinux.lds
diff --git a/arch/microblaze/kernel/cpu/Makefile b/arch/microblaze/kernel/cpu/Makefile
index 59cc7bceaf8c..fceed4edea41 100644
--- a/arch/microblaze/kernel/cpu/Makefile
+++ b/arch/microblaze/kernel/cpu/Makefile
@@ -6,7 +6,7 @@ ifdef CONFIG_FUNCTION_TRACER
6CFLAGS_REMOVE_cache.o = -pg 6CFLAGS_REMOVE_cache.o = -pg
7endif 7endif
8 8
9EXTRA_CFLAGS += -DCPU_MAJOR=$(CPU_MAJOR) -DCPU_MINOR=$(CPU_MINOR) \ 9ccflags-y := -DCPU_MAJOR=$(CPU_MAJOR) -DCPU_MINOR=$(CPU_MINOR) \
10 -DCPU_REV=$(CPU_REV) 10 -DCPU_REV=$(CPU_REV)
11 11
12obj-y += cache.o cpuinfo.o cpuinfo-pvr-full.o cpuinfo-static.o mb.o pvr.o 12obj-y += cache.o cpuinfo.o cpuinfo-pvr-full.o cpuinfo-static.o mb.o pvr.o
diff --git a/arch/microblaze/kernel/cpu/cache.c b/arch/microblaze/kernel/cpu/cache.c
index 109876e8d643..4b7d8a3f4aef 100644
--- a/arch/microblaze/kernel/cpu/cache.c
+++ b/arch/microblaze/kernel/cpu/cache.c
@@ -129,7 +129,7 @@ do { \
129 * to use for simple wdc or wic. 129 * to use for simple wdc or wic.
130 * 130 *
131 * start address is cache aligned 131 * start address is cache aligned
132 * end address is not aligned, if end is aligned then I have to substract 132 * end address is not aligned, if end is aligned then I have to subtract
133 * cacheline length because I can't flush/invalidate the next cacheline. 133 * cacheline length because I can't flush/invalidate the next cacheline.
134 * If is not, I align it because I will flush/invalidate whole line. 134 * If is not, I align it because I will flush/invalidate whole line.
135 */ 135 */
@@ -519,7 +519,7 @@ static void __flush_dcache_range_wb(unsigned long start, unsigned long end)
519struct scache *mbc; 519struct scache *mbc;
520 520
521/* new wb cache model */ 521/* new wb cache model */
522const struct scache wb_msr = { 522static const struct scache wb_msr = {
523 .ie = __enable_icache_msr, 523 .ie = __enable_icache_msr,
524 .id = __disable_icache_msr, 524 .id = __disable_icache_msr,
525 .ifl = __flush_icache_all_noirq, 525 .ifl = __flush_icache_all_noirq,
@@ -535,7 +535,7 @@ const struct scache wb_msr = {
535}; 535};
536 536
537/* There is only difference in ie, id, de, dd functions */ 537/* There is only difference in ie, id, de, dd functions */
538const struct scache wb_nomsr = { 538static const struct scache wb_nomsr = {
539 .ie = __enable_icache_nomsr, 539 .ie = __enable_icache_nomsr,
540 .id = __disable_icache_nomsr, 540 .id = __disable_icache_nomsr,
541 .ifl = __flush_icache_all_noirq, 541 .ifl = __flush_icache_all_noirq,
@@ -551,7 +551,7 @@ const struct scache wb_nomsr = {
551}; 551};
552 552
553/* Old wt cache model with disabling irq and turn off cache */ 553/* Old wt cache model with disabling irq and turn off cache */
554const struct scache wt_msr = { 554static const struct scache wt_msr = {
555 .ie = __enable_icache_msr, 555 .ie = __enable_icache_msr,
556 .id = __disable_icache_msr, 556 .id = __disable_icache_msr,
557 .ifl = __flush_icache_all_msr_irq, 557 .ifl = __flush_icache_all_msr_irq,
@@ -566,7 +566,7 @@ const struct scache wt_msr = {
566 .dinr = __invalidate_dcache_range_msr_irq_wt, 566 .dinr = __invalidate_dcache_range_msr_irq_wt,
567}; 567};
568 568
569const struct scache wt_nomsr = { 569static const struct scache wt_nomsr = {
570 .ie = __enable_icache_nomsr, 570 .ie = __enable_icache_nomsr,
571 .id = __disable_icache_nomsr, 571 .id = __disable_icache_nomsr,
572 .ifl = __flush_icache_all_nomsr_irq, 572 .ifl = __flush_icache_all_nomsr_irq,
@@ -582,7 +582,7 @@ const struct scache wt_nomsr = {
582}; 582};
583 583
584/* New wt cache model for newer Microblaze versions */ 584/* New wt cache model for newer Microblaze versions */
585const struct scache wt_msr_noirq = { 585static const struct scache wt_msr_noirq = {
586 .ie = __enable_icache_msr, 586 .ie = __enable_icache_msr,
587 .id = __disable_icache_msr, 587 .id = __disable_icache_msr,
588 .ifl = __flush_icache_all_noirq, 588 .ifl = __flush_icache_all_noirq,
@@ -597,7 +597,7 @@ const struct scache wt_msr_noirq = {
597 .dinr = __invalidate_dcache_range_nomsr_wt, 597 .dinr = __invalidate_dcache_range_nomsr_wt,
598}; 598};
599 599
600const struct scache wt_nomsr_noirq = { 600static const struct scache wt_nomsr_noirq = {
601 .ie = __enable_icache_nomsr, 601 .ie = __enable_icache_nomsr,
602 .id = __disable_icache_nomsr, 602 .id = __disable_icache_nomsr,
603 .ifl = __flush_icache_all_noirq, 603 .ifl = __flush_icache_all_noirq,
@@ -624,7 +624,7 @@ void microblaze_cache_init(void)
624 if (cpuinfo.dcache_wb) { 624 if (cpuinfo.dcache_wb) {
625 INFO("wb_msr"); 625 INFO("wb_msr");
626 mbc = (struct scache *)&wb_msr; 626 mbc = (struct scache *)&wb_msr;
627 if (cpuinfo.ver_code < CPUVER_7_20_D) { 627 if (cpuinfo.ver_code <= CPUVER_7_20_D) {
628 /* MS: problem with signal handling - hw bug */ 628 /* MS: problem with signal handling - hw bug */
629 INFO("WB won't work properly"); 629 INFO("WB won't work properly");
630 } 630 }
@@ -641,7 +641,7 @@ void microblaze_cache_init(void)
641 if (cpuinfo.dcache_wb) { 641 if (cpuinfo.dcache_wb) {
642 INFO("wb_nomsr"); 642 INFO("wb_nomsr");
643 mbc = (struct scache *)&wb_nomsr; 643 mbc = (struct scache *)&wb_nomsr;
644 if (cpuinfo.ver_code < CPUVER_7_20_D) { 644 if (cpuinfo.ver_code <= CPUVER_7_20_D) {
645 /* MS: problem with signal handling - hw bug */ 645 /* MS: problem with signal handling - hw bug */
646 INFO("WB won't work properly"); 646 INFO("WB won't work properly");
647 } 647 }
diff --git a/arch/microblaze/kernel/cpu/cpuinfo.c b/arch/microblaze/kernel/cpu/cpuinfo.c
index 2c309fccf230..c1640c52711f 100644
--- a/arch/microblaze/kernel/cpu/cpuinfo.c
+++ b/arch/microblaze/kernel/cpu/cpuinfo.c
@@ -33,6 +33,7 @@ const struct cpu_ver_key cpu_ver_lookup[] = {
33 {"7.30.b", 0x11}, 33 {"7.30.b", 0x11},
34 {"8.00.a", 0x12}, 34 {"8.00.a", 0x12},
35 {"8.00.b", 0x13}, 35 {"8.00.b", 0x13},
36 {"8.10.a", 0x14},
36 {NULL, 0}, 37 {NULL, 0},
37}; 38};
38 39
diff --git a/arch/microblaze/kernel/dma.c b/arch/microblaze/kernel/dma.c
index 79c74659f204..393e6b2db688 100644
--- a/arch/microblaze/kernel/dma.c
+++ b/arch/microblaze/kernel/dma.c
@@ -26,6 +26,7 @@ static inline void __dma_sync_page(unsigned long paddr, unsigned long offset,
26{ 26{
27 switch (direction) { 27 switch (direction) {
28 case DMA_TO_DEVICE: 28 case DMA_TO_DEVICE:
29 case DMA_BIDIRECTIONAL:
29 flush_dcache_range(paddr + offset, paddr + offset + size); 30 flush_dcache_range(paddr + offset, paddr + offset + size);
30 break; 31 break;
31 case DMA_FROM_DEVICE: 32 case DMA_FROM_DEVICE:
diff --git a/arch/microblaze/kernel/entry-nommu.S b/arch/microblaze/kernel/entry-nommu.S
index ca84368570b6..34b526f59b43 100644
--- a/arch/microblaze/kernel/entry-nommu.S
+++ b/arch/microblaze/kernel/entry-nommu.S
@@ -115,7 +115,7 @@ ENTRY(_interrupt)
115 /* restore r31 */ 115 /* restore r31 */
116 lwi r31, r0, PER_CPU(CURRENT_SAVE) 116 lwi r31, r0, PER_CPU(CURRENT_SAVE)
117 /* prepare the link register, the argument and jump */ 117 /* prepare the link register, the argument and jump */
118 la r15, r0, ret_from_intr - 8 118 addik r15, r0, ret_from_intr - 8
119 addk r6, r0, r15 119 addk r6, r0, r15
120 braid do_IRQ 120 braid do_IRQ
121 add r5, r0, r1 121 add r5, r0, r1
@@ -283,7 +283,7 @@ ENTRY(_user_exception)
283 add r12, r12, r12 /* convert num -> ptr */ 283 add r12, r12, r12 /* convert num -> ptr */
284 add r12, r12, r12 284 add r12, r12, r12
285 lwi r12, r12, sys_call_table /* Get function pointer */ 285 lwi r12, r12, sys_call_table /* Get function pointer */
286 la r15, r0, ret_to_user-8 /* set return address */ 286 addik r15, r0, ret_to_user-8 /* set return address */
287 bra r12 /* Make the system call. */ 287 bra r12 /* Make the system call. */
288 bri 0 /* won't reach here */ 288 bri 0 /* won't reach here */
2891: 2891:
diff --git a/arch/microblaze/kernel/entry.S b/arch/microblaze/kernel/entry.S
index 41c30cdb2704..ca15bc5c7449 100644
--- a/arch/microblaze/kernel/entry.S
+++ b/arch/microblaze/kernel/entry.S
@@ -33,11 +33,14 @@
33 33
34#undef DEBUG 34#undef DEBUG
35 35
36/* The size of a state save frame. */ 36#ifdef DEBUG
37#define STATE_SAVE_SIZE (PT_SIZE + STATE_SAVE_ARG_SPACE) 37/* Create space for syscalls counting. */
38 38.section .data
39/* The offset of the struct pt_regs in a `state save frame' on the stack. */ 39.global syscall_debug_table
40#define PTO STATE_SAVE_ARG_SPACE /* 24 the space for args */ 40.align 4
41syscall_debug_table:
42 .space (__NR_syscalls * 4)
43#endif /* DEBUG */
41 44
42#define C_ENTRY(name) .globl name; .align 4; name 45#define C_ENTRY(name) .globl name; .align 4; name
43 46
@@ -172,72 +175,72 @@
1721: 1751:
173 176
174#define SAVE_REGS \ 177#define SAVE_REGS \
175 swi r2, r1, PTO+PT_R2; /* Save SDA */ \ 178 swi r2, r1, PT_R2; /* Save SDA */ \
176 swi r3, r1, PTO+PT_R3; \ 179 swi r3, r1, PT_R3; \
177 swi r4, r1, PTO+PT_R4; \ 180 swi r4, r1, PT_R4; \
178 swi r5, r1, PTO+PT_R5; \ 181 swi r5, r1, PT_R5; \
179 swi r6, r1, PTO+PT_R6; \ 182 swi r6, r1, PT_R6; \
180 swi r7, r1, PTO+PT_R7; \ 183 swi r7, r1, PT_R7; \
181 swi r8, r1, PTO+PT_R8; \ 184 swi r8, r1, PT_R8; \
182 swi r9, r1, PTO+PT_R9; \ 185 swi r9, r1, PT_R9; \
183 swi r10, r1, PTO+PT_R10; \ 186 swi r10, r1, PT_R10; \
184 swi r11, r1, PTO+PT_R11; /* save clobbered regs after rval */\ 187 swi r11, r1, PT_R11; /* save clobbered regs after rval */\
185 swi r12, r1, PTO+PT_R12; \ 188 swi r12, r1, PT_R12; \
186 swi r13, r1, PTO+PT_R13; /* Save SDA2 */ \ 189 swi r13, r1, PT_R13; /* Save SDA2 */ \
187 swi r14, r1, PTO+PT_PC; /* PC, before IRQ/trap */ \ 190 swi r14, r1, PT_PC; /* PC, before IRQ/trap */ \
188 swi r15, r1, PTO+PT_R15; /* Save LP */ \ 191 swi r15, r1, PT_R15; /* Save LP */ \
189 swi r16, r1, PTO+PT_R16; \ 192 swi r16, r1, PT_R16; \
190 swi r17, r1, PTO+PT_R17; \ 193 swi r17, r1, PT_R17; \
191 swi r18, r1, PTO+PT_R18; /* Save asm scratch reg */ \ 194 swi r18, r1, PT_R18; /* Save asm scratch reg */ \
192 swi r19, r1, PTO+PT_R19; \ 195 swi r19, r1, PT_R19; \
193 swi r20, r1, PTO+PT_R20; \ 196 swi r20, r1, PT_R20; \
194 swi r21, r1, PTO+PT_R21; \ 197 swi r21, r1, PT_R21; \
195 swi r22, r1, PTO+PT_R22; \ 198 swi r22, r1, PT_R22; \
196 swi r23, r1, PTO+PT_R23; \ 199 swi r23, r1, PT_R23; \
197 swi r24, r1, PTO+PT_R24; \ 200 swi r24, r1, PT_R24; \
198 swi r25, r1, PTO+PT_R25; \ 201 swi r25, r1, PT_R25; \
199 swi r26, r1, PTO+PT_R26; \ 202 swi r26, r1, PT_R26; \
200 swi r27, r1, PTO+PT_R27; \ 203 swi r27, r1, PT_R27; \
201 swi r28, r1, PTO+PT_R28; \ 204 swi r28, r1, PT_R28; \
202 swi r29, r1, PTO+PT_R29; \ 205 swi r29, r1, PT_R29; \
203 swi r30, r1, PTO+PT_R30; \ 206 swi r30, r1, PT_R30; \
204 swi r31, r1, PTO+PT_R31; /* Save current task reg */ \ 207 swi r31, r1, PT_R31; /* Save current task reg */ \
205 mfs r11, rmsr; /* save MSR */ \ 208 mfs r11, rmsr; /* save MSR */ \
206 swi r11, r1, PTO+PT_MSR; 209 swi r11, r1, PT_MSR;
207 210
208#define RESTORE_REGS \ 211#define RESTORE_REGS \
209 lwi r11, r1, PTO+PT_MSR; \ 212 lwi r11, r1, PT_MSR; \
210 mts rmsr , r11; \ 213 mts rmsr , r11; \
211 lwi r2, r1, PTO+PT_R2; /* restore SDA */ \ 214 lwi r2, r1, PT_R2; /* restore SDA */ \
212 lwi r3, r1, PTO+PT_R3; \ 215 lwi r3, r1, PT_R3; \
213 lwi r4, r1, PTO+PT_R4; \ 216 lwi r4, r1, PT_R4; \
214 lwi r5, r1, PTO+PT_R5; \ 217 lwi r5, r1, PT_R5; \
215 lwi r6, r1, PTO+PT_R6; \ 218 lwi r6, r1, PT_R6; \
216 lwi r7, r1, PTO+PT_R7; \ 219 lwi r7, r1, PT_R7; \
217 lwi r8, r1, PTO+PT_R8; \ 220 lwi r8, r1, PT_R8; \
218 lwi r9, r1, PTO+PT_R9; \ 221 lwi r9, r1, PT_R9; \
219 lwi r10, r1, PTO+PT_R10; \ 222 lwi r10, r1, PT_R10; \
220 lwi r11, r1, PTO+PT_R11; /* restore clobbered regs after rval */\ 223 lwi r11, r1, PT_R11; /* restore clobbered regs after rval */\
221 lwi r12, r1, PTO+PT_R12; \ 224 lwi r12, r1, PT_R12; \
222 lwi r13, r1, PTO+PT_R13; /* restore SDA2 */ \ 225 lwi r13, r1, PT_R13; /* restore SDA2 */ \
223 lwi r14, r1, PTO+PT_PC; /* RESTORE_LINK PC, before IRQ/trap */\ 226 lwi r14, r1, PT_PC; /* RESTORE_LINK PC, before IRQ/trap */\
224 lwi r15, r1, PTO+PT_R15; /* restore LP */ \ 227 lwi r15, r1, PT_R15; /* restore LP */ \
225 lwi r16, r1, PTO+PT_R16; \ 228 lwi r16, r1, PT_R16; \
226 lwi r17, r1, PTO+PT_R17; \ 229 lwi r17, r1, PT_R17; \
227 lwi r18, r1, PTO+PT_R18; /* restore asm scratch reg */ \ 230 lwi r18, r1, PT_R18; /* restore asm scratch reg */ \
228 lwi r19, r1, PTO+PT_R19; \ 231 lwi r19, r1, PT_R19; \
229 lwi r20, r1, PTO+PT_R20; \ 232 lwi r20, r1, PT_R20; \
230 lwi r21, r1, PTO+PT_R21; \ 233 lwi r21, r1, PT_R21; \
231 lwi r22, r1, PTO+PT_R22; \ 234 lwi r22, r1, PT_R22; \
232 lwi r23, r1, PTO+PT_R23; \ 235 lwi r23, r1, PT_R23; \
233 lwi r24, r1, PTO+PT_R24; \ 236 lwi r24, r1, PT_R24; \
234 lwi r25, r1, PTO+PT_R25; \ 237 lwi r25, r1, PT_R25; \
235 lwi r26, r1, PTO+PT_R26; \ 238 lwi r26, r1, PT_R26; \
236 lwi r27, r1, PTO+PT_R27; \ 239 lwi r27, r1, PT_R27; \
237 lwi r28, r1, PTO+PT_R28; \ 240 lwi r28, r1, PT_R28; \
238 lwi r29, r1, PTO+PT_R29; \ 241 lwi r29, r1, PT_R29; \
239 lwi r30, r1, PTO+PT_R30; \ 242 lwi r30, r1, PT_R30; \
240 lwi r31, r1, PTO+PT_R31; /* Restore cur task reg */ 243 lwi r31, r1, PT_R31; /* Restore cur task reg */
241 244
242#define SAVE_STATE \ 245#define SAVE_STATE \
243 swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* save stack */ \ 246 swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* save stack */ \
@@ -250,11 +253,11 @@
250 lwi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); \ 253 lwi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); \
251 /* FIXME: I can add these two lines to one */ \ 254 /* FIXME: I can add these two lines to one */ \
252 /* tophys(r1,r1); */ \ 255 /* tophys(r1,r1); */ \
253 /* addik r1, r1, -STATE_SAVE_SIZE; */ \ 256 /* addik r1, r1, -PT_SIZE; */ \
254 addik r1, r1, CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - STATE_SAVE_SIZE; \ 257 addik r1, r1, CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - PT_SIZE; \
255 SAVE_REGS \ 258 SAVE_REGS \
256 brid 2f; \ 259 brid 2f; \
257 swi r1, r1, PTO+PT_MODE; \ 260 swi r1, r1, PT_MODE; \
2581: /* User-mode state save. */ \ 2611: /* User-mode state save. */ \
259 lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */\ 262 lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */\
260 tophys(r1,r1); \ 263 tophys(r1,r1); \
@@ -262,12 +265,12 @@
262 /* MS these three instructions can be added to one */ \ 265 /* MS these three instructions can be added to one */ \
263 /* addik r1, r1, THREAD_SIZE; */ \ 266 /* addik r1, r1, THREAD_SIZE; */ \
264 /* tophys(r1,r1); */ \ 267 /* tophys(r1,r1); */ \
265 /* addik r1, r1, -STATE_SAVE_SIZE; */ \ 268 /* addik r1, r1, -PT_SIZE; */ \
266 addik r1, r1, THREAD_SIZE + CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - STATE_SAVE_SIZE; \ 269 addik r1, r1, THREAD_SIZE + CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - PT_SIZE; \
267 SAVE_REGS \ 270 SAVE_REGS \
268 lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); \ 271 lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); \
269 swi r11, r1, PTO+PT_R1; /* Store user SP. */ \ 272 swi r11, r1, PT_R1; /* Store user SP. */ \
270 swi r0, r1, PTO + PT_MODE; /* Was in user-mode. */ \ 273 swi r0, r1, PT_MODE; /* Was in user-mode. */ \
271 /* MS: I am clearing UMS even in case when I come from kernel space */ \ 274 /* MS: I am clearing UMS even in case when I come from kernel space */ \
272 clear_ums; \ 275 clear_ums; \
2732: lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); 2762: lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
@@ -299,10 +302,10 @@ C_ENTRY(_user_exception):
299 lwi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* Reload kernel stack-ptr*/ 302 lwi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* Reload kernel stack-ptr*/
300 tophys(r1,r1); 303 tophys(r1,r1);
301 304
302 addik r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */ 305 addik r1, r1, -PT_SIZE; /* Make room on the stack. */
303 SAVE_REGS 306 SAVE_REGS
304 307
305 swi r1, r1, PTO + PT_MODE; /* pt_regs -> kernel mode */ 308 swi r1, r1, PT_MODE; /* pt_regs -> kernel mode */
306 brid 2f; 309 brid 2f;
307 nop; /* Fill delay slot */ 310 nop; /* Fill delay slot */
308 311
@@ -315,18 +318,18 @@ C_ENTRY(_user_exception):
315 addik r1, r1, THREAD_SIZE; 318 addik r1, r1, THREAD_SIZE;
316 tophys(r1,r1); 319 tophys(r1,r1);
317 320
318 addik r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */ 321 addik r1, r1, -PT_SIZE; /* Make room on the stack. */
319 SAVE_REGS 322 SAVE_REGS
320 swi r0, r1, PTO + PT_R3 323 swi r0, r1, PT_R3
321 swi r0, r1, PTO + PT_R4 324 swi r0, r1, PT_R4
322 325
323 swi r0, r1, PTO + PT_MODE; /* Was in user-mode. */ 326 swi r0, r1, PT_MODE; /* Was in user-mode. */
324 lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); 327 lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
325 swi r11, r1, PTO+PT_R1; /* Store user SP. */ 328 swi r11, r1, PT_R1; /* Store user SP. */
326 clear_ums; 329 clear_ums;
3272: lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); 3302: lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
328 /* Save away the syscall number. */ 331 /* Save away the syscall number. */
329 swi r12, r1, PTO+PT_R0; 332 swi r12, r1, PT_R0;
330 tovirt(r1,r1) 333 tovirt(r1,r1)
331 334
332/* where the trap should return need -8 to adjust for rtsd r15, 8*/ 335/* where the trap should return need -8 to adjust for rtsd r15, 8*/
@@ -345,18 +348,18 @@ C_ENTRY(_user_exception):
345 beqi r11, 4f 348 beqi r11, 4f
346 349
347 addik r3, r0, -ENOSYS 350 addik r3, r0, -ENOSYS
348 swi r3, r1, PTO + PT_R3 351 swi r3, r1, PT_R3
349 brlid r15, do_syscall_trace_enter 352 brlid r15, do_syscall_trace_enter
350 addik r5, r1, PTO + PT_R0 353 addik r5, r1, PT_R0
351 354
352 # do_syscall_trace_enter returns the new syscall nr. 355 # do_syscall_trace_enter returns the new syscall nr.
353 addk r12, r0, r3 356 addk r12, r0, r3
354 lwi r5, r1, PTO+PT_R5; 357 lwi r5, r1, PT_R5;
355 lwi r6, r1, PTO+PT_R6; 358 lwi r6, r1, PT_R6;
356 lwi r7, r1, PTO+PT_R7; 359 lwi r7, r1, PT_R7;
357 lwi r8, r1, PTO+PT_R8; 360 lwi r8, r1, PT_R8;
358 lwi r9, r1, PTO+PT_R9; 361 lwi r9, r1, PT_R9;
359 lwi r10, r1, PTO+PT_R10; 362 lwi r10, r1, PT_R10;
3604: 3634:
361/* Jump to the appropriate function for the system call number in r12 364/* Jump to the appropriate function for the system call number in r12
362 * (r12 is not preserved), or return an error if r12 is not valid. 365 * (r12 is not preserved), or return an error if r12 is not valid.
@@ -371,10 +374,14 @@ C_ENTRY(_user_exception):
371 add r12, r12, r12; 374 add r12, r12, r12;
372 375
373#ifdef DEBUG 376#ifdef DEBUG
374 /* Trac syscalls and stored them to r0_ram */ 377 /* Trac syscalls and stored them to syscall_debug_table */
375 lwi r3, r12, 0x400 + r0_ram 378 /* The first syscall location stores total syscall number */
379 lwi r3, r0, syscall_debug_table
380 addi r3, r3, 1
381 swi r3, r0, syscall_debug_table
382 lwi r3, r12, syscall_debug_table
376 addi r3, r3, 1 383 addi r3, r3, 1
377 swi r3, r12, 0x400 + r0_ram 384 swi r3, r12, syscall_debug_table
378#endif 385#endif
379 386
380 # Find and jump into the syscall handler. 387 # Find and jump into the syscall handler.
@@ -391,10 +398,10 @@ C_ENTRY(_user_exception):
391/* Entry point used to return from a syscall/trap */ 398/* Entry point used to return from a syscall/trap */
392/* We re-enable BIP bit before state restore */ 399/* We re-enable BIP bit before state restore */
393C_ENTRY(ret_from_trap): 400C_ENTRY(ret_from_trap):
394 swi r3, r1, PTO + PT_R3 401 swi r3, r1, PT_R3
395 swi r4, r1, PTO + PT_R4 402 swi r4, r1, PT_R4
396 403
397 lwi r11, r1, PTO + PT_MODE; 404 lwi r11, r1, PT_MODE;
398/* See if returning to kernel mode, if so, skip resched &c. */ 405/* See if returning to kernel mode, if so, skip resched &c. */
399 bnei r11, 2f; 406 bnei r11, 2f;
400 /* We're returning to user mode, so check for various conditions that 407 /* We're returning to user mode, so check for various conditions that
@@ -406,7 +413,7 @@ C_ENTRY(ret_from_trap):
406 beqi r11, 1f 413 beqi r11, 1f
407 414
408 brlid r15, do_syscall_trace_leave 415 brlid r15, do_syscall_trace_leave
409 addik r5, r1, PTO + PT_R0 416 addik r5, r1, PT_R0
4101: 4171:
411 /* We're returning to user mode, so check for various conditions that 418 /* We're returning to user mode, so check for various conditions that
412 * trigger rescheduling. */ 419 * trigger rescheduling. */
@@ -426,7 +433,7 @@ C_ENTRY(ret_from_trap):
426 andi r11, r11, _TIF_SIGPENDING; 433 andi r11, r11, _TIF_SIGPENDING;
427 beqi r11, 1f; /* Signals to handle, handle them */ 434 beqi r11, 1f; /* Signals to handle, handle them */
428 435
429 addik r5, r1, PTO; /* Arg 1: struct pt_regs *regs */ 436 addik r5, r1, 0; /* Arg 1: struct pt_regs *regs */
430 addi r7, r0, 1; /* Arg 3: int in_syscall */ 437 addi r7, r0, 1; /* Arg 3: int in_syscall */
431 bralid r15, do_signal; /* Handle any signals */ 438 bralid r15, do_signal; /* Handle any signals */
432 add r6, r0, r0; /* Arg 2: sigset_t *oldset */ 439 add r6, r0, r0; /* Arg 2: sigset_t *oldset */
@@ -437,7 +444,7 @@ C_ENTRY(ret_from_trap):
437 VM_OFF; 444 VM_OFF;
438 tophys(r1,r1); 445 tophys(r1,r1);
439 RESTORE_REGS; 446 RESTORE_REGS;
440 addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */ 447 addik r1, r1, PT_SIZE /* Clean up stack space. */
441 lwi r1, r1, PT_R1 - PT_SIZE;/* Restore user stack pointer. */ 448 lwi r1, r1, PT_R1 - PT_SIZE;/* Restore user stack pointer. */
442 bri 6f; 449 bri 6f;
443 450
@@ -446,7 +453,7 @@ C_ENTRY(ret_from_trap):
446 VM_OFF; 453 VM_OFF;
447 tophys(r1,r1); 454 tophys(r1,r1);
448 RESTORE_REGS; 455 RESTORE_REGS;
449 addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */ 456 addik r1, r1, PT_SIZE /* Clean up stack space. */
450 tovirt(r1,r1); 457 tovirt(r1,r1);
4516: 4586:
452TRAP_return: /* Make global symbol for debugging */ 459TRAP_return: /* Make global symbol for debugging */
@@ -459,8 +466,8 @@ TRAP_return: /* Make global symbol for debugging */
459 466
460C_ENTRY(sys_fork_wrapper): 467C_ENTRY(sys_fork_wrapper):
461 addi r5, r0, SIGCHLD /* Arg 0: flags */ 468 addi r5, r0, SIGCHLD /* Arg 0: flags */
462 lwi r6, r1, PTO+PT_R1 /* Arg 1: child SP (use parent's) */ 469 lwi r6, r1, PT_R1 /* Arg 1: child SP (use parent's) */
463 addik r7, r1, PTO /* Arg 2: parent context */ 470 addik r7, r1, 0 /* Arg 2: parent context */
464 add r8. r0, r0 /* Arg 3: (unused) */ 471 add r8. r0, r0 /* Arg 3: (unused) */
465 add r9, r0, r0; /* Arg 4: (unused) */ 472 add r9, r0, r0; /* Arg 4: (unused) */
466 brid do_fork /* Do real work (tail-call) */ 473 brid do_fork /* Do real work (tail-call) */
@@ -480,12 +487,12 @@ C_ENTRY(ret_from_fork):
480 487
481C_ENTRY(sys_vfork): 488C_ENTRY(sys_vfork):
482 brid microblaze_vfork /* Do real work (tail-call) */ 489 brid microblaze_vfork /* Do real work (tail-call) */
483 addik r5, r1, PTO 490 addik r5, r1, 0
484 491
485C_ENTRY(sys_clone): 492C_ENTRY(sys_clone):
486 bnei r6, 1f; /* See if child SP arg (arg 1) is 0. */ 493 bnei r6, 1f; /* See if child SP arg (arg 1) is 0. */
487 lwi r6, r1, PTO + PT_R1; /* If so, use paret's stack ptr */ 494 lwi r6, r1, PT_R1; /* If so, use paret's stack ptr */
4881: addik r7, r1, PTO; /* Arg 2: parent context */ 4951: addik r7, r1, 0; /* Arg 2: parent context */
489 add r8, r0, r0; /* Arg 3: (unused) */ 496 add r8, r0, r0; /* Arg 3: (unused) */
490 add r9, r0, r0; /* Arg 4: (unused) */ 497 add r9, r0, r0; /* Arg 4: (unused) */
491 brid do_fork /* Do real work (tail-call) */ 498 brid do_fork /* Do real work (tail-call) */
@@ -493,11 +500,11 @@ C_ENTRY(sys_clone):
493 500
494C_ENTRY(sys_execve): 501C_ENTRY(sys_execve):
495 brid microblaze_execve; /* Do real work (tail-call).*/ 502 brid microblaze_execve; /* Do real work (tail-call).*/
496 addik r8, r1, PTO; /* add user context as 4th arg */ 503 addik r8, r1, 0; /* add user context as 4th arg */
497 504
498C_ENTRY(sys_rt_sigreturn_wrapper): 505C_ENTRY(sys_rt_sigreturn_wrapper):
499 brid sys_rt_sigreturn /* Do real work */ 506 brid sys_rt_sigreturn /* Do real work */
500 addik r5, r1, PTO; /* add user context as 1st arg */ 507 addik r5, r1, 0; /* add user context as 1st arg */
501 508
502/* 509/*
503 * HW EXCEPTION rutine start 510 * HW EXCEPTION rutine start
@@ -508,7 +515,7 @@ C_ENTRY(full_exception_trap):
508 addik r17, r17, -4 515 addik r17, r17, -4
509 SAVE_STATE /* Save registers */ 516 SAVE_STATE /* Save registers */
510 /* PC, before IRQ/trap - this is one instruction above */ 517 /* PC, before IRQ/trap - this is one instruction above */
511 swi r17, r1, PTO+PT_PC; 518 swi r17, r1, PT_PC;
512 tovirt(r1,r1) 519 tovirt(r1,r1)
513 /* FIXME this can be store directly in PT_ESR reg. 520 /* FIXME this can be store directly in PT_ESR reg.
514 * I tested it but there is a fault */ 521 * I tested it but there is a fault */
@@ -518,7 +525,7 @@ C_ENTRY(full_exception_trap):
518 mfs r7, rfsr; /* save FSR */ 525 mfs r7, rfsr; /* save FSR */
519 mts rfsr, r0; /* Clear sticky fsr */ 526 mts rfsr, r0; /* Clear sticky fsr */
520 rted r0, full_exception 527 rted r0, full_exception
521 addik r5, r1, PTO /* parameter struct pt_regs * regs */ 528 addik r5, r1, 0 /* parameter struct pt_regs * regs */
522 529
523/* 530/*
524 * Unaligned data trap. 531 * Unaligned data trap.
@@ -544,14 +551,14 @@ C_ENTRY(unaligned_data_trap):
544 lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); 551 lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
545 SAVE_STATE /* Save registers.*/ 552 SAVE_STATE /* Save registers.*/
546 /* PC, before IRQ/trap - this is one instruction above */ 553 /* PC, before IRQ/trap - this is one instruction above */
547 swi r17, r1, PTO+PT_PC; 554 swi r17, r1, PT_PC;
548 tovirt(r1,r1) 555 tovirt(r1,r1)
549 /* where the trap should return need -8 to adjust for rtsd r15, 8 */ 556 /* where the trap should return need -8 to adjust for rtsd r15, 8 */
550 addik r15, r0, ret_from_exc-8 557 addik r15, r0, ret_from_exc-8
551 mfs r3, resr /* ESR */ 558 mfs r3, resr /* ESR */
552 mfs r4, rear /* EAR */ 559 mfs r4, rear /* EAR */
553 rtbd r0, _unaligned_data_exception 560 rtbd r0, _unaligned_data_exception
554 addik r7, r1, PTO /* parameter struct pt_regs * regs */ 561 addik r7, r1, 0 /* parameter struct pt_regs * regs */
555 562
556/* 563/*
557 * Page fault traps. 564 * Page fault traps.
@@ -574,30 +581,30 @@ C_ENTRY(unaligned_data_trap):
574C_ENTRY(page_fault_data_trap): 581C_ENTRY(page_fault_data_trap):
575 SAVE_STATE /* Save registers.*/ 582 SAVE_STATE /* Save registers.*/
576 /* PC, before IRQ/trap - this is one instruction above */ 583 /* PC, before IRQ/trap - this is one instruction above */
577 swi r17, r1, PTO+PT_PC; 584 swi r17, r1, PT_PC;
578 tovirt(r1,r1) 585 tovirt(r1,r1)
579 /* where the trap should return need -8 to adjust for rtsd r15, 8 */ 586 /* where the trap should return need -8 to adjust for rtsd r15, 8 */
580 addik r15, r0, ret_from_exc-8 587 addik r15, r0, ret_from_exc-8
581 mfs r6, rear /* parameter unsigned long address */ 588 mfs r6, rear /* parameter unsigned long address */
582 mfs r7, resr /* parameter unsigned long error_code */ 589 mfs r7, resr /* parameter unsigned long error_code */
583 rted r0, do_page_fault 590 rted r0, do_page_fault
584 addik r5, r1, PTO /* parameter struct pt_regs * regs */ 591 addik r5, r1, 0 /* parameter struct pt_regs * regs */
585 592
586C_ENTRY(page_fault_instr_trap): 593C_ENTRY(page_fault_instr_trap):
587 SAVE_STATE /* Save registers.*/ 594 SAVE_STATE /* Save registers.*/
588 /* PC, before IRQ/trap - this is one instruction above */ 595 /* PC, before IRQ/trap - this is one instruction above */
589 swi r17, r1, PTO+PT_PC; 596 swi r17, r1, PT_PC;
590 tovirt(r1,r1) 597 tovirt(r1,r1)
591 /* where the trap should return need -8 to adjust for rtsd r15, 8 */ 598 /* where the trap should return need -8 to adjust for rtsd r15, 8 */
592 addik r15, r0, ret_from_exc-8 599 addik r15, r0, ret_from_exc-8
593 mfs r6, rear /* parameter unsigned long address */ 600 mfs r6, rear /* parameter unsigned long address */
594 ori r7, r0, 0 /* parameter unsigned long error_code */ 601 ori r7, r0, 0 /* parameter unsigned long error_code */
595 rted r0, do_page_fault 602 rted r0, do_page_fault
596 addik r5, r1, PTO /* parameter struct pt_regs * regs */ 603 addik r5, r1, 0 /* parameter struct pt_regs * regs */
597 604
598/* Entry point used to return from an exception. */ 605/* Entry point used to return from an exception. */
599C_ENTRY(ret_from_exc): 606C_ENTRY(ret_from_exc):
600 lwi r11, r1, PTO + PT_MODE; 607 lwi r11, r1, PT_MODE;
601 bnei r11, 2f; /* See if returning to kernel mode, */ 608 bnei r11, 2f; /* See if returning to kernel mode, */
602 /* ... if so, skip resched &c. */ 609 /* ... if so, skip resched &c. */
603 610
@@ -629,7 +636,7 @@ C_ENTRY(ret_from_exc):
629 * complete register state. Here we save anything not saved by 636 * complete register state. Here we save anything not saved by
630 * the normal entry sequence, so that it may be safely restored 637 * the normal entry sequence, so that it may be safely restored
631 * (in a possibly modified form) after do_signal returns. */ 638 * (in a possibly modified form) after do_signal returns. */
632 addik r5, r1, PTO; /* Arg 1: struct pt_regs *regs */ 639 addik r5, r1, 0; /* Arg 1: struct pt_regs *regs */
633 addi r7, r0, 0; /* Arg 3: int in_syscall */ 640 addi r7, r0, 0; /* Arg 3: int in_syscall */
634 bralid r15, do_signal; /* Handle any signals */ 641 bralid r15, do_signal; /* Handle any signals */
635 add r6, r0, r0; /* Arg 2: sigset_t *oldset */ 642 add r6, r0, r0; /* Arg 2: sigset_t *oldset */
@@ -641,7 +648,7 @@ C_ENTRY(ret_from_exc):
641 tophys(r1,r1); 648 tophys(r1,r1);
642 649
643 RESTORE_REGS; 650 RESTORE_REGS;
644 addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */ 651 addik r1, r1, PT_SIZE /* Clean up stack space. */
645 652
646 lwi r1, r1, PT_R1 - PT_SIZE; /* Restore user stack pointer. */ 653 lwi r1, r1, PT_R1 - PT_SIZE; /* Restore user stack pointer. */
647 bri 6f; 654 bri 6f;
@@ -650,7 +657,7 @@ C_ENTRY(ret_from_exc):
650 VM_OFF; 657 VM_OFF;
651 tophys(r1,r1); 658 tophys(r1,r1);
652 RESTORE_REGS; 659 RESTORE_REGS;
653 addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */ 660 addik r1, r1, PT_SIZE /* Clean up stack space. */
654 661
655 tovirt(r1,r1); 662 tovirt(r1,r1);
6566: 6636:
@@ -683,10 +690,10 @@ C_ENTRY(_interrupt):
683 tophys(r1,r1); /* MS: I have in r1 physical address where stack is */ 690 tophys(r1,r1); /* MS: I have in r1 physical address where stack is */
684 /* save registers */ 691 /* save registers */
685/* MS: Make room on the stack -> activation record */ 692/* MS: Make room on the stack -> activation record */
686 addik r1, r1, -STATE_SAVE_SIZE; 693 addik r1, r1, -PT_SIZE;
687 SAVE_REGS 694 SAVE_REGS
688 brid 2f; 695 brid 2f;
689 swi r1, r1, PTO + PT_MODE; /* 0 - user mode, 1 - kernel mode */ 696 swi r1, r1, PT_MODE; /* 0 - user mode, 1 - kernel mode */
6901: 6971:
691/* User-mode state save. */ 698/* User-mode state save. */
692 /* MS: get the saved current */ 699 /* MS: get the saved current */
@@ -696,23 +703,23 @@ C_ENTRY(_interrupt):
696 addik r1, r1, THREAD_SIZE; 703 addik r1, r1, THREAD_SIZE;
697 tophys(r1,r1); 704 tophys(r1,r1);
698 /* save registers */ 705 /* save registers */
699 addik r1, r1, -STATE_SAVE_SIZE; 706 addik r1, r1, -PT_SIZE;
700 SAVE_REGS 707 SAVE_REGS
701 /* calculate mode */ 708 /* calculate mode */
702 swi r0, r1, PTO + PT_MODE; 709 swi r0, r1, PT_MODE;
703 lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); 710 lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
704 swi r11, r1, PTO+PT_R1; 711 swi r11, r1, PT_R1;
705 clear_ums; 712 clear_ums;
7062: 7132:
707 lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); 714 lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
708 tovirt(r1,r1) 715 tovirt(r1,r1)
709 addik r15, r0, irq_call; 716 addik r15, r0, irq_call;
710irq_call:rtbd r0, do_IRQ; 717irq_call:rtbd r0, do_IRQ;
711 addik r5, r1, PTO; 718 addik r5, r1, 0;
712 719
713/* MS: we are in virtual mode */ 720/* MS: we are in virtual mode */
714ret_from_irq: 721ret_from_irq:
715 lwi r11, r1, PTO + PT_MODE; 722 lwi r11, r1, PT_MODE;
716 bnei r11, 2f; 723 bnei r11, 2f;
717 724
718 lwi r11, CURRENT_TASK, TS_THREAD_INFO; 725 lwi r11, CURRENT_TASK, TS_THREAD_INFO;
@@ -729,7 +736,7 @@ ret_from_irq:
729 beqid r11, no_intr_resched 736 beqid r11, no_intr_resched
730/* Handle a signal return; Pending signals should be in r18. */ 737/* Handle a signal return; Pending signals should be in r18. */
731 addi r7, r0, 0; /* Arg 3: int in_syscall */ 738 addi r7, r0, 0; /* Arg 3: int in_syscall */
732 addik r5, r1, PTO; /* Arg 1: struct pt_regs *regs */ 739 addik r5, r1, 0; /* Arg 1: struct pt_regs *regs */
733 bralid r15, do_signal; /* Handle any signals */ 740 bralid r15, do_signal; /* Handle any signals */
734 add r6, r0, r0; /* Arg 2: sigset_t *oldset */ 741 add r6, r0, r0; /* Arg 2: sigset_t *oldset */
735 742
@@ -741,7 +748,7 @@ no_intr_resched:
741 VM_OFF; 748 VM_OFF;
742 tophys(r1,r1); 749 tophys(r1,r1);
743 RESTORE_REGS 750 RESTORE_REGS
744 addik r1, r1, STATE_SAVE_SIZE /* MS: Clean up stack space. */ 751 addik r1, r1, PT_SIZE /* MS: Clean up stack space. */
745 lwi r1, r1, PT_R1 - PT_SIZE; 752 lwi r1, r1, PT_R1 - PT_SIZE;
746 bri 6f; 753 bri 6f;
747/* MS: Return to kernel state. */ 754/* MS: Return to kernel state. */
@@ -769,7 +776,7 @@ restore:
769 VM_OFF /* MS: turn off MMU */ 776 VM_OFF /* MS: turn off MMU */
770 tophys(r1,r1) 777 tophys(r1,r1)
771 RESTORE_REGS 778 RESTORE_REGS
772 addik r1, r1, STATE_SAVE_SIZE /* MS: Clean up stack space. */ 779 addik r1, r1, PT_SIZE /* MS: Clean up stack space. */
773 tovirt(r1,r1); 780 tovirt(r1,r1);
7746: 7816:
775IRQ_return: /* MS: Make global symbol for debugging */ 782IRQ_return: /* MS: Make global symbol for debugging */
@@ -792,29 +799,29 @@ C_ENTRY(_debug_exception):
792 lwi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* Reload kernel stack-ptr*/ 799 lwi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* Reload kernel stack-ptr*/
793 800
794 /* BIP bit is set on entry, no interrupts can occur */ 801 /* BIP bit is set on entry, no interrupts can occur */
795 addik r1, r1, CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - STATE_SAVE_SIZE; 802 addik r1, r1, CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - PT_SIZE;
796 SAVE_REGS; 803 SAVE_REGS;
797 /* save all regs to pt_reg structure */ 804 /* save all regs to pt_reg structure */
798 swi r0, r1, PTO+PT_R0; /* R0 must be saved too */ 805 swi r0, r1, PT_R0; /* R0 must be saved too */
799 swi r14, r1, PTO+PT_R14 /* rewrite saved R14 value */ 806 swi r14, r1, PT_R14 /* rewrite saved R14 value */
800 swi r16, r1, PTO+PT_PC; /* PC and r16 are the same */ 807 swi r16, r1, PT_PC; /* PC and r16 are the same */
801 /* save special purpose registers to pt_regs */ 808 /* save special purpose registers to pt_regs */
802 mfs r11, rear; 809 mfs r11, rear;
803 swi r11, r1, PTO+PT_EAR; 810 swi r11, r1, PT_EAR;
804 mfs r11, resr; 811 mfs r11, resr;
805 swi r11, r1, PTO+PT_ESR; 812 swi r11, r1, PT_ESR;
806 mfs r11, rfsr; 813 mfs r11, rfsr;
807 swi r11, r1, PTO+PT_FSR; 814 swi r11, r1, PT_FSR;
808 815
809 /* stack pointer is in physical address at it is decrease 816 /* stack pointer is in physical address at it is decrease
810 * by STATE_SAVE_SIZE but we need to get correct R1 value */ 817 * by PT_SIZE but we need to get correct R1 value */
811 addik r11, r1, CONFIG_KERNEL_START - CONFIG_KERNEL_BASE_ADDR + STATE_SAVE_SIZE; 818 addik r11, r1, CONFIG_KERNEL_START - CONFIG_KERNEL_BASE_ADDR + PT_SIZE;
812 swi r11, r1, PTO+PT_R1 819 swi r11, r1, PT_R1
813 /* MS: r31 - current pointer isn't changed */ 820 /* MS: r31 - current pointer isn't changed */
814 tovirt(r1,r1) 821 tovirt(r1,r1)
815#ifdef CONFIG_KGDB 822#ifdef CONFIG_KGDB
816 addi r5, r1, PTO /* pass pt_reg address as the first arg */ 823 addi r5, r1, 0 /* pass pt_reg address as the first arg */
817 la r15, r0, dbtrap_call; /* return address */ 824 addik r15, r0, dbtrap_call; /* return address */
818 rtbd r0, microblaze_kgdb_break 825 rtbd r0, microblaze_kgdb_break
819 nop; 826 nop;
820#endif 827#endif
@@ -829,16 +836,16 @@ C_ENTRY(_debug_exception):
829 addik r1, r1, THREAD_SIZE; /* calculate kernel stack pointer */ 836 addik r1, r1, THREAD_SIZE; /* calculate kernel stack pointer */
830 tophys(r1,r1); 837 tophys(r1,r1);
831 838
832 addik r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */ 839 addik r1, r1, -PT_SIZE; /* Make room on the stack. */
833 SAVE_REGS; 840 SAVE_REGS;
834 swi r16, r1, PTO+PT_PC; /* Save LP */ 841 swi r16, r1, PT_PC; /* Save LP */
835 swi r0, r1, PTO + PT_MODE; /* Was in user-mode. */ 842 swi r0, r1, PT_MODE; /* Was in user-mode. */
836 lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); 843 lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
837 swi r11, r1, PTO+PT_R1; /* Store user SP. */ 844 swi r11, r1, PT_R1; /* Store user SP. */
838 lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); 845 lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
839 tovirt(r1,r1) 846 tovirt(r1,r1)
840 set_vms; 847 set_vms;
841 addik r5, r1, PTO; 848 addik r5, r1, 0;
842 addik r15, r0, dbtrap_call; 849 addik r15, r0, dbtrap_call;
843dbtrap_call: /* Return point for kernel/user entry + 8 because of rtsd r15, 8 */ 850dbtrap_call: /* Return point for kernel/user entry + 8 because of rtsd r15, 8 */
844 rtbd r0, sw_exception 851 rtbd r0, sw_exception
@@ -846,7 +853,7 @@ dbtrap_call: /* Return point for kernel/user entry + 8 because of rtsd r15, 8 */
846 853
847 /* MS: The first instruction for the second part of the gdb/kgdb */ 854 /* MS: The first instruction for the second part of the gdb/kgdb */
848 set_bip; /* Ints masked for state restore */ 855 set_bip; /* Ints masked for state restore */
849 lwi r11, r1, PTO + PT_MODE; 856 lwi r11, r1, PT_MODE;
850 bnei r11, 2f; 857 bnei r11, 2f;
851/* MS: Return to user space - gdb */ 858/* MS: Return to user space - gdb */
852 /* Get current task ptr into r11 */ 859 /* Get current task ptr into r11 */
@@ -865,7 +872,7 @@ dbtrap_call: /* Return point for kernel/user entry + 8 because of rtsd r15, 8 */
865 andi r11, r11, _TIF_SIGPENDING; 872 andi r11, r11, _TIF_SIGPENDING;
866 beqi r11, 1f; /* Signals to handle, handle them */ 873 beqi r11, 1f; /* Signals to handle, handle them */
867 874
868 addik r5, r1, PTO; /* Arg 1: struct pt_regs *regs */ 875 addik r5, r1, 0; /* Arg 1: struct pt_regs *regs */
869 addi r7, r0, 0; /* Arg 3: int in_syscall */ 876 addi r7, r0, 0; /* Arg 3: int in_syscall */
870 bralid r15, do_signal; /* Handle any signals */ 877 bralid r15, do_signal; /* Handle any signals */
871 add r6, r0, r0; /* Arg 2: sigset_t *oldset */ 878 add r6, r0, r0; /* Arg 2: sigset_t *oldset */
@@ -876,7 +883,7 @@ dbtrap_call: /* Return point for kernel/user entry + 8 because of rtsd r15, 8 */
876 tophys(r1,r1); 883 tophys(r1,r1);
877 /* MS: Restore all regs */ 884 /* MS: Restore all regs */
878 RESTORE_REGS 885 RESTORE_REGS
879 addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space */ 886 addik r1, r1, PT_SIZE /* Clean up stack space */
880 lwi r1, r1, PT_R1 - PT_SIZE; /* Restore user stack pointer */ 887 lwi r1, r1, PT_R1 - PT_SIZE; /* Restore user stack pointer */
881DBTRAP_return_user: /* MS: Make global symbol for debugging */ 888DBTRAP_return_user: /* MS: Make global symbol for debugging */
882 rtbd r16, 0; /* MS: Instructions to return from a debug trap */ 889 rtbd r16, 0; /* MS: Instructions to return from a debug trap */
@@ -887,9 +894,9 @@ DBTRAP_return_user: /* MS: Make global symbol for debugging */
887 tophys(r1,r1); 894 tophys(r1,r1);
888 /* MS: Restore all regs */ 895 /* MS: Restore all regs */
889 RESTORE_REGS 896 RESTORE_REGS
890 lwi r14, r1, PTO+PT_R14; 897 lwi r14, r1, PT_R14;
891 lwi r16, r1, PTO+PT_PC; 898 lwi r16, r1, PT_PC;
892 addik r1, r1, STATE_SAVE_SIZE; /* MS: Clean up stack space */ 899 addik r1, r1, PT_SIZE; /* MS: Clean up stack space */
893 tovirt(r1,r1); 900 tovirt(r1,r1);
894DBTRAP_return_kernel: /* MS: Make global symbol for debugging */ 901DBTRAP_return_kernel: /* MS: Make global symbol for debugging */
895 rtbd r16, 0; /* MS: Instructions to return from a debug trap */ 902 rtbd r16, 0; /* MS: Instructions to return from a debug trap */
@@ -981,20 +988,22 @@ ENTRY(_switch_to)
981 nop 988 nop
982 989
983ENTRY(_reset) 990ENTRY(_reset)
984 brai 0x70; /* Jump back to FS-boot */ 991 brai 0; /* Jump to reset vector */
985 992
986 /* These are compiled and loaded into high memory, then 993 /* These are compiled and loaded into high memory, then
987 * copied into place in mach_early_setup */ 994 * copied into place in mach_early_setup */
988 .section .init.ivt, "ax" 995 .section .init.ivt, "ax"
996#if CONFIG_MANUAL_RESET_VECTOR
989 .org 0x0 997 .org 0x0
990 /* this is very important - here is the reset vector */ 998 brai CONFIG_MANUAL_RESET_VECTOR
991 /* in current MMU branch you don't care what is here - it is 999#endif
992 * used from bootloader site - but this is correct for FS-BOOT */ 1000 .org 0x8
993 brai 0x70
994 nop
995 brai TOPHYS(_user_exception); /* syscall handler */ 1001 brai TOPHYS(_user_exception); /* syscall handler */
1002 .org 0x10
996 brai TOPHYS(_interrupt); /* Interrupt handler */ 1003 brai TOPHYS(_interrupt); /* Interrupt handler */
1004 .org 0x18
997 brai TOPHYS(_debug_exception); /* debug trap handler */ 1005 brai TOPHYS(_debug_exception); /* debug trap handler */
1006 .org 0x20
998 brai TOPHYS(_hw_exception_handler); /* HW exception handler */ 1007 brai TOPHYS(_hw_exception_handler); /* HW exception handler */
999 1008
1000.section .rodata,"a" 1009.section .rodata,"a"
diff --git a/arch/microblaze/kernel/exceptions.c b/arch/microblaze/kernel/exceptions.c
index a7fa6ae76d89..66fad2301221 100644
--- a/arch/microblaze/kernel/exceptions.c
+++ b/arch/microblaze/kernel/exceptions.c
@@ -50,7 +50,7 @@ void die(const char *str, struct pt_regs *fp, long err)
50} 50}
51 51
52/* for user application debugging */ 52/* for user application debugging */
53void sw_exception(struct pt_regs *regs) 53asmlinkage void sw_exception(struct pt_regs *regs)
54{ 54{
55 _exception(SIGTRAP, regs, TRAP_BRKPT, regs->r16); 55 _exception(SIGTRAP, regs, TRAP_BRKPT, regs->r16);
56 flush_dcache_range(regs->r16, regs->r16 + 0x4); 56 flush_dcache_range(regs->r16, regs->r16 + 0x4);
diff --git a/arch/microblaze/kernel/ftrace.c b/arch/microblaze/kernel/ftrace.c
index 515feb404555..357d56abe24a 100644
--- a/arch/microblaze/kernel/ftrace.c
+++ b/arch/microblaze/kernel/ftrace.c
@@ -51,6 +51,9 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr)
51 : "r" (parent), "r" (return_hooker) 51 : "r" (parent), "r" (return_hooker)
52 ); 52 );
53 53
54 flush_dcache_range((u32)parent, (u32)parent + 4);
55 flush_icache_range((u32)parent, (u32)parent + 4);
56
54 if (unlikely(faulted)) { 57 if (unlikely(faulted)) {
55 ftrace_graph_stop(); 58 ftrace_graph_stop();
56 WARN_ON(1); 59 WARN_ON(1);
@@ -95,6 +98,9 @@ static int ftrace_modify_code(unsigned long addr, unsigned int value)
95 if (unlikely(faulted)) 98 if (unlikely(faulted))
96 return -EFAULT; 99 return -EFAULT;
97 100
101 flush_dcache_range(addr, addr + 4);
102 flush_icache_range(addr, addr + 4);
103
98 return 0; 104 return 0;
99} 105}
100 106
@@ -195,8 +201,6 @@ int ftrace_update_ftrace_func(ftrace_func_t func)
195 ret += ftrace_modify_code((unsigned long)&ftrace_caller, 201 ret += ftrace_modify_code((unsigned long)&ftrace_caller,
196 MICROBLAZE_NOP); 202 MICROBLAZE_NOP);
197 203
198 /* All changes are done - lets do caches consistent */
199 flush_icache();
200 return ret; 204 return ret;
201} 205}
202 206
@@ -210,7 +214,6 @@ int ftrace_enable_ftrace_graph_caller(void)
210 214
211 old_jump = *(unsigned int *)ip; /* save jump over instruction */ 215 old_jump = *(unsigned int *)ip; /* save jump over instruction */
212 ret = ftrace_modify_code(ip, MICROBLAZE_NOP); 216 ret = ftrace_modify_code(ip, MICROBLAZE_NOP);
213 flush_icache();
214 217
215 pr_debug("%s: Replace instruction: 0x%x\n", __func__, old_jump); 218 pr_debug("%s: Replace instruction: 0x%x\n", __func__, old_jump);
216 return ret; 219 return ret;
@@ -222,7 +225,6 @@ int ftrace_disable_ftrace_graph_caller(void)
222 unsigned long ip = (unsigned long)(&ftrace_call_graph); 225 unsigned long ip = (unsigned long)(&ftrace_call_graph);
223 226
224 ret = ftrace_modify_code(ip, old_jump); 227 ret = ftrace_modify_code(ip, old_jump);
225 flush_icache();
226 228
227 pr_debug("%s\n", __func__); 229 pr_debug("%s\n", __func__);
228 return ret; 230 return ret;
diff --git a/arch/microblaze/kernel/head.S b/arch/microblaze/kernel/head.S
index 778a5ce2e4fc..77320b8fc16a 100644
--- a/arch/microblaze/kernel/head.S
+++ b/arch/microblaze/kernel/head.S
@@ -39,7 +39,7 @@
39#include <asm/mmu.h> 39#include <asm/mmu.h>
40#include <asm/processor.h> 40#include <asm/processor.h>
41 41
42.data 42.section .data
43.global empty_zero_page 43.global empty_zero_page
44.align 12 44.align 12
45empty_zero_page: 45empty_zero_page:
@@ -50,6 +50,11 @@ swapper_pg_dir:
50 50
51#endif /* CONFIG_MMU */ 51#endif /* CONFIG_MMU */
52 52
53.section .rodata
54.align 4
55endian_check:
56 .word 1
57
53 __HEAD 58 __HEAD
54ENTRY(_start) 59ENTRY(_start)
55#if CONFIG_KERNEL_BASE_ADDR == 0 60#if CONFIG_KERNEL_BASE_ADDR == 0
@@ -79,10 +84,7 @@ real_start:
79/* Does r7 point to a valid FDT? Load HEADER magic number */ 84/* Does r7 point to a valid FDT? Load HEADER magic number */
80 /* Run time Big/Little endian platform */ 85 /* Run time Big/Little endian platform */
81 /* Save 1 as word and load byte - 0 - BIG, 1 - LITTLE */ 86 /* Save 1 as word and load byte - 0 - BIG, 1 - LITTLE */
82 addik r11, r0, 0x1 /* BIG/LITTLE checking value */ 87 lbui r11, r0, TOPHYS(endian_check)
83 /* __bss_start will be zeroed later - it is just temp location */
84 swi r11, r0, TOPHYS(__bss_start)
85 lbui r11, r0, TOPHYS(__bss_start)
86 beqid r11, big_endian /* DO NOT break delay stop dependency */ 88 beqid r11, big_endian /* DO NOT break delay stop dependency */
87 lw r11, r0, r7 /* Big endian load in delay slot */ 89 lw r11, r0, r7 /* Big endian load in delay slot */
88 lwr r11, r0, r7 /* Little endian load */ 90 lwr r11, r0, r7 /* Little endian load */
@@ -222,26 +224,26 @@ start_here:
222#endif /* CONFIG_MMU */ 224#endif /* CONFIG_MMU */
223 225
224 /* Initialize small data anchors */ 226 /* Initialize small data anchors */
225 la r13, r0, _KERNEL_SDA_BASE_ 227 addik r13, r0, _KERNEL_SDA_BASE_
226 la r2, r0, _KERNEL_SDA2_BASE_ 228 addik r2, r0, _KERNEL_SDA2_BASE_
227 229
228 /* Initialize stack pointer */ 230 /* Initialize stack pointer */
229 la r1, r0, init_thread_union + THREAD_SIZE - 4 231 addik r1, r0, init_thread_union + THREAD_SIZE - 4
230 232
231 /* Initialize r31 with current task address */ 233 /* Initialize r31 with current task address */
232 la r31, r0, init_task 234 addik r31, r0, init_task
233 235
234 /* 236 /*
235 * Call platform dependent initialize function. 237 * Call platform dependent initialize function.
236 * Please see $(ARCH)/mach-$(SUBARCH)/setup.c for 238 * Please see $(ARCH)/mach-$(SUBARCH)/setup.c for
237 * the function. 239 * the function.
238 */ 240 */
239 la r9, r0, machine_early_init 241 addik r9, r0, machine_early_init
240 brald r15, r9 242 brald r15, r9
241 nop 243 nop
242 244
243#ifndef CONFIG_MMU 245#ifndef CONFIG_MMU
244 la r15, r0, machine_halt 246 addik r15, r0, machine_halt
245 braid start_kernel 247 braid start_kernel
246 nop 248 nop
247#else 249#else
diff --git a/arch/microblaze/kernel/hw_exception_handler.S b/arch/microblaze/kernel/hw_exception_handler.S
index 782680de3121..56572e923a83 100644
--- a/arch/microblaze/kernel/hw_exception_handler.S
+++ b/arch/microblaze/kernel/hw_exception_handler.S
@@ -77,6 +77,8 @@
77#include <asm/signal.h> 77#include <asm/signal.h>
78#include <asm/asm-offsets.h> 78#include <asm/asm-offsets.h>
79 79
80#undef DEBUG
81
80/* Helpful Macros */ 82/* Helpful Macros */
81#define NUM_TO_REG(num) r ## num 83#define NUM_TO_REG(num) r ## num
82 84
@@ -91,7 +93,7 @@
91 lwi r6, r1, PT_R6; \ 93 lwi r6, r1, PT_R6; \
92 lwi r11, r1, PT_R11; \ 94 lwi r11, r1, PT_R11; \
93 lwi r31, r1, PT_R31; \ 95 lwi r31, r1, PT_R31; \
94 lwi r1, r0, TOPHYS(r0_ram + 0); 96 lwi r1, r1, PT_R1;
95#endif /* CONFIG_MMU */ 97#endif /* CONFIG_MMU */
96 98
97#define LWREG_NOP \ 99#define LWREG_NOP \
@@ -206,8 +208,8 @@
206 * | . | 208 * | . |
207 * | . | 209 * | . |
208 * 210 *
209 * NO_MMU kernel use the same r0_ram pointed space - look to vmlinux.lds.S 211 * MMU kernel uses the same 'pt_pool_space' pointed space
210 * which is used for storing register values - old style was, that value were 212 * which is used for storing register values - noMMu style was, that values were
211 * stored in stack but in case of failure you lost information about register. 213 * stored in stack but in case of failure you lost information about register.
212 * Currently you can see register value in memory in specific place. 214 * Currently you can see register value in memory in specific place.
213 * In compare to with previous solution the speed should be the same. 215 * In compare to with previous solution the speed should be the same.
@@ -226,8 +228,22 @@
226 */ 228 */
227 229
228/* wrappers to restore state before coming to entry.S */ 230/* wrappers to restore state before coming to entry.S */
229
230#ifdef CONFIG_MMU 231#ifdef CONFIG_MMU
232.section .data
233.align 4
234pt_pool_space:
235 .space PT_SIZE
236
237#ifdef DEBUG
238/* Create space for exception counting. */
239.section .data
240.global exception_debug_table
241.align 4
242exception_debug_table:
243 /* Look at exception vector table. There is 32 exceptions * word size */
244 .space (32 * 4)
245#endif /* DEBUG */
246
231.section .rodata 247.section .rodata
232.align 4 248.align 4
233_MB_HW_ExceptionVectorTable: 249_MB_HW_ExceptionVectorTable:
@@ -287,10 +303,10 @@ _hw_exception_handler:
287#ifndef CONFIG_MMU 303#ifndef CONFIG_MMU
288 addik r1, r1, -(EX_HANDLER_STACK_SIZ); /* Create stack frame */ 304 addik r1, r1, -(EX_HANDLER_STACK_SIZ); /* Create stack frame */
289#else 305#else
290 swi r1, r0, TOPHYS(r0_ram + 0); /* GET_SP */ 306 swi r1, r0, TOPHYS(pt_pool_space + PT_R1); /* GET_SP */
291 /* Save date to kernel memory. Here is the problem 307 /* Save date to kernel memory. Here is the problem
292 * when you came from user space */ 308 * when you came from user space */
293 ori r1, r0, TOPHYS(r0_ram + 28); 309 ori r1, r0, TOPHYS(pt_pool_space);
294#endif 310#endif
295 swi r3, r1, PT_R3 311 swi r3, r1, PT_R3
296 swi r4, r1, PT_R4 312 swi r4, r1, PT_R4
@@ -329,12 +345,12 @@ not_in_delay_slot:
329 345
330#ifdef DEBUG 346#ifdef DEBUG
331/* counting which exception happen */ 347/* counting which exception happen */
332 lwi r5, r0, 0x200 + TOPHYS(r0_ram) 348 lwi r5, r0, TOPHYS(exception_debug_table)
333 addi r5, r5, 1 349 addi r5, r5, 1
334 swi r5, r0, 0x200 + TOPHYS(r0_ram) 350 swi r5, r0, TOPHYS(exception_debug_table)
335 lwi r5, r6, 0x200 + TOPHYS(r0_ram) 351 lwi r5, r6, TOPHYS(exception_debug_table)
336 addi r5, r5, 1 352 addi r5, r5, 1
337 swi r5, r6, 0x200 + TOPHYS(r0_ram) 353 swi r5, r6, TOPHYS(exception_debug_table)
338#endif 354#endif
339/* end */ 355/* end */
340 /* Load the HW Exception vector */ 356 /* Load the HW Exception vector */
@@ -474,7 +490,7 @@ ex_lw_tail:
474 /* Get the destination register number into r5 */ 490 /* Get the destination register number into r5 */
475 lbui r5, r0, TOPHYS(ex_reg_op); 491 lbui r5, r0, TOPHYS(ex_reg_op);
476 /* Form load_word jump table offset (lw_table + (8 * regnum)) */ 492 /* Form load_word jump table offset (lw_table + (8 * regnum)) */
477 la r6, r0, TOPHYS(lw_table); 493 addik r6, r0, TOPHYS(lw_table);
478 addk r5, r5, r5; 494 addk r5, r5, r5;
479 addk r5, r5, r5; 495 addk r5, r5, r5;
480 addk r5, r5, r5; 496 addk r5, r5, r5;
@@ -485,7 +501,7 @@ ex_sw:
485 /* Get the destination register number into r5 */ 501 /* Get the destination register number into r5 */
486 lbui r5, r0, TOPHYS(ex_reg_op); 502 lbui r5, r0, TOPHYS(ex_reg_op);
487 /* Form store_word jump table offset (sw_table + (8 * regnum)) */ 503 /* Form store_word jump table offset (sw_table + (8 * regnum)) */
488 la r6, r0, TOPHYS(sw_table); 504 addik r6, r0, TOPHYS(sw_table);
489 add r5, r5, r5; 505 add r5, r5, r5;
490 add r5, r5, r5; 506 add r5, r5, r5;
491 add r5, r5, r5; 507 add r5, r5, r5;
@@ -896,7 +912,7 @@ ex_lw_vm:
896 beqid r6, ex_lhw_vm; 912 beqid r6, ex_lhw_vm;
897load1: lbui r5, r4, 0; /* Exception address in r4 - delay slot */ 913load1: lbui r5, r4, 0; /* Exception address in r4 - delay slot */
898/* Load a word, byte-by-byte from destination address and save it in tmp space*/ 914/* Load a word, byte-by-byte from destination address and save it in tmp space*/
899 la r6, r0, ex_tmp_data_loc_0; 915 addik r6, r0, ex_tmp_data_loc_0;
900 sbi r5, r6, 0; 916 sbi r5, r6, 0;
901load2: lbui r5, r4, 1; 917load2: lbui r5, r4, 1;
902 sbi r5, r6, 1; 918 sbi r5, r6, 1;
@@ -910,7 +926,7 @@ load4: lbui r5, r4, 3;
910ex_lhw_vm: 926ex_lhw_vm:
911 /* Load a half-word, byte-by-byte from destination address and 927 /* Load a half-word, byte-by-byte from destination address and
912 * save it in tmp space */ 928 * save it in tmp space */
913 la r6, r0, ex_tmp_data_loc_0; 929 addik r6, r0, ex_tmp_data_loc_0;
914 sbi r5, r6, 0; 930 sbi r5, r6, 0;
915load5: lbui r5, r4, 1; 931load5: lbui r5, r4, 1;
916 sbi r5, r6, 1; 932 sbi r5, r6, 1;
@@ -926,7 +942,7 @@ ex_sw_vm:
926 addik r5, r8, sw_table_vm; 942 addik r5, r8, sw_table_vm;
927 bra r5; 943 bra r5;
928ex_sw_tail_vm: 944ex_sw_tail_vm:
929 la r5, r0, ex_tmp_data_loc_0; 945 addik r5, r0, ex_tmp_data_loc_0;
930 beqid r6, ex_shw_vm; 946 beqid r6, ex_shw_vm;
931 swi r3, r5, 0; /* Get the word - delay slot */ 947 swi r3, r5, 0; /* Get the word - delay slot */
932 /* Store the word, byte-by-byte into destination address */ 948 /* Store the word, byte-by-byte into destination address */
@@ -969,7 +985,7 @@ ex_unaligned_fixup:
969 addik r7, r0, SIGSEGV 985 addik r7, r0, SIGSEGV
970 /* call bad_page_fault for finding aligned fixup, fixup address is saved 986 /* call bad_page_fault for finding aligned fixup, fixup address is saved
971 * in PT_PC which is used as return address from exception */ 987 * in PT_PC which is used as return address from exception */
972 la r15, r0, ret_from_exc-8 /* setup return address */ 988 addik r15, r0, ret_from_exc-8 /* setup return address */
973 brid bad_page_fault 989 brid bad_page_fault
974 nop 990 nop
975 991
diff --git a/arch/microblaze/kernel/intc.c b/arch/microblaze/kernel/intc.c
index d61ea33aff7c..c88f066f41bd 100644
--- a/arch/microblaze/kernel/intc.c
+++ b/arch/microblaze/kernel/intc.c
@@ -40,59 +40,46 @@ unsigned int nr_irq;
40#define MER_ME (1<<0) 40#define MER_ME (1<<0)
41#define MER_HIE (1<<1) 41#define MER_HIE (1<<1)
42 42
43static void intc_enable_or_unmask(unsigned int irq) 43static void intc_enable_or_unmask(struct irq_data *d)
44{ 44{
45 unsigned long mask = 1 << irq; 45 unsigned long mask = 1 << d->irq;
46 pr_debug("enable_or_unmask: %d\n", irq); 46 pr_debug("enable_or_unmask: %d\n", d->irq);
47 out_be32(INTC_BASE + SIE, mask); 47 out_be32(INTC_BASE + SIE, mask);
48 48
49 /* ack level irqs because they can't be acked during 49 /* ack level irqs because they can't be acked during
50 * ack function since the handle_level_irq function 50 * ack function since the handle_level_irq function
51 * acks the irq before calling the interrupt handler 51 * acks the irq before calling the interrupt handler
52 */ 52 */
53 if (irq_desc[irq].status & IRQ_LEVEL) 53 if (irqd_is_level_type(d))
54 out_be32(INTC_BASE + IAR, mask); 54 out_be32(INTC_BASE + IAR, mask);
55} 55}
56 56
57static void intc_disable_or_mask(unsigned int irq) 57static void intc_disable_or_mask(struct irq_data *d)
58{ 58{
59 pr_debug("disable: %d\n", irq); 59 pr_debug("disable: %d\n", d->irq);
60 out_be32(INTC_BASE + CIE, 1 << irq); 60 out_be32(INTC_BASE + CIE, 1 << d->irq);
61} 61}
62 62
63static void intc_ack(unsigned int irq) 63static void intc_ack(struct irq_data *d)
64{ 64{
65 pr_debug("ack: %d\n", irq); 65 pr_debug("ack: %d\n", d->irq);
66 out_be32(INTC_BASE + IAR, 1 << irq); 66 out_be32(INTC_BASE + IAR, 1 << d->irq);
67} 67}
68 68
69static void intc_mask_ack(unsigned int irq) 69static void intc_mask_ack(struct irq_data *d)
70{ 70{
71 unsigned long mask = 1 << irq; 71 unsigned long mask = 1 << d->irq;
72 pr_debug("disable_and_ack: %d\n", irq); 72 pr_debug("disable_and_ack: %d\n", d->irq);
73 out_be32(INTC_BASE + CIE, mask); 73 out_be32(INTC_BASE + CIE, mask);
74 out_be32(INTC_BASE + IAR, mask); 74 out_be32(INTC_BASE + IAR, mask);
75} 75}
76 76
77static void intc_end(unsigned int irq)
78{
79 unsigned long mask = 1 << irq;
80 pr_debug("end: %d\n", irq);
81 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
82 out_be32(INTC_BASE + SIE, mask);
83 /* ack level sensitive intr */
84 if (irq_desc[irq].status & IRQ_LEVEL)
85 out_be32(INTC_BASE + IAR, mask);
86 }
87}
88
89static struct irq_chip intc_dev = { 77static struct irq_chip intc_dev = {
90 .name = "Xilinx INTC", 78 .name = "Xilinx INTC",
91 .unmask = intc_enable_or_unmask, 79 .irq_unmask = intc_enable_or_unmask,
92 .mask = intc_disable_or_mask, 80 .irq_mask = intc_disable_or_mask,
93 .ack = intc_ack, 81 .irq_ack = intc_ack,
94 .mask_ack = intc_mask_ack, 82 .irq_mask_ack = intc_mask_ack,
95 .end = intc_end,
96}; 83};
97 84
98unsigned int get_irq(struct pt_regs *regs) 85unsigned int get_irq(struct pt_regs *regs)
@@ -170,13 +157,13 @@ void __init init_IRQ(void)
170 157
171 for (i = 0; i < nr_irq; ++i) { 158 for (i = 0; i < nr_irq; ++i) {
172 if (intr_type & (0x00000001 << i)) { 159 if (intr_type & (0x00000001 << i)) {
173 set_irq_chip_and_handler_name(i, &intc_dev, 160 irq_set_chip_and_handler_name(i, &intc_dev,
174 handle_edge_irq, intc_dev.name); 161 handle_edge_irq, "edge");
175 irq_desc[i].status &= ~IRQ_LEVEL; 162 irq_clear_status_flags(i, IRQ_LEVEL);
176 } else { 163 } else {
177 set_irq_chip_and_handler_name(i, &intc_dev, 164 irq_set_chip_and_handler_name(i, &intc_dev,
178 handle_level_irq, intc_dev.name); 165 handle_level_irq, "level");
179 irq_desc[i].status |= IRQ_LEVEL; 166 irq_set_status_flags(i, IRQ_LEVEL);
180 } 167 }
181 } 168 }
182} 169}
diff --git a/arch/microblaze/kernel/irq.c b/arch/microblaze/kernel/irq.c
index a9345fb4906a..ce7ac8435d5c 100644
--- a/arch/microblaze/kernel/irq.c
+++ b/arch/microblaze/kernel/irq.c
@@ -47,46 +47,6 @@ next_irq:
47 trace_hardirqs_on(); 47 trace_hardirqs_on();
48} 48}
49 49
50int show_interrupts(struct seq_file *p, void *v)
51{
52 int i = *(loff_t *) v, j;
53 struct irqaction *action;
54 unsigned long flags;
55
56 if (i == 0) {
57 seq_printf(p, " ");
58 for_each_online_cpu(j)
59 seq_printf(p, "CPU%-8d", j);
60 seq_putc(p, '\n');
61 }
62
63 if (i < nr_irq) {
64 raw_spin_lock_irqsave(&irq_desc[i].lock, flags);
65 action = irq_desc[i].action;
66 if (!action)
67 goto skip;
68 seq_printf(p, "%3d: ", i);
69#ifndef CONFIG_SMP
70 seq_printf(p, "%10u ", kstat_irqs(i));
71#else
72 for_each_online_cpu(j)
73 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
74#endif
75 seq_printf(p, " %8s", irq_desc[i].status &
76 IRQ_LEVEL ? "level" : "edge");
77 seq_printf(p, " %8s", irq_desc[i].chip->name);
78 seq_printf(p, " %s", action->name);
79
80 for (action = action->next; action; action = action->next)
81 seq_printf(p, ", %s", action->name);
82
83 seq_putc(p, '\n');
84skip:
85 raw_spin_unlock_irqrestore(&irq_desc[i].lock, flags);
86 }
87 return 0;
88}
89
90/* MS: There is no any advance mapping mechanism. We are using simple 32bit 50/* MS: There is no any advance mapping mechanism. We are using simple 32bit
91 intc without any cascades or any connection that's why mapping is 1:1 */ 51 intc without any cascades or any connection that's why mapping is 1:1 */
92unsigned int irq_create_mapping(struct irq_host *host, irq_hw_number_t hwirq) 52unsigned int irq_create_mapping(struct irq_host *host, irq_hw_number_t hwirq)
diff --git a/arch/microblaze/kernel/microblaze_ksyms.c b/arch/microblaze/kernel/microblaze_ksyms.c
index 5cb034174005..49faeb429599 100644
--- a/arch/microblaze/kernel/microblaze_ksyms.c
+++ b/arch/microblaze/kernel/microblaze_ksyms.c
@@ -24,6 +24,7 @@
24 24
25extern char *_ebss; 25extern char *_ebss;
26EXPORT_SYMBOL_GPL(_ebss); 26EXPORT_SYMBOL_GPL(_ebss);
27
27#ifdef CONFIG_FUNCTION_TRACER 28#ifdef CONFIG_FUNCTION_TRACER
28extern void _mcount(void); 29extern void _mcount(void);
29EXPORT_SYMBOL(_mcount); 30EXPORT_SYMBOL(_mcount);
@@ -45,3 +46,14 @@ EXPORT_SYMBOL(empty_zero_page);
45#endif 46#endif
46 47
47EXPORT_SYMBOL(mbc); 48EXPORT_SYMBOL(mbc);
49
50extern void __divsi3(void);
51EXPORT_SYMBOL(__divsi3);
52extern void __modsi3(void);
53EXPORT_SYMBOL(__modsi3);
54extern void __mulsi3(void);
55EXPORT_SYMBOL(__mulsi3);
56extern void __udivsi3(void);
57EXPORT_SYMBOL(__udivsi3);
58extern void __umodsi3(void);
59EXPORT_SYMBOL(__umodsi3);
diff --git a/arch/microblaze/kernel/process.c b/arch/microblaze/kernel/process.c
index ba7c4b16ed35..968648a81c1e 100644
--- a/arch/microblaze/kernel/process.c
+++ b/arch/microblaze/kernel/process.c
@@ -159,7 +159,7 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
159 } 159 }
160 160
161 /* FIXME STATE_SAVE_PT_OFFSET; */ 161 /* FIXME STATE_SAVE_PT_OFFSET; */
162 ti->cpu_context.r1 = (unsigned long)childregs - STATE_SAVE_ARG_SPACE; 162 ti->cpu_context.r1 = (unsigned long)childregs;
163 /* we should consider the fact that childregs is a copy of the parent 163 /* we should consider the fact that childregs is a copy of the parent
164 * regs which were saved immediately after entering the kernel state 164 * regs which were saved immediately after entering the kernel state
165 * before enabling VM. This MSR will be restored in switch_to and 165 * before enabling VM. This MSR will be restored in switch_to and
diff --git a/arch/microblaze/kernel/prom.c b/arch/microblaze/kernel/prom.c
index bceaa5543e39..00ee90f08343 100644
--- a/arch/microblaze/kernel/prom.c
+++ b/arch/microblaze/kernel/prom.c
@@ -59,7 +59,7 @@ static int __init early_init_dt_scan_serial(unsigned long node,
59{ 59{
60 unsigned long l; 60 unsigned long l;
61 char *p; 61 char *p;
62 int *addr; 62 const __be32 *addr;
63 63
64 pr_debug("search \"serial\", depth: %d, uname: %s\n", depth, uname); 64 pr_debug("search \"serial\", depth: %d, uname: %s\n", depth, uname);
65 65
diff --git a/arch/microblaze/kernel/prom_parse.c b/arch/microblaze/kernel/prom_parse.c
index 9ae24f4b882b..47187cc2cf00 100644
--- a/arch/microblaze/kernel/prom_parse.c
+++ b/arch/microblaze/kernel/prom_parse.c
@@ -2,88 +2,11 @@
2 2
3#include <linux/kernel.h> 3#include <linux/kernel.h>
4#include <linux/string.h> 4#include <linux/string.h>
5#include <linux/pci_regs.h>
6#include <linux/module.h> 5#include <linux/module.h>
7#include <linux/ioport.h> 6#include <linux/ioport.h>
8#include <linux/etherdevice.h> 7#include <linux/etherdevice.h>
9#include <linux/of_address.h> 8#include <linux/of_address.h>
10#include <asm/prom.h> 9#include <asm/prom.h>
11#include <asm/pci-bridge.h>
12
13#ifdef CONFIG_PCI
14int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq)
15{
16 struct device_node *dn, *ppnode;
17 struct pci_dev *ppdev;
18 u32 lspec;
19 u32 laddr[3];
20 u8 pin;
21 int rc;
22
23 /* Check if we have a device node, if yes, fallback to standard OF
24 * parsing
25 */
26 dn = pci_device_to_OF_node(pdev);
27 if (dn)
28 return of_irq_map_one(dn, 0, out_irq);
29
30 /* Ok, we don't, time to have fun. Let's start by building up an
31 * interrupt spec. we assume #interrupt-cells is 1, which is standard
32 * for PCI. If you do different, then don't use that routine.
33 */
34 rc = pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin);
35 if (rc != 0)
36 return rc;
37 /* No pin, exit */
38 if (pin == 0)
39 return -ENODEV;
40
41 /* Now we walk up the PCI tree */
42 lspec = pin;
43 for (;;) {
44 /* Get the pci_dev of our parent */
45 ppdev = pdev->bus->self;
46
47 /* Ouch, it's a host bridge... */
48 if (ppdev == NULL) {
49 struct pci_controller *host;
50 host = pci_bus_to_host(pdev->bus);
51 ppnode = host ? host->dn : NULL;
52 /* No node for host bridge ? give up */
53 if (ppnode == NULL)
54 return -EINVAL;
55 } else
56 /* We found a P2P bridge, check if it has a node */
57 ppnode = pci_device_to_OF_node(ppdev);
58
59 /* Ok, we have found a parent with a device-node, hand over to
60 * the OF parsing code.
61 * We build a unit address from the linux device to be used for
62 * resolution. Note that we use the linux bus number which may
63 * not match your firmware bus numbering.
64 * Fortunately, in most cases, interrupt-map-mask doesn't
65 * include the bus number as part of the matching.
66 * You should still be careful about that though if you intend
67 * to rely on this function (you ship a firmware that doesn't
68 * create device nodes for all PCI devices).
69 */
70 if (ppnode)
71 break;
72
73 /* We can only get here if we hit a P2P bridge with no node,
74 * let's do standard swizzling and try again
75 */
76 lspec = pci_swizzle_interrupt_pin(pdev, lspec);
77 pdev = ppdev;
78 }
79
80 laddr[0] = (pdev->bus->number << 16)
81 | (pdev->devfn << 8);
82 laddr[1] = laddr[2] = 0;
83 return of_irq_map_raw(ppnode, &lspec, 1, laddr, out_irq);
84}
85EXPORT_SYMBOL_GPL(of_irq_map_pci);
86#endif /* CONFIG_PCI */
87 10
88void of_parse_dma_window(struct device_node *dn, const void *dma_window_prop, 11void of_parse_dma_window(struct device_node *dn, const void *dma_window_prop,
89 unsigned long *busno, unsigned long *phys, unsigned long *size) 12 unsigned long *busno, unsigned long *phys, unsigned long *size)
diff --git a/arch/microblaze/kernel/ptrace.c b/arch/microblaze/kernel/ptrace.c
index 05ac8cc975d5..6a8e0cc5c57d 100644
--- a/arch/microblaze/kernel/ptrace.c
+++ b/arch/microblaze/kernel/ptrace.c
@@ -39,6 +39,7 @@
39#include <linux/uaccess.h> 39#include <linux/uaccess.h>
40#include <asm/asm-offsets.h> 40#include <asm/asm-offsets.h>
41#include <asm/cacheflush.h> 41#include <asm/cacheflush.h>
42#include <asm/syscall.h>
42#include <asm/io.h> 43#include <asm/io.h>
43 44
44/* Returns the address where the register at REG_OFFS in P is stashed away. */ 45/* Returns the address where the register at REG_OFFS in P is stashed away. */
@@ -123,7 +124,7 @@ long arch_ptrace(struct task_struct *child, long request,
123 rval = -EIO; 124 rval = -EIO;
124 125
125 if (rval == 0 && request == PTRACE_PEEKUSR) 126 if (rval == 0 && request == PTRACE_PEEKUSR)
126 rval = put_user(val, (unsigned long *)data); 127 rval = put_user(val, (unsigned long __user *)data);
127 break; 128 break;
128 default: 129 default:
129 rval = ptrace_request(child, request, addr, data); 130 rval = ptrace_request(child, request, addr, data);
diff --git a/arch/microblaze/kernel/setup.c b/arch/microblaze/kernel/setup.c
index 9312fbb37efd..8e2c09b7ff26 100644
--- a/arch/microblaze/kernel/setup.c
+++ b/arch/microblaze/kernel/setup.c
@@ -95,7 +95,8 @@ inline unsigned get_romfs_len(unsigned *addr)
95void __init machine_early_init(const char *cmdline, unsigned int ram, 95void __init machine_early_init(const char *cmdline, unsigned int ram,
96 unsigned int fdt, unsigned int msr) 96 unsigned int fdt, unsigned int msr)
97{ 97{
98 unsigned long *src, *dst = (unsigned long *)0x0; 98 unsigned long *src, *dst;
99 unsigned int offset = 0;
99 100
100 /* If CONFIG_MTD_UCLINUX is defined, assume ROMFS is at the 101 /* If CONFIG_MTD_UCLINUX is defined, assume ROMFS is at the
101 * end of kernel. There are two position which we want to check. 102 * end of kernel. There are two position which we want to check.
@@ -168,7 +169,14 @@ void __init machine_early_init(const char *cmdline, unsigned int ram,
168 "CPU have it %x\n", msr); 169 "CPU have it %x\n", msr);
169#endif 170#endif
170 171
171 for (src = __ivt_start; src < __ivt_end; src++, dst++) 172 /* Do not copy reset vectors. offset = 0x2 means skip the first
173 * two instructions. dst is pointer to MB vectors which are placed
174 * in block ram. If you want to copy reset vector setup offset to 0x0 */
175#if !CONFIG_MANUAL_RESET_VECTOR
176 offset = 0x2;
177#endif
178 dst = (unsigned long *) (offset * sizeof(u32));
179 for (src = __ivt_start + offset; src < __ivt_end; src++, dst++)
172 *dst = *src; 180 *dst = *src;
173 181
174 /* Initialize global data */ 182 /* Initialize global data */
diff --git a/arch/microblaze/kernel/signal.c b/arch/microblaze/kernel/signal.c
index d8d3bb396cd6..599671168980 100644
--- a/arch/microblaze/kernel/signal.c
+++ b/arch/microblaze/kernel/signal.c
@@ -93,7 +93,7 @@ static int restore_sigcontext(struct pt_regs *regs,
93asmlinkage long sys_rt_sigreturn(struct pt_regs *regs) 93asmlinkage long sys_rt_sigreturn(struct pt_regs *regs)
94{ 94{
95 struct rt_sigframe __user *frame = 95 struct rt_sigframe __user *frame =
96 (struct rt_sigframe __user *)(regs->r1 + STATE_SAVE_ARG_SPACE); 96 (struct rt_sigframe __user *)(regs->r1);
97 97
98 sigset_t set; 98 sigset_t set;
99 int rval; 99 int rval;
@@ -197,8 +197,8 @@ static void setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
197 197
198 /* Create the ucontext. */ 198 /* Create the ucontext. */
199 err |= __put_user(0, &frame->uc.uc_flags); 199 err |= __put_user(0, &frame->uc.uc_flags);
200 err |= __put_user(0, &frame->uc.uc_link); 200 err |= __put_user(NULL, &frame->uc.uc_link);
201 err |= __put_user((void *)current->sas_ss_sp, 201 err |= __put_user((void __user *)current->sas_ss_sp,
202 &frame->uc.uc_stack.ss_sp); 202 &frame->uc.uc_stack.ss_sp);
203 err |= __put_user(sas_ss_flags(regs->r1), 203 err |= __put_user(sas_ss_flags(regs->r1),
204 &frame->uc.uc_stack.ss_flags); 204 &frame->uc.uc_stack.ss_flags);
@@ -247,7 +247,7 @@ static void setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
247 goto give_sigsegv; 247 goto give_sigsegv;
248 248
249 /* Set up registers for signal handler */ 249 /* Set up registers for signal handler */
250 regs->r1 = (unsigned long) frame - STATE_SAVE_ARG_SPACE; 250 regs->r1 = (unsigned long) frame;
251 251
252 /* Signal handler args: */ 252 /* Signal handler args: */
253 regs->r5 = signal; /* arg 0: signum */ 253 regs->r5 = signal; /* arg 0: signum */
diff --git a/arch/microblaze/kernel/sys_microblaze.c b/arch/microblaze/kernel/sys_microblaze.c
index 2250fe9d269b..e5b154f24f85 100644
--- a/arch/microblaze/kernel/sys_microblaze.c
+++ b/arch/microblaze/kernel/sys_microblaze.c
@@ -40,7 +40,8 @@ asmlinkage long microblaze_vfork(struct pt_regs *regs)
40 regs, 0, NULL, NULL); 40 regs, 0, NULL, NULL);
41} 41}
42 42
43asmlinkage long microblaze_clone(int flags, unsigned long stack, struct pt_regs *regs) 43asmlinkage long microblaze_clone(int flags, unsigned long stack,
44 struct pt_regs *regs)
44{ 45{
45 if (!stack) 46 if (!stack)
46 stack = regs->r1; 47 stack = regs->r1;
diff --git a/arch/microblaze/kernel/syscall_table.S b/arch/microblaze/kernel/syscall_table.S
index e88a930fd1e3..85cea81d1ca1 100644
--- a/arch/microblaze/kernel/syscall_table.S
+++ b/arch/microblaze/kernel/syscall_table.S
@@ -375,3 +375,7 @@ ENTRY(sys_call_table)
375 .long sys_fanotify_init 375 .long sys_fanotify_init
376 .long sys_fanotify_mark 376 .long sys_fanotify_mark
377 .long sys_prlimit64 /* 370 */ 377 .long sys_prlimit64 /* 370 */
378 .long sys_name_to_handle_at
379 .long sys_open_by_handle_at
380 .long sys_clock_adjtime
381 .long sys_syncfs
diff --git a/arch/microblaze/kernel/timer.c b/arch/microblaze/kernel/timer.c
index 68ec7d1e8439..e5550ce4e0eb 100644
--- a/arch/microblaze/kernel/timer.c
+++ b/arch/microblaze/kernel/timer.c
@@ -38,8 +38,8 @@ static unsigned int timer_baseaddr;
38#define TIMER_BASE timer_baseaddr 38#define TIMER_BASE timer_baseaddr
39#endif 39#endif
40 40
41unsigned int freq_div_hz; 41static unsigned int freq_div_hz;
42unsigned int timer_clock_freq; 42static unsigned int timer_clock_freq;
43 43
44#define TCSR0 (0x00) 44#define TCSR0 (0x00)
45#define TLR0 (0x04) 45#define TLR0 (0x04)
@@ -202,7 +202,7 @@ static struct cyclecounter microblaze_cc = {
202 .shift = 8, 202 .shift = 8,
203}; 203};
204 204
205int __init init_microblaze_timecounter(void) 205static int __init init_microblaze_timecounter(void)
206{ 206{
207 microblaze_cc.mult = div_sc(timer_clock_freq, NSEC_PER_SEC, 207 microblaze_cc.mult = div_sc(timer_clock_freq, NSEC_PER_SEC,
208 microblaze_cc.shift); 208 microblaze_cc.shift);
diff --git a/arch/microblaze/kernel/unwind.c b/arch/microblaze/kernel/unwind.c
index fefac5c33586..9781a528cfc9 100644
--- a/arch/microblaze/kernel/unwind.c
+++ b/arch/microblaze/kernel/unwind.c
@@ -183,7 +183,7 @@ static inline void unwind_trap(struct task_struct *task, unsigned long pc,
183 * @trace : Where to store stack backtrace (PC values). 183 * @trace : Where to store stack backtrace (PC values).
184 * NULL == print backtrace to kernel log 184 * NULL == print backtrace to kernel log
185 */ 185 */
186void microblaze_unwind_inner(struct task_struct *task, 186static void microblaze_unwind_inner(struct task_struct *task,
187 unsigned long pc, unsigned long fp, 187 unsigned long pc, unsigned long fp,
188 unsigned long leaf_return, 188 unsigned long leaf_return,
189 struct stack_trace *trace) 189 struct stack_trace *trace)
diff --git a/arch/microblaze/kernel/vmlinux.lds.S b/arch/microblaze/kernel/vmlinux.lds.S
index 3451bdec9f05..ac0e1a5d4782 100644
--- a/arch/microblaze/kernel/vmlinux.lds.S
+++ b/arch/microblaze/kernel/vmlinux.lds.S
@@ -70,11 +70,6 @@ SECTIONS {
70 RW_DATA_SECTION(32, PAGE_SIZE, THREAD_SIZE) 70 RW_DATA_SECTION(32, PAGE_SIZE, THREAD_SIZE)
71 _edata = . ; 71 _edata = . ;
72 72
73 /* Reserve some low RAM for r0 based memory references */
74 . = ALIGN(0x4) ;
75 r0_ram = . ;
76 . = . + PAGE_SIZE; /* a page should be enough */
77
78 /* Under the microblaze ABI, .sdata and .sbss must be contiguous */ 73 /* Under the microblaze ABI, .sdata and .sbss must be contiguous */
79 . = ALIGN(8); 74 . = ALIGN(8);
80 .sdata : AT(ADDR(.sdata) - LOAD_OFFSET) { 75 .sdata : AT(ADDR(.sdata) - LOAD_OFFSET) {
diff --git a/arch/microblaze/lib/Makefile b/arch/microblaze/lib/Makefile
index f1fcbff3da25..10c320aa908b 100644
--- a/arch/microblaze/lib/Makefile
+++ b/arch/microblaze/lib/Makefile
@@ -2,6 +2,12 @@
2# Makefile 2# Makefile
3# 3#
4 4
5ifdef CONFIG_FUNCTION_TRACER
6CFLAGS_REMOVE_ashldi3.o = -pg
7CFLAGS_REMOVE_ashrdi3.o = -pg
8CFLAGS_REMOVE_lshrdi3.o = -pg
9endif
10
5lib-y := memset.o 11lib-y := memset.o
6 12
7ifeq ($(CONFIG_OPT_LIB_ASM),y) 13ifeq ($(CONFIG_OPT_LIB_ASM),y)
diff --git a/arch/microblaze/lib/memcpy.c b/arch/microblaze/lib/memcpy.c
index cc495d7d99cc..52746e718dfa 100644
--- a/arch/microblaze/lib/memcpy.c
+++ b/arch/microblaze/lib/memcpy.c
@@ -63,8 +63,8 @@ void *memcpy(void *v_dst, const void *v_src, __kernel_size_t c)
63 if (likely(c >= 4)) { 63 if (likely(c >= 4)) {
64 unsigned value, buf_hold; 64 unsigned value, buf_hold;
65 65
66 /* Align the dstination to a word boundry. */ 66 /* Align the destination to a word boundary. */
67 /* This is done in an endian independant manner. */ 67 /* This is done in an endian independent manner. */
68 switch ((unsigned long)dst & 3) { 68 switch ((unsigned long)dst & 3) {
69 case 1: 69 case 1:
70 *dst++ = *src++; 70 *dst++ = *src++;
@@ -80,7 +80,7 @@ void *memcpy(void *v_dst, const void *v_src, __kernel_size_t c)
80 i_dst = (void *)dst; 80 i_dst = (void *)dst;
81 81
82 /* Choose a copy scheme based on the source */ 82 /* Choose a copy scheme based on the source */
83 /* alignment relative to dstination. */ 83 /* alignment relative to destination. */
84 switch ((unsigned long)src & 3) { 84 switch ((unsigned long)src & 3) {
85 case 0x0: /* Both byte offsets are aligned */ 85 case 0x0: /* Both byte offsets are aligned */
86 i_src = (const void *)src; 86 i_src = (const void *)src;
@@ -173,7 +173,7 @@ void *memcpy(void *v_dst, const void *v_src, __kernel_size_t c)
173 } 173 }
174 174
175 /* Finish off any remaining bytes */ 175 /* Finish off any remaining bytes */
176 /* simple fast copy, ... unless a cache boundry is crossed */ 176 /* simple fast copy, ... unless a cache boundary is crossed */
177 switch (c) { 177 switch (c) {
178 case 3: 178 case 3:
179 *dst++ = *src++; 179 *dst++ = *src++;
diff --git a/arch/microblaze/lib/memmove.c b/arch/microblaze/lib/memmove.c
index 810fd68775e3..2146c3752a80 100644
--- a/arch/microblaze/lib/memmove.c
+++ b/arch/microblaze/lib/memmove.c
@@ -83,8 +83,8 @@ void *memmove(void *v_dst, const void *v_src, __kernel_size_t c)
83 if (c >= 4) { 83 if (c >= 4) {
84 unsigned value, buf_hold; 84 unsigned value, buf_hold;
85 85
86 /* Align the destination to a word boundry. */ 86 /* Align the destination to a word boundary. */
87 /* This is done in an endian independant manner. */ 87 /* This is done in an endian independent manner. */
88 88
89 switch ((unsigned long)dst & 3) { 89 switch ((unsigned long)dst & 3) {
90 case 3: 90 case 3:
@@ -193,7 +193,7 @@ void *memmove(void *v_dst, const void *v_src, __kernel_size_t c)
193 dst = (void *)i_dst; 193 dst = (void *)i_dst;
194 } 194 }
195 195
196 /* simple fast copy, ... unless a cache boundry is crossed */ 196 /* simple fast copy, ... unless a cache boundary is crossed */
197 /* Finish off any remaining bytes */ 197 /* Finish off any remaining bytes */
198 switch (c) { 198 switch (c) {
199 case 4: 199 case 4:
diff --git a/arch/microblaze/lib/memset.c b/arch/microblaze/lib/memset.c
index 834565d1607e..ddf67939576d 100644
--- a/arch/microblaze/lib/memset.c
+++ b/arch/microblaze/lib/memset.c
@@ -64,7 +64,7 @@ void *memset(void *v_src, int c, __kernel_size_t n)
64 64
65 if (likely(n >= 4)) { 65 if (likely(n >= 4)) {
66 /* Align the destination to a word boundary */ 66 /* Align the destination to a word boundary */
67 /* This is done in an endian independant manner */ 67 /* This is done in an endian independent manner */
68 switch ((unsigned) src & 3) { 68 switch ((unsigned) src & 3) {
69 case 1: 69 case 1:
70 *src++ = c; 70 *src++ = c;
diff --git a/arch/microblaze/lib/muldi3.c b/arch/microblaze/lib/muldi3.c
index d4860e154d29..0585bccb7fad 100644
--- a/arch/microblaze/lib/muldi3.c
+++ b/arch/microblaze/lib/muldi3.c
@@ -58,3 +58,4 @@ DWtype __muldi3(DWtype u, DWtype v)
58 58
59 return w.ll; 59 return w.ll;
60} 60}
61EXPORT_SYMBOL(__muldi3);
diff --git a/arch/microblaze/mm/consistent.c b/arch/microblaze/mm/consistent.c
index 5a59dad62bd2..a1e2e18e0961 100644
--- a/arch/microblaze/mm/consistent.c
+++ b/arch/microblaze/mm/consistent.c
@@ -59,7 +59,7 @@
59 * uncached region. This will no doubt cause big problems if memory allocated 59 * uncached region. This will no doubt cause big problems if memory allocated
60 * here is not also freed properly. -- JW 60 * here is not also freed properly. -- JW
61 */ 61 */
62void *consistent_alloc(int gfp, size_t size, dma_addr_t *dma_handle) 62void *consistent_alloc(gfp_t gfp, size_t size, dma_addr_t *dma_handle)
63{ 63{
64 unsigned long order, vaddr; 64 unsigned long order, vaddr;
65 void *ret; 65 void *ret;
diff --git a/arch/microblaze/mm/fault.c b/arch/microblaze/mm/fault.c
index 57bd2a09610c..ae97d2ccdc22 100644
--- a/arch/microblaze/mm/fault.c
+++ b/arch/microblaze/mm/fault.c
@@ -48,7 +48,7 @@ static int store_updates_sp(struct pt_regs *regs)
48{ 48{
49 unsigned int inst; 49 unsigned int inst;
50 50
51 if (get_user(inst, (unsigned int *)regs->pc)) 51 if (get_user(inst, (unsigned int __user *)regs->pc))
52 return 0; 52 return 0;
53 /* check for 1 in the rD field */ 53 /* check for 1 in the rD field */
54 if (((inst >> 21) & 0x1f) != 1) 54 if (((inst >> 21) & 0x1f) != 1)
diff --git a/arch/microblaze/pci/indirect_pci.c b/arch/microblaze/pci/indirect_pci.c
index 25f18f017f21..4196eb6bd764 100644
--- a/arch/microblaze/pci/indirect_pci.c
+++ b/arch/microblaze/pci/indirect_pci.c
@@ -108,7 +108,7 @@ indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
108 out_le32(hose->cfg_addr, (0x80000000 | (bus_no << 16) | 108 out_le32(hose->cfg_addr, (0x80000000 | (bus_no << 16) |
109 (devfn << 8) | reg | cfg_type)); 109 (devfn << 8) | reg | cfg_type));
110 110
111 /* surpress setting of PCI_PRIMARY_BUS */ 111 /* suppress setting of PCI_PRIMARY_BUS */
112 if (hose->indirect_type & INDIRECT_TYPE_SURPRESS_PRIMARY_BUS) 112 if (hose->indirect_type & INDIRECT_TYPE_SURPRESS_PRIMARY_BUS)
113 if ((offset == PCI_PRIMARY_BUS) && 113 if ((offset == PCI_PRIMARY_BUS) &&
114 (bus->number == hose->first_busno)) 114 (bus->number == hose->first_busno))
diff --git a/arch/microblaze/pci/pci-common.c b/arch/microblaze/pci/pci-common.c
index e363615d6798..53599067d2f9 100644
--- a/arch/microblaze/pci/pci-common.c
+++ b/arch/microblaze/pci/pci-common.c
@@ -29,6 +29,7 @@
29#include <linux/slab.h> 29#include <linux/slab.h>
30#include <linux/of.h> 30#include <linux/of.h>
31#include <linux/of_address.h> 31#include <linux/of_address.h>
32#include <linux/of_pci.h>
32 33
33#include <asm/processor.h> 34#include <asm/processor.h>
34#include <asm/io.h> 35#include <asm/io.h>
@@ -236,7 +237,7 @@ int pci_read_irq_line(struct pci_dev *pci_dev)
236 237
237 virq = irq_create_mapping(NULL, line); 238 virq = irq_create_mapping(NULL, line);
238 if (virq != NO_IRQ) 239 if (virq != NO_IRQ)
239 set_irq_type(virq, IRQ_TYPE_LEVEL_LOW); 240 irq_set_irq_type(virq, IRQ_TYPE_LEVEL_LOW);
240 } else { 241 } else {
241 pr_debug(" Got one, spec %d cells (0x%08x 0x%08x...) on %s\n", 242 pr_debug(" Got one, spec %d cells (0x%08x 0x%08x...) on %s\n",
242 oirq.size, oirq.specifier[0], oirq.specifier[1], 243 oirq.size, oirq.specifier[0], oirq.specifier[1],
diff --git a/arch/microblaze/pci/pci_32.c b/arch/microblaze/pci/pci_32.c
index 3c3d808d7ce0..92728a6cfd80 100644
--- a/arch/microblaze/pci/pci_32.c
+++ b/arch/microblaze/pci/pci_32.c
@@ -332,6 +332,7 @@ static void __devinit pcibios_scan_phb(struct pci_controller *hose)
332 hose->global_number); 332 hose->global_number);
333 return; 333 return;
334 } 334 }
335 bus.dev->of_node = of_node_get(node);
335 bus->secondary = hose->first_busno; 336 bus->secondary = hose->first_busno;
336 hose->bus = bus; 337 hose->bus = bus;
337 338
diff --git a/arch/microblaze/platform/generic/Kconfig.auto b/arch/microblaze/platform/generic/Kconfig.auto
index 5d86fc19029d..25a6f019e94d 100644
--- a/arch/microblaze/platform/generic/Kconfig.auto
+++ b/arch/microblaze/platform/generic/Kconfig.auto
@@ -29,7 +29,7 @@ config KERNEL_BASE_ADDR
29 BASE Address for kernel 29 BASE Address for kernel
30 30
31config XILINX_MICROBLAZE0_FAMILY 31config XILINX_MICROBLAZE0_FAMILY
32 string "Targetted FPGA family" 32 string "Targeted FPGA family"
33 default "virtex5" 33 default "virtex5"
34 34
35config XILINX_MICROBLAZE0_USE_MSR_INSTR 35config XILINX_MICROBLAZE0_USE_MSR_INSTR
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-10 00:38:58 -0500