microblaze: Optimize BE/LE bootup detecting

Save 0x1 word to rodata section and remove online value
loading if DTB is passed from bootloader. It saves two
asm instructions in bootup.

Signed-off-by: Michal Simek <monstr@monstr.eu>

1 files changed, 7 insertions, 5 deletions

diff --git a/arch/microblaze/kernel/head.S b/arch/microblaze/kernel/head.S
index 778a5ce2e4fc..d8dc085a9456 100644
--- a/arch/microblaze/kernel/head.S
+++ b/arch/microblaze/kernel/head.S
@@ -39,7 +39,7 @@
 #include <asm/mmu.h>
 #include <asm/processor.h>
 
-.data
+.section .data
 .global empty_zero_page
 .align 12
 empty_zero_page:
@@ -50,6 +50,11 @@ swapper_pg_dir:
 
 #endif /* CONFIG_MMU */
 
+.section .rodata
+.align 4
+endian_check:
+        .word   1
+
         __HEAD
 ENTRY(_start)
 #if CONFIG_KERNEL_BASE_ADDR == 0
@@ -79,10 +84,7 @@ real_start:
 /* Does r7 point to a valid FDT? Load HEADER magic number */
         /* Run time Big/Little endian platform */
         /* Save 1 as word and load byte - 0 - BIG, 1 - LITTLE */
-        addik   r11, r0, 0x1 /* BIG/LITTLE checking value */
-        /* __bss_start will be zeroed later - it is just temp location */
-        swi     r11, r0, TOPHYS(__bss_start)
-        lbui    r11, r0, TOPHYS(__bss_start)
+        lbui    r11, r0, TOPHYS(endian_check)
         beqid   r11, big_endian /* DO NOT break delay stop dependency */
         lw      r11, r0, r7 /* Big endian load in delay slot */
         lwr     r11, r0, r7 /* Little endian load */