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authorMichal Simek <monstr@monstr.eu>2010-03-24 05:09:17 -0400
committerMichal Simek <monstr@monstr.eu>2010-04-01 02:38:24 -0400
commit0691c97d74cbdfd49333ef01939ecaef158ebe1b (patch)
tree39845301dc8a7ef1ea3c3078646a947b27508c27 /arch/microblaze
parent9373dd6ab140f1e6f2e62a9f0bf473987a0b62dc (diff)
microblaze: Use MICROBLAZE_TLB_SIZE in asm code
TLB size was hardcoded in asm code. This patch brings ability to change TLB size only in one place. (mmu.h). Signed-off-by: Michal Simek <monstr@monstr.eu>
Diffstat (limited to 'arch/microblaze')
-rw-r--r--arch/microblaze/kernel/head.S2
-rw-r--r--arch/microblaze/kernel/misc.S4
2 files changed, 3 insertions, 3 deletions
diff --git a/arch/microblaze/kernel/head.S b/arch/microblaze/kernel/head.S
index e397d5d52571..ba2c0333c6bb 100644
--- a/arch/microblaze/kernel/head.S
+++ b/arch/microblaze/kernel/head.S
@@ -134,7 +134,7 @@ _copy_bram:
134 * virtual to physical. 134 * virtual to physical.
135 */ 135 */
136 nop 136 nop
137 addik r3, r0, 63 /* Invalidate all TLB entries */ 137 addik r3, r0, MICROBLAZE_TLB_SIZE -1 /* Invalidate all TLB entries */
138_invalidate: 138_invalidate:
139 mts rtlbx, r3 139 mts rtlbx, r3
140 mts rtlbhi, r0 /* flush: ensure V is clear */ 140 mts rtlbhi, r0 /* flush: ensure V is clear */
diff --git a/arch/microblaze/kernel/misc.S b/arch/microblaze/kernel/misc.S
index 18681eed5ec7..7cf86498326c 100644
--- a/arch/microblaze/kernel/misc.S
+++ b/arch/microblaze/kernel/misc.S
@@ -29,7 +29,7 @@
29.type _tlbia, @function 29.type _tlbia, @function
30.align 4; 30.align 4;
31_tlbia: 31_tlbia:
32 addik r12, r0, 63 /* flush all entries (63 - 3) */ 32 addik r12, r0, MICROBLAZE_TLB_SIZE - 1 /* flush all entries (63 - 3) */
33 /* isync */ 33 /* isync */
34_tlbia_1: 34_tlbia_1:
35 mts rtlbx, r12 35 mts rtlbx, r12
@@ -75,7 +75,7 @@ early_console_reg_tlb_alloc:
75 * Load a TLB entry for the UART, so that microblaze_progress() can use 75 * Load a TLB entry for the UART, so that microblaze_progress() can use
76 * the UARTs nice and early. We use a 4k real==virtual mapping. 76 * the UARTs nice and early. We use a 4k real==virtual mapping.
77 */ 77 */
78 ori r4, r0, 63 78 ori r4, r0, MICROBLAZE_TLB_SIZE - 1
79 mts rtlbx, r4 /* TLB slot 2 */ 79 mts rtlbx, r4 /* TLB slot 2 */
80 80
81 or r4,r5,r0 81 or r4,r5,r0