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authorArnd Bergmann <arnd@arndb.de>2009-05-01 17:44:51 -0400
committerMichal Simek <monstr@monstr.eu>2009-05-21 09:56:06 -0400
commit0c60155e14eb00fa13836a710a2d2efb63d8861c (patch)
treee6777f60d55ec93ff8bd8c3b307858802485c540 /arch/microblaze
parent6b4374261a067e2e1b78602eb5e631a4e027dacf (diff)
microblaze: add a dummy pgprot_noncached
Some device drivers call this, so add a macro that pretends to do this. Since there is no MMU support, it won't actually result in an uncached mapping, though. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Michal Simek <monstr@monstr.eu>
Diffstat (limited to 'arch/microblaze')
-rw-r--r--arch/microblaze/include/asm/pgtable.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/microblaze/include/asm/pgtable.h b/arch/microblaze/include/asm/pgtable.h
index 4df31e46568e..254fd4ba733b 100644
--- a/arch/microblaze/include/asm/pgtable.h
+++ b/arch/microblaze/include/asm/pgtable.h
@@ -27,6 +27,8 @@
27#define PAGE_READONLY __pgprot(0) /* these mean nothing to non MMU */ 27#define PAGE_READONLY __pgprot(0) /* these mean nothing to non MMU */
28#define PAGE_KERNEL __pgprot(0) /* these mean nothing to non MMU */ 28#define PAGE_KERNEL __pgprot(0) /* these mean nothing to non MMU */
29 29
30#define pgprot_noncached(x) (x)
31
30#define __swp_type(x) (0) 32#define __swp_type(x) (0)
31#define __swp_offset(x) (0) 33#define __swp_offset(x) (0)
32#define __swp_entry(typ, off) ((swp_entry_t) { ((typ) | ((off) << 7)) }) 34#define __swp_entry(typ, off) ((swp_entry_t) { ((typ) | ((off) << 7)) })