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authorLucas De Marchi <lucas.demarchi@profusion.mobi>2011-03-30 21:57:33 -0400
committerLucas De Marchi <lucas.demarchi@profusion.mobi>2011-03-31 10:26:23 -0400
commit25985edcedea6396277003854657b5f3cb31a628 (patch)
treef026e810210a2ee7290caeb737c23cb6472b7c38 /arch/microblaze
parent6aba74f2791287ec407e0f92487a725a25908067 (diff)
Fix common misspellings
Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
Diffstat (limited to 'arch/microblaze')
-rw-r--r--arch/microblaze/Makefile2
-rw-r--r--arch/microblaze/include/asm/io.h2
-rw-r--r--arch/microblaze/include/asm/pci-bridge.h2
-rw-r--r--arch/microblaze/include/asm/pci.h2
-rw-r--r--arch/microblaze/kernel/cpu/cache.c2
-rw-r--r--arch/microblaze/lib/memcpy.c8
-rw-r--r--arch/microblaze/lib/memmove.c6
-rw-r--r--arch/microblaze/lib/memset.c2
-rw-r--r--arch/microblaze/pci/indirect_pci.c2
-rw-r--r--arch/microblaze/platform/generic/Kconfig.auto2
10 files changed, 15 insertions, 15 deletions
diff --git a/arch/microblaze/Makefile b/arch/microblaze/Makefile
index 6f432e6df9af..b23c40eb7a52 100644
--- a/arch/microblaze/Makefile
+++ b/arch/microblaze/Makefile
@@ -18,7 +18,7 @@ export CPU_VER CPU_MAJOR CPU_MINOR CPU_REV
18# rather than bools y/n 18# rather than bools y/n
19 19
20# Work out HW multipler support. This is tricky. 20# Work out HW multipler support. This is tricky.
21# 1. Spartan2 has no HW multiplers. 21# 1. Spartan2 has no HW multipliers.
22# 2. MicroBlaze v3.x always uses them, except in Spartan 2 22# 2. MicroBlaze v3.x always uses them, except in Spartan 2
23# 3. All other FPGa/CPU ver combos, we can trust the CONFIG_ settings 23# 3. All other FPGa/CPU ver combos, we can trust the CONFIG_ settings
24ifeq (,$(findstring spartan2,$(CONFIG_XILINX_MICROBLAZE0_FAMILY))) 24ifeq (,$(findstring spartan2,$(CONFIG_XILINX_MICROBLAZE0_FAMILY)))
diff --git a/arch/microblaze/include/asm/io.h b/arch/microblaze/include/asm/io.h
index eae32220f447..8cdac14b55b0 100644
--- a/arch/microblaze/include/asm/io.h
+++ b/arch/microblaze/include/asm/io.h
@@ -70,7 +70,7 @@ static inline void __raw_writeq(unsigned long v, volatile void __iomem *addr)
70 70
71/* 71/*
72 * read (readb, readw, readl, readq) and write (writeb, writew, 72 * read (readb, readw, readl, readq) and write (writeb, writew,
73 * writel, writeq) accessors are for PCI and thus littel endian. 73 * writel, writeq) accessors are for PCI and thus little endian.
74 * Linux 2.4 for Microblaze had this wrong. 74 * Linux 2.4 for Microblaze had this wrong.
75 */ 75 */
76static inline unsigned char readb(const volatile void __iomem *addr) 76static inline unsigned char readb(const volatile void __iomem *addr)
diff --git a/arch/microblaze/include/asm/pci-bridge.h b/arch/microblaze/include/asm/pci-bridge.h
index 10717669e0c2..746df91e5796 100644
--- a/arch/microblaze/include/asm/pci-bridge.h
+++ b/arch/microblaze/include/asm/pci-bridge.h
@@ -76,7 +76,7 @@ struct pci_controller {
76 * Used for variants of PCI indirect handling and possible quirks: 76 * Used for variants of PCI indirect handling and possible quirks:
77 * SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1 77 * SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1
78 * EXT_REG - provides access to PCI-e extended registers 78 * EXT_REG - provides access to PCI-e extended registers
79 * SURPRESS_PRIMARY_BUS - we surpress the setting of PCI_PRIMARY_BUS 79 * SURPRESS_PRIMARY_BUS - we suppress the setting of PCI_PRIMARY_BUS
80 * on Freescale PCI-e controllers since they used the PCI_PRIMARY_BUS 80 * on Freescale PCI-e controllers since they used the PCI_PRIMARY_BUS
81 * to determine which bus number to match on when generating type0 81 * to determine which bus number to match on when generating type0
82 * config cycles 82 * config cycles
diff --git a/arch/microblaze/include/asm/pci.h b/arch/microblaze/include/asm/pci.h
index 2232ff942ba9..ba65cf472544 100644
--- a/arch/microblaze/include/asm/pci.h
+++ b/arch/microblaze/include/asm/pci.h
@@ -158,7 +158,7 @@ extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
158extern void pcibios_setup_bus_devices(struct pci_bus *bus); 158extern void pcibios_setup_bus_devices(struct pci_bus *bus);
159extern void pcibios_setup_bus_self(struct pci_bus *bus); 159extern void pcibios_setup_bus_self(struct pci_bus *bus);
160 160
161/* This part of code was originaly in xilinx-pci.h */ 161/* This part of code was originally in xilinx-pci.h */
162#ifdef CONFIG_PCI_XILINX 162#ifdef CONFIG_PCI_XILINX
163extern void __init xilinx_pci_init(void); 163extern void __init xilinx_pci_init(void);
164#else 164#else
diff --git a/arch/microblaze/kernel/cpu/cache.c b/arch/microblaze/kernel/cpu/cache.c
index cf0afd90a2c0..4b7d8a3f4aef 100644
--- a/arch/microblaze/kernel/cpu/cache.c
+++ b/arch/microblaze/kernel/cpu/cache.c
@@ -129,7 +129,7 @@ do { \
129 * to use for simple wdc or wic. 129 * to use for simple wdc or wic.
130 * 130 *
131 * start address is cache aligned 131 * start address is cache aligned
132 * end address is not aligned, if end is aligned then I have to substract 132 * end address is not aligned, if end is aligned then I have to subtract
133 * cacheline length because I can't flush/invalidate the next cacheline. 133 * cacheline length because I can't flush/invalidate the next cacheline.
134 * If is not, I align it because I will flush/invalidate whole line. 134 * If is not, I align it because I will flush/invalidate whole line.
135 */ 135 */
diff --git a/arch/microblaze/lib/memcpy.c b/arch/microblaze/lib/memcpy.c
index cc495d7d99cc..52746e718dfa 100644
--- a/arch/microblaze/lib/memcpy.c
+++ b/arch/microblaze/lib/memcpy.c
@@ -63,8 +63,8 @@ void *memcpy(void *v_dst, const void *v_src, __kernel_size_t c)
63 if (likely(c >= 4)) { 63 if (likely(c >= 4)) {
64 unsigned value, buf_hold; 64 unsigned value, buf_hold;
65 65
66 /* Align the dstination to a word boundry. */ 66 /* Align the destination to a word boundary. */
67 /* This is done in an endian independant manner. */ 67 /* This is done in an endian independent manner. */
68 switch ((unsigned long)dst & 3) { 68 switch ((unsigned long)dst & 3) {
69 case 1: 69 case 1:
70 *dst++ = *src++; 70 *dst++ = *src++;
@@ -80,7 +80,7 @@ void *memcpy(void *v_dst, const void *v_src, __kernel_size_t c)
80 i_dst = (void *)dst; 80 i_dst = (void *)dst;
81 81
82 /* Choose a copy scheme based on the source */ 82 /* Choose a copy scheme based on the source */
83 /* alignment relative to dstination. */ 83 /* alignment relative to destination. */
84 switch ((unsigned long)src & 3) { 84 switch ((unsigned long)src & 3) {
85 case 0x0: /* Both byte offsets are aligned */ 85 case 0x0: /* Both byte offsets are aligned */
86 i_src = (const void *)src; 86 i_src = (const void *)src;
@@ -173,7 +173,7 @@ void *memcpy(void *v_dst, const void *v_src, __kernel_size_t c)
173 } 173 }
174 174
175 /* Finish off any remaining bytes */ 175 /* Finish off any remaining bytes */
176 /* simple fast copy, ... unless a cache boundry is crossed */ 176 /* simple fast copy, ... unless a cache boundary is crossed */
177 switch (c) { 177 switch (c) {
178 case 3: 178 case 3:
179 *dst++ = *src++; 179 *dst++ = *src++;
diff --git a/arch/microblaze/lib/memmove.c b/arch/microblaze/lib/memmove.c
index 810fd68775e3..2146c3752a80 100644
--- a/arch/microblaze/lib/memmove.c
+++ b/arch/microblaze/lib/memmove.c
@@ -83,8 +83,8 @@ void *memmove(void *v_dst, const void *v_src, __kernel_size_t c)
83 if (c >= 4) { 83 if (c >= 4) {
84 unsigned value, buf_hold; 84 unsigned value, buf_hold;
85 85
86 /* Align the destination to a word boundry. */ 86 /* Align the destination to a word boundary. */
87 /* This is done in an endian independant manner. */ 87 /* This is done in an endian independent manner. */
88 88
89 switch ((unsigned long)dst & 3) { 89 switch ((unsigned long)dst & 3) {
90 case 3: 90 case 3:
@@ -193,7 +193,7 @@ void *memmove(void *v_dst, const void *v_src, __kernel_size_t c)
193 dst = (void *)i_dst; 193 dst = (void *)i_dst;
194 } 194 }
195 195
196 /* simple fast copy, ... unless a cache boundry is crossed */ 196 /* simple fast copy, ... unless a cache boundary is crossed */
197 /* Finish off any remaining bytes */ 197 /* Finish off any remaining bytes */
198 switch (c) { 198 switch (c) {
199 case 4: 199 case 4:
diff --git a/arch/microblaze/lib/memset.c b/arch/microblaze/lib/memset.c
index 834565d1607e..ddf67939576d 100644
--- a/arch/microblaze/lib/memset.c
+++ b/arch/microblaze/lib/memset.c
@@ -64,7 +64,7 @@ void *memset(void *v_src, int c, __kernel_size_t n)
64 64
65 if (likely(n >= 4)) { 65 if (likely(n >= 4)) {
66 /* Align the destination to a word boundary */ 66 /* Align the destination to a word boundary */
67 /* This is done in an endian independant manner */ 67 /* This is done in an endian independent manner */
68 switch ((unsigned) src & 3) { 68 switch ((unsigned) src & 3) {
69 case 1: 69 case 1:
70 *src++ = c; 70 *src++ = c;
diff --git a/arch/microblaze/pci/indirect_pci.c b/arch/microblaze/pci/indirect_pci.c
index 25f18f017f21..4196eb6bd764 100644
--- a/arch/microblaze/pci/indirect_pci.c
+++ b/arch/microblaze/pci/indirect_pci.c
@@ -108,7 +108,7 @@ indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
108 out_le32(hose->cfg_addr, (0x80000000 | (bus_no << 16) | 108 out_le32(hose->cfg_addr, (0x80000000 | (bus_no << 16) |
109 (devfn << 8) | reg | cfg_type)); 109 (devfn << 8) | reg | cfg_type));
110 110
111 /* surpress setting of PCI_PRIMARY_BUS */ 111 /* suppress setting of PCI_PRIMARY_BUS */
112 if (hose->indirect_type & INDIRECT_TYPE_SURPRESS_PRIMARY_BUS) 112 if (hose->indirect_type & INDIRECT_TYPE_SURPRESS_PRIMARY_BUS)
113 if ((offset == PCI_PRIMARY_BUS) && 113 if ((offset == PCI_PRIMARY_BUS) &&
114 (bus->number == hose->first_busno)) 114 (bus->number == hose->first_busno))
diff --git a/arch/microblaze/platform/generic/Kconfig.auto b/arch/microblaze/platform/generic/Kconfig.auto
index 5d86fc19029d..25a6f019e94d 100644
--- a/arch/microblaze/platform/generic/Kconfig.auto
+++ b/arch/microblaze/platform/generic/Kconfig.auto
@@ -29,7 +29,7 @@ config KERNEL_BASE_ADDR
29 BASE Address for kernel 29 BASE Address for kernel
30 30
31config XILINX_MICROBLAZE0_FAMILY 31config XILINX_MICROBLAZE0_FAMILY
32 string "Targetted FPGA family" 32 string "Targeted FPGA family"
33 default "virtex5" 33 default "virtex5"
34 34
35config XILINX_MICROBLAZE0_USE_MSR_INSTR 35config XILINX_MICROBLAZE0_USE_MSR_INSTR