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authorMichal Simek <monstr@monstr.eu>2009-08-31 10:24:56 -0400
committerMichal Simek <monstr@monstr.eu>2009-09-21 08:29:21 -0400
commit9002062ff52696888847224a778a3279bc8c1cb5 (patch)
tree8a68281f621df2702b58d38f7e13b8639db13af0 /arch/microblaze
parent2622434ee0108c65808a63f067e72d0bbc75b372 (diff)
microblaze: Improve checking mechanism for MSR instruction
It is more safe to use clear instead of msrset. We save some instructions too. Signed-off-by: Michal Simek <monstr@monstr.eu>
Diffstat (limited to 'arch/microblaze')
-rw-r--r--arch/microblaze/kernel/head.S13
1 files changed, 5 insertions, 8 deletions
diff --git a/arch/microblaze/kernel/head.S b/arch/microblaze/kernel/head.S
index bfc7ea801cc4..697ce3007f30 100644
--- a/arch/microblaze/kernel/head.S
+++ b/arch/microblaze/kernel/head.S
@@ -54,19 +54,16 @@ ENTRY(_start)
54 mfs r1, rmsr 54 mfs r1, rmsr
55 andi r1, r1, ~2 55 andi r1, r1, ~2
56 mts rmsr, r1 56 mts rmsr, r1
57
58/* 57/*
59 * Here is checking mechanism which check if Microblaze has msr instructions 58 * Here is checking mechanism which check if Microblaze has msr instructions
60 * We load msr and compare it with previous r1 value - if is the same, 59 * We load msr and compare it with previous r1 value - if is the same,
61 * msr instructions works if not - cpu don't have them. 60 * msr instructions works if not - cpu don't have them.
62 */ 61 */
63 or r8, r0, r0 /* 0 - I have msr instr, 1 - I don't have */ 62 /* r8=0 - I have msr instr, 1 - I don't have them */
64 or r12, r0, r0 63 rsubi r0, r0, 1 /* set the carry bit */
65 msrset r12, 0 /* set nothing - just read msr for test */ 64 msrclr r0, 0x4 /* try to clear it */
66 cmpu r12, r12, r1 65 /* read the carry bit, r8 will be '0' if msrclr exists */
67 beqi r12, 1f 66 addik r8, r0, 0
68 ori r8, r0, 1 /* I don't have msr */
691:
70 67
71/* r7 may point to an FDT, or there may be one linked in. 68/* r7 may point to an FDT, or there may be one linked in.
72 if it's in r7, we've got to save it away ASAP. 69 if it's in r7, we've got to save it away ASAP.