diff options
author | Michal Simek <monstr@monstr.eu> | 2011-04-04 09:46:03 -0400 |
---|---|---|
committer | Michal Simek <monstr@monstr.eu> | 2012-03-23 04:28:18 -0400 |
commit | 1451d1d88b9aa32ac9ee54180239e9b34b6f9e86 (patch) | |
tree | 417fbc899c6469af1c0b2cf2dc1a99f050cf48fd /arch/microblaze/kernel | |
parent | 95b0f9ea66661681f6ae081ea28416744d622c07 (diff) |
microblaze: Introduce TLB skip size
TLB skip size direct how many TLBs is skipped.
Currently TLB0 and TLB1 are used for Linux kernel mapping
that's why their are skipped.
Signed-off-by: Michal Simek <monstr@monstr.eu>
Diffstat (limited to 'arch/microblaze/kernel')
-rw-r--r-- | arch/microblaze/kernel/hw_exception_handler.S | 7 | ||||
-rw-r--r-- | arch/microblaze/kernel/misc.S | 4 |
2 files changed, 6 insertions, 5 deletions
diff --git a/arch/microblaze/kernel/hw_exception_handler.S b/arch/microblaze/kernel/hw_exception_handler.S index e62be8379604..b7249f4215a2 100644 --- a/arch/microblaze/kernel/hw_exception_handler.S +++ b/arch/microblaze/kernel/hw_exception_handler.S | |||
@@ -821,18 +821,19 @@ ex_handler_done: | |||
821 | * A common place to load the TLB. | 821 | * A common place to load the TLB. |
822 | */ | 822 | */ |
823 | tlb_index: | 823 | tlb_index: |
824 | .long 1 /* MS: storing last used tlb index */ | 824 | /* MS: storing last used tlb index */ |
825 | .long (MICROBLAZE_TLB_SKIP - 1) | ||
825 | finish_tlb_load: | 826 | finish_tlb_load: |
826 | /* MS: load the last used TLB index. */ | 827 | /* MS: load the last used TLB index. */ |
827 | lwi r5, r0, TOPHYS(tlb_index) | 828 | lwi r5, r0, TOPHYS(tlb_index) |
828 | addik r5, r5, 1 /* MS: inc tlb_index -> use next one */ | 829 | addik r5, r5, 1 /* MS: inc tlb_index -> use next one */ |
829 | 830 | ||
830 | /* MS: FIXME this is potential fault, because this is mask not count */ | 831 | /* MS: FIXME this is potential fault, because this is mask not count */ |
831 | andi r5, r5, (MICROBLAZE_TLB_SIZE-1) | 832 | andi r5, r5, MICROBLAZE_TLB_SIZE - 1 |
832 | ori r6, r0, 1 | 833 | ori r6, r0, 1 |
833 | cmp r31, r5, r6 | 834 | cmp r31, r5, r6 |
834 | blti r31, ex12 | 835 | blti r31, ex12 |
835 | addik r5, r6, 1 | 836 | addik r5, r6, MICROBLAZE_TLB_SKIP - 1 |
836 | ex12: | 837 | ex12: |
837 | /* MS: save back current TLB index */ | 838 | /* MS: save back current TLB index */ |
838 | swi r5, r0, TOPHYS(tlb_index) | 839 | swi r5, r0, TOPHYS(tlb_index) |
diff --git a/arch/microblaze/kernel/misc.S b/arch/microblaze/kernel/misc.S index 206da3da361f..c9090d7973f6 100644 --- a/arch/microblaze/kernel/misc.S +++ b/arch/microblaze/kernel/misc.S | |||
@@ -36,7 +36,7 @@ _tlbia_1: | |||
36 | nop | 36 | nop |
37 | mts rtlbhi, r0 /* flush: ensure V is clear */ | 37 | mts rtlbhi, r0 /* flush: ensure V is clear */ |
38 | nop | 38 | nop |
39 | addik r11, r12, -2 | 39 | addik r11, r12, -MICROBLAZE_TLB_SKIP |
40 | bneid r11, _tlbia_1 /* loop for all entries */ | 40 | bneid r11, _tlbia_1 /* loop for all entries */ |
41 | addik r12, r12, -1 | 41 | addik r12, r12, -1 |
42 | /* sync */ | 42 | /* sync */ |
@@ -75,7 +75,7 @@ early_console_reg_tlb_alloc: | |||
75 | * Load a TLB entry for the UART, so that microblaze_progress() can use | 75 | * Load a TLB entry for the UART, so that microblaze_progress() can use |
76 | * the UARTs nice and early. We use a 4k real==virtual mapping. | 76 | * the UARTs nice and early. We use a 4k real==virtual mapping. |
77 | */ | 77 | */ |
78 | ori r4, r0, MICROBLAZE_TLB_SIZE - 1 | 78 | ori r4, r0, 63 |
79 | mts rtlbx, r4 /* TLB slot 63 */ | 79 | mts rtlbx, r4 /* TLB slot 63 */ |
80 | 80 | ||
81 | or r4,r5,r0 | 81 | or r4,r5,r0 |