diff options
author | Thomas Gleixner <tglx@linutronix.de> | 2011-02-06 14:36:30 -0500 |
---|---|---|
committer | Michal Simek <monstr@monstr.eu> | 2011-03-09 02:09:59 -0500 |
commit | 6f205a4c69037e4d8fdf33088a852b64500df012 (patch) | |
tree | a2bd344eea824789cbf6342970b3e7631d8d30a2 /arch/microblaze/kernel/intc.c | |
parent | 208a34f55f1ba4964e5a06b6876a84dc454f1d92 (diff) |
microblaze: Convert irq_chip to new functions
Use proper irq_desc wrappers while at it.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Michal Simek <monstr@monstr.eu>
Diffstat (limited to 'arch/microblaze/kernel/intc.c')
-rw-r--r-- | arch/microblaze/kernel/intc.c | 38 |
1 files changed, 19 insertions, 19 deletions
diff --git a/arch/microblaze/kernel/intc.c b/arch/microblaze/kernel/intc.c index bff99d1b749a..e4661285118e 100644 --- a/arch/microblaze/kernel/intc.c +++ b/arch/microblaze/kernel/intc.c | |||
@@ -40,46 +40,46 @@ unsigned int nr_irq; | |||
40 | #define MER_ME (1<<0) | 40 | #define MER_ME (1<<0) |
41 | #define MER_HIE (1<<1) | 41 | #define MER_HIE (1<<1) |
42 | 42 | ||
43 | static void intc_enable_or_unmask(unsigned int irq) | 43 | static void intc_enable_or_unmask(struct irq_data *d) |
44 | { | 44 | { |
45 | unsigned long mask = 1 << irq; | 45 | unsigned long mask = 1 << d->irq; |
46 | pr_debug("enable_or_unmask: %d\n", irq); | 46 | pr_debug("enable_or_unmask: %d\n", d->irq); |
47 | out_be32(INTC_BASE + SIE, mask); | 47 | out_be32(INTC_BASE + SIE, mask); |
48 | 48 | ||
49 | /* ack level irqs because they can't be acked during | 49 | /* ack level irqs because they can't be acked during |
50 | * ack function since the handle_level_irq function | 50 | * ack function since the handle_level_irq function |
51 | * acks the irq before calling the interrupt handler | 51 | * acks the irq before calling the interrupt handler |
52 | */ | 52 | */ |
53 | if (irq_desc[irq].status & IRQ_LEVEL) | 53 | if (irq_to_desc(d->irq)->status & IRQ_LEVEL) |
54 | out_be32(INTC_BASE + IAR, mask); | 54 | out_be32(INTC_BASE + IAR, mask); |
55 | } | 55 | } |
56 | 56 | ||
57 | static void intc_disable_or_mask(unsigned int irq) | 57 | static void intc_disable_or_mask(struct irq_data *d) |
58 | { | 58 | { |
59 | pr_debug("disable: %d\n", irq); | 59 | pr_debug("disable: %d\n", d->irq); |
60 | out_be32(INTC_BASE + CIE, 1 << irq); | 60 | out_be32(INTC_BASE + CIE, 1 << d->irq); |
61 | } | 61 | } |
62 | 62 | ||
63 | static void intc_ack(unsigned int irq) | 63 | static void intc_ack(struct irq_data *d) |
64 | { | 64 | { |
65 | pr_debug("ack: %d\n", irq); | 65 | pr_debug("ack: %d\n", d->irq); |
66 | out_be32(INTC_BASE + IAR, 1 << irq); | 66 | out_be32(INTC_BASE + IAR, 1 << d->irq); |
67 | } | 67 | } |
68 | 68 | ||
69 | static void intc_mask_ack(unsigned int irq) | 69 | static void intc_mask_ack(struct irq_data *d) |
70 | { | 70 | { |
71 | unsigned long mask = 1 << irq; | 71 | unsigned long mask = 1 << d->irq; |
72 | pr_debug("disable_and_ack: %d\n", irq); | 72 | pr_debug("disable_and_ack: %d\n", d->irq); |
73 | out_be32(INTC_BASE + CIE, mask); | 73 | out_be32(INTC_BASE + CIE, mask); |
74 | out_be32(INTC_BASE + IAR, mask); | 74 | out_be32(INTC_BASE + IAR, mask); |
75 | } | 75 | } |
76 | 76 | ||
77 | static struct irq_chip intc_dev = { | 77 | static struct irq_chip intc_dev = { |
78 | .name = "Xilinx INTC", | 78 | .name = "Xilinx INTC", |
79 | .unmask = intc_enable_or_unmask, | 79 | .irq_unmask = intc_enable_or_unmask, |
80 | .mask = intc_disable_or_mask, | 80 | .irq_mask = intc_disable_or_mask, |
81 | .ack = intc_ack, | 81 | .irq_ack = intc_ack, |
82 | .mask_ack = intc_mask_ack, | 82 | .irq_mask_ack = intc_mask_ack, |
83 | }; | 83 | }; |
84 | 84 | ||
85 | unsigned int get_irq(struct pt_regs *regs) | 85 | unsigned int get_irq(struct pt_regs *regs) |
@@ -159,11 +159,11 @@ void __init init_IRQ(void) | |||
159 | if (intr_type & (0x00000001 << i)) { | 159 | if (intr_type & (0x00000001 << i)) { |
160 | set_irq_chip_and_handler_name(i, &intc_dev, | 160 | set_irq_chip_and_handler_name(i, &intc_dev, |
161 | handle_edge_irq, intc_dev.name); | 161 | handle_edge_irq, intc_dev.name); |
162 | irq_desc[i].status &= ~IRQ_LEVEL; | 162 | irq_clear_status_flags(i, IRQ_LEVEL); |
163 | } else { | 163 | } else { |
164 | set_irq_chip_and_handler_name(i, &intc_dev, | 164 | set_irq_chip_and_handler_name(i, &intc_dev, |
165 | handle_level_irq, intc_dev.name); | 165 | handle_level_irq, intc_dev.name); |
166 | irq_desc[i].status |= IRQ_LEVEL; | 166 | irq_set_status_flags(i, IRQ_LEVEL); |
167 | } | 167 | } |
168 | } | 168 | } |
169 | } | 169 | } |