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authorLinus Torvalds <torvalds@linux-foundation.org>2009-09-24 12:01:44 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2009-09-24 12:01:44 -0400
commita6b49cb210f878709bdc0bddc16a853f18790d02 (patch)
tree6147078ef0ce584cb6a8dae7468f060ef5838d12 /arch/microblaze/kernel/head.S
parent2c9871de0ae89a0e2c365ea6e277135fe031d8b4 (diff)
parentbfc8125858d777bd5bdba03a091c07cc2e0e17c0 (diff)
Merge branch 'for-linus' of git://git.monstr.eu/linux-2.6-microblaze
* 'for-linus' of git://git.monstr.eu/linux-2.6-microblaze: (24 commits) microblaze: Disable heartbeat/enable emaclite in defconfigs microblaze: Support simpleImage.dts make target microblaze: Fix _start symbol to physical address microblaze: Use LOAD_OFFSET macro to get correct LMA for all sections microblaze: Create the LOAD_OFFSET macro used to compute VMA vs LMA offsets microblaze: Copy ppc asm-compat.h for clean handling of constants in asm and C microblaze: Actually show KiB rather than pages in "Freeing initrd memory:" microblaze: Support ptrace syscall tracing. microblaze: Updated CPU version and FPGA family codes in PVR microblaze: Generate correct signal and siginfo for integer div-by-zero microblaze: Don't be noisy when userspace causes hardware exceptions microblaze: Remove ipc.h file which points to non-existing asm-generic file microblaze: Clear sticky FSR register after generating exception signals microblaze: Ensure CPU usermode is set on new userspace processes microblaze: Use correct kbuild variable KBUILD_CFLAGS microblaze: Save and restore msr in hw exception microblaze: Add architectural support for USB EHCI host controllers microblaze: Implement include/asm/syscall.h. microblaze: Improve checking mechanism for MSR instruction microblaze: Add checking mechanism for MSR instruction ...
Diffstat (limited to 'arch/microblaze/kernel/head.S')
-rw-r--r--arch/microblaze/kernel/head.S14
1 files changed, 12 insertions, 2 deletions
diff --git a/arch/microblaze/kernel/head.S b/arch/microblaze/kernel/head.S
index e41c6ce2a7be..697ce3007f30 100644
--- a/arch/microblaze/kernel/head.S
+++ b/arch/microblaze/kernel/head.S
@@ -54,6 +54,16 @@ ENTRY(_start)
54 mfs r1, rmsr 54 mfs r1, rmsr
55 andi r1, r1, ~2 55 andi r1, r1, ~2
56 mts rmsr, r1 56 mts rmsr, r1
57/*
58 * Here is checking mechanism which check if Microblaze has msr instructions
59 * We load msr and compare it with previous r1 value - if is the same,
60 * msr instructions works if not - cpu don't have them.
61 */
62 /* r8=0 - I have msr instr, 1 - I don't have them */
63 rsubi r0, r0, 1 /* set the carry bit */
64 msrclr r0, 0x4 /* try to clear it */
65 /* read the carry bit, r8 will be '0' if msrclr exists */
66 addik r8, r0, 0
57 67
58/* r7 may point to an FDT, or there may be one linked in. 68/* r7 may point to an FDT, or there may be one linked in.
59 if it's in r7, we've got to save it away ASAP. 69 if it's in r7, we've got to save it away ASAP.
@@ -209,8 +219,8 @@ start_here:
209 * Please see $(ARCH)/mach-$(SUBARCH)/setup.c for 219 * Please see $(ARCH)/mach-$(SUBARCH)/setup.c for
210 * the function. 220 * the function.
211 */ 221 */
212 la r8, r0, machine_early_init 222 la r9, r0, machine_early_init
213 brald r15, r8 223 brald r15, r9
214 nop 224 nop
215 225
216#ifndef CONFIG_MMU 226#ifndef CONFIG_MMU