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author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-02-24 10:43:02 -0500 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-02-24 10:43:02 -0500 |
commit | 7b1f94b8a600a3e8b1f8015c5045f1cc8d100a54 (patch) | |
tree | d01757943ac78f889e8495d073f1706a7e5f22c4 /arch/microblaze/kernel/cpu/cache.c | |
parent | 83d90addc829ab56ace49b10fd7d5d415448aac4 (diff) | |
parent | 83b4d17d8841a9a7b8ed02ac99ca92afada154e1 (diff) |
Merge branch 'for-linus' of git://git.monstr.eu/linux-2.6-microblaze
* 'for-linus' of git://git.monstr.eu/linux-2.6-microblaze:
microblaze: Fix out_le32() macro
microblaze: Fix cache loop function for cache range
Diffstat (limited to 'arch/microblaze/kernel/cpu/cache.c')
-rw-r--r-- | arch/microblaze/kernel/cpu/cache.c | 27 |
1 files changed, 8 insertions, 19 deletions
diff --git a/arch/microblaze/kernel/cpu/cache.c b/arch/microblaze/kernel/cpu/cache.c index d9d63831cc2f..2a56bccce4e0 100644 --- a/arch/microblaze/kernel/cpu/cache.c +++ b/arch/microblaze/kernel/cpu/cache.c | |||
@@ -172,16 +172,15 @@ do { \ | |||
172 | /* It is used only first parameter for OP - for wic, wdc */ | 172 | /* It is used only first parameter for OP - for wic, wdc */ |
173 | #define CACHE_RANGE_LOOP_1(start, end, line_length, op) \ | 173 | #define CACHE_RANGE_LOOP_1(start, end, line_length, op) \ |
174 | do { \ | 174 | do { \ |
175 | int step = -line_length; \ | 175 | int volatile temp; \ |
176 | int count = end - start; \ | 176 | BUG_ON(end - start <= 0); \ |
177 | BUG_ON(count <= 0); \ | ||
178 | \ | 177 | \ |
179 | __asm__ __volatile__ (" 1: addk %0, %0, %1; \ | 178 | __asm__ __volatile__ (" 1: " #op " %1, r0; \ |
180 | " #op " %0, r0; \ | 179 | cmpu %0, %1, %2; \ |
181 | bgtid %1, 1b; \ | 180 | bgtid %0, 1b; \ |
182 | addk %1, %1, %2; \ | 181 | addk %1, %1, %3; \ |
183 | " : : "r" (start), "r" (count), \ | 182 | " : : "r" (temp), "r" (start), "r" (end),\ |
184 | "r" (step) : "memory"); \ | 183 | "r" (line_length) : "memory"); \ |
185 | } while (0); | 184 | } while (0); |
186 | 185 | ||
187 | static void __flush_icache_range_msr_irq(unsigned long start, unsigned long end) | 186 | static void __flush_icache_range_msr_irq(unsigned long start, unsigned long end) |
@@ -313,16 +312,6 @@ static void __invalidate_dcache_all_wb(void) | |||
313 | pr_debug("%s\n", __func__); | 312 | pr_debug("%s\n", __func__); |
314 | CACHE_ALL_LOOP2(cpuinfo.dcache_size, cpuinfo.dcache_line_length, | 313 | CACHE_ALL_LOOP2(cpuinfo.dcache_size, cpuinfo.dcache_line_length, |
315 | wdc.clear) | 314 | wdc.clear) |
316 | |||
317 | #if 0 | ||
318 | unsigned int i; | ||
319 | |||
320 | pr_debug("%s\n", __func__); | ||
321 | |||
322 | /* Just loop through cache size and invalidate it */ | ||
323 | for (i = 0; i < cpuinfo.dcache_size; i += cpuinfo.dcache_line_length) | ||
324 | __invalidate_dcache(0, i); | ||
325 | #endif | ||
326 | } | 315 | } |
327 | 316 | ||
328 | static void __invalidate_dcache_range_wb(unsigned long start, | 317 | static void __invalidate_dcache_range_wb(unsigned long start, |