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authorMichal Simek <michal.simek@xilinx.com>2013-02-07 09:12:24 -0500
committerMichal Simek <michal.simek@xilinx.com>2014-04-07 08:25:53 -0400
commita66a626538af65cbfc611e2b2fce500ed3f24518 (patch)
tree1d471b691d098b3ed5c23ac2af8bdd2f9184d64f /arch/microblaze/include
parentc24cf712ac53ae8a7bedceb1c967da1667431d8e (diff)
microblaze: Use asm-generic/io.h
Using generic io.h will narrow down code duplication in architecture io.h. - define PCI_IOBASE - remove non existing pci_io_base extern Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/microblaze/include')
-rw-r--r--arch/microblaze/include/asm/io.h302
1 files changed, 13 insertions, 289 deletions
diff --git a/arch/microblaze/include/asm/io.h b/arch/microblaze/include/asm/io.h
index 3fbb7f1db3bc..1e4c3329f62e 100644
--- a/arch/microblaze/include/asm/io.h
+++ b/arch/microblaze/include/asm/io.h
@@ -15,7 +15,6 @@
15#include <asm/page.h> 15#include <asm/page.h>
16#include <linux/types.h> 16#include <linux/types.h>
17#include <linux/mm.h> /* Get struct page {...} */ 17#include <linux/mm.h> /* Get struct page {...} */
18#include <asm-generic/iomap.h>
19 18
20#ifndef CONFIG_PCI 19#ifndef CONFIG_PCI
21#define _IO_BASE 0 20#define _IO_BASE 0
@@ -25,211 +24,32 @@
25#define _IO_BASE isa_io_base 24#define _IO_BASE isa_io_base
26#define _ISA_MEM_BASE isa_mem_base 25#define _ISA_MEM_BASE isa_mem_base
27#define PCI_DRAM_OFFSET pci_dram_offset 26#define PCI_DRAM_OFFSET pci_dram_offset
28#endif 27struct pci_dev;
28extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
29#define pci_iounmap pci_iounmap
29 30
30extern unsigned long isa_io_base; 31extern unsigned long isa_io_base;
31extern unsigned long pci_io_base;
32extern unsigned long pci_dram_offset; 32extern unsigned long pci_dram_offset;
33
34extern resource_size_t isa_mem_base; 33extern resource_size_t isa_mem_base;
34#endif
35 35
36#define PCI_IOBASE ((void __iomem *)_IO_BASE)
36#define IO_SPACE_LIMIT (0xFFFFFFFF) 37#define IO_SPACE_LIMIT (0xFFFFFFFF)
37 38
38/* the following is needed to support PCI with some drivers */
39
40#define mmiowb()
41
42static inline unsigned char __raw_readb(const volatile void __iomem *addr)
43{
44 return *(volatile unsigned char __force *)addr;
45}
46static inline unsigned short __raw_readw(const volatile void __iomem *addr)
47{
48 return *(volatile unsigned short __force *)addr;
49}
50static inline unsigned int __raw_readl(const volatile void __iomem *addr)
51{
52 return *(volatile unsigned int __force *)addr;
53}
54static inline unsigned long __raw_readq(const volatile void __iomem *addr)
55{
56 return *(volatile unsigned long __force *)addr;
57}
58static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr)
59{
60 *(volatile unsigned char __force *)addr = v;
61}
62static inline void __raw_writew(unsigned short v, volatile void __iomem *addr)
63{
64 *(volatile unsigned short __force *)addr = v;
65}
66static inline void __raw_writel(unsigned int v, volatile void __iomem *addr)
67{
68 *(volatile unsigned int __force *)addr = v;
69}
70static inline void __raw_writeq(unsigned long v, volatile void __iomem *addr)
71{
72 *(volatile unsigned long __force *)addr = v;
73}
74
75/*
76 * read (readb, readw, readl, readq) and write (writeb, writew,
77 * writel, writeq) accessors are for PCI and thus little endian.
78 * Linux 2.4 for Microblaze had this wrong.
79 */
80static inline unsigned char readb(const volatile void __iomem *addr)
81{
82 return *(volatile unsigned char __force *)addr;
83}
84static inline unsigned short readw(const volatile void __iomem *addr)
85{
86 return le16_to_cpu(*(volatile unsigned short __force *)addr);
87}
88static inline unsigned int readl(const volatile void __iomem *addr)
89{
90 return le32_to_cpu(*(volatile unsigned int __force *)addr);
91}
92#define readq readq
93static inline u64 readq(const volatile void __iomem *addr)
94{
95 return le64_to_cpu(__raw_readq(addr));
96}
97static inline void writeb(unsigned char v, volatile void __iomem *addr)
98{
99 *(volatile unsigned char __force *)addr = v;
100}
101static inline void writew(unsigned short v, volatile void __iomem *addr)
102{
103 *(volatile unsigned short __force *)addr = cpu_to_le16(v);
104}
105static inline void writel(unsigned int v, volatile void __iomem *addr)
106{
107 *(volatile unsigned int __force *)addr = cpu_to_le32(v);
108}
109#define writeq(b, addr) __raw_writeq(cpu_to_le64(b), addr)
110
111/* ioread and iowrite variants. thease are for now same as __raw_
112 * variants of accessors. we might check for endianess in the feature
113 */
114#define ioread8(addr) __raw_readb((u8 *)(addr))
115#define ioread16(addr) __raw_readw((u16 *)(addr))
116#define ioread32(addr) __raw_readl((u32 *)(addr))
117#define iowrite8(v, addr) __raw_writeb((u8)(v), (u8 *)(addr))
118#define iowrite16(v, addr) __raw_writew((u16)(v), (u16 *)(addr))
119#define iowrite32(v, addr) __raw_writel((u32)(v), (u32 *)(addr))
120
121#define ioread16be(addr) __raw_readw((u16 *)(addr))
122#define ioread32be(addr) __raw_readl((u32 *)(addr))
123#define iowrite16be(v, addr) __raw_writew((u16)(v), (u16 *)(addr))
124#define iowrite32be(v, addr) __raw_writel((u32)(v), (u32 *)(addr))
125
126/* These are the definitions for the x86 IO instructions
127 * inb/inw/inl/outb/outw/outl, the "string" versions
128 * insb/insw/insl/outsb/outsw/outsl, and the "pausing" versions
129 * inb_p/inw_p/...
130 * The macros don't do byte-swapping.
131 */
132#define inb(port) readb((u8 *)((unsigned long)(port)))
133#define outb(val, port) writeb((val), (u8 *)((unsigned long)(port)))
134#define inw(port) readw((u16 *)((unsigned long)(port)))
135#define outw(val, port) writew((val), (u16 *)((unsigned long)(port)))
136#define inl(port) readl((u32 *)((unsigned long)(port)))
137#define outl(val, port) writel((val), (u32 *)((unsigned long)(port)))
138
139#define inb_p(port) inb((port))
140#define outb_p(val, port) outb((val), (port))
141#define inw_p(port) inw((port))
142#define outw_p(val, port) outw((val), (port))
143#define inl_p(port) inl((port))
144#define outl_p(val, port) outl((val), (port))
145
146#define memset_io(a, b, c) memset((void *)(a), (b), (c))
147#define memcpy_fromio(a, b, c) memcpy((a), (void *)(b), (c))
148#define memcpy_toio(a, b, c) memcpy((void *)(a), (b), (c))
149
150#ifdef CONFIG_MMU 39#ifdef CONFIG_MMU
151
152#define phys_to_virt(addr) ((void *)__phys_to_virt(addr))
153#define virt_to_phys(addr) ((unsigned long)__virt_to_phys(addr))
154#define virt_to_bus(addr) ((unsigned long)__virt_to_phys(addr))
155
156#define page_to_bus(page) (page_to_phys(page)) 40#define page_to_bus(page) (page_to_phys(page))
157#define bus_to_virt(addr) (phys_to_virt(addr))
158 41
159extern void iounmap(void __iomem *addr); 42extern void iounmap(void __iomem *addr);
160/*extern void *__ioremap(phys_addr_t address, unsigned long size,
161 unsigned long flags);*/
162extern void __iomem *ioremap(phys_addr_t address, unsigned long size);
163#define ioremap_writethrough(addr, size) ioremap((addr), (size))
164#define ioremap_nocache(addr, size) ioremap((addr), (size))
165#define ioremap_fullcache(addr, size) ioremap((addr), (size))
166
167#else /* CONFIG_MMU */
168
169/**
170 * virt_to_phys - map virtual addresses to physical
171 * @address: address to remap
172 *
173 * The returned physical address is the physical (CPU) mapping for
174 * the memory address given. It is only valid to use this function on
175 * addresses directly mapped or allocated via kmalloc.
176 *
177 * This function does not give bus mappings for DMA transfers. In
178 * almost all conceivable cases a device driver should not be using
179 * this function
180 */
181static inline unsigned long __iomem virt_to_phys(volatile void *address)
182{
183 return __pa((unsigned long)address);
184}
185
186#define virt_to_bus virt_to_phys
187
188/**
189 * phys_to_virt - map physical address to virtual
190 * @address: address to remap
191 *
192 * The returned virtual address is a current CPU mapping for
193 * the memory address given. It is only valid to use this function on
194 * addresses that have a kernel mapping
195 *
196 * This function does not handle bus mappings for DMA transfers. In
197 * almost all conceivable cases a device driver should not be using
198 * this function
199 */
200static inline void *phys_to_virt(unsigned long address)
201{
202 return (void *)__va(address);
203}
204 43
205#define bus_to_virt(a) phys_to_virt(a) 44extern void __iomem *ioremap(phys_addr_t address, unsigned long size);
206 45#define ioremap_writethrough(addr, size) ioremap((addr), (size))
207static inline void __iomem *__ioremap(phys_addr_t address, unsigned long size, 46#define ioremap_nocache(addr, size) ioremap((addr), (size))
208 unsigned long flags) 47#define ioremap_fullcache(addr, size) ioremap((addr), (size))
209{ 48#define ioremap_wc(addr, size) ioremap((addr), (size))
210 return (void *)address;
211}
212
213#define ioremap(physaddr, size) ((void __iomem *)(unsigned long)(physaddr))
214#define iounmap(addr) ((void)0)
215#define ioremap_nocache(physaddr, size) ioremap(physaddr, size)
216 49
217#endif /* CONFIG_MMU */ 50#endif /* CONFIG_MMU */
218 51
219/* 52/* Big Endian */
220 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
221 * access
222 */
223#define xlate_dev_mem_ptr(p) __va(p)
224
225/*
226 * Convert a virtual cached pointer to an uncached pointer
227 */
228#define xlate_dev_kmem_ptr(p) p
229
230/*
231 * Big Endian
232 */
233#define out_be32(a, v) __raw_writel((v), (void __iomem __force *)(a)) 53#define out_be32(a, v) __raw_writel((v), (void __iomem __force *)(a))
234#define out_be16(a, v) __raw_writew((v), (a)) 54#define out_be16(a, v) __raw_writew((v), (a))
235 55
@@ -239,10 +59,7 @@ static inline void __iomem *__ioremap(phys_addr_t address, unsigned long size,
239#define writel_be(v, a) out_be32((__force unsigned *)a, v) 59#define writel_be(v, a) out_be32((__force unsigned *)a, v)
240#define readl_be(a) in_be32((__force unsigned *)a) 60#define readl_be(a) in_be32((__force unsigned *)a)
241 61
242/* 62/* Little endian */
243 * Little endian
244 */
245
246#define out_le32(a, v) __raw_writel(__cpu_to_le32(v), (a)) 63#define out_le32(a, v) __raw_writel(__cpu_to_le32(v), (a))
247#define out_le16(a, v) __raw_writew(__cpu_to_le16(v), (a)) 64#define out_le16(a, v) __raw_writew(__cpu_to_le16(v), (a))
248 65
@@ -253,100 +70,7 @@ static inline void __iomem *__ioremap(phys_addr_t address, unsigned long size,
253#define out_8(a, v) __raw_writeb((v), (a)) 70#define out_8(a, v) __raw_writeb((v), (a))
254#define in_8(a) __raw_readb(a) 71#define in_8(a) __raw_readb(a)
255 72
256#define mmiowb() 73#include <asm-generic/io.h>
257
258#define ioport_map(port, nr) ((void __iomem *)(port))
259#define ioport_unmap(addr)
260
261/* from asm-generic/io.h */
262#ifndef insb
263static inline void insb(unsigned long addr, void *buffer, int count)
264{
265 if (count) {
266 u8 *buf = buffer;
267 do {
268 u8 x = inb(addr);
269 *buf++ = x;
270 } while (--count);
271 }
272}
273#endif
274
275#ifndef insw
276static inline void insw(unsigned long addr, void *buffer, int count)
277{
278 if (count) {
279 u16 *buf = buffer;
280 do {
281 u16 x = inw(addr);
282 *buf++ = x;
283 } while (--count);
284 }
285}
286#endif
287
288#ifndef insl
289static inline void insl(unsigned long addr, void *buffer, int count)
290{
291 if (count) {
292 u32 *buf = buffer;
293 do {
294 u32 x = inl(addr);
295 *buf++ = x;
296 } while (--count);
297 }
298}
299#endif
300
301#ifndef outsb
302static inline void outsb(unsigned long addr, const void *buffer, int count)
303{
304 if (count) {
305 const u8 *buf = buffer;
306 do {
307 outb(*buf++, addr);
308 } while (--count);
309 }
310}
311#endif
312
313#ifndef outsw
314static inline void outsw(unsigned long addr, const void *buffer, int count)
315{
316 if (count) {
317 const u16 *buf = buffer;
318 do {
319 outw(*buf++, addr);
320 } while (--count);
321 }
322}
323#endif
324
325#ifndef outsl
326static inline void outsl(unsigned long addr, const void *buffer, int count)
327{
328 if (count) {
329 const u32 *buf = buffer;
330 do {
331 outl(*buf++, addr);
332 } while (--count);
333 }
334}
335#endif
336
337#define ioread8_rep(p, dst, count) \
338 insb((unsigned long) (p), (dst), (count))
339#define ioread16_rep(p, dst, count) \
340 insw((unsigned long) (p), (dst), (count))
341#define ioread32_rep(p, dst, count) \
342 insl((unsigned long) (p), (dst), (count))
343
344#define iowrite8_rep(p, src, count) \
345 outsb((unsigned long) (p), (src), (count))
346#define iowrite16_rep(p, src, count) \
347 outsw((unsigned long) (p), (src), (count))
348#define iowrite32_rep(p, src, count) \
349 outsl((unsigned long) (p), (src), (count))
350 74
351#define readb_relaxed readb 75#define readb_relaxed readb
352#define readw_relaxed readw 76#define readw_relaxed readw