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authorDavid S. Miller <davem@davemloft.net>2010-05-12 03:05:35 -0400
committerDavid S. Miller <davem@davemloft.net>2010-05-12 03:05:35 -0400
commit278554bd6579206921f5d8a523649a7a57f8850d (patch)
tree4e6c527daf0910e455b3aa72e2c96b0479e430be /arch/microblaze/include
parent5a147e8bf982f9dd414c1dd751fe02c1942506b2 (diff)
parentcea0d767c29669bf89f86e4aee46ef462d2ebae8 (diff)
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
Conflicts: Documentation/feature-removal-schedule.txt drivers/net/wireless/ath/ar9170/usb.c drivers/scsi/iscsi_tcp.c net/ipv4/ipmr.c
Diffstat (limited to 'arch/microblaze/include')
-rw-r--r--arch/microblaze/include/asm/cache.h2
-rw-r--r--arch/microblaze/include/asm/dma.h6
-rw-r--r--arch/microblaze/include/asm/exceptions.h6
-rw-r--r--arch/microblaze/include/asm/io.h2
-rw-r--r--arch/microblaze/include/asm/page.h12
-rw-r--r--arch/microblaze/include/asm/pci.h8
-rw-r--r--arch/microblaze/include/asm/pgalloc.h16
-rw-r--r--arch/microblaze/include/asm/pgtable.h35
8 files changed, 13 insertions, 74 deletions
diff --git a/arch/microblaze/include/asm/cache.h b/arch/microblaze/include/asm/cache.h
index e52210891d78..4efe96a036f7 100644
--- a/arch/microblaze/include/asm/cache.h
+++ b/arch/microblaze/include/asm/cache.h
@@ -15,7 +15,7 @@
15 15
16#include <asm/registers.h> 16#include <asm/registers.h>
17 17
18#define L1_CACHE_SHIFT 2 18#define L1_CACHE_SHIFT 5
19/* word-granular cache in microblaze */ 19/* word-granular cache in microblaze */
20#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) 20#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
21 21
diff --git a/arch/microblaze/include/asm/dma.h b/arch/microblaze/include/asm/dma.h
index 08c073badf19..0d73d0c6de37 100644
--- a/arch/microblaze/include/asm/dma.h
+++ b/arch/microblaze/include/asm/dma.h
@@ -18,4 +18,10 @@
18#define MAX_DMA_ADDRESS (CONFIG_KERNEL_START + memory_size - 1) 18#define MAX_DMA_ADDRESS (CONFIG_KERNEL_START + memory_size - 1)
19#endif 19#endif
20 20
21#ifdef CONFIG_PCI
22extern int isa_dma_bridge_buggy;
23#else
24#define isa_dma_bridge_buggy (0)
25#endif
26
21#endif /* _ASM_MICROBLAZE_DMA_H */ 27#endif /* _ASM_MICROBLAZE_DMA_H */
diff --git a/arch/microblaze/include/asm/exceptions.h b/arch/microblaze/include/asm/exceptions.h
index 90731df9e574..4c7b5d037c88 100644
--- a/arch/microblaze/include/asm/exceptions.h
+++ b/arch/microblaze/include/asm/exceptions.h
@@ -64,12 +64,6 @@ asmlinkage void full_exception(struct pt_regs *regs, unsigned int type,
64void die(const char *str, struct pt_regs *fp, long err); 64void die(const char *str, struct pt_regs *fp, long err);
65void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr); 65void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr);
66 66
67#ifdef CONFIG_MMU
68void __bug(const char *file, int line, void *data);
69int bad_trap(int trap_num, struct pt_regs *regs);
70int debug_trap(struct pt_regs *regs);
71#endif /* CONFIG_MMU */
72
73#if defined(CONFIG_KGDB) 67#if defined(CONFIG_KGDB)
74void (*debugger)(struct pt_regs *regs); 68void (*debugger)(struct pt_regs *regs);
75int (*debugger_bpt)(struct pt_regs *regs); 69int (*debugger_bpt)(struct pt_regs *regs);
diff --git a/arch/microblaze/include/asm/io.h b/arch/microblaze/include/asm/io.h
index e45a6eea92e0..00b5398d08c7 100644
--- a/arch/microblaze/include/asm/io.h
+++ b/arch/microblaze/include/asm/io.h
@@ -139,8 +139,6 @@ static inline void writel(unsigned int v, volatile void __iomem *addr)
139 139
140#ifdef CONFIG_MMU 140#ifdef CONFIG_MMU
141 141
142#define mm_ptov(addr) ((void *)__phys_to_virt(addr))
143#define mm_vtop(addr) ((unsigned long)__virt_to_phys(addr))
144#define phys_to_virt(addr) ((void *)__phys_to_virt(addr)) 142#define phys_to_virt(addr) ((void *)__phys_to_virt(addr))
145#define virt_to_phys(addr) ((unsigned long)__virt_to_phys(addr)) 143#define virt_to_phys(addr) ((unsigned long)__virt_to_phys(addr))
146#define virt_to_bus(addr) ((unsigned long)__virt_to_phys(addr)) 144#define virt_to_bus(addr) ((unsigned long)__virt_to_phys(addr))
diff --git a/arch/microblaze/include/asm/page.h b/arch/microblaze/include/asm/page.h
index 2dd1d04129e0..de493f86d28f 100644
--- a/arch/microblaze/include/asm/page.h
+++ b/arch/microblaze/include/asm/page.h
@@ -31,6 +31,9 @@
31 31
32#ifndef __ASSEMBLY__ 32#ifndef __ASSEMBLY__
33 33
34/* MS be sure that SLAB allocates aligned objects */
35#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES
36
34#define PAGE_UP(addr) (((addr)+((PAGE_SIZE)-1))&(~((PAGE_SIZE)-1))) 37#define PAGE_UP(addr) (((addr)+((PAGE_SIZE)-1))&(~((PAGE_SIZE)-1)))
35#define PAGE_DOWN(addr) ((addr)&(~((PAGE_SIZE)-1))) 38#define PAGE_DOWN(addr) ((addr)&(~((PAGE_SIZE)-1)))
36 39
@@ -70,14 +73,7 @@ typedef unsigned long pte_basic_t;
70 73
71#endif /* CONFIG_MMU */ 74#endif /* CONFIG_MMU */
72 75
73# ifndef CONFIG_MMU 76# define copy_page(to, from) memcpy((to), (from), PAGE_SIZE)
74# define copy_page(to, from) memcpy((to), (from), PAGE_SIZE)
75# define get_user_page(vaddr) __get_free_page(GFP_KERNEL)
76# define free_user_page(page, addr) free_page(addr)
77# else /* CONFIG_MMU */
78extern void copy_page(void *to, void *from);
79# endif /* CONFIG_MMU */
80
81# define clear_page(pgaddr) memset((pgaddr), 0, PAGE_SIZE) 77# define clear_page(pgaddr) memset((pgaddr), 0, PAGE_SIZE)
82 78
83# define clear_user_page(pgaddr, vaddr, page) memset((pgaddr), 0, PAGE_SIZE) 79# define clear_user_page(pgaddr, vaddr, page) memset((pgaddr), 0, PAGE_SIZE)
diff --git a/arch/microblaze/include/asm/pci.h b/arch/microblaze/include/asm/pci.h
index bdd65aaee30d..5a388eeeb28f 100644
--- a/arch/microblaze/include/asm/pci.h
+++ b/arch/microblaze/include/asm/pci.h
@@ -94,14 +94,6 @@ extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
94 94
95#define HAVE_PCI_LEGACY 1 95#define HAVE_PCI_LEGACY 1
96 96
97/* pci_unmap_{page,single} is a nop so... */
98#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
99#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
100#define pci_unmap_addr(PTR, ADDR_NAME) (0)
101#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
102#define pci_unmap_len(PTR, LEN_NAME) (0)
103#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
104
105/* The PCI address space does equal the physical memory 97/* The PCI address space does equal the physical memory
106 * address space (no IOMMU). The IDE and SCSI device layers use 98 * address space (no IOMMU). The IDE and SCSI device layers use
107 * this boolean for bounce buffer decisions. 99 * this boolean for bounce buffer decisions.
diff --git a/arch/microblaze/include/asm/pgalloc.h b/arch/microblaze/include/asm/pgalloc.h
index f44b0d696fe2..c614a893f8a3 100644
--- a/arch/microblaze/include/asm/pgalloc.h
+++ b/arch/microblaze/include/asm/pgalloc.h
@@ -108,21 +108,7 @@ extern inline void free_pgd_slow(pgd_t *pgd)
108#define pmd_alloc_one_fast(mm, address) ({ BUG(); ((pmd_t *)1); }) 108#define pmd_alloc_one_fast(mm, address) ({ BUG(); ((pmd_t *)1); })
109#define pmd_alloc_one(mm, address) ({ BUG(); ((pmd_t *)2); }) 109#define pmd_alloc_one(mm, address) ({ BUG(); ((pmd_t *)2); })
110 110
111static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, 111extern pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr);
112 unsigned long address)
113{
114 pte_t *pte;
115 extern void *early_get_page(void);
116 if (mem_init_done) {
117 pte = (pte_t *)__get_free_page(GFP_KERNEL |
118 __GFP_REPEAT | __GFP_ZERO);
119 } else {
120 pte = (pte_t *)early_get_page();
121 if (pte)
122 clear_page(pte);
123 }
124 return pte;
125}
126 112
127static inline struct page *pte_alloc_one(struct mm_struct *mm, 113static inline struct page *pte_alloc_one(struct mm_struct *mm,
128 unsigned long address) 114 unsigned long address)
diff --git a/arch/microblaze/include/asm/pgtable.h b/arch/microblaze/include/asm/pgtable.h
index dd2bb60651c7..ca2d92871545 100644
--- a/arch/microblaze/include/asm/pgtable.h
+++ b/arch/microblaze/include/asm/pgtable.h
@@ -512,15 +512,6 @@ static inline pmd_t *pmd_offset(pgd_t *dir, unsigned long address)
512extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; 512extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
513 513
514/* 514/*
515 * When flushing the tlb entry for a page, we also need to flush the hash
516 * table entry. flush_hash_page is assembler (for speed) in hashtable.S.
517 */
518extern int flush_hash_page(unsigned context, unsigned long va, pte_t *ptep);
519
520/* Add an HPTE to the hash table */
521extern void add_hash_page(unsigned context, unsigned long va, pte_t *ptep);
522
523/*
524 * Encode and decode a swap entry. 515 * Encode and decode a swap entry.
525 * Note that the bits we use in a PTE for representing a swap entry 516 * Note that the bits we use in a PTE for representing a swap entry
526 * must not include the _PAGE_PRESENT bit, or the _PAGE_HASHPTE bit 517 * must not include the _PAGE_PRESENT bit, or the _PAGE_HASHPTE bit
@@ -533,15 +524,7 @@ extern void add_hash_page(unsigned context, unsigned long va, pte_t *ptep);
533#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) >> 2 }) 524#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) >> 2 })
534#define __swp_entry_to_pte(x) ((pte_t) { (x).val << 2 }) 525#define __swp_entry_to_pte(x) ((pte_t) { (x).val << 2 })
535 526
536
537/* CONFIG_APUS */
538/* For virtual address to physical address conversion */
539extern void cache_clear(__u32 addr, int length);
540extern void cache_push(__u32 addr, int length);
541extern int mm_end_of_chunk(unsigned long addr, int len);
542extern unsigned long iopa(unsigned long addr); 527extern unsigned long iopa(unsigned long addr);
543/* extern unsigned long mm_ptov(unsigned long addr) \
544 __attribute__ ((const)); TBD */
545 528
546/* Values for nocacheflag and cmode */ 529/* Values for nocacheflag and cmode */
547/* These are not used by the APUS kernel_map, but prevents 530/* These are not used by the APUS kernel_map, but prevents
@@ -552,18 +535,6 @@ extern unsigned long iopa(unsigned long addr);
552#define IOMAP_NOCACHE_NONSER 2 535#define IOMAP_NOCACHE_NONSER 2
553#define IOMAP_NO_COPYBACK 3 536#define IOMAP_NO_COPYBACK 3
554 537
555/*
556 * Map some physical address range into the kernel address space.
557 */
558extern unsigned long kernel_map(unsigned long paddr, unsigned long size,
559 int nocacheflag, unsigned long *memavailp);
560
561/*
562 * Set cache mode of (kernel space) address range.
563 */
564extern void kernel_set_cachemode(unsigned long address, unsigned long size,
565 unsigned int cmode);
566
567/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */ 538/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
568#define kern_addr_valid(addr) (1) 539#define kern_addr_valid(addr) (1)
569 540
@@ -577,10 +548,6 @@ extern void kernel_set_cachemode(unsigned long address, unsigned long size,
577void do_page_fault(struct pt_regs *regs, unsigned long address, 548void do_page_fault(struct pt_regs *regs, unsigned long address,
578 unsigned long error_code); 549 unsigned long error_code);
579 550
580void __init io_block_mapping(unsigned long virt, phys_addr_t phys,
581 unsigned int size, int flags);
582
583void __init adjust_total_lowmem(void);
584void mapin_ram(void); 551void mapin_ram(void);
585int map_page(unsigned long va, phys_addr_t pa, int flags); 552int map_page(unsigned long va, phys_addr_t pa, int flags);
586 553
@@ -601,7 +568,7 @@ void __init *early_get_page(void);
601extern unsigned long ioremap_bot, ioremap_base; 568extern unsigned long ioremap_bot, ioremap_base;
602 569
603void *consistent_alloc(int gfp, size_t size, dma_addr_t *dma_handle); 570void *consistent_alloc(int gfp, size_t size, dma_addr_t *dma_handle);
604void consistent_free(void *vaddr); 571void consistent_free(size_t size, void *vaddr);
605void consistent_sync(void *vaddr, size_t size, int direction); 572void consistent_sync(void *vaddr, size_t size, int direction);
606void consistent_sync_page(struct page *page, unsigned long offset, 573void consistent_sync_page(struct page *page, unsigned long offset,
607 size_t size, int direction); 574 size_t size, int direction);