diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-07-27 12:24:20 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-07-27 12:24:20 -0400 |
commit | 9ed3689bdceb0064ee6faf0e76f6467122794970 (patch) | |
tree | 059fbf494ac721faaefef1dd6e0131e9e576f6fb /arch/microblaze/include | |
parent | 8aae36cdf12313cd9cc0e4799fe1ea64d3c623f3 (diff) | |
parent | 363922946f96ad1d6420107ebcfa9a95b659fe75 (diff) |
Merge branch 'next' of git://git.monstr.eu/linux-2.6-microblaze
* 'next' of git://git.monstr.eu/linux-2.6-microblaze:
microblaze: Do not show error message for 32 interrupt lines
Revert "microblaze: PCI fix typo fault in of_node pointer moving into pci_bus"
microblaze: PCI fix typo fault in of_node pointer moving into pci_bus
microblaze: Add support for early console on mdm
microblaze: Simplify early console binding from DT
microblaze: Get early printk console earlier
microblaze: Standardise cpuinfo output for cache policy
microblaze: Unprivileged stream instruction awareness
microblaze: trivial: Fix typo fault
microblaze: exec: Remove redundant set_fs(USER_DS)
microblaze: Remove duplicated prototype of start_thread()
microblaze: Fix unaligned value saving to the stack for system with MMU
microblaze/irqs: Do not trace arch_local_{*,irq_*} functions
Diffstat (limited to 'arch/microblaze/include')
-rw-r--r-- | arch/microblaze/include/asm/cpuinfo.h | 1 | ||||
-rw-r--r-- | arch/microblaze/include/asm/irqflags.h | 20 | ||||
-rw-r--r-- | arch/microblaze/include/asm/processor.h | 3 | ||||
-rw-r--r-- | arch/microblaze/include/asm/prom.h | 8 | ||||
-rw-r--r-- | arch/microblaze/include/asm/pvr.h | 5 | ||||
-rw-r--r-- | arch/microblaze/include/asm/setup.h | 1 |
6 files changed, 21 insertions, 17 deletions
diff --git a/arch/microblaze/include/asm/cpuinfo.h b/arch/microblaze/include/asm/cpuinfo.h index d8f013347a9e..7d6831ac8a46 100644 --- a/arch/microblaze/include/asm/cpuinfo.h +++ b/arch/microblaze/include/asm/cpuinfo.h | |||
@@ -38,6 +38,7 @@ struct cpuinfo { | |||
38 | u32 use_exc; | 38 | u32 use_exc; |
39 | u32 ver_code; | 39 | u32 ver_code; |
40 | u32 mmu; | 40 | u32 mmu; |
41 | u32 mmu_privins; | ||
41 | u32 endian; | 42 | u32 endian; |
42 | 43 | ||
43 | /* CPU caches */ | 44 | /* CPU caches */ |
diff --git a/arch/microblaze/include/asm/irqflags.h b/arch/microblaze/include/asm/irqflags.h index c4532f032b3b..c9a6262832c4 100644 --- a/arch/microblaze/include/asm/irqflags.h +++ b/arch/microblaze/include/asm/irqflags.h | |||
@@ -14,7 +14,7 @@ | |||
14 | 14 | ||
15 | #if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR | 15 | #if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR |
16 | 16 | ||
17 | static inline unsigned long arch_local_irq_save(void) | 17 | static inline notrace unsigned long arch_local_irq_save(void) |
18 | { | 18 | { |
19 | unsigned long flags; | 19 | unsigned long flags; |
20 | asm volatile(" msrclr %0, %1 \n" | 20 | asm volatile(" msrclr %0, %1 \n" |
@@ -25,7 +25,7 @@ static inline unsigned long arch_local_irq_save(void) | |||
25 | return flags; | 25 | return flags; |
26 | } | 26 | } |
27 | 27 | ||
28 | static inline void arch_local_irq_disable(void) | 28 | static inline notrace void arch_local_irq_disable(void) |
29 | { | 29 | { |
30 | /* this uses r0 without declaring it - is that correct? */ | 30 | /* this uses r0 without declaring it - is that correct? */ |
31 | asm volatile(" msrclr r0, %0 \n" | 31 | asm volatile(" msrclr r0, %0 \n" |
@@ -35,7 +35,7 @@ static inline void arch_local_irq_disable(void) | |||
35 | : "memory"); | 35 | : "memory"); |
36 | } | 36 | } |
37 | 37 | ||
38 | static inline void arch_local_irq_enable(void) | 38 | static inline notrace void arch_local_irq_enable(void) |
39 | { | 39 | { |
40 | /* this uses r0 without declaring it - is that correct? */ | 40 | /* this uses r0 without declaring it - is that correct? */ |
41 | asm volatile(" msrset r0, %0 \n" | 41 | asm volatile(" msrset r0, %0 \n" |
@@ -47,7 +47,7 @@ static inline void arch_local_irq_enable(void) | |||
47 | 47 | ||
48 | #else /* !CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR */ | 48 | #else /* !CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR */ |
49 | 49 | ||
50 | static inline unsigned long arch_local_irq_save(void) | 50 | static inline notrace unsigned long arch_local_irq_save(void) |
51 | { | 51 | { |
52 | unsigned long flags, tmp; | 52 | unsigned long flags, tmp; |
53 | asm volatile (" mfs %0, rmsr \n" | 53 | asm volatile (" mfs %0, rmsr \n" |
@@ -61,7 +61,7 @@ static inline unsigned long arch_local_irq_save(void) | |||
61 | return flags; | 61 | return flags; |
62 | } | 62 | } |
63 | 63 | ||
64 | static inline void arch_local_irq_disable(void) | 64 | static inline notrace void arch_local_irq_disable(void) |
65 | { | 65 | { |
66 | unsigned long tmp; | 66 | unsigned long tmp; |
67 | asm volatile(" mfs %0, rmsr \n" | 67 | asm volatile(" mfs %0, rmsr \n" |
@@ -74,7 +74,7 @@ static inline void arch_local_irq_disable(void) | |||
74 | : "memory"); | 74 | : "memory"); |
75 | } | 75 | } |
76 | 76 | ||
77 | static inline void arch_local_irq_enable(void) | 77 | static inline notrace void arch_local_irq_enable(void) |
78 | { | 78 | { |
79 | unsigned long tmp; | 79 | unsigned long tmp; |
80 | asm volatile(" mfs %0, rmsr \n" | 80 | asm volatile(" mfs %0, rmsr \n" |
@@ -89,7 +89,7 @@ static inline void arch_local_irq_enable(void) | |||
89 | 89 | ||
90 | #endif /* CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR */ | 90 | #endif /* CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR */ |
91 | 91 | ||
92 | static inline unsigned long arch_local_save_flags(void) | 92 | static inline notrace unsigned long arch_local_save_flags(void) |
93 | { | 93 | { |
94 | unsigned long flags; | 94 | unsigned long flags; |
95 | asm volatile(" mfs %0, rmsr \n" | 95 | asm volatile(" mfs %0, rmsr \n" |
@@ -100,7 +100,7 @@ static inline unsigned long arch_local_save_flags(void) | |||
100 | return flags; | 100 | return flags; |
101 | } | 101 | } |
102 | 102 | ||
103 | static inline void arch_local_irq_restore(unsigned long flags) | 103 | static inline notrace void arch_local_irq_restore(unsigned long flags) |
104 | { | 104 | { |
105 | asm volatile(" mts rmsr, %0 \n" | 105 | asm volatile(" mts rmsr, %0 \n" |
106 | " nop \n" | 106 | " nop \n" |
@@ -109,12 +109,12 @@ static inline void arch_local_irq_restore(unsigned long flags) | |||
109 | : "memory"); | 109 | : "memory"); |
110 | } | 110 | } |
111 | 111 | ||
112 | static inline bool arch_irqs_disabled_flags(unsigned long flags) | 112 | static inline notrace bool arch_irqs_disabled_flags(unsigned long flags) |
113 | { | 113 | { |
114 | return (flags & MSR_IE) == 0; | 114 | return (flags & MSR_IE) == 0; |
115 | } | 115 | } |
116 | 116 | ||
117 | static inline bool arch_irqs_disabled(void) | 117 | static inline notrace bool arch_irqs_disabled(void) |
118 | { | 118 | { |
119 | return arch_irqs_disabled_flags(arch_local_save_flags()); | 119 | return arch_irqs_disabled_flags(arch_local_save_flags()); |
120 | } | 120 | } |
diff --git a/arch/microblaze/include/asm/processor.h b/arch/microblaze/include/asm/processor.h index aed2a6be8e27..7283bfb2f7e4 100644 --- a/arch/microblaze/include/asm/processor.h +++ b/arch/microblaze/include/asm/processor.h | |||
@@ -125,9 +125,6 @@ struct thread_struct { | |||
125 | .pgdir = swapper_pg_dir, \ | 125 | .pgdir = swapper_pg_dir, \ |
126 | } | 126 | } |
127 | 127 | ||
128 | /* Do necessary setup to start up a newly executed thread. */ | ||
129 | void start_thread(struct pt_regs *regs, | ||
130 | unsigned long pc, unsigned long usp); | ||
131 | 128 | ||
132 | /* Free all resources held by a thread. */ | 129 | /* Free all resources held by a thread. */ |
133 | extern inline void release_thread(struct task_struct *dead_task) | 130 | extern inline void release_thread(struct task_struct *dead_task) |
diff --git a/arch/microblaze/include/asm/prom.h b/arch/microblaze/include/asm/prom.h index 9ad567e2d425..20c5e8e5121b 100644 --- a/arch/microblaze/include/asm/prom.h +++ b/arch/microblaze/include/asm/prom.h | |||
@@ -26,8 +26,12 @@ | |||
26 | #define HAVE_ARCH_DEVTREE_FIXUPS | 26 | #define HAVE_ARCH_DEVTREE_FIXUPS |
27 | 27 | ||
28 | /* Other Prototypes */ | 28 | /* Other Prototypes */ |
29 | extern int early_uartlite_console(void); | 29 | enum early_consoles { |
30 | extern int early_uart16550_console(void); | 30 | UARTLITE = 1, |
31 | UART16550 = 2, | ||
32 | }; | ||
33 | |||
34 | extern int of_early_console(void *version); | ||
31 | 35 | ||
32 | /* | 36 | /* |
33 | * OF address retreival & translation | 37 | * OF address retreival & translation |
diff --git a/arch/microblaze/include/asm/pvr.h b/arch/microblaze/include/asm/pvr.h index a10bec62e857..4bbdb4c03b57 100644 --- a/arch/microblaze/include/asm/pvr.h +++ b/arch/microblaze/include/asm/pvr.h | |||
@@ -111,16 +111,16 @@ struct pvr_s { | |||
111 | /* Target family PVR mask */ | 111 | /* Target family PVR mask */ |
112 | #define PVR10_TARGET_FAMILY_MASK 0xFF000000 | 112 | #define PVR10_TARGET_FAMILY_MASK 0xFF000000 |
113 | 113 | ||
114 | /* MMU descrtiption */ | 114 | /* MMU description */ |
115 | #define PVR11_USE_MMU 0xC0000000 | 115 | #define PVR11_USE_MMU 0xC0000000 |
116 | #define PVR11_MMU_ITLB_SIZE 0x38000000 | 116 | #define PVR11_MMU_ITLB_SIZE 0x38000000 |
117 | #define PVR11_MMU_DTLB_SIZE 0x07000000 | 117 | #define PVR11_MMU_DTLB_SIZE 0x07000000 |
118 | #define PVR11_MMU_TLB_ACCESS 0x00C00000 | 118 | #define PVR11_MMU_TLB_ACCESS 0x00C00000 |
119 | #define PVR11_MMU_ZONES 0x003C0000 | 119 | #define PVR11_MMU_ZONES 0x003C0000 |
120 | #define PVR11_MMU_PRIVINS 0x00010000 | ||
120 | /* MSR Reset value PVR mask */ | 121 | /* MSR Reset value PVR mask */ |
121 | #define PVR11_MSR_RESET_VALUE_MASK 0x000007FF | 122 | #define PVR11_MSR_RESET_VALUE_MASK 0x000007FF |
122 | 123 | ||
123 | |||
124 | /* PVR access macros */ | 124 | /* PVR access macros */ |
125 | #define PVR_IS_FULL(_pvr) (_pvr.pvr[0] & PVR0_PVR_FULL_MASK) | 125 | #define PVR_IS_FULL(_pvr) (_pvr.pvr[0] & PVR0_PVR_FULL_MASK) |
126 | #define PVR_USE_BARREL(_pvr) (_pvr.pvr[0] & PVR0_USE_BARREL_MASK) | 126 | #define PVR_USE_BARREL(_pvr) (_pvr.pvr[0] & PVR0_USE_BARREL_MASK) |
@@ -216,6 +216,7 @@ struct pvr_s { | |||
216 | #define PVR_MMU_DTLB_SIZE(_pvr) (_pvr.pvr[11] & PVR11_MMU_DTLB_SIZE) | 216 | #define PVR_MMU_DTLB_SIZE(_pvr) (_pvr.pvr[11] & PVR11_MMU_DTLB_SIZE) |
217 | #define PVR_MMU_TLB_ACCESS(_pvr) (_pvr.pvr[11] & PVR11_MMU_TLB_ACCESS) | 217 | #define PVR_MMU_TLB_ACCESS(_pvr) (_pvr.pvr[11] & PVR11_MMU_TLB_ACCESS) |
218 | #define PVR_MMU_ZONES(_pvr) (_pvr.pvr[11] & PVR11_MMU_ZONES) | 218 | #define PVR_MMU_ZONES(_pvr) (_pvr.pvr[11] & PVR11_MMU_ZONES) |
219 | #define PVR_MMU_PRIVINS(pvr) (pvr.pvr[11] & PVR11_MMU_PRIVINS) | ||
219 | 220 | ||
220 | /* endian */ | 221 | /* endian */ |
221 | #define PVR_ENDIAN(_pvr) (_pvr.pvr[0] & PVR0_ENDI) | 222 | #define PVR_ENDIAN(_pvr) (_pvr.pvr[0] & PVR0_ENDI) |
diff --git a/arch/microblaze/include/asm/setup.h b/arch/microblaze/include/asm/setup.h index 8f3968971e4e..904e5ef6a11b 100644 --- a/arch/microblaze/include/asm/setup.h +++ b/arch/microblaze/include/asm/setup.h | |||
@@ -23,6 +23,7 @@ extern char cmd_line[COMMAND_LINE_SIZE]; | |||
23 | void early_printk(const char *fmt, ...); | 23 | void early_printk(const char *fmt, ...); |
24 | 24 | ||
25 | int setup_early_printk(char *opt); | 25 | int setup_early_printk(char *opt); |
26 | void remap_early_printk(void); | ||
26 | void disable_early_printk(void); | 27 | void disable_early_printk(void); |
27 | 28 | ||
28 | #if defined(CONFIG_EARLY_PRINTK) | 29 | #if defined(CONFIG_EARLY_PRINTK) |