m68knommu: general interrupt controller for ColdFire 532x parts

The ColdFire 532x family of parts uses 2 of the same INTC interrupt
controlers used in the ColdFire 520x family. So modify the code to
support both parts. The extra code for the second INTC controler in
the case of the 520x is easily optimized away to nothing.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>

3 files changed, 21 insertions, 8 deletions

diff --git a/arch/m68knommu/kernel/irq.c b/arch/m68knommu/kernel/irq.c
index f9965d7ee7c5..93d567bbf33d 100644
--- a/arch/m68knommu/kernel/irq.c
+++ b/arch/m68knommu/kernel/irq.c
@@ -30,7 +30,8 @@ asmlinkage void do_IRQ(int irq, struct pt_regs *regs)
 }
 
 #if !defined(CONFIG_M520x) && !defined(CONFIG_M523x) && \
-    !defined(CONFIG_M527x) && !defined(CONFIG_M528x)
+    !defined(CONFIG_M527x) && !defined(CONFIG_M528x) && \
+    !defined(CONFIG_M532x)
 
 static struct irq_chip m_irq_chip = {
         .name           = "M68K-INTC",
diff --git a/arch/m68knommu/platform/coldfire/Makefile b/arch/m68knommu/platform/coldfire/Makefile
index bce9a62d3a13..6c5f699cf145 100644
--- a/arch/m68knommu/platform/coldfire/Makefile
+++ b/arch/m68knommu/platform/coldfire/Makefile
@@ -24,7 +24,7 @@ obj-$(CONFIG_M527x)	+= pit.o intc-2.o
 obj-$(CONFIG_M5272)     += timers.o
 obj-$(CONFIG_M528x)     += pit.o intc-2.o
 obj-$(CONFIG_M5307)     += timers.o
-obj-$(CONFIG_M532x)     += timers.o
+obj-$(CONFIG_M532x)     += timers.o intc-simr.o
 obj-$(CONFIG_M5407)     += timers.o
 
 obj-y                   += pinmux.o gpio.o
diff --git a/arch/m68knommu/platform/coldfire/intc-simr.c b/arch/m68knommu/platform/coldfire/intc-simr.c
index 3b614a3508fc..86fc2047d7ac 100644
--- a/arch/m68knommu/platform/coldfire/intc-simr.c
+++ b/arch/m68knommu/platform/coldfire/intc-simr.c
@@ -20,20 +20,32 @@
 
 static void intc_irq_mask(unsigned int irq)
 {
-        if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECBASE + 63))
-                __raw_writeb(irq - MCFINT_VECBASE, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_SIMR);
+        if (irq >= MCFINT_VECBASE) {
+                if (irq < MCFINT_VECBASE + 64)
+                        __raw_writeb(irq - MCFINT_VECBASE, MCFINTC0_SIMR);
+                else if ((irq < MCFINT_VECBASE + 128) && MCFINTC1_SIMR)
+                        __raw_writeb(irq - MCFINT_VECBASE - 64, MCFINTC1_SIMR);
+        }
 }
 
 static void intc_irq_unmask(unsigned int irq)
 {
-        if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECBASE + 63))
-                __raw_writeb(irq - MCFINT_VECBASE, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_CIMR);
+        if (irq >= MCFINT_VECBASE) {
+                if (irq < MCFINT_VECBASE + 64)
+                        __raw_writeb(irq - MCFINT_VECBASE, MCFINTC0_CIMR);
+                else if ((irq < MCFINT_VECBASE + 128) && MCFINTC1_CIMR)
+                        __raw_writeb(irq - MCFINT_VECBASE - 64, MCFINTC1_CIMR);
+        }
 }
 
 static int intc_irq_set_type(unsigned int irq, unsigned int type)
 {
-        if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECBASE + 63))
-                __raw_writeb(5, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + irq - MCFINT_VECBASE);
+        if (irq >= MCFINT_VECBASE) {
+                if (irq < MCFINT_VECBASE + 64)
+                        __raw_writeb(5, MCFINTC0_ICR0 + irq - MCFINT_VECBASE);
+                else if ((irq < MCFINT_VECBASE) && MCFINTC1_ICR0)
+                        __raw_writeb(5, MCFINTC1_ICR0 + irq - MCFINT_VECBASE - 64);
+        }
         return 0;
 }