diff options
author | Thomas Gleixner <tglx@linutronix.de> | 2011-02-06 18:39:14 -0500 |
---|---|---|
committer | Greg Ungerer <gerg@uclinux.org> | 2011-03-15 07:01:53 -0400 |
commit | e474563ebac1ece056024e2395673e6df04f6a7c (patch) | |
tree | 33d65288cb1d61e19e4e78936b0c9ec296102544 /arch/m68knommu | |
parent | 2730158ab2dd5c5df863da8135c07bb10acac60f (diff) |
m68knommu: Convert 5249 intc irq_chip to new functions
/me idly wonders what sets the handlers for this chip.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68knommu')
-rw-r--r-- | arch/m68knommu/platform/5249/intc2.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/arch/m68knommu/platform/5249/intc2.c b/arch/m68knommu/platform/5249/intc2.c index c5151f846591..8f4b63e17366 100644 --- a/arch/m68knommu/platform/5249/intc2.c +++ b/arch/m68knommu/platform/5249/intc2.c | |||
@@ -17,32 +17,32 @@ | |||
17 | #include <asm/coldfire.h> | 17 | #include <asm/coldfire.h> |
18 | #include <asm/mcfsim.h> | 18 | #include <asm/mcfsim.h> |
19 | 19 | ||
20 | static void intc2_irq_gpio_mask(unsigned int irq) | 20 | static void intc2_irq_gpio_mask(struct irq_data *d) |
21 | { | 21 | { |
22 | u32 imr; | 22 | u32 imr; |
23 | imr = readl(MCF_MBAR2 + MCFSIM2_GPIOINTENABLE); | 23 | imr = readl(MCF_MBAR2 + MCFSIM2_GPIOINTENABLE); |
24 | imr &= ~(0x1 << (irq - MCFINTC2_GPIOIRQ0)); | 24 | imr &= ~(0x1 << (d->irq - MCFINTC2_GPIOIRQ0)); |
25 | writel(imr, MCF_MBAR2 + MCFSIM2_GPIOINTENABLE); | 25 | writel(imr, MCF_MBAR2 + MCFSIM2_GPIOINTENABLE); |
26 | } | 26 | } |
27 | 27 | ||
28 | static void intc2_irq_gpio_unmask(unsigned int irq) | 28 | static void intc2_irq_gpio_unmask(struct irq_data *d) |
29 | { | 29 | { |
30 | u32 imr; | 30 | u32 imr; |
31 | imr = readl(MCF_MBAR2 + MCFSIM2_GPIOINTENABLE); | 31 | imr = readl(MCF_MBAR2 + MCFSIM2_GPIOINTENABLE); |
32 | imr |= (0x1 << (irq - MCFINTC2_GPIOIRQ0)); | 32 | imr |= (0x1 << (d->irq - MCFINTC2_GPIOIRQ0)); |
33 | writel(imr, MCF_MBAR2 + MCFSIM2_GPIOINTENABLE); | 33 | writel(imr, MCF_MBAR2 + MCFSIM2_GPIOINTENABLE); |
34 | } | 34 | } |
35 | 35 | ||
36 | static void intc2_irq_gpio_ack(unsigned int irq) | 36 | static void intc2_irq_gpio_ack(struct irq_data *d) |
37 | { | 37 | { |
38 | writel(0x1 << (irq - MCFINTC2_GPIOIRQ0), MCF_MBAR2 + MCFSIM2_GPIOINTCLEAR); | 38 | writel(0x1 << (d->irq - MCFINTC2_GPIOIRQ0), MCF_MBAR2 + MCFSIM2_GPIOINTCLEAR); |
39 | } | 39 | } |
40 | 40 | ||
41 | static struct irq_chip intc2_irq_gpio_chip = { | 41 | static struct irq_chip intc2_irq_gpio_chip = { |
42 | .name = "CF-INTC2", | 42 | .name = "CF-INTC2", |
43 | .mask = intc2_irq_gpio_mask, | 43 | .irq_mask = intc2_irq_gpio_mask, |
44 | .unmask = intc2_irq_gpio_unmask, | 44 | .irq_unmask = intc2_irq_gpio_unmask, |
45 | .ack = intc2_irq_gpio_ack, | 45 | .irq_ack = intc2_irq_gpio_ack, |
46 | }; | 46 | }; |
47 | 47 | ||
48 | static int __init mcf_intc2_init(void) | 48 | static int __init mcf_intc2_init(void) |
@@ -51,7 +51,7 @@ static int __init mcf_intc2_init(void) | |||
51 | 51 | ||
52 | /* GPIO interrupt sources */ | 52 | /* GPIO interrupt sources */ |
53 | for (irq = MCFINTC2_GPIOIRQ0; (irq <= MCFINTC2_GPIOIRQ7); irq++) { | 53 | for (irq = MCFINTC2_GPIOIRQ0; (irq <= MCFINTC2_GPIOIRQ7); irq++) { |
54 | irq_desc[irq].chip = &intc2_irq_gpio_chip; | 54 | set_irq_chip(irq, &intc2_irq_gpio_chip); |
55 | set_irq_handler(irq, handle_edge_irq); | 55 | set_irq_handler(irq, handle_edge_irq); |
56 | } | 56 | } |
57 | 57 | ||