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authorGreg Ungerer <gerg@uclinux.org>2009-05-21 23:50:53 -0400
committerGreg Ungerer <gerg@uclinux.org>2009-09-15 19:43:53 -0400
commit3945ca0f84fee3fe564189fe8cf8f02491d19622 (patch)
treead34ebab29aff941b31eb91c3068b4f364b981dc /arch/m68knommu/platform
parent39f0fb6a3448cfc316e0d5295ed1b121db50037e (diff)
m68knommu: clean up old ColdFire timer irq setup
The recent changes to the old ColdFire interrupt controller code means we no longer need to manually unmask the timer interrupt. That is now done in the interrupt controller code proper. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68knommu/platform')
-rw-r--r--arch/m68knommu/platform/coldfire/timers.c9
1 files changed, 2 insertions, 7 deletions
diff --git a/arch/m68knommu/platform/coldfire/timers.c b/arch/m68knommu/platform/coldfire/timers.c
index 77b0c17ce6ba..2304d736c701 100644
--- a/arch/m68knommu/platform/coldfire/timers.c
+++ b/arch/m68knommu/platform/coldfire/timers.c
@@ -34,7 +34,6 @@
34 * These provide the underlying interrupt vector support. 34 * These provide the underlying interrupt vector support.
35 * Unfortunately it is a little different on each ColdFire. 35 * Unfortunately it is a little different on each ColdFire.
36 */ 36 */
37extern void mcf_settimericr(int timer, int level);
38void coldfire_profile_init(void); 37void coldfire_profile_init(void);
39 38
40#if defined(CONFIG_M532x) 39#if defined(CONFIG_M532x)
@@ -98,8 +97,6 @@ static struct clocksource mcftmr_clk = {
98 97
99void hw_timer_init(void) 98void hw_timer_init(void)
100{ 99{
101 setup_irq(MCF_IRQ_TIMER, &mcftmr_timer_irq);
102
103 __raw_writew(MCFTIMER_TMR_DISABLE, TA(MCFTIMER_TMR)); 100 __raw_writew(MCFTIMER_TMR_DISABLE, TA(MCFTIMER_TMR));
104 mcftmr_cycles_per_jiffy = FREQ / HZ; 101 mcftmr_cycles_per_jiffy = FREQ / HZ;
105 /* 102 /*
@@ -115,7 +112,7 @@ void hw_timer_init(void)
115 mcftmr_clk.mult = clocksource_hz2mult(FREQ, mcftmr_clk.shift); 112 mcftmr_clk.mult = clocksource_hz2mult(FREQ, mcftmr_clk.shift);
116 clocksource_register(&mcftmr_clk); 113 clocksource_register(&mcftmr_clk);
117 114
118 mcf_clrimr(MCFINTC_TIMER1); 115 setup_irq(MCF_IRQ_TIMER, &mcftmr_timer_irq);
119 116
120#ifdef CONFIG_HIGHPROFILE 117#ifdef CONFIG_HIGHPROFILE
121 coldfire_profile_init(); 118 coldfire_profile_init();
@@ -162,8 +159,6 @@ void coldfire_profile_init(void)
162 printk(KERN_INFO "PROFILE: lodging TIMER2 @ %dHz as profile timer\n", 159 printk(KERN_INFO "PROFILE: lodging TIMER2 @ %dHz as profile timer\n",
163 PROFILEHZ); 160 PROFILEHZ);
164 161
165 setup_irq(MCF_IRQ_PROFILER, &coldfire_profile_irq);
166
167 /* Set up TIMER 2 as high speed profile clock */ 162 /* Set up TIMER 2 as high speed profile clock */
168 __raw_writew(MCFTIMER_TMR_DISABLE, PA(MCFTIMER_TMR)); 163 __raw_writew(MCFTIMER_TMR_DISABLE, PA(MCFTIMER_TMR));
169 164
@@ -171,7 +166,7 @@ void coldfire_profile_init(void)
171 __raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 | 166 __raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 |
172 MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, PA(MCFTIMER_TMR)); 167 MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, PA(MCFTIMER_TMR));
173 168
174 mcf_clrimr(MCFINTC_TIMER2); 169 setup_irq(MCF_IRQ_PROFILER, &coldfire_profile_irq);
175} 170}
176 171
177/***************************************************************************/ 172/***************************************************************************/