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authorGreg Ungerer <gerg@snapgear.com>2008-02-01 02:34:10 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2008-02-01 04:54:03 -0500
commit7dabb9ad8de527c3afef055a3ea18d027a4cca63 (patch)
treecf692db969188d74d9b85cf4dc0a5a26b0f01cd1 /arch/m68knommu/platform
parent4b61a353e4c893ea07ff5a812de8c0894ed5982f (diff)
m68knommu: platform setup for 520x ColdFire parts
Switch to platform style configuration for 520x ColdFire parts. Initial support is for the UARTs. DMA support moved to common code for all ColdFire parts. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/m68knommu/platform')
-rw-r--r--arch/m68knommu/platform/520x/config.c101
1 files changed, 92 insertions, 9 deletions
diff --git a/arch/m68knommu/platform/520x/config.c b/arch/m68knommu/platform/520x/config.c
index 6edbd41261cc..06d887cdcbfb 100644
--- a/arch/m68knommu/platform/520x/config.c
+++ b/arch/m68knommu/platform/520x/config.c
@@ -5,7 +5,7 @@
5 * 5 *
6 * Copyright (C) 2005, Freescale (www.freescale.com) 6 * Copyright (C) 2005, Freescale (www.freescale.com)
7 * Copyright (C) 2005, Intec Automation (mike@steroidmicros.com) 7 * Copyright (C) 2005, Intec Automation (mike@steroidmicros.com)
8 * Copyright (C) 1999-2003, Greg Ungerer (gerg@snapgear.com) 8 * Copyright (C) 1999-2007, Greg Ungerer (gerg@snapgear.com)
9 * Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com) 9 * Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
10 */ 10 */
11 11
@@ -13,21 +13,93 @@
13 13
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/param.h> 15#include <linux/param.h>
16#include <linux/init.h>
16#include <linux/interrupt.h> 17#include <linux/interrupt.h>
18#include <linux/io.h>
17#include <asm/machdep.h> 19#include <asm/machdep.h>
18#include <asm/dma.h> 20#include <asm/coldfire.h>
21#include <asm/mcfsim.h>
22#include <asm/mcfuart.h>
19 23
20/***************************************************************************/ 24/***************************************************************************/
21 25
22/* 26void coldfire_reset(void);
23 * DMA channel base address table.
24 */
25unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS];
26unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS];
27 27
28/***************************************************************************/ 28/***************************************************************************/
29 29
30void coldfire_reset(void); 30static struct mcf_platform_uart m520x_uart_platform[] = {
31 {
32 .mapbase = MCF_MBAR + MCFUART_BASE1,
33 .irq = MCFINT_VECBASE + MCFINT_UART0,
34 },
35 {
36 .mapbase = MCF_MBAR + MCFUART_BASE2,
37 .irq = MCFINT_VECBASE + MCFINT_UART1,
38 },
39 {
40 .mapbase = MCF_MBAR + MCFUART_BASE3,
41 .irq = MCFINT_VECBASE + MCFINT_UART2,
42 },
43 { },
44};
45
46static struct platform_device m520x_uart = {
47 .name = "mcfuart",
48 .id = 0,
49 .dev.platform_data = m520x_uart_platform,
50};
51
52static struct platform_device *m520x_devices[] __initdata = {
53 &m520x_uart,
54};
55
56/***************************************************************************/
57
58#define INTC0 (MCF_MBAR + MCFICM_INTC0)
59
60static void __init m520x_uart_init_line(int line, int irq)
61{
62 u32 imr;
63 u16 par;
64 u8 par2;
65
66 writeb(0x03, INTC0 + MCFINTC_ICR0 + MCFINT_UART0 + line);
67
68 imr = readl(INTC0 + MCFINTC_IMRL);
69 imr &= ~((1 << (irq - MCFINT_VECBASE)) | 1);
70 writel(imr, INTC0 + MCFINTC_IMRL);
71
72 switch (line) {
73 case 0:
74 par = readw(MCF_IPSBAR + MCF_GPIO_PAR_UART);
75 par |= MCF_GPIO_PAR_UART_PAR_UTXD0 |
76 MCF_GPIO_PAR_UART_PAR_URXD0;
77 writew(par, MCF_IPSBAR + MCF_GPIO_PAR_UART);
78 break;
79 case 1:
80 par = readw(MCF_IPSBAR + MCF_GPIO_PAR_UART);
81 par |= MCF_GPIO_PAR_UART_PAR_UTXD1 |
82 MCF_GPIO_PAR_UART_PAR_URXD1;
83 writew(par, MCF_IPSBAR + MCF_GPIO_PAR_UART);
84 break;
85 case 2:
86 par2 = readb(MCF_IPSBAR + MCF_GPIO_PAR_FECI2C);
87 par2 &= ~0x0F;
88 par2 |= MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2 |
89 MCF_GPIO_PAR_FECI2C_PAR_SDA_URXD2;
90 writeb(par2, MCF_IPSBAR + MCF_GPIO_PAR_FECI2C);
91 break;
92 }
93}
94
95static void __init m520x_uarts_init(void)
96{
97 const int nrlines = ARRAY_SIZE(m520x_uart_platform);
98 int line;
99
100 for (line = 0; (line < nrlines); line++)
101 m520x_uart_init_line(line, m520x_uart_platform[line].irq);
102}
31 103
32/***************************************************************************/ 104/***************************************************************************/
33 105
@@ -42,9 +114,20 @@ void mcf_autovector(unsigned int vec)
42 114
43/***************************************************************************/ 115/***************************************************************************/
44 116
45void config_BSP(char *commandp, int size) 117void __init config_BSP(char *commandp, int size)
46{ 118{
47 mach_reset = coldfire_reset; 119 mach_reset = coldfire_reset;
120 m520x_uarts_init();
48} 121}
49 122
50/***************************************************************************/ 123/***************************************************************************/
124
125static int __init init_BSP(void)
126{
127 platform_add_devices(m520x_devices, ARRAY_SIZE(m520x_devices));
128 return 0;
129}
130
131arch_initcall(init_BSP);
132
133/***************************************************************************/