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authorGreg Ungerer <gerg@uclinux.org>2009-05-19 00:52:40 -0400
committerGreg Ungerer <gerg@uclinux.org>2009-09-15 19:43:51 -0400
commit04b75b10dceadf937e3707ecc3dfccf6a076fd29 (patch)
tree87965d12b8f7eb622efd1d36bebd2a7b8a26452e /arch/m68knommu/platform/5307
parentf9311f26434cea3e926f56ca2aa3e5740e962c72 (diff)
m68knommu: simplify ColdFire "timers" clock initialization
The ColdFire "timers" clock setup can be simplified. There is really no need for the flexible per-platform setup code. The clock interrupt can be hard defined per CPU platform (in CPU include files). This makes the actual timer code simpler. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68knommu/platform/5307')
-rw-r--r--arch/m68knommu/platform/5307/config.c35
1 files changed, 11 insertions, 24 deletions
diff --git a/arch/m68knommu/platform/5307/config.c b/arch/m68knommu/platform/5307/config.c
index 3e27d2ec03f0..b711597ac8e1 100644
--- a/arch/m68knommu/platform/5307/config.c
+++ b/arch/m68knommu/platform/5307/config.c
@@ -21,12 +21,6 @@
21 21
22/***************************************************************************/ 22/***************************************************************************/
23 23
24extern unsigned int mcf_timervector;
25extern unsigned int mcf_profilevector;
26extern unsigned int mcf_timerlevel;
27
28/***************************************************************************/
29
30/* 24/*
31 * Some platforms need software versions of the GPIO data registers. 25 * Some platforms need software versions of the GPIO data registers.
32 */ 26 */
@@ -83,21 +77,17 @@ static void __init m5307_uarts_init(void)
83 77
84/***************************************************************************/ 78/***************************************************************************/
85 79
86void mcf_settimericr(unsigned int timer, unsigned int level) 80static void __init m5307_timers_init(void)
87{ 81{
88 volatile unsigned char *icrp; 82 /* Timer1 is always used as system timer */
89 unsigned int icr, imr; 83 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
90 84 MCF_MBAR + MCFSIM_TIMER1ICR);
91 if (timer <= 2) { 85
92 switch (timer) { 86#ifdef CONFIG_HIGHPROFILE
93 case 2: icr = MCFSIM_TIMER2ICR; imr = MCFINTC_TIMER2; break; 87 /* Timer2 is to be used as a high speed profile timer */
94 default: icr = MCFSIM_TIMER1ICR; imr = MCFINTC_TIMER1; break; 88 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
95 } 89 MCF_MBAR + MCFSIM_TIMER2ICR);
96 90#endif
97 icrp = (volatile unsigned char *) (MCF_MBAR + icr);
98 *icrp = MCFSIM_ICR_AUTOVEC | (level << 2) | MCFSIM_ICR_PRI3;
99 mcf_clrimr(imr);
100 }
101} 91}
102 92
103/***************************************************************************/ 93/***************************************************************************/
@@ -120,13 +110,10 @@ void __init config_BSP(char *commandp, int size)
120 /* Copy command line from FLASH to local buffer... */ 110 /* Copy command line from FLASH to local buffer... */
121 memcpy(commandp, (char *) 0xf0004000, size); 111 memcpy(commandp, (char *) 0xf0004000, size);
122 commandp[size-1] = 0; 112 commandp[size-1] = 0;
123 /* Different timer setup - to prevent device clash */
124 mcf_timervector = 30;
125 mcf_profilevector = 31;
126 mcf_timerlevel = 6;
127#endif 113#endif
128 114
129 mach_reset = m5307_cpu_reset; 115 mach_reset = m5307_cpu_reset;
116 m5307_timers_init();
130 117
131#ifdef CONFIG_BDM_DISABLE 118#ifdef CONFIG_BDM_DISABLE
132 /* 119 /*