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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /arch/m68knommu/platform/5249
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'arch/m68knommu/platform/5249')
-rw-r--r--arch/m68knommu/platform/5249/Makefile20
-rw-r--r--arch/m68knommu/platform/5249/config.c114
2 files changed, 134 insertions, 0 deletions
diff --git a/arch/m68knommu/platform/5249/Makefile b/arch/m68knommu/platform/5249/Makefile
new file mode 100644
index 000000000000..701b7abe019d
--- /dev/null
+++ b/arch/m68knommu/platform/5249/Makefile
@@ -0,0 +1,20 @@
1#
2# Makefile for the m68knommu linux kernel.
3#
4
5#
6# If you want to play with the HW breakpoints then you will
7# need to add define this, which will give you a stack backtrace
8# on the console port whenever a DBG interrupt occurs. You have to
9# set up you HW breakpoints to trigger a DBG interrupt:
10#
11# EXTRA_CFLAGS += -DTRAP_DBG_INTERRUPT
12# EXTRA_AFLAGS += -DTRAP_DBG_INTERRUPT
13#
14
15ifdef CONFIG_FULLDEBUG
16AFLAGS += -DDEBUGGER_COMPATIBLE_CACHE=1
17endif
18
19obj-y := config.o
20
diff --git a/arch/m68knommu/platform/5249/config.c b/arch/m68knommu/platform/5249/config.c
new file mode 100644
index 000000000000..289c1821b841
--- /dev/null
+++ b/arch/m68knommu/platform/5249/config.c
@@ -0,0 +1,114 @@
1/***************************************************************************/
2
3/*
4 * linux/arch/m68knommu/platform/5249/config.c
5 *
6 * Copyright (C) 2002, Greg Ungerer (gerg@snapgear.com)
7 */
8
9/***************************************************************************/
10
11#include <linux/config.h>
12#include <linux/kernel.h>
13#include <linux/sched.h>
14#include <linux/param.h>
15#include <linux/init.h>
16#include <asm/irq.h>
17#include <asm/dma.h>
18#include <asm/traps.h>
19#include <asm/machdep.h>
20#include <asm/coldfire.h>
21#include <asm/mcftimer.h>
22#include <asm/mcfsim.h>
23#include <asm/mcfdma.h>
24
25/***************************************************************************/
26
27void coldfire_tick(void);
28void coldfire_timer_init(irqreturn_t (*handler)(int, void *, struct pt_regs *));
29unsigned long coldfire_timer_offset(void);
30void coldfire_trap_init(void);
31void coldfire_reset(void);
32
33/***************************************************************************/
34
35/*
36 * DMA channel base address table.
37 */
38unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = {
39 MCF_MBAR + MCFDMA_BASE0,
40 MCF_MBAR + MCFDMA_BASE1,
41 MCF_MBAR + MCFDMA_BASE2,
42 MCF_MBAR + MCFDMA_BASE3,
43};
44
45unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS];
46
47/***************************************************************************/
48
49void mcf_autovector(unsigned int vec)
50{
51 volatile unsigned char *mbar;
52
53 if ((vec >= 25) && (vec <= 31)) {
54 mbar = (volatile unsigned char *) MCF_MBAR;
55 vec = 0x1 << (vec - 24);
56 *(mbar + MCFSIM_AVR) |= vec;
57 mcf_setimr(mcf_getimr() & ~vec);
58 }
59}
60
61/***************************************************************************/
62
63void mcf_settimericr(unsigned int timer, unsigned int level)
64{
65 volatile unsigned char *icrp;
66 unsigned int icr, imr;
67
68 if (timer <= 2) {
69 switch (timer) {
70 case 2: icr = MCFSIM_TIMER2ICR; imr = MCFSIM_IMR_TIMER2; break;
71 default: icr = MCFSIM_TIMER1ICR; imr = MCFSIM_IMR_TIMER1; break;
72 }
73
74 icrp = (volatile unsigned char *) (MCF_MBAR + icr);
75 *icrp = MCFSIM_ICR_AUTOVEC | (level << 2) | MCFSIM_ICR_PRI3;
76 mcf_setimr(mcf_getimr() & ~imr);
77 }
78}
79
80/***************************************************************************/
81
82int mcf_timerirqpending(int timer)
83{
84 unsigned int imr = 0;
85
86 switch (timer) {
87 case 1: imr = MCFSIM_IMR_TIMER1; break;
88 case 2: imr = MCFSIM_IMR_TIMER2; break;
89 default: break;
90 }
91 return (mcf_getipr() & imr);
92}
93
94/***************************************************************************/
95
96void config_BSP(char *commandp, int size)
97{
98 mcf_setimr(MCFSIM_IMR_MASKALL);
99
100#if defined(CONFIG_BOOTPARAM)
101 strncpy(commandp, CONFIG_BOOTPARAM_STRING, size);
102 commandp[size-1] = 0;
103#else
104 memset(commandp, 0, size);
105#endif
106
107 mach_sched_init = coldfire_timer_init;
108 mach_tick = coldfire_tick;
109 mach_gettimeoffset = coldfire_timer_offset;
110 mach_trap_init = coldfire_trap_init;
111 mach_reset = coldfire_reset;
112}
113
114/***************************************************************************/