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authorGreg Ungerer <gerg@uclinux.org>2009-05-19 00:52:40 -0400
committerGreg Ungerer <gerg@uclinux.org>2009-09-15 19:43:51 -0400
commit04b75b10dceadf937e3707ecc3dfccf6a076fd29 (patch)
tree87965d12b8f7eb622efd1d36bebd2a7b8a26452e /arch/m68knommu/platform/5206e
parentf9311f26434cea3e926f56ca2aa3e5740e962c72 (diff)
m68knommu: simplify ColdFire "timers" clock initialization
The ColdFire "timers" clock setup can be simplified. There is really no need for the flexible per-platform setup code. The clock interrupt can be hard defined per CPU platform (in CPU include files). This makes the actual timer code simpler. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68knommu/platform/5206e')
-rw-r--r--arch/m68knommu/platform/5206e/config.c25
1 files changed, 11 insertions, 14 deletions
diff --git a/arch/m68knommu/platform/5206e/config.c b/arch/m68knommu/platform/5206e/config.c
index 08ef7e268989..363296af2ee5 100644
--- a/arch/m68knommu/platform/5206e/config.c
+++ b/arch/m68knommu/platform/5206e/config.c
@@ -69,21 +69,17 @@ static void __init m5206e_uarts_init(void)
69 69
70/***************************************************************************/ 70/***************************************************************************/
71 71
72void mcf_settimericr(unsigned int timer, unsigned int level) 72static void __init m5206e_timers_init(void)
73{ 73{
74 volatile unsigned char *icrp; 74 /* Timer1 is always used as system timer */
75 unsigned int icr, imr; 75 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
76 76 MCF_MBAR + MCFSIM_TIMER1ICR);
77 if (timer <= 2) { 77
78 switch (timer) { 78#ifdef CONFIG_HIGHPROFILE
79 case 2: icr = MCFSIM_TIMER2ICR; imr = MCFINTC_TIMER2; break; 79 /* Timer2 is to be used as a high speed profile timer */
80 default: icr = MCFSIM_TIMER1ICR; imr = MCFINTC_TIMER1; break; 80 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
81 } 81 MCF_MBAR + MCFSIM_TIMER2ICR);
82 82#endif
83 icrp = (volatile unsigned char *) (MCF_MBAR + icr);
84 *icrp = MCFSIM_ICR_AUTOVEC | (level << 2) | MCFSIM_ICR_PRI3;
85 mcf_clrimr(imr);
86 }
87} 83}
88 84
89/***************************************************************************/ 85/***************************************************************************/
@@ -108,6 +104,7 @@ void __init config_BSP(char *commandp, int size)
108#endif /* CONFIG_NETtel */ 104#endif /* CONFIG_NETtel */
109 105
110 mach_reset = m5206e_cpu_reset; 106 mach_reset = m5206e_cpu_reset;
107 m5206e_timers_init();
111} 108}
112 109
113/***************************************************************************/ 110/***************************************************************************/