diff options
author | Greg Ungerer <gerg@uclinux.org> | 2009-05-19 00:52:40 -0400 |
---|---|---|
committer | Greg Ungerer <gerg@uclinux.org> | 2009-09-15 19:43:51 -0400 |
commit | 04b75b10dceadf937e3707ecc3dfccf6a076fd29 (patch) | |
tree | 87965d12b8f7eb622efd1d36bebd2a7b8a26452e /arch/m68knommu/platform/5206 | |
parent | f9311f26434cea3e926f56ca2aa3e5740e962c72 (diff) |
m68knommu: simplify ColdFire "timers" clock initialization
The ColdFire "timers" clock setup can be simplified. There is really no
need for the flexible per-platform setup code. The clock interrupt can be
hard defined per CPU platform (in CPU include files). This makes the
actual timer code simpler.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68knommu/platform/5206')
-rw-r--r-- | arch/m68knommu/platform/5206/config.c | 25 |
1 files changed, 11 insertions, 14 deletions
diff --git a/arch/m68knommu/platform/5206/config.c b/arch/m68knommu/platform/5206/config.c index 0dce2383320d..c1d24796ef2f 100644 --- a/arch/m68knommu/platform/5206/config.c +++ b/arch/m68knommu/platform/5206/config.c | |||
@@ -68,21 +68,17 @@ static void __init m5206_uarts_init(void) | |||
68 | 68 | ||
69 | /***************************************************************************/ | 69 | /***************************************************************************/ |
70 | 70 | ||
71 | void mcf_settimericr(unsigned int timer, unsigned int level) | 71 | static void __init m5206_timers_init(void) |
72 | { | 72 | { |
73 | volatile unsigned char *icrp; | 73 | /* Timer1 is always used as system timer */ |
74 | unsigned int icr, imr; | 74 | writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3, |
75 | 75 | MCF_MBAR + MCFSIM_TIMER1ICR); | |
76 | if (timer <= 2) { | 76 | |
77 | switch (timer) { | 77 | #ifdef CONFIG_HIGHPROFILE |
78 | case 2: icr = MCFSIM_TIMER2ICR; imr = MCFINTC_TIMER2; break; | 78 | /* Timer2 is to be used as a high speed profile timer */ |
79 | default: icr = MCFSIM_TIMER1ICR; imr = MCFINTC_TIMER1; break; | 79 | writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3, |
80 | } | 80 | MCF_MBAR + MCFSIM_TIMER2ICR); |
81 | 81 | #endif | |
82 | icrp = (volatile unsigned char *) (MCF_MBAR + icr); | ||
83 | *icrp = MCFSIM_ICR_AUTOVEC | (level << 2) | MCFSIM_ICR_PRI3; | ||
84 | mcf_clrimr(imr); | ||
85 | } | ||
86 | } | 82 | } |
87 | 83 | ||
88 | /***************************************************************************/ | 84 | /***************************************************************************/ |
@@ -101,6 +97,7 @@ void m5206_cpu_reset(void) | |||
101 | void __init config_BSP(char *commandp, int size) | 97 | void __init config_BSP(char *commandp, int size) |
102 | { | 98 | { |
103 | mach_reset = m5206_cpu_reset; | 99 | mach_reset = m5206_cpu_reset; |
100 | m5206_timers_init(); | ||
104 | } | 101 | } |
105 | 102 | ||
106 | /***************************************************************************/ | 103 | /***************************************************************************/ |