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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /arch/m68knommu/kernel/vmlinux.lds.S
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'arch/m68knommu/kernel/vmlinux.lds.S')
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diff --git a/arch/m68knommu/kernel/vmlinux.lds.S b/arch/m68knommu/kernel/vmlinux.lds.S
new file mode 100644
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1/*
2 * vmlinux.lds.S -- master linker script for m68knommu arch
3 *
4 * (C) Copyright 2002-2004, Greg Ungerer <gerg@snapgear.com>
5 *
6 * This ends up looking compilcated, because of the number of
7 * address variations for ram and rom/flash layouts. The real
8 * work of the linker script is all at the end, and reasonably
9 * strait forward.
10 */
11
12#include <linux/config.h>
13#include <asm-generic/vmlinux.lds.h>
14
15/*
16 * Original Palm pilot (same for Xcopilot).
17 * There is really only a rom target for this.
18 */
19#ifdef CONFIG_PILOT3
20#define ROMVEC_START 0x10c00000
21#define ROMVEC_LENGTH 0x10400
22#define ROM_START 0x10c10400
23#define ROM_LENGTH 0xfec00
24#define ROM_END 0x10d00000
25#define RAMVEC_START 0x00000000
26#define RAMVEC_LENGTH 0x400
27#define RAM_START 0x10000400
28#define RAM_LENGTH 0xffc00
29#define RAM_END 0x10100000
30#define _ramend _ram_end_notused
31#define DATA_ADDR RAM_START
32#endif
33
34/*
35 * Same setup on both the uCsimm and uCdimm.
36 */
37#if defined(CONFIG_UCSIMM) || defined(CONFIG_UCDIMM)
38#ifdef CONFIG_RAMKERNEL
39#define ROMVEC_START 0x10c10000
40#define ROMVEC_LENGTH 0x400
41#define ROM_START 0x10c10400
42#define ROM_LENGTH 0x1efc00
43#define ROM_END 0x10e00000
44#define RAMVEC_START 0x00000000
45#define RAMVEC_LENGTH 0x400
46#define RAM_START 0x00020400
47#define RAM_LENGTH 0x7dfc00
48#define RAM_END 0x00800000
49#endif
50#ifdef CONFIG_ROMKERNEL
51#define ROMVEC_START 0x10c10000
52#define ROMVEC_LENGTH 0x400
53#define ROM_START 0x10c10400
54#define ROM_LENGTH 0x1efc00
55#define ROM_END 0x10e00000
56#define RAMVEC_START 0x00000000
57#define RAMVEC_LENGTH 0x400
58#define RAM_START 0x00020000
59#define RAM_LENGTH 0x600000
60#define RAM_END 0x00800000
61#endif
62#ifdef CONFIG_HIMEMKERNEL
63#define ROMVEC_START 0x00600000
64#define ROMVEC_LENGTH 0x400
65#define ROM_START 0x00600400
66#define ROM_LENGTH 0x1efc00
67#define ROM_END 0x007f0000
68#define RAMVEC_START 0x00000000
69#define RAMVEC_LENGTH 0x400
70#define RAM_START 0x00020000
71#define RAM_LENGTH 0x5e0000
72#define RAM_END 0x00600000
73#endif
74#endif
75
76#ifdef CONFIG_DRAGEN2
77#define RAM_START 0x10000
78#define RAM_LENGTH 0x7f0000
79#endif
80
81#ifdef CONFIG_UCQUICC
82#define ROMVEC_START 0x00000000
83#define ROMVEC_LENGTH 0x404
84#define ROM_START 0x00000404
85#define ROM_LENGTH 0x1ff6fc
86#define ROM_END 0x00200000
87#define RAMVEC_START 0x00200000
88#define RAMVEC_LENGTH 0x404
89#define RAM_START 0x00200404
90#define RAM_LENGTH 0x1ff6fc
91#define RAM_END 0x00400000
92#endif
93
94/*
95 * The standard Arnewsh 5206 board only has 1MiB of ram. Not normally
96 * enough to be useful. Assume the user has fitted something larger,
97 * at least 4MiB in size. No point in not letting the kernel completely
98 * link, it will be obvious if it is too big when they go to load it.
99 */
100#if defined(CONFIG_ARN5206)
101#define RAM_START 0x10000
102#define RAM_LENGTH 0x3f0000
103#endif
104
105/*
106 * The Motorola 5206eLITE board only has 1MiB of static RAM.
107 */
108#if defined(CONFIG_ELITE)
109#define RAM_START 0x30020000
110#define RAM_END 0xe0000
111#endif
112
113/*
114 * All the Motorola eval boards have the same basic arrangement.
115 * The end of RAM will vary depending on how much ram is fitted,
116 * but this isn't important here, we assume at least 4MiB.
117 */
118#if defined(CONFIG_M5206eC3) || defined(CONFIG_M5249C3) || \
119 defined(CONFIG_M5272C3) || defined(CONFIG_M5307C3) || \
120 defined(CONFIG_ARN5307) || defined(CONFIG_M5407C3) || \
121 defined(CONFIG_M5271EVB) || defined(CONFIG_M5275EVB)
122#define RAM_START 0x20000
123#define RAM_LENGTH 0x3e0000
124#endif
125
126/*
127 * The senTec COBRA5272 board has nearly the same memory layout as
128 * the M5272C3. We assume 16MiB ram.
129 */
130#if defined(CONFIG_COBRA5272)
131#define RAM_START 0x20000
132#define RAM_LENGTH 0xfe0000
133#endif
134
135#if defined(CONFIG_M5282EVB)
136#define RAM_START 0x10000
137#define RAM_LENGTH 0x3f0000
138#endif
139
140/*
141 * The senTec COBRA5282 board has the same memory layout as the M5282EVB.
142 */
143#if defined(CONFIG_COBRA5282)
144#define RAM_START 0x10000
145#define RAM_LENGTH 0x3f0000
146#endif
147
148/*
149 * These flash boot boards use all of ram for operation. Again the
150 * actual memory size is not important here, assume at least 4MiB.
151 * They currently have no support for running in flash.
152 */
153#if defined(CONFIG_NETtel) || defined(CONFIG_eLIA) || \
154 defined(CONFIG_DISKtel) || defined(CONFIG_SECUREEDGEMP3) || \
155 defined(CONFIG_HW_FEITH)
156#define RAM_START 0x400
157#define RAM_LENGTH 0x3ffc00
158#endif
159
160/*
161 * Sneha Boards mimimun memmory
162 * The end of RAM will vary depending on how much ram is fitted,
163 * but this isn't important here, we assume at least 4MiB.
164 */
165#if defined(CONFIG_CPU16B)
166#define RAM_START 0x20000
167#define RAM_LENGTH 0x3e0000
168#endif
169
170
171#if defined(CONFIG_RAMKERNEL)
172#define TEXT ram
173#define DATA ram
174#define INIT ram
175#define BSS ram
176#endif
177#if defined(CONFIG_ROMKERNEL) || defined(CONFIG_HIMEMKERNEL)
178#define TEXT rom
179#define DATA ram
180#define INIT ram
181#define BSS ram
182#endif
183
184#ifndef DATA_ADDR
185#define DATA_ADDR
186#endif
187
188
189OUTPUT_ARCH(m68k)
190ENTRY(_start)
191
192MEMORY {
193#ifdef RAMVEC_START
194 ramvec : ORIGIN = RAMVEC_START, LENGTH = RAMVEC_LENGTH
195#endif
196 ram : ORIGIN = RAM_START, LENGTH = RAM_LENGTH
197#ifdef RAM_END
198 eram : ORIGIN = RAM_END, LENGTH = 0
199#endif
200#ifdef ROM_START
201 romvec : ORIGIN = ROMVEC_START, LENGTH = ROMVEC_LENGTH
202 rom : ORIGIN = ROM_START, LENGTH = ROM_LENGTH
203 erom : ORIGIN = ROM_END, LENGTH = 0
204#endif
205}
206
207jiffies = jiffies_64 + 4;
208
209SECTIONS {
210
211#ifdef ROMVEC_START
212 . = ROMVEC_START ;
213 .romvec : {
214 __rom_start = . ;
215 _romvec = .;
216 *(.data.initvect)
217 } > romvec
218#endif
219
220 .text : {
221 _stext = . ;
222 *(.text)
223 SCHED_TEXT
224 *(.text.lock)
225
226 . = ALIGN(16); /* Exception table */
227 __start___ex_table = .;
228 *(__ex_table)
229 __stop___ex_table = .;
230
231 *(.rodata) *(.rodata.*)
232 *(__vermagic) /* Kernel version magic */
233 *(.rodata1)
234 *(.rodata.str1.1)
235
236 /* Kernel symbol table: Normal symbols */
237 . = ALIGN(4);
238 __start___ksymtab = .;
239 *(__ksymtab)
240 __stop___ksymtab = .;
241
242 /* Kernel symbol table: GPL-only symbols */
243 __start___ksymtab_gpl = .;
244 *(__ksymtab_gpl)
245 __stop___ksymtab_gpl = .;
246
247 /* Kernel symbol table: Normal symbols */
248 __start___kcrctab = .;
249 *(__kcrctab)
250 __stop___kcrctab = .;
251
252 /* Kernel symbol table: GPL-only symbols */
253 __start___kcrctab_gpl = .;
254 *(__kcrctab_gpl)
255 __stop___kcrctab_gpl = .;
256
257 /* Kernel symbol table: strings */
258 *(__ksymtab_strings)
259
260 /* Built-in module parameters */
261 __start___param = .;
262 *(__param)
263 __stop___param = .;
264
265 . = ALIGN(4) ;
266 _etext = . ;
267 } > TEXT
268
269#ifdef ROM_END
270 . = ROM_END ;
271 .erom : {
272 __rom_end = . ;
273 } > erom
274#endif
275#ifdef RAMVEC_START
276 . = RAMVEC_START ;
277 .ramvec : {
278 __ramvec = .;
279 } > ramvec
280#endif
281
282 .data DATA_ADDR : {
283 . = ALIGN(4);
284 _sdata = . ;
285 *(.data)
286 . = ALIGN(8192) ;
287 *(.data.init_task)
288 _edata = . ;
289 } > DATA
290
291 .init : {
292 . = ALIGN(4096);
293 __init_begin = .;
294 _sinittext = .;
295 *(.init.text)
296 _einittext = .;
297 *(.init.data)
298 . = ALIGN(16);
299 __setup_start = .;
300 *(.init.setup)
301 __setup_end = .;
302 __initcall_start = .;
303 *(.initcall1.init)
304 *(.initcall2.init)
305 *(.initcall3.init)
306 *(.initcall4.init)
307 *(.initcall5.init)
308 *(.initcall6.init)
309 *(.initcall7.init)
310 __initcall_end = .;
311 __con_initcall_start = .;
312 *(.con_initcall.init)
313 __con_initcall_end = .;
314 __security_initcall_start = .;
315 *(.security_initcall.init)
316 __security_initcall_end = .;
317 . = ALIGN(4);
318 __initramfs_start = .;
319 *(.init.ramfs)
320 __initramfs_end = .;
321 . = ALIGN(4096);
322 __init_end = .;
323 } > INIT
324
325 /DISCARD/ : {
326 *(.exit.text)
327 *(.exit.data)
328 *(.exitcall.exit)
329 }
330
331 .bss : {
332 . = ALIGN(4);
333 _sbss = . ;
334 *(.bss)
335 *(COMMON)
336 . = ALIGN(4) ;
337 _ebss = . ;
338 } > BSS
339
340#ifdef RAM_END
341 . = RAM_END ;
342 .eram : {
343 __ramend = . ;
344 _ramend = . ;
345 } > eram
346#endif
347}
348