diff options
| author | Greg Ungerer <gerg@uclinux.org> | 2012-09-18 01:38:15 -0400 |
|---|---|---|
| committer | Greg Ungerer <gerg@uclinux.org> | 2012-09-27 09:34:06 -0400 |
| commit | 39dc5b7fcebe3cca65b775f743416107ec321e0b (patch) | |
| tree | 38113cc1756c3132dd1b859970ee112392d4028f /arch/m68k | |
| parent | 41e5be6a0e3bd0b54b7d2e60ba3225887286a45f (diff) | |
m68knommu: fix inconsistent formating in ColdFire 527x definitions
Fix tab broken address defines to be consistent with others in this file.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k')
| -rw-r--r-- | arch/m68k/include/asm/m527xsim.h | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/arch/m68k/include/asm/m527xsim.h b/arch/m68k/include/asm/m527xsim.h index 6335e4298dc8..1bebbe78055a 100644 --- a/arch/m68k/include/asm/m527xsim.h +++ b/arch/m68k/include/asm/m527xsim.h | |||
| @@ -184,15 +184,15 @@ | |||
| 184 | /* | 184 | /* |
| 185 | * Generic GPIO support | 185 | * Generic GPIO support |
| 186 | */ | 186 | */ |
| 187 | #define MCFGPIO_PODR MCFGPIO_PODR_ADDR | 187 | #define MCFGPIO_PODR MCFGPIO_PODR_ADDR |
| 188 | #define MCFGPIO_PDDR MCFGPIO_PDDR_ADDR | 188 | #define MCFGPIO_PDDR MCFGPIO_PDDR_ADDR |
| 189 | #define MCFGPIO_PPDR MCFGPIO_PPDSDR_ADDR | 189 | #define MCFGPIO_PPDR MCFGPIO_PPDSDR_ADDR |
| 190 | #define MCFGPIO_SETR MCFGPIO_PPDSDR_ADDR | 190 | #define MCFGPIO_SETR MCFGPIO_PPDSDR_ADDR |
| 191 | #define MCFGPIO_CLRR MCFGPIO_PCLRR_ADDR | 191 | #define MCFGPIO_CLRR MCFGPIO_PCLRR_ADDR |
| 192 | 192 | ||
| 193 | #define MCFGPIO_PIN_MAX 100 | 193 | #define MCFGPIO_PIN_MAX 100 |
| 194 | #define MCFGPIO_IRQ_MAX 8 | 194 | #define MCFGPIO_IRQ_MAX 8 |
| 195 | #define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE | 195 | #define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE |
| 196 | 196 | ||
| 197 | /* | 197 | /* |
| 198 | * Port Pin Assignment registers. | 198 | * Port Pin Assignment registers. |
| @@ -293,15 +293,15 @@ | |||
| 293 | /* | 293 | /* |
| 294 | * Generic GPIO support | 294 | * Generic GPIO support |
| 295 | */ | 295 | */ |
| 296 | #define MCFGPIO_PODR MCFGPIO_PODR_BUSCTL | 296 | #define MCFGPIO_PODR MCFGPIO_PODR_BUSCTL |
| 297 | #define MCFGPIO_PDDR MCFGPIO_PDDR_BUSCTL | 297 | #define MCFGPIO_PDDR MCFGPIO_PDDR_BUSCTL |
| 298 | #define MCFGPIO_PPDR MCFGPIO_PPDSDR_BUSCTL | 298 | #define MCFGPIO_PPDR MCFGPIO_PPDSDR_BUSCTL |
| 299 | #define MCFGPIO_SETR MCFGPIO_PPDSDR_BUSCTL | 299 | #define MCFGPIO_SETR MCFGPIO_PPDSDR_BUSCTL |
| 300 | #define MCFGPIO_CLRR MCFGPIO_PCLRR_BUSCTL | 300 | #define MCFGPIO_CLRR MCFGPIO_PCLRR_BUSCTL |
| 301 | 301 | ||
| 302 | #define MCFGPIO_PIN_MAX 148 | 302 | #define MCFGPIO_PIN_MAX 148 |
| 303 | #define MCFGPIO_IRQ_MAX 8 | 303 | #define MCFGPIO_IRQ_MAX 8 |
| 304 | #define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE | 304 | #define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE |
| 305 | 305 | ||
| 306 | /* | 306 | /* |
| 307 | * Port Pin Assignment registers. | 307 | * Port Pin Assignment registers. |