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authorJiri Kosina <jkosina@suse.cz>2011-04-26 04:22:15 -0400
committerJiri Kosina <jkosina@suse.cz>2011-04-26 04:22:59 -0400
commit07f9479a40cc778bc1462ada11f95b01360ae4ff (patch)
tree0676cf38df3844004bb3ebfd99dfa67a4a8998f5 /arch/m68k
parent9d5e6bdb3013acfb311ab407eeca0b6a6a3dedbf (diff)
parentcd2e49e90f1cae7726c9a2c54488d881d7f1cd1c (diff)
Merge branch 'master' into for-next
Fast-forwarded to current state of Linus' tree as there are patches to be applied for files that didn't exist on the old branch.
Diffstat (limited to 'arch/m68k')
-rw-r--r--arch/m68k/Kconfig455
-rw-r--r--arch/m68k/Kconfig.debug34
-rw-r--r--arch/m68k/Kconfig.mmu417
-rw-r--r--arch/m68k/Kconfig.nommu750
-rw-r--r--arch/m68k/Makefile122
-rw-r--r--arch/m68k/Makefile_mm121
-rw-r--r--arch/m68k/Makefile_no124
-rw-r--r--arch/m68k/atari/atakeyb.c2
-rw-r--r--arch/m68k/configs/m5208evb_defconfig76
-rw-r--r--arch/m68k/configs/m5249evb_defconfig69
-rw-r--r--arch/m68k/configs/m5272c3_defconfig67
-rw-r--r--arch/m68k/configs/m5275evb_defconfig74
-rw-r--r--arch/m68k/configs/m5307c3_defconfig77
-rw-r--r--arch/m68k/configs/m5407c3_defconfig71
-rw-r--r--arch/m68k/fpsp040/bindec.S2
-rw-r--r--arch/m68k/ifpsp060/src/fpsp.S10
-rw-r--r--arch/m68k/ifpsp060/src/pfpsp.S8
-rw-r--r--arch/m68k/include/asm/atariints.h2
-rw-r--r--arch/m68k/include/asm/bitops_mm.h102
-rw-r--r--arch/m68k/include/asm/bitops_no.h32
-rw-r--r--arch/m68k/include/asm/bootstd.h2
-rw-r--r--arch/m68k/include/asm/commproc.h4
-rw-r--r--arch/m68k/include/asm/delay_no.h2
-rw-r--r--arch/m68k/include/asm/gpio.h2
-rw-r--r--arch/m68k/include/asm/m520xsim.h2
-rw-r--r--arch/m68k/include/asm/m523xsim.h2
-rw-r--r--arch/m68k/include/asm/m527xsim.h2
-rw-r--r--arch/m68k/include/asm/m5307sim.h2
-rw-r--r--arch/m68k/include/asm/m5407sim.h2
-rw-r--r--arch/m68k/include/asm/m68360_quicc.h2
-rw-r--r--arch/m68k/include/asm/mac_oss.h2
-rw-r--r--arch/m68k/include/asm/mac_via.h2
-rw-r--r--arch/m68k/include/asm/macintosh.h2
-rw-r--r--arch/m68k/include/asm/mcftimer.h2
-rw-r--r--arch/m68k/include/asm/types.h9
-rw-r--r--arch/m68k/include/asm/unistd.h6
-rw-r--r--arch/m68k/kernel/Makefile18
-rw-r--r--arch/m68k/kernel/Makefile_mm17
-rw-r--r--arch/m68k/kernel/Makefile_no10
-rw-r--r--arch/m68k/kernel/asm-offsets.c101
-rw-r--r--arch/m68k/kernel/asm-offsets_mm.c100
-rw-r--r--arch/m68k/kernel/asm-offsets_no.c76
-rw-r--r--arch/m68k/kernel/dma.c135
-rw-r--r--arch/m68k/kernel/dma_mm.c130
-rw-r--r--arch/m68k/kernel/dma_no.c74
-rw-r--r--arch/m68k/kernel/entry.S756
-rw-r--r--arch/m68k/kernel/entry_mm.S757
-rw-r--r--arch/m68k/kernel/entry_no.S134
-rw-r--r--arch/m68k/kernel/head.S12
-rw-r--r--arch/m68k/kernel/init_task.c36
-rw-r--r--arch/m68k/kernel/irq.c58
-rw-r--r--arch/m68k/kernel/m68k_ksyms.c21
-rw-r--r--arch/m68k/kernel/m68k_ksyms_mm.c16
-rw-r--r--arch/m68k/kernel/m68k_ksyms_no.c78
-rw-r--r--arch/m68k/kernel/module.c156
-rw-r--r--arch/m68k/kernel/module_mm.c155
-rw-r--r--arch/m68k/kernel/module_no.c126
-rw-r--r--arch/m68k/kernel/process.c355
-rw-r--r--arch/m68k/kernel/process_mm.c354
-rw-r--r--arch/m68k/kernel/process_no.c404
-rw-r--r--arch/m68k/kernel/ptrace.c282
-rw-r--r--arch/m68k/kernel/ptrace_mm.c277
-rw-r--r--arch/m68k/kernel/ptrace_no.c255
-rw-r--r--arch/m68k/kernel/setup.c534
-rw-r--r--arch/m68k/kernel/setup_mm.c533
-rw-r--r--arch/m68k/kernel/setup_no.c317
-rw-r--r--arch/m68k/kernel/signal.c1018
-rw-r--r--arch/m68k/kernel/signal_mm.c1017
-rw-r--r--arch/m68k/kernel/signal_no.c765
-rw-r--r--arch/m68k/kernel/sys_m68k.c551
-rw-r--r--arch/m68k/kernel/sys_m68k_mm.c546
-rw-r--r--arch/m68k/kernel/sys_m68k_no.c94
-rw-r--r--arch/m68k/kernel/syscalltable.S369
-rw-r--r--arch/m68k/kernel/time.c119
-rw-r--r--arch/m68k/kernel/time_mm.c114
-rw-r--r--arch/m68k/kernel/time_no.c87
-rw-r--r--arch/m68k/kernel/traps.c1208
-rw-r--r--arch/m68k/kernel/traps_mm.c1207
-rw-r--r--arch/m68k/kernel/traps_no.c365
-rw-r--r--arch/m68k/kernel/vmlinux.lds.S11
-rw-r--r--arch/m68k/kernel/vmlinux.lds_mm.S10
-rw-r--r--arch/m68k/kernel/vmlinux.lds_no.S188
-rw-r--r--arch/m68k/lib/Makefile11
-rw-r--r--arch/m68k/lib/Makefile_mm6
-rw-r--r--arch/m68k/lib/Makefile_no7
-rw-r--r--arch/m68k/lib/checksum.c430
-rw-r--r--arch/m68k/lib/checksum_mm.c425
-rw-r--r--arch/m68k/lib/checksum_no.c153
-rw-r--r--arch/m68k/lib/delay.c21
-rw-r--r--arch/m68k/lib/divsi3.S125
-rw-r--r--arch/m68k/lib/memcpy.c62
-rw-r--r--arch/m68k/lib/memmove.c105
-rw-r--r--arch/m68k/lib/memset.c47
-rw-r--r--arch/m68k/lib/modsi3.S113
-rw-r--r--arch/m68k/lib/muldi3.c68
-rw-r--r--arch/m68k/lib/muldi3_mm.c63
-rw-r--r--arch/m68k/lib/muldi3_no.c86
-rw-r--r--arch/m68k/lib/mulsi3.S110
-rw-r--r--arch/m68k/lib/udivsi3.S162
-rw-r--r--arch/m68k/lib/umodsi3.S113
-rw-r--r--arch/m68k/mm/Makefile13
-rw-r--r--arch/m68k/mm/Makefile_mm8
-rw-r--r--arch/m68k/mm/Makefile_no5
-rw-r--r--arch/m68k/mm/init.c153
-rw-r--r--arch/m68k/mm/init_mm.c150
-rw-r--r--arch/m68k/mm/init_no.c193
-rw-r--r--arch/m68k/mm/kmap.c368
-rw-r--r--arch/m68k/mm/kmap_mm.c367
-rw-r--r--arch/m68k/mm/kmap_no.c45
-rw-r--r--arch/m68k/platform/5206/Makefile18
-rw-r--r--arch/m68k/platform/5206/config.c121
-rw-r--r--arch/m68k/platform/5206/gpio.c49
-rw-r--r--arch/m68k/platform/5206e/Makefile18
-rw-r--r--arch/m68k/platform/5206e/config.c127
-rw-r--r--arch/m68k/platform/5206e/gpio.c49
-rw-r--r--arch/m68k/platform/520x/Makefile17
-rw-r--r--arch/m68k/platform/520x/config.c311
-rw-r--r--arch/m68k/platform/520x/gpio.c211
-rw-r--r--arch/m68k/platform/523x/Makefile17
-rw-r--r--arch/m68k/platform/523x/config.c293
-rw-r--r--arch/m68k/platform/523x/gpio.c284
-rw-r--r--arch/m68k/platform/5249/Makefile18
-rw-r--r--arch/m68k/platform/5249/config.c330
-rw-r--r--arch/m68k/platform/5249/gpio.c65
-rw-r--r--arch/m68k/platform/5249/intc2.c61
-rw-r--r--arch/m68k/platform/5272/Makefile18
-rw-r--r--arch/m68k/platform/5272/config.c176
-rw-r--r--arch/m68k/platform/5272/gpio.c81
-rw-r--r--arch/m68k/platform/5272/intc.c187
-rw-r--r--arch/m68k/platform/527x/Makefile18
-rw-r--r--arch/m68k/platform/527x/config.c384
-rw-r--r--arch/m68k/platform/527x/gpio.c609
-rw-r--r--arch/m68k/platform/528x/Makefile18
-rw-r--r--arch/m68k/platform/528x/config.c320
-rw-r--r--arch/m68k/platform/528x/gpio.c438
-rw-r--r--arch/m68k/platform/5307/Makefile20
-rw-r--r--arch/m68k/platform/5307/config.c147
-rw-r--r--arch/m68k/platform/5307/gpio.c49
-rw-r--r--arch/m68k/platform/5307/nettel.c153
-rw-r--r--arch/m68k/platform/532x/Makefile18
-rw-r--r--arch/m68k/platform/532x/config.c648
-rw-r--r--arch/m68k/platform/532x/gpio.c337
-rw-r--r--arch/m68k/platform/5407/Makefile18
-rw-r--r--arch/m68k/platform/5407/config.c122
-rw-r--r--arch/m68k/platform/5407/gpio.c49
-rw-r--r--arch/m68k/platform/54xx/Makefile19
-rw-r--r--arch/m68k/platform/54xx/config.c115
-rw-r--r--arch/m68k/platform/54xx/firebee.c86
-rw-r--r--arch/m68k/platform/68328/Makefile22
-rw-r--r--arch/m68k/platform/68328/bootlogo.h270
-rw-r--r--arch/m68k/platform/68328/bootlogo.pl10
-rw-r--r--arch/m68k/platform/68328/config.c52
-rw-r--r--arch/m68k/platform/68328/entry.S263
-rw-r--r--arch/m68k/platform/68328/head-de2.S128
-rw-r--r--arch/m68k/platform/68328/head-pilot.S222
-rw-r--r--arch/m68k/platform/68328/head-ram.S141
-rw-r--r--arch/m68k/platform/68328/head-rom.S110
-rw-r--r--arch/m68k/platform/68328/ints.c186
-rw-r--r--arch/m68k/platform/68328/romvec.S35
-rw-r--r--arch/m68k/platform/68328/timers.c134
-rw-r--r--arch/m68k/platform/68360/Makefile10
-rw-r--r--arch/m68k/platform/68360/commproc.c308
-rw-r--r--arch/m68k/platform/68360/config.c186
-rw-r--r--arch/m68k/platform/68360/entry.S184
-rw-r--r--arch/m68k/platform/68360/head-ram.S403
-rw-r--r--arch/m68k/platform/68360/head-rom.S414
-rw-r--r--arch/m68k/platform/68360/ints.c139
-rw-r--r--arch/m68k/platform/68EZ328/Makefile11
-rw-r--r--arch/m68k/platform/68EZ328/bootlogo.h3204
-rw-r--r--arch/m68k/platform/68EZ328/config.c76
-rw-r--r--arch/m68k/platform/68VZ328/Makefile16
-rw-r--r--arch/m68k/platform/68VZ328/config.c188
-rw-r--r--arch/m68k/platform/Makefile3
-rw-r--r--arch/m68k/platform/coldfire/Makefile32
-rw-r--r--arch/m68k/platform/coldfire/cache.c48
-rw-r--r--arch/m68k/platform/coldfire/clk.c45
-rw-r--r--arch/m68k/platform/coldfire/dma.c39
-rw-r--r--arch/m68k/platform/coldfire/dma_timer.c84
-rw-r--r--arch/m68k/platform/coldfire/entry.S203
-rw-r--r--arch/m68k/platform/coldfire/gpio.c127
-rw-r--r--arch/m68k/platform/coldfire/head.S250
-rw-r--r--arch/m68k/platform/coldfire/intc-2.c214
-rw-r--r--arch/m68k/platform/coldfire/intc-simr.c191
-rw-r--r--arch/m68k/platform/coldfire/intc.c151
-rw-r--r--arch/m68k/platform/coldfire/pinmux.c28
-rw-r--r--arch/m68k/platform/coldfire/pit.c169
-rw-r--r--arch/m68k/platform/coldfire/sltimers.c145
-rw-r--r--arch/m68k/platform/coldfire/timers.c174
-rw-r--r--arch/m68k/platform/coldfire/vectors.c80
-rw-r--r--arch/m68k/q40/README2
190 files changed, 27854 insertions, 6877 deletions
diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig
index 525174d41679..75531da02a40 100644
--- a/arch/m68k/Kconfig
+++ b/arch/m68k/Kconfig
@@ -1,13 +1,10 @@
1config M68K 1config M68K
2 bool 2 bool
3 default y 3 default y
4 select HAVE_AOUT
5 select HAVE_IDE 4 select HAVE_IDE
6 select GENERIC_ATOMIC64 5 select HAVE_AOUT if MMU
7 6 select GENERIC_ATOMIC64 if MMU
8config MMU 7 select HAVE_GENERIC_HARDIRQS if !MMU
9 bool
10 default y
11 8
12config RWSEM_GENERIC_SPINLOCK 9config RWSEM_GENERIC_SPINLOCK
13 bool 10 bool
@@ -34,457 +31,67 @@ config TIME_LOW_RES
34 bool 31 bool
35 default y 32 default y
36 33
37config GENERIC_IOMAP
38 bool
39 default y
40
41config ARCH_MAY_HAVE_PC_FDC
42 bool
43 depends on BROKEN && (Q40 || SUN3X)
44 default y
45
46config NO_IOPORT 34config NO_IOPORT
47 def_bool y 35 def_bool y
48 36
49config NO_DMA 37config NO_DMA
50 def_bool SUN3 38 def_bool (MMU && SUN3) || (!MMU && !COLDFIRE)
51 39
40config ZONE_DMA
41 bool
42 default y
52config HZ 43config HZ
53 int 44 int
45 default 1000 if CLEOPATRA
54 default 100 46 default 100
55 47
56config ARCH_USES_GETTIMEOFFSET
57 def_bool y
58
59source "init/Kconfig" 48source "init/Kconfig"
60 49
61source "kernel/Kconfig.freezer" 50source "kernel/Kconfig.freezer"
62 51
63menu "Platform dependent setup" 52config MMU
64 53 bool "MMU-based Paged Memory Management Support"
65config EISA
66 bool
67 ---help---
68 The Extended Industry Standard Architecture (EISA) bus was
69 developed as an open alternative to the IBM MicroChannel bus.
70
71 The EISA bus provided some of the features of the IBM MicroChannel
72 bus while maintaining backward compatibility with cards made for
73 the older ISA bus. The EISA bus saw limited use between 1988 and
74 1995 when it was made obsolete by the PCI bus.
75
76 Say Y here if you are building a kernel for an EISA-based machine.
77
78 Otherwise, say N.
79
80config MCA
81 bool
82 help
83 MicroChannel Architecture is found in some IBM PS/2 machines and
84 laptops. It is a bus system similar to PCI or ISA. See
85 <file:Documentation/mca.txt> (and especially the web page given
86 there) before attempting to build an MCA bus kernel.
87
88config PCMCIA
89 tristate
90 ---help---
91 Say Y here if you want to attach PCMCIA- or PC-cards to your Linux
92 computer. These are credit-card size devices such as network cards,
93 modems or hard drives often used with laptops computers. There are
94 actually two varieties of these cards: the older 16 bit PCMCIA cards
95 and the newer 32 bit CardBus cards. If you want to use CardBus
96 cards, you need to say Y here and also to "CardBus support" below.
97
98 To use your PC-cards, you will need supporting software from David
99 Hinds' pcmcia-cs package (see the file <file:Documentation/Changes>
100 for location). Please also read the PCMCIA-HOWTO, available from
101 <http://www.tldp.org/docs.html#howto>.
102
103 To compile this driver as modules, choose M here: the
104 modules will be called pcmcia_core and ds.
105
106config AMIGA
107 bool "Amiga support"
108 select MMU_MOTOROLA if MMU
109 help
110 This option enables support for the Amiga series of computers. If
111 you plan to use this kernel on an Amiga, say Y here and browse the
112 material available in <file:Documentation/m68k>; otherwise say N.
113
114config ATARI
115 bool "Atari support"
116 select MMU_MOTOROLA if MMU
117 help
118 This option enables support for the 68000-based Atari series of
119 computers (including the TT, Falcon and Medusa). If you plan to use
120 this kernel on an Atari, say Y here and browse the material
121 available in <file:Documentation/m68k>; otherwise say N.
122
123config MAC
124 bool "Macintosh support"
125 select MMU_MOTOROLA if MMU
126 help
127 This option enables support for the Apple Macintosh series of
128 computers (yes, there is experimental support now, at least for part
129 of the series).
130
131 Say N unless you're willing to code the remaining necessary support.
132 ;)
133
134config NUBUS
135 bool
136 depends on MAC
137 default y
138
139config M68K_L2_CACHE
140 bool
141 depends on MAC
142 default y
143
144config APOLLO
145 bool "Apollo support"
146 select MMU_MOTOROLA if MMU
147 help
148 Say Y here if you want to run Linux on an MC680x0-based Apollo
149 Domain workstation such as the DN3500.
150
151config VME
152 bool "VME (Motorola and BVM) support"
153 select MMU_MOTOROLA if MMU
154 help
155 Say Y here if you want to build a kernel for a 680x0 based VME
156 board. Boards currently supported include Motorola boards MVME147,
157 MVME162, MVME166, MVME167, MVME172, and MVME177. BVME4000 and
158 BVME6000 boards from BVM Ltd are also supported.
159
160config MVME147
161 bool "MVME147 support"
162 depends on VME
163 help
164 Say Y to include support for early Motorola VME boards. This will
165 build a kernel which can run on MVME147 single-board computers. If
166 you select this option you will have to select the appropriate
167 drivers for SCSI, Ethernet and serial ports later on.
168
169config MVME16x
170 bool "MVME162, 166 and 167 support"
171 depends on VME
172 help
173 Say Y to include support for Motorola VME boards. This will build a
174 kernel which can run on MVME162, MVME166, MVME167, MVME172, and
175 MVME177 boards. If you select this option you will have to select
176 the appropriate drivers for SCSI, Ethernet and serial ports later
177 on.
178
179config BVME6000
180 bool "BVME4000 and BVME6000 support"
181 depends on VME
182 help
183 Say Y to include support for VME boards from BVM Ltd. This will
184 build a kernel which can run on BVME4000 and BVME6000 boards. If
185 you select this option you will have to select the appropriate
186 drivers for SCSI, Ethernet and serial ports later on.
187
188config HP300
189 bool "HP9000/300 and HP9000/400 support"
190 select MMU_MOTOROLA if MMU
191 help
192 This option enables support for the HP9000/300 and HP9000/400 series
193 of workstations. Support for these machines is still somewhat
194 experimental. If you plan to try to use the kernel on such a machine
195 say Y here.
196 Everybody else says N.
197
198config DIO
199 bool "DIO bus support"
200 depends on HP300
201 default y 54 default y
202 help 55 help
203 Say Y here to enable support for the "DIO" expansion bus used in 56 Select if you want MMU-based virtualised addressing space
204 HP300 machines. If you are using such a system you almost certainly 57 support by paged memory management. If unsure, say 'Y'.
205 want this.
206
207config SUN3X
208 bool "Sun3x support"
209 select MMU_MOTOROLA if MMU
210 select M68030
211 help
212 This option enables support for the Sun 3x series of workstations.
213 Be warned that this support is very experimental.
214 Note that Sun 3x kernels are not compatible with Sun 3 hardware.
215 General Linux information on the Sun 3x series (now discontinued)
216 is at <http://www.angelfire.com/ca2/tech68k/sun3.html>.
217
218 If you don't want to compile a kernel for a Sun 3x, say N.
219
220config Q40
221 bool "Q40/Q60 support"
222 select MMU_MOTOROLA if MMU
223 help
224 The Q40 is a Motorola 68040-based successor to the Sinclair QL
225 manufactured in Germany. There is an official Q40 home page at
226 <http://www.q40.de/>. This option enables support for the Q40 and
227 Q60. Select your CPU below. For 68LC060 don't forget to enable FPU
228 emulation.
229
230config SUN3
231 bool "Sun3 support"
232 depends on !MMU_MOTOROLA
233 select MMU_SUN3 if MMU
234 select M68020
235 help
236 This option enables support for the Sun 3 series of workstations
237 (3/50, 3/60, 3/1xx, 3/2xx systems). Enabling this option requires
238 that all other hardware types must be disabled, as Sun 3 kernels
239 are incompatible with all other m68k targets (including Sun 3x!).
240
241 If you don't want to compile a kernel exclusively for a Sun 3, say N.
242
243config NATFEAT
244 bool "ARAnyM emulator support"
245 depends on ATARI
246 help
247 This option enables support for ARAnyM native features, such as
248 access to a disk image as /dev/hda.
249
250config NFBLOCK
251 tristate "NatFeat block device support"
252 depends on BLOCK && NATFEAT
253 help
254 Say Y to include support for the ARAnyM NatFeat block device
255 which allows direct access to the hard drives without using
256 the hardware emulation.
257
258config NFCON
259 tristate "NatFeat console driver"
260 depends on NATFEAT
261 help
262 Say Y to include support for the ARAnyM NatFeat console driver
263 which allows the console output to be redirected to the stderr
264 output of ARAnyM.
265
266config NFETH
267 tristate "NatFeat Ethernet support"
268 depends on NET_ETHERNET && NATFEAT
269 help
270 Say Y to include support for the ARAnyM NatFeat network device
271 which will emulate a regular ethernet device while presenting an
272 ethertap device to the host system.
273
274comment "Processor type"
275
276config M68020
277 bool "68020 support"
278 help
279 If you anticipate running this kernel on a computer with a MC68020
280 processor, say Y. Otherwise, say N. Note that the 68020 requires a
281 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
282 Sun 3, which provides its own version.
283
284config M68030
285 bool "68030 support"
286 depends on !MMU_SUN3
287 help
288 If you anticipate running this kernel on a computer with a MC68030
289 processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
290 work, as it does not include an MMU (Memory Management Unit).
291
292config M68040
293 bool "68040 support"
294 depends on !MMU_SUN3
295 help
296 If you anticipate running this kernel on a computer with a MC68LC040
297 or MC68040 processor, say Y. Otherwise, say N. Note that an
298 MC68EC040 will not work, as it does not include an MMU (Memory
299 Management Unit).
300
301config M68060
302 bool "68060 support"
303 depends on !MMU_SUN3
304 help
305 If you anticipate running this kernel on a computer with a MC68060
306 processor, say Y. Otherwise, say N.
307
308config MMU_MOTOROLA
309 bool
310
311config MMU_SUN3
312 bool
313 depends on MMU && !MMU_MOTOROLA
314
315config M68KFPU_EMU
316 bool "Math emulation support (EXPERIMENTAL)"
317 depends on EXPERIMENTAL
318 help
319 At some point in the future, this will cause floating-point math
320 instructions to be emulated by the kernel on machines that lack a
321 floating-point math coprocessor. Thrill-seekers and chronically
322 sleep-deprived psychotic hacker types can say Y now, everyone else
323 should probably wait a while.
324
325config M68KFPU_EMU_EXTRAPREC
326 bool "Math emulation extra precision"
327 depends on M68KFPU_EMU
328 help
329 The fpu uses normally a few bit more during calculations for
330 correct rounding, the emulator can (often) do the same but this
331 extra calculation can cost quite some time, so you can disable
332 it here. The emulator will then "only" calculate with a 64 bit
333 mantissa and round slightly incorrect, what is more than enough
334 for normal usage.
335
336config M68KFPU_EMU_ONLY
337 bool "Math emulation only kernel"
338 depends on M68KFPU_EMU
339 help
340 This option prevents any floating-point instructions from being
341 compiled into the kernel, thereby the kernel doesn't save any
342 floating point context anymore during task switches, so this
343 kernel will only be usable on machines without a floating-point
344 math coprocessor. This makes the kernel a bit faster as no tests
345 needs to be executed whether a floating-point instruction in the
346 kernel should be executed or not.
347
348config ADVANCED
349 bool "Advanced configuration options"
350 ---help---
351 This gives you access to some advanced options for the CPU. The
352 defaults should be fine for most users, but these options may make
353 it possible for you to improve performance somewhat if you know what
354 you are doing.
355
356 Note that the answer to this question won't directly affect the
357 kernel: saying N will just cause the configurator to skip all
358 the questions about these options.
359 58
360 Most users should say N to this question. 59menu "Platform dependent setup"
361
362config RMW_INSNS
363 bool "Use read-modify-write instructions"
364 depends on ADVANCED
365 ---help---
366 This allows to use certain instructions that work with indivisible
367 read-modify-write bus cycles. While this is faster than the
368 workaround of disabling interrupts, it can conflict with DMA
369 ( = direct memory access) on many Amiga systems, and it is also said
370 to destabilize other machines. It is very likely that this will
371 cause serious problems on any Amiga or Atari Medusa if set. The only
372 configuration where it should work are 68030-based Ataris, where it
373 apparently improves performance. But you've been warned! Unless you
374 really know what you are doing, say N. Try Y only if you're quite
375 adventurous.
376
377config SINGLE_MEMORY_CHUNK
378 bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
379 default y if SUN3
380 select NEED_MULTIPLE_NODES
381 help
382 Ignore all but the first contiguous chunk of physical memory for VM
383 purposes. This will save a few bytes kernel size and may speed up
384 some operations. Say N if not sure.
385 60
386config 060_WRITETHROUGH 61if MMU
387 bool "Use write-through caching for 68060 supervisor accesses" 62source arch/m68k/Kconfig.mmu
388 depends on ADVANCED && M68060 63endif
389 ---help--- 64if !MMU
390 The 68060 generally uses copyback caching of recently accessed data. 65source arch/m68k/Kconfig.nommu
391 Copyback caching means that memory writes will be held in an on-chip 66endif
392 cache and only written back to memory some time later. Saying Y
393 here will force supervisor (kernel) accesses to use writethrough
394 caching. Writethrough caching means that data is written to memory
395 straight away, so that cache and memory data always agree.
396 Writethrough caching is less efficient, but is needed for some
397 drivers on 68060 based systems where the 68060 bus snooping signal
398 is hardwired on. The 53c710 SCSI driver is known to suffer from
399 this problem.
400
401config ARCH_DISCONTIGMEM_ENABLE
402 def_bool !SINGLE_MEMORY_CHUNK
403
404config NODES_SHIFT
405 int
406 default "3"
407 depends on !SINGLE_MEMORY_CHUNK
408 67
409source "mm/Kconfig" 68source "mm/Kconfig"
410 69
411endmenu 70endmenu
412 71
413menu "General setup" 72menu "Executable file formats"
414 73
415source "fs/Kconfig.binfmt" 74source "fs/Kconfig.binfmt"
416 75
417config ZORRO 76endmenu
418 bool "Amiga Zorro (AutoConfig) bus support"
419 depends on AMIGA
420 help
421 This enables support for the Zorro bus in the Amiga. If you have
422 expansion cards in your Amiga that conform to the Amiga
423 AutoConfig(tm) specification, say Y, otherwise N. Note that even
424 expansion cards that do not fit in the Zorro slots but fit in e.g.
425 the CPU slot may fall in this category, so you have to say Y to let
426 Linux use these.
427
428config AMIGA_PCMCIA
429 bool "Amiga 1200/600 PCMCIA support (EXPERIMENTAL)"
430 depends on AMIGA && EXPERIMENTAL
431 help
432 Include support in the kernel for pcmcia on Amiga 1200 and Amiga
433 600. If you intend to use pcmcia cards say Y; otherwise say N.
434
435config STRAM_PROC
436 bool "ST-RAM statistics in /proc"
437 depends on ATARI
438 help
439 Say Y here to report ST-RAM usage statistics in /proc/stram.
440
441config HEARTBEAT
442 bool "Use power LED as a heartbeat" if AMIGA || APOLLO || ATARI || MAC ||Q40
443 default y if !AMIGA && !APOLLO && !ATARI && !MAC && !Q40 && HP300
444 help
445 Use the power-on LED on your machine as a load meter. The exact
446 behavior is platform-dependent, but normally the flash frequency is
447 a hyperbolic function of the 5-minute load average.
448
449# We have a dedicated heartbeat LED. :-)
450config PROC_HARDWARE
451 bool "/proc/hardware support"
452 help
453 Say Y here to support the /proc/hardware file, which gives you
454 access to information about the machine you're running on,
455 including the model, CPU, MMU, clock speed, BogoMIPS rating,
456 and memory size.
457
458config ISA
459 bool
460 depends on Q40 || AMIGA_PCMCIA
461 default y
462 help
463 Find out whether you have ISA slots on your motherboard. ISA is the
464 name of a bus system, i.e. the way the CPU talks to the other stuff
465 inside your box. Other bus systems are PCI, EISA, MicroChannel
466 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
467 newer boards don't support it. If you have ISA, say Y, otherwise N.
468
469config GENERIC_ISA_DMA
470 bool
471 depends on Q40 || AMIGA_PCMCIA
472 default y
473
474config ZONE_DMA
475 bool
476 default y
477 77
478source "drivers/pci/Kconfig" 78if !MMU
79menu "Power management options"
479 80
480source "drivers/zorro/Kconfig" 81config PM
82 bool "Power Management support"
83 help
84 Support processor power management modes
481 85
482endmenu 86endmenu
87endif
483 88
484source "net/Kconfig" 89source "net/Kconfig"
485 90
486source "drivers/Kconfig" 91source "drivers/Kconfig"
487 92
93if MMU
94
488menu "Character devices" 95menu "Character devices"
489 96
490config ATARI_MFPSER 97config ATARI_MFPSER
@@ -627,6 +234,8 @@ config SERIAL_CONSOLE
627 234
628endmenu 235endmenu
629 236
237endif
238
630source "fs/Kconfig" 239source "fs/Kconfig"
631 240
632source "arch/m68k/Kconfig.debug" 241source "arch/m68k/Kconfig.debug"
diff --git a/arch/m68k/Kconfig.debug b/arch/m68k/Kconfig.debug
index f53b6d5300e5..2bdb1b01115c 100644
--- a/arch/m68k/Kconfig.debug
+++ b/arch/m68k/Kconfig.debug
@@ -2,4 +2,38 @@ menu "Kernel hacking"
2 2
3source "lib/Kconfig.debug" 3source "lib/Kconfig.debug"
4 4
5if !MMU
6
7config FULLDEBUG
8 bool "Full Symbolic/Source Debugging support"
9 help
10 Enable debugging symbols on kernel build.
11
12config HIGHPROFILE
13 bool "Use fast second timer for profiling"
14 depends on COLDFIRE
15 help
16 Use a fast secondary clock to produce profiling information.
17
18config BOOTPARAM
19 bool 'Compiled-in Kernel Boot Parameter'
20
21config BOOTPARAM_STRING
22 string 'Kernel Boot Parameter'
23 default 'console=ttyS0,19200'
24 depends on BOOTPARAM
25
26config NO_KERNEL_MSG
27 bool "Suppress Kernel BUG Messages"
28 help
29 Do not output any debug BUG messages within the kernel.
30
31config BDM_DISABLE
32 bool "Disable BDM signals"
33 depends on (EXPERIMENTAL && COLDFIRE)
34 help
35 Disable the ColdFire CPU's BDM signals.
36
37endif
38
5endmenu 39endmenu
diff --git a/arch/m68k/Kconfig.mmu b/arch/m68k/Kconfig.mmu
new file mode 100644
index 000000000000..16539b1d5d3a
--- /dev/null
+++ b/arch/m68k/Kconfig.mmu
@@ -0,0 +1,417 @@
1config GENERIC_IOMAP
2 bool
3 default y
4
5config ARCH_MAY_HAVE_PC_FDC
6 bool
7 depends on BROKEN && (Q40 || SUN3X)
8 default y
9
10config ARCH_USES_GETTIMEOFFSET
11 def_bool y
12
13config EISA
14 bool
15 ---help---
16 The Extended Industry Standard Architecture (EISA) bus was
17 developed as an open alternative to the IBM MicroChannel bus.
18
19 The EISA bus provided some of the features of the IBM MicroChannel
20 bus while maintaining backward compatibility with cards made for
21 the older ISA bus. The EISA bus saw limited use between 1988 and
22 1995 when it was made obsolete by the PCI bus.
23
24 Say Y here if you are building a kernel for an EISA-based machine.
25
26 Otherwise, say N.
27
28config MCA
29 bool
30 help
31 MicroChannel Architecture is found in some IBM PS/2 machines and
32 laptops. It is a bus system similar to PCI or ISA. See
33 <file:Documentation/mca.txt> (and especially the web page given
34 there) before attempting to build an MCA bus kernel.
35
36config PCMCIA
37 tristate
38 ---help---
39 Say Y here if you want to attach PCMCIA- or PC-cards to your Linux
40 computer. These are credit-card size devices such as network cards,
41 modems or hard drives often used with laptops computers. There are
42 actually two varieties of these cards: the older 16 bit PCMCIA cards
43 and the newer 32 bit CardBus cards. If you want to use CardBus
44 cards, you need to say Y here and also to "CardBus support" below.
45
46 To use your PC-cards, you will need supporting software from David
47 Hinds' pcmcia-cs package (see the file <file:Documentation/Changes>
48 for location). Please also read the PCMCIA-HOWTO, available from
49 <http://www.tldp.org/docs.html#howto>.
50
51 To compile this driver as modules, choose M here: the
52 modules will be called pcmcia_core and ds.
53
54config AMIGA
55 bool "Amiga support"
56 select MMU_MOTOROLA if MMU
57 help
58 This option enables support for the Amiga series of computers. If
59 you plan to use this kernel on an Amiga, say Y here and browse the
60 material available in <file:Documentation/m68k>; otherwise say N.
61
62config ATARI
63 bool "Atari support"
64 select MMU_MOTOROLA if MMU
65 help
66 This option enables support for the 68000-based Atari series of
67 computers (including the TT, Falcon and Medusa). If you plan to use
68 this kernel on an Atari, say Y here and browse the material
69 available in <file:Documentation/m68k>; otherwise say N.
70
71config MAC
72 bool "Macintosh support"
73 select MMU_MOTOROLA if MMU
74 help
75 This option enables support for the Apple Macintosh series of
76 computers (yes, there is experimental support now, at least for part
77 of the series).
78
79 Say N unless you're willing to code the remaining necessary support.
80 ;)
81
82config NUBUS
83 bool
84 depends on MAC
85 default y
86
87config M68K_L2_CACHE
88 bool
89 depends on MAC
90 default y
91
92config APOLLO
93 bool "Apollo support"
94 select MMU_MOTOROLA if MMU
95 help
96 Say Y here if you want to run Linux on an MC680x0-based Apollo
97 Domain workstation such as the DN3500.
98
99config VME
100 bool "VME (Motorola and BVM) support"
101 select MMU_MOTOROLA if MMU
102 help
103 Say Y here if you want to build a kernel for a 680x0 based VME
104 board. Boards currently supported include Motorola boards MVME147,
105 MVME162, MVME166, MVME167, MVME172, and MVME177. BVME4000 and
106 BVME6000 boards from BVM Ltd are also supported.
107
108config MVME147
109 bool "MVME147 support"
110 depends on VME
111 help
112 Say Y to include support for early Motorola VME boards. This will
113 build a kernel which can run on MVME147 single-board computers. If
114 you select this option you will have to select the appropriate
115 drivers for SCSI, Ethernet and serial ports later on.
116
117config MVME16x
118 bool "MVME162, 166 and 167 support"
119 depends on VME
120 help
121 Say Y to include support for Motorola VME boards. This will build a
122 kernel which can run on MVME162, MVME166, MVME167, MVME172, and
123 MVME177 boards. If you select this option you will have to select
124 the appropriate drivers for SCSI, Ethernet and serial ports later
125 on.
126
127config BVME6000
128 bool "BVME4000 and BVME6000 support"
129 depends on VME
130 help
131 Say Y to include support for VME boards from BVM Ltd. This will
132 build a kernel which can run on BVME4000 and BVME6000 boards. If
133 you select this option you will have to select the appropriate
134 drivers for SCSI, Ethernet and serial ports later on.
135
136config HP300
137 bool "HP9000/300 and HP9000/400 support"
138 select MMU_MOTOROLA if MMU
139 help
140 This option enables support for the HP9000/300 and HP9000/400 series
141 of workstations. Support for these machines is still somewhat
142 experimental. If you plan to try to use the kernel on such a machine
143 say Y here.
144 Everybody else says N.
145
146config DIO
147 bool "DIO bus support"
148 depends on HP300
149 default y
150 help
151 Say Y here to enable support for the "DIO" expansion bus used in
152 HP300 machines. If you are using such a system you almost certainly
153 want this.
154
155config SUN3X
156 bool "Sun3x support"
157 select MMU_MOTOROLA if MMU
158 select M68030
159 help
160 This option enables support for the Sun 3x series of workstations.
161 Be warned that this support is very experimental.
162 Note that Sun 3x kernels are not compatible with Sun 3 hardware.
163 General Linux information on the Sun 3x series (now discontinued)
164 is at <http://www.angelfire.com/ca2/tech68k/sun3.html>.
165
166 If you don't want to compile a kernel for a Sun 3x, say N.
167
168config Q40
169 bool "Q40/Q60 support"
170 select MMU_MOTOROLA if MMU
171 help
172 The Q40 is a Motorola 68040-based successor to the Sinclair QL
173 manufactured in Germany. There is an official Q40 home page at
174 <http://www.q40.de/>. This option enables support for the Q40 and
175 Q60. Select your CPU below. For 68LC060 don't forget to enable FPU
176 emulation.
177
178config SUN3
179 bool "Sun3 support"
180 depends on !MMU_MOTOROLA
181 select MMU_SUN3 if MMU
182 select M68020
183 help
184 This option enables support for the Sun 3 series of workstations
185 (3/50, 3/60, 3/1xx, 3/2xx systems). Enabling this option requires
186 that all other hardware types must be disabled, as Sun 3 kernels
187 are incompatible with all other m68k targets (including Sun 3x!).
188
189 If you don't want to compile a kernel exclusively for a Sun 3, say N.
190
191config NATFEAT
192 bool "ARAnyM emulator support"
193 depends on ATARI
194 help
195 This option enables support for ARAnyM native features, such as
196 access to a disk image as /dev/hda.
197
198config NFBLOCK
199 tristate "NatFeat block device support"
200 depends on BLOCK && NATFEAT
201 help
202 Say Y to include support for the ARAnyM NatFeat block device
203 which allows direct access to the hard drives without using
204 the hardware emulation.
205
206config NFCON
207 tristate "NatFeat console driver"
208 depends on NATFEAT
209 help
210 Say Y to include support for the ARAnyM NatFeat console driver
211 which allows the console output to be redirected to the stderr
212 output of ARAnyM.
213
214config NFETH
215 tristate "NatFeat Ethernet support"
216 depends on NET_ETHERNET && NATFEAT
217 help
218 Say Y to include support for the ARAnyM NatFeat network device
219 which will emulate a regular ethernet device while presenting an
220 ethertap device to the host system.
221
222comment "Processor type"
223
224config M68020
225 bool "68020 support"
226 help
227 If you anticipate running this kernel on a computer with a MC68020
228 processor, say Y. Otherwise, say N. Note that the 68020 requires a
229 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
230 Sun 3, which provides its own version.
231
232config M68030
233 bool "68030 support"
234 depends on !MMU_SUN3
235 help
236 If you anticipate running this kernel on a computer with a MC68030
237 processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
238 work, as it does not include an MMU (Memory Management Unit).
239
240config M68040
241 bool "68040 support"
242 depends on !MMU_SUN3
243 help
244 If you anticipate running this kernel on a computer with a MC68LC040
245 or MC68040 processor, say Y. Otherwise, say N. Note that an
246 MC68EC040 will not work, as it does not include an MMU (Memory
247 Management Unit).
248
249config M68060
250 bool "68060 support"
251 depends on !MMU_SUN3
252 help
253 If you anticipate running this kernel on a computer with a MC68060
254 processor, say Y. Otherwise, say N.
255
256config MMU_MOTOROLA
257 bool
258
259config MMU_SUN3
260 bool
261 depends on MMU && !MMU_MOTOROLA
262
263config M68KFPU_EMU
264 bool "Math emulation support (EXPERIMENTAL)"
265 depends on EXPERIMENTAL
266 help
267 At some point in the future, this will cause floating-point math
268 instructions to be emulated by the kernel on machines that lack a
269 floating-point math coprocessor. Thrill-seekers and chronically
270 sleep-deprived psychotic hacker types can say Y now, everyone else
271 should probably wait a while.
272
273config M68KFPU_EMU_EXTRAPREC
274 bool "Math emulation extra precision"
275 depends on M68KFPU_EMU
276 help
277 The fpu uses normally a few bit more during calculations for
278 correct rounding, the emulator can (often) do the same but this
279 extra calculation can cost quite some time, so you can disable
280 it here. The emulator will then "only" calculate with a 64 bit
281 mantissa and round slightly incorrect, what is more than enough
282 for normal usage.
283
284config M68KFPU_EMU_ONLY
285 bool "Math emulation only kernel"
286 depends on M68KFPU_EMU
287 help
288 This option prevents any floating-point instructions from being
289 compiled into the kernel, thereby the kernel doesn't save any
290 floating point context anymore during task switches, so this
291 kernel will only be usable on machines without a floating-point
292 math coprocessor. This makes the kernel a bit faster as no tests
293 needs to be executed whether a floating-point instruction in the
294 kernel should be executed or not.
295
296config ADVANCED
297 bool "Advanced configuration options"
298 ---help---
299 This gives you access to some advanced options for the CPU. The
300 defaults should be fine for most users, but these options may make
301 it possible for you to improve performance somewhat if you know what
302 you are doing.
303
304 Note that the answer to this question won't directly affect the
305 kernel: saying N will just cause the configurator to skip all
306 the questions about these options.
307
308 Most users should say N to this question.
309
310config RMW_INSNS
311 bool "Use read-modify-write instructions"
312 depends on ADVANCED
313 ---help---
314 This allows to use certain instructions that work with indivisible
315 read-modify-write bus cycles. While this is faster than the
316 workaround of disabling interrupts, it can conflict with DMA
317 ( = direct memory access) on many Amiga systems, and it is also said
318 to destabilize other machines. It is very likely that this will
319 cause serious problems on any Amiga or Atari Medusa if set. The only
320 configuration where it should work are 68030-based Ataris, where it
321 apparently improves performance. But you've been warned! Unless you
322 really know what you are doing, say N. Try Y only if you're quite
323 adventurous.
324
325config SINGLE_MEMORY_CHUNK
326 bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
327 default y if SUN3
328 select NEED_MULTIPLE_NODES
329 help
330 Ignore all but the first contiguous chunk of physical memory for VM
331 purposes. This will save a few bytes kernel size and may speed up
332 some operations. Say N if not sure.
333
334config 060_WRITETHROUGH
335 bool "Use write-through caching for 68060 supervisor accesses"
336 depends on ADVANCED && M68060
337 ---help---
338 The 68060 generally uses copyback caching of recently accessed data.
339 Copyback caching means that memory writes will be held in an on-chip
340 cache and only written back to memory some time later. Saying Y
341 here will force supervisor (kernel) accesses to use writethrough
342 caching. Writethrough caching means that data is written to memory
343 straight away, so that cache and memory data always agree.
344 Writethrough caching is less efficient, but is needed for some
345 drivers on 68060 based systems where the 68060 bus snooping signal
346 is hardwired on. The 53c710 SCSI driver is known to suffer from
347 this problem.
348
349config ARCH_DISCONTIGMEM_ENABLE
350 def_bool !SINGLE_MEMORY_CHUNK
351
352config NODES_SHIFT
353 int
354 default "3"
355 depends on !SINGLE_MEMORY_CHUNK
356
357config ZORRO
358 bool "Amiga Zorro (AutoConfig) bus support"
359 depends on AMIGA
360 help
361 This enables support for the Zorro bus in the Amiga. If you have
362 expansion cards in your Amiga that conform to the Amiga
363 AutoConfig(tm) specification, say Y, otherwise N. Note that even
364 expansion cards that do not fit in the Zorro slots but fit in e.g.
365 the CPU slot may fall in this category, so you have to say Y to let
366 Linux use these.
367
368config AMIGA_PCMCIA
369 bool "Amiga 1200/600 PCMCIA support (EXPERIMENTAL)"
370 depends on AMIGA && EXPERIMENTAL
371 help
372 Include support in the kernel for pcmcia on Amiga 1200 and Amiga
373 600. If you intend to use pcmcia cards say Y; otherwise say N.
374
375config STRAM_PROC
376 bool "ST-RAM statistics in /proc"
377 depends on ATARI
378 help
379 Say Y here to report ST-RAM usage statistics in /proc/stram.
380
381config HEARTBEAT
382 bool "Use power LED as a heartbeat" if AMIGA || APOLLO || ATARI || MAC ||Q40
383 default y if !AMIGA && !APOLLO && !ATARI && !MAC && !Q40 && HP300
384 help
385 Use the power-on LED on your machine as a load meter. The exact
386 behavior is platform-dependent, but normally the flash frequency is
387 a hyperbolic function of the 5-minute load average.
388
389# We have a dedicated heartbeat LED. :-)
390config PROC_HARDWARE
391 bool "/proc/hardware support"
392 help
393 Say Y here to support the /proc/hardware file, which gives you
394 access to information about the machine you're running on,
395 including the model, CPU, MMU, clock speed, BogoMIPS rating,
396 and memory size.
397
398config ISA
399 bool
400 depends on Q40 || AMIGA_PCMCIA
401 default y
402 help
403 Find out whether you have ISA slots on your motherboard. ISA is the
404 name of a bus system, i.e. the way the CPU talks to the other stuff
405 inside your box. Other bus systems are PCI, EISA, MicroChannel
406 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
407 newer boards don't support it. If you have ISA, say Y, otherwise N.
408
409config GENERIC_ISA_DMA
410 bool
411 depends on Q40 || AMIGA_PCMCIA
412 default y
413
414source "drivers/pci/Kconfig"
415
416source "drivers/zorro/Kconfig"
417
diff --git a/arch/m68k/Kconfig.nommu b/arch/m68k/Kconfig.nommu
new file mode 100644
index 000000000000..273bccab9517
--- /dev/null
+++ b/arch/m68k/Kconfig.nommu
@@ -0,0 +1,750 @@
1config FPU
2 bool
3 default n
4
5config GENERIC_FIND_NEXT_BIT
6 bool
7 default y
8
9config GENERIC_GPIO
10 bool
11 default n
12
13config GENERIC_CMOS_UPDATE
14 bool
15 default y
16
17config GENERIC_CLOCKEVENTS
18 bool
19 default n
20
21config COLDFIRE_SW_A7
22 bool
23 default n
24
25config HAVE_CACHE_SPLIT
26 bool
27
28config HAVE_CACHE_CB
29 bool
30
31config HAVE_MBAR
32 bool
33
34config HAVE_IPSBAR
35 bool
36
37choice
38 prompt "CPU"
39 default M68EZ328
40
41config M68328
42 bool "MC68328"
43 help
44 Motorola 68328 processor support.
45
46config M68EZ328
47 bool "MC68EZ328"
48 help
49 Motorola 68EX328 processor support.
50
51config M68VZ328
52 bool "MC68VZ328"
53 help
54 Motorola 68VZ328 processor support.
55
56config M68360
57 bool "MC68360"
58 help
59 Motorola 68360 processor support.
60
61config M5206
62 bool "MCF5206"
63 select COLDFIRE_SW_A7
64 select HAVE_MBAR
65 help
66 Motorola ColdFire 5206 processor support.
67
68config M5206e
69 bool "MCF5206e"
70 select COLDFIRE_SW_A7
71 select HAVE_MBAR
72 help
73 Motorola ColdFire 5206e processor support.
74
75config M520x
76 bool "MCF520x"
77 select GENERIC_CLOCKEVENTS
78 select HAVE_CACHE_SPLIT
79 help
80 Freescale Coldfire 5207/5208 processor support.
81
82config M523x
83 bool "MCF523x"
84 select GENERIC_CLOCKEVENTS
85 select HAVE_CACHE_SPLIT
86 select HAVE_IPSBAR
87 help
88 Freescale Coldfire 5230/1/2/4/5 processor support
89
90config M5249
91 bool "MCF5249"
92 select COLDFIRE_SW_A7
93 select HAVE_MBAR
94 help
95 Motorola ColdFire 5249 processor support.
96
97config M5271
98 bool "MCF5271"
99 select HAVE_CACHE_SPLIT
100 select HAVE_IPSBAR
101 help
102 Freescale (Motorola) ColdFire 5270/5271 processor support.
103
104config M5272
105 bool "MCF5272"
106 select COLDFIRE_SW_A7
107 select HAVE_MBAR
108 help
109 Motorola ColdFire 5272 processor support.
110
111config M5275
112 bool "MCF5275"
113 select HAVE_CACHE_SPLIT
114 select HAVE_IPSBAR
115 help
116 Freescale (Motorola) ColdFire 5274/5275 processor support.
117
118config M528x
119 bool "MCF528x"
120 select GENERIC_CLOCKEVENTS
121 select HAVE_CACHE_SPLIT
122 select HAVE_IPSBAR
123 help
124 Motorola ColdFire 5280/5282 processor support.
125
126config M5307
127 bool "MCF5307"
128 select COLDFIRE_SW_A7
129 select HAVE_CACHE_CB
130 select HAVE_MBAR
131 help
132 Motorola ColdFire 5307 processor support.
133
134config M532x
135 bool "MCF532x"
136 select HAVE_CACHE_CB
137 help
138 Freescale (Motorola) ColdFire 532x processor support.
139
140config M5407
141 bool "MCF5407"
142 select COLDFIRE_SW_A7
143 select HAVE_CACHE_CB
144 select HAVE_MBAR
145 help
146 Motorola ColdFire 5407 processor support.
147
148config M547x
149 bool "MCF547x"
150 select HAVE_CACHE_CB
151 select HAVE_MBAR
152 help
153 Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
154
155config M548x
156 bool "MCF548x"
157 select HAVE_CACHE_CB
158 select HAVE_MBAR
159 help
160 Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
161
162endchoice
163
164config M527x
165 bool
166 depends on (M5271 || M5275)
167 select GENERIC_CLOCKEVENTS
168 default y
169
170config M54xx
171 bool
172 depends on (M548x || M547x)
173 default y
174
175config COLDFIRE
176 bool
177 depends on (M5206 || M5206e || M520x || M523x || M5249 || M527x || M5272 || M528x || M5307 || M532x || M5407 || M54xx)
178 select GENERIC_GPIO
179 select ARCH_REQUIRE_GPIOLIB
180 default y
181
182config CLOCK_SET
183 bool "Enable setting the CPU clock frequency"
184 default n
185 help
186 On some CPU's you do not need to know what the core CPU clock
187 frequency is. On these you can disable clock setting. On some
188 traditional 68K parts, and on all ColdFire parts you need to set
189 the appropriate CPU clock frequency. On these devices many of the
190 onboard peripherals derive their timing from the master CPU clock
191 frequency.
192
193config CLOCK_FREQ
194 int "Set the core clock frequency"
195 default "66666666"
196 depends on CLOCK_SET
197 help
198 Define the CPU clock frequency in use. This is the core clock
199 frequency, it may or may not be the same as the external clock
200 crystal fitted to your board. Some processors have an internal
201 PLL and can have their frequency programmed at run time, others
202 use internal dividers. In general the kernel won't setup a PLL
203 if it is fitted (there are some exceptions). This value will be
204 specific to the exact CPU that you are using.
205
206config OLDMASK
207 bool "Old mask 5307 (1H55J) silicon"
208 depends on M5307
209 help
210 Build support for the older revision ColdFire 5307 silicon.
211 Specifically this is the 1H55J mask revision.
212
213if HAVE_CACHE_SPLIT
214choice
215 prompt "Split Cache Configuration"
216 default CACHE_I
217
218config CACHE_I
219 bool "Instruction"
220 help
221 Use all of the ColdFire CPU cache memory as an instruction cache.
222
223config CACHE_D
224 bool "Data"
225 help
226 Use all of the ColdFire CPU cache memory as a data cache.
227
228config CACHE_BOTH
229 bool "Both"
230 help
231 Split the ColdFire CPU cache, and use half as an instruction cache
232 and half as a data cache.
233endchoice
234endif
235
236if HAVE_CACHE_CB
237choice
238 prompt "Data cache mode"
239 default CACHE_WRITETHRU
240
241config CACHE_WRITETHRU
242 bool "Write-through"
243 help
244 The ColdFire CPU cache is set into Write-through mode.
245
246config CACHE_COPYBACK
247 bool "Copy-back"
248 help
249 The ColdFire CPU cache is set into Copy-back mode.
250endchoice
251endif
252
253comment "Platform"
254
255config PILOT3
256 bool "Pilot 1000/5000, PalmPilot Personal/Pro, or PalmIII support"
257 depends on M68328
258 help
259 Support for the Palm Pilot 1000/5000, Personal/Pro and PalmIII.
260
261config XCOPILOT_BUGS
262 bool "(X)Copilot support"
263 depends on PILOT3
264 help
265 Support the bugs of Xcopilot.
266
267config UC5272
268 bool 'Arcturus Networks uC5272 dimm board support'
269 depends on M5272
270 help
271 Support for the Arcturus Networks uC5272 dimm board.
272
273config UC5282
274 bool "Arcturus Networks uC5282 board support"
275 depends on M528x
276 help
277 Support for the Arcturus Networks uC5282 dimm board.
278
279config UCSIMM
280 bool "uCsimm module support"
281 depends on M68EZ328
282 help
283 Support for the Arcturus Networks uCsimm module.
284
285config UCDIMM
286 bool "uDsimm module support"
287 depends on M68VZ328
288 help
289 Support for the Arcturus Networks uDsimm module.
290
291config DRAGEN2
292 bool "DragenEngine II board support"
293 depends on M68VZ328
294 help
295 Support for the DragenEngine II board.
296
297config DIRECT_IO_ACCESS
298 bool "Allow user to access IO directly"
299 depends on (UCSIMM || UCDIMM || DRAGEN2)
300 help
301 Disable the CPU internal registers protection in user mode,
302 to allow a user application to read/write them.
303
304config INIT_LCD
305 bool "Initialize LCD"
306 depends on (UCSIMM || UCDIMM || DRAGEN2)
307 help
308 Initialize the LCD controller of the 68x328 processor.
309
310config MEMORY_RESERVE
311 int "Memory reservation (MiB)"
312 depends on (UCSIMM || UCDIMM)
313 help
314 Reserve certain memory regions on 68x328 based boards.
315
316config UCQUICC
317 bool "Lineo uCquicc board support"
318 depends on M68360
319 help
320 Support for the Lineo uCquicc board.
321
322config ARN5206
323 bool "Arnewsh 5206 board support"
324 depends on M5206
325 help
326 Support for the Arnewsh 5206 board.
327
328config M5206eC3
329 bool "Motorola M5206eC3 board support"
330 depends on M5206e
331 help
332 Support for the Motorola M5206eC3 board.
333
334config ELITE
335 bool "Motorola M5206eLITE board support"
336 depends on M5206e
337 help
338 Support for the Motorola M5206eLITE board.
339
340config M5208EVB
341 bool "Freescale M5208EVB board support"
342 depends on M520x
343 help
344 Support for the Freescale Coldfire M5208EVB.
345
346config M5235EVB
347 bool "Freescale M5235EVB support"
348 depends on M523x
349 help
350 Support for the Freescale M5235EVB board.
351
352config M5249C3
353 bool "Motorola M5249C3 board support"
354 depends on M5249
355 help
356 Support for the Motorola M5249C3 board.
357
358config M5271EVB
359 bool "Freescale (Motorola) M5271EVB board support"
360 depends on M5271
361 help
362 Support for the Freescale (Motorola) M5271EVB board.
363
364config M5275EVB
365 bool "Freescale (Motorola) M5275EVB board support"
366 depends on M5275
367 help
368 Support for the Freescale (Motorola) M5275EVB board.
369
370config M5272C3
371 bool "Motorola M5272C3 board support"
372 depends on M5272
373 help
374 Support for the Motorola M5272C3 board.
375
376config COBRA5272
377 bool "senTec COBRA5272 board support"
378 depends on M5272
379 help
380 Support for the senTec COBRA5272 board.
381
382config AVNET5282
383 bool "Avnet 5282 board support"
384 depends on M528x
385 help
386 Support for the Avnet 5282 board.
387
388config M5282EVB
389 bool "Motorola M5282EVB board support"
390 depends on M528x
391 help
392 Support for the Motorola M5282EVB board.
393
394config COBRA5282
395 bool "senTec COBRA5282 board support"
396 depends on M528x
397 help
398 Support for the senTec COBRA5282 board.
399
400config SOM5282EM
401 bool "EMAC.Inc SOM5282EM board support"
402 depends on M528x
403 help
404 Support for the EMAC.Inc SOM5282EM module.
405
406config WILDFIRE
407 bool "Intec Automation Inc. WildFire board support"
408 depends on M528x
409 help
410 Support for the Intec Automation Inc. WildFire.
411
412config WILDFIREMOD
413 bool "Intec Automation Inc. WildFire module support"
414 depends on M528x
415 help
416 Support for the Intec Automation Inc. WildFire module.
417
418config ARN5307
419 bool "Arnewsh 5307 board support"
420 depends on M5307
421 help
422 Support for the Arnewsh 5307 board.
423
424config M5307C3
425 bool "Motorola M5307C3 board support"
426 depends on M5307
427 help
428 Support for the Motorola M5307C3 board.
429
430config SECUREEDGEMP3
431 bool "SnapGear SecureEdge/MP3 platform support"
432 depends on M5307
433 help
434 Support for the SnapGear SecureEdge/MP3 platform.
435
436config M5329EVB
437 bool "Freescale (Motorola) M5329EVB board support"
438 depends on M532x
439 help
440 Support for the Freescale (Motorola) M5329EVB board.
441
442config COBRA5329
443 bool "senTec COBRA5329 board support"
444 depends on M532x
445 help
446 Support for the senTec COBRA5329 board.
447
448config M5407C3
449 bool "Motorola M5407C3 board support"
450 depends on M5407
451 help
452 Support for the Motorola M5407C3 board.
453
454config FIREBEE
455 bool "FireBee board support"
456 depends on M547x
457 help
458 Support for the FireBee ColdFire 5475 based board.
459
460config CLEOPATRA
461 bool "Feith CLEOPATRA board support"
462 depends on (M5307 || M5407)
463 help
464 Support for the Feith Cleopatra boards.
465
466config CANCam
467 bool "Feith CANCam board support"
468 depends on M5272
469 help
470 Support for the Feith CANCam board.
471
472config SCALES
473 bool "Feith SCALES board support"
474 depends on M5272
475 help
476 Support for the Feith SCALES board.
477
478config NETtel
479 bool "SecureEdge/NETtel board support"
480 depends on (M5206e || M5272 || M5307)
481 help
482 Support for the SnapGear NETtel/SecureEdge/SnapGear boards.
483
484config SNAPGEAR
485 bool "SnapGear router board support"
486 depends on NETtel
487 help
488 Special additional support for SnapGear router boards.
489
490config CPU16B
491 bool "Sneha Technologies S.L. Sarasvati board support"
492 depends on M5272
493 help
494 Support for the SNEHA CPU16B board.
495
496config MOD5272
497 bool "Netburner MOD-5272 board support"
498 depends on M5272
499 help
500 Support for the Netburner MOD-5272 board.
501
502config SAVANTrosie1
503 bool "Savant Rosie1 board support"
504 depends on M523x
505 help
506 Support for the Savant Rosie1 board.
507
508config ROMFS_FROM_ROM
509 bool "ROMFS image not RAM resident"
510 depends on (NETtel || SNAPGEAR)
511 help
512 The ROMfs filesystem will stay resident in the FLASH/ROM, not be
513 moved into RAM.
514
515config PILOT
516 bool
517 default y
518 depends on (PILOT3 || PILOT5)
519
520config ARNEWSH
521 bool
522 default y
523 depends on (ARN5206 || ARN5307)
524
525config FREESCALE
526 bool
527 default y
528 depends on (M5206eC3 || M5208EVB || M5235EVB || M5249C3 || M5271EVB || M5272C3 || M5275EVB || M5282EVB || M5307C3 || M5329EVB || M5407C3)
529
530config HW_FEITH
531 bool
532 default y
533 depends on (CLEOPATRA || CANCam || SCALES)
534
535config senTec
536 bool
537 default y
538 depends on (COBRA5272 || COBRA5282)
539
540config EMAC_INC
541 bool
542 default y
543 depends on (SOM5282EM)
544
545config SNEHA
546 bool
547 default y
548 depends on CPU16B
549
550config SAVANT
551 bool
552 default y
553 depends on SAVANTrosie1
554
555config AVNET
556 bool
557 default y
558 depends on (AVNET5282)
559
560config UBOOT
561 bool "Support for U-Boot command line parameters"
562 help
563 If you say Y here kernel will try to collect command
564 line parameters from the initial u-boot stack.
565 default n
566
567config 4KSTACKS
568 bool "Use 4Kb for kernel stacks instead of 8Kb"
569 default y
570 help
571 If you say Y here the kernel will use a 4Kb stacksize for the
572 kernel stack attached to each process/thread. This facilitates
573 running more threads on a system and also reduces the pressure
574 on the VM subsystem for higher order allocations.
575
576comment "RAM configuration"
577
578config RAMBASE
579 hex "Address of the base of RAM"
580 default "0"
581 help
582 Define the address that RAM starts at. On many platforms this is
583 0, the base of the address space. And this is the default. Some
584 platforms choose to setup their RAM at other addresses within the
585 processor address space.
586
587config RAMSIZE
588 hex "Size of RAM (in bytes), or 0 for automatic"
589 default "0x400000"
590 help
591 Define the size of the system RAM. If you select 0 then the
592 kernel will try to probe the RAM size at runtime. This is not
593 supported on all CPU types.
594
595config VECTORBASE
596 hex "Address of the base of system vectors"
597 default "0"
598 help
599 Define the address of the system vectors. Commonly this is
600 put at the start of RAM, but it doesn't have to be. On ColdFire
601 platforms this address is programmed into the VBR register, thus
602 actually setting the address to use.
603
604config MBAR
605 hex "Address of the MBAR (internal peripherals)"
606 default "0x10000000"
607 depends on HAVE_MBAR
608 help
609 Define the address of the internal system peripherals. This value
610 is set in the processors MBAR register. This is generally setup by
611 the boot loader, and will not be written by the kernel. By far most
612 ColdFire boards use the default 0x10000000 value, so if unsure then
613 use this.
614
615config IPSBAR
616 hex "Address of the IPSBAR (internal peripherals)"
617 default "0x40000000"
618 depends on HAVE_IPSBAR
619 help
620 Define the address of the internal system peripherals. This value
621 is set in the processors IPSBAR register. This is generally setup by
622 the boot loader, and will not be written by the kernel. By far most
623 ColdFire boards use the default 0x40000000 value, so if unsure then
624 use this.
625
626config KERNELBASE
627 hex "Address of the base of kernel code"
628 default "0x400"
629 help
630 Typically on m68k systems the kernel will not start at the base
631 of RAM, but usually some small offset from it. Define the start
632 address of the kernel here. The most common setup will have the
633 processor vectors at the base of RAM and then the start of the
634 kernel. On some platforms some RAM is reserved for boot loaders
635 and the kernel starts after that. The 0x400 default was based on
636 a system with the RAM based at address 0, and leaving enough room
637 for the theoretical maximum number of 256 vectors.
638
639choice
640 prompt "RAM bus width"
641 default RAMAUTOBIT
642
643config RAMAUTOBIT
644 bool "AUTO"
645 help
646 Select the physical RAM data bus size. Not needed on most platforms,
647 so you can generally choose AUTO.
648
649config RAM8BIT
650 bool "8bit"
651 help
652 Configure RAM bus to be 8 bits wide.
653
654config RAM16BIT
655 bool "16bit"
656 help
657 Configure RAM bus to be 16 bits wide.
658
659config RAM32BIT
660 bool "32bit"
661 help
662 Configure RAM bus to be 32 bits wide.
663
664endchoice
665
666comment "ROM configuration"
667
668config ROM
669 bool "Specify ROM linker regions"
670 default n
671 help
672 Define a ROM region for the linker script. This creates a kernel
673 that can be stored in flash, with possibly the text, and data
674 regions being copied out to RAM at startup.
675
676config ROMBASE
677 hex "Address of the base of ROM device"
678 default "0"
679 depends on ROM
680 help
681 Define the address that the ROM region starts at. Some platforms
682 use this to set their chip select region accordingly for the boot
683 device.
684
685config ROMVEC
686 hex "Address of the base of the ROM vectors"
687 default "0"
688 depends on ROM
689 help
690 This is almost always the same as the base of the ROM. Since on all
691 68000 type variants the vectors are at the base of the boot device
692 on system startup.
693
694config ROMVECSIZE
695 hex "Size of ROM vector region (in bytes)"
696 default "0x400"
697 depends on ROM
698 help
699 Define the size of the vector region in ROM. For most 68000
700 variants this would be 0x400 bytes in size. Set to 0 if you do
701 not want a vector region at the start of the ROM.
702
703config ROMSTART
704 hex "Address of the base of system image in ROM"
705 default "0x400"
706 depends on ROM
707 help
708 Define the start address of the system image in ROM. Commonly this
709 is strait after the ROM vectors.
710
711config ROMSIZE
712 hex "Size of the ROM device"
713 default "0x100000"
714 depends on ROM
715 help
716 Size of the ROM device. On some platforms this is used to setup
717 the chip select that controls the boot ROM device.
718
719choice
720 prompt "Kernel executes from"
721 ---help---
722 Choose the memory type that the kernel will be running in.
723
724config RAMKERNEL
725 bool "RAM"
726 help
727 The kernel will be resident in RAM when running.
728
729config ROMKERNEL
730 bool "ROM"
731 help
732 The kernel will be resident in FLASH/ROM when running. This is
733 often referred to as Execute-in-Place (XIP), since the kernel
734 code executes from the position it is stored in the FLASH/ROM.
735
736endchoice
737
738if COLDFIRE
739source "kernel/Kconfig.preempt"
740endif
741
742source "kernel/time/Kconfig"
743
744config ISA_DMA_API
745 bool
746 depends on !M5272
747 default y
748
749source "drivers/pcmcia/Kconfig"
750
diff --git a/arch/m68k/Makefile b/arch/m68k/Makefile
index b793163abc61..be46cadd4017 100644
--- a/arch/m68k/Makefile
+++ b/arch/m68k/Makefile
@@ -1,123 +1,7 @@
1#
2# m68k/Makefile
3#
4# This file is included by the global makefile so that you can add your own
5# architecture-specific flags and dependencies. Remember to do have actions
6# for "archclean" and "archdep" for cleaning up and making dependencies for
7# this architecture
8#
9# This file is subject to the terms and conditions of the GNU General Public
10# License. See the file "COPYING" in the main directory of this archive
11# for more details.
12#
13# Copyright (C) 1994 by Hamish Macdonald
14#
15
16KBUILD_DEFCONFIG := multi_defconfig 1KBUILD_DEFCONFIG := multi_defconfig
17 2
18# override top level makefile 3ifdef CONFIG_MMU
19AS += -m68020 4include $(srctree)/arch/m68k/Makefile_mm
20LDFLAGS := -m m68kelf
21KBUILD_LDFLAGS_MODULE += -T $(srctree)/arch/m68k/kernel/module.lds
22ifneq ($(SUBARCH),$(ARCH))
23 ifeq ($(CROSS_COMPILE),)
24 CROSS_COMPILE := $(call cc-cross-prefix, \
25 m68k-linux-gnu- m68k-linux- m68k-unknown-linux-gnu-)
26 endif
27endif
28
29ifdef CONFIG_SUN3
30LDFLAGS_vmlinux = -N
31endif
32
33CHECKFLAGS += -D__mc68000__
34
35# without -fno-strength-reduce the 53c7xx.c driver fails ;-(
36KBUILD_CFLAGS += -pipe -fno-strength-reduce -ffixed-a2
37
38# enable processor switch if compiled only for a single cpu
39ifndef CONFIG_M68020
40ifndef CONFIG_M68030
41
42ifndef CONFIG_M68060
43KBUILD_CFLAGS += -m68040
44endif
45
46ifndef CONFIG_M68040
47KBUILD_CFLAGS += -m68060
48endif
49
50endif
51endif
52
53ifdef CONFIG_KGDB
54# If configured for kgdb support, include debugging infos and keep the
55# frame pointer
56KBUILD_CFLAGS := $(subst -fomit-frame-pointer,,$(KBUILD_CFLAGS)) -g
57endif
58
59ifndef CONFIG_SUN3
60head-y := arch/m68k/kernel/head.o
61else 5else
62head-y := arch/m68k/kernel/sun3-head.o 6include $(srctree)/arch/m68k/Makefile_no
63endif 7endif
64
65core-y += arch/m68k/kernel/ arch/m68k/mm/
66libs-y += arch/m68k/lib/
67
68core-$(CONFIG_Q40) += arch/m68k/q40/
69core-$(CONFIG_AMIGA) += arch/m68k/amiga/
70core-$(CONFIG_ATARI) += arch/m68k/atari/
71core-$(CONFIG_MAC) += arch/m68k/mac/
72core-$(CONFIG_HP300) += arch/m68k/hp300/
73core-$(CONFIG_APOLLO) += arch/m68k/apollo/
74core-$(CONFIG_MVME147) += arch/m68k/mvme147/
75core-$(CONFIG_MVME16x) += arch/m68k/mvme16x/
76core-$(CONFIG_BVME6000) += arch/m68k/bvme6000/
77core-$(CONFIG_SUN3X) += arch/m68k/sun3x/ arch/m68k/sun3/
78core-$(CONFIG_SUN3) += arch/m68k/sun3/ arch/m68k/sun3/prom/
79core-$(CONFIG_NATFEAT) += arch/m68k/emu/
80core-$(CONFIG_M68040) += arch/m68k/fpsp040/
81core-$(CONFIG_M68060) += arch/m68k/ifpsp060/
82core-$(CONFIG_M68KFPU_EMU) += arch/m68k/math-emu/
83
84all: zImage
85
86lilo: vmlinux
87 if [ -f $(INSTALL_PATH)/vmlinux ]; then mv -f $(INSTALL_PATH)/vmlinux $(INSTALL_PATH)/vmlinux.old; fi
88 if [ -f $(INSTALL_PATH)/System.map ]; then mv -f $(INSTALL_PATH)/System.map $(INSTALL_PATH)/System.old; fi
89 cat vmlinux > $(INSTALL_PATH)/vmlinux
90 cp System.map $(INSTALL_PATH)/System.map
91 if [ -x /sbin/lilo ]; then /sbin/lilo; else /etc/lilo/install; fi
92
93zImage compressed: vmlinux.gz
94
95vmlinux.gz: vmlinux
96
97ifndef CONFIG_KGDB
98 cp vmlinux vmlinux.tmp
99 $(STRIP) vmlinux.tmp
100 gzip -9c vmlinux.tmp >vmlinux.gz
101 rm vmlinux.tmp
102else
103 gzip -9c vmlinux >vmlinux.gz
104endif
105
106bzImage: vmlinux.bz2
107
108vmlinux.bz2: vmlinux
109
110ifndef CONFIG_KGDB
111 cp vmlinux vmlinux.tmp
112 $(STRIP) vmlinux.tmp
113 bzip2 -1c vmlinux.tmp >vmlinux.bz2
114 rm vmlinux.tmp
115else
116 bzip2 -1c vmlinux >vmlinux.bz2
117endif
118
119archclean:
120 rm -f vmlinux.gz vmlinux.bz2
121
122install:
123 sh $(srctree)/arch/m68k/install.sh $(KERNELRELEASE) vmlinux.gz System.map "$(INSTALL_PATH)"
diff --git a/arch/m68k/Makefile_mm b/arch/m68k/Makefile_mm
new file mode 100644
index 000000000000..d449b6d5aecf
--- /dev/null
+++ b/arch/m68k/Makefile_mm
@@ -0,0 +1,121 @@
1#
2# m68k/Makefile
3#
4# This file is included by the global makefile so that you can add your own
5# architecture-specific flags and dependencies. Remember to do have actions
6# for "archclean" and "archdep" for cleaning up and making dependencies for
7# this architecture
8#
9# This file is subject to the terms and conditions of the GNU General Public
10# License. See the file "COPYING" in the main directory of this archive
11# for more details.
12#
13# Copyright (C) 1994 by Hamish Macdonald
14#
15
16# override top level makefile
17AS += -m68020
18LDFLAGS := -m m68kelf
19KBUILD_LDFLAGS_MODULE += -T $(srctree)/arch/m68k/kernel/module.lds
20ifneq ($(SUBARCH),$(ARCH))
21 ifeq ($(CROSS_COMPILE),)
22 CROSS_COMPILE := $(call cc-cross-prefix, \
23 m68k-linux-gnu- m68k-linux- m68k-unknown-linux-gnu-)
24 endif
25endif
26
27ifdef CONFIG_SUN3
28LDFLAGS_vmlinux = -N
29endif
30
31CHECKFLAGS += -D__mc68000__
32
33# without -fno-strength-reduce the 53c7xx.c driver fails ;-(
34KBUILD_CFLAGS += -pipe -fno-strength-reduce -ffixed-a2
35
36# enable processor switch if compiled only for a single cpu
37ifndef CONFIG_M68020
38ifndef CONFIG_M68030
39
40ifndef CONFIG_M68060
41KBUILD_CFLAGS += -m68040
42endif
43
44ifndef CONFIG_M68040
45KBUILD_CFLAGS += -m68060
46endif
47
48endif
49endif
50
51ifdef CONFIG_KGDB
52# If configured for kgdb support, include debugging infos and keep the
53# frame pointer
54KBUILD_CFLAGS := $(subst -fomit-frame-pointer,,$(KBUILD_CFLAGS)) -g
55endif
56
57ifndef CONFIG_SUN3
58head-y := arch/m68k/kernel/head.o
59else
60head-y := arch/m68k/kernel/sun3-head.o
61endif
62
63core-y += arch/m68k/kernel/ arch/m68k/mm/
64libs-y += arch/m68k/lib/
65
66core-$(CONFIG_Q40) += arch/m68k/q40/
67core-$(CONFIG_AMIGA) += arch/m68k/amiga/
68core-$(CONFIG_ATARI) += arch/m68k/atari/
69core-$(CONFIG_MAC) += arch/m68k/mac/
70core-$(CONFIG_HP300) += arch/m68k/hp300/
71core-$(CONFIG_APOLLO) += arch/m68k/apollo/
72core-$(CONFIG_MVME147) += arch/m68k/mvme147/
73core-$(CONFIG_MVME16x) += arch/m68k/mvme16x/
74core-$(CONFIG_BVME6000) += arch/m68k/bvme6000/
75core-$(CONFIG_SUN3X) += arch/m68k/sun3x/ arch/m68k/sun3/
76core-$(CONFIG_SUN3) += arch/m68k/sun3/ arch/m68k/sun3/prom/
77core-$(CONFIG_NATFEAT) += arch/m68k/emu/
78core-$(CONFIG_M68040) += arch/m68k/fpsp040/
79core-$(CONFIG_M68060) += arch/m68k/ifpsp060/
80core-$(CONFIG_M68KFPU_EMU) += arch/m68k/math-emu/
81
82all: zImage
83
84lilo: vmlinux
85 if [ -f $(INSTALL_PATH)/vmlinux ]; then mv -f $(INSTALL_PATH)/vmlinux $(INSTALL_PATH)/vmlinux.old; fi
86 if [ -f $(INSTALL_PATH)/System.map ]; then mv -f $(INSTALL_PATH)/System.map $(INSTALL_PATH)/System.old; fi
87 cat vmlinux > $(INSTALL_PATH)/vmlinux
88 cp System.map $(INSTALL_PATH)/System.map
89 if [ -x /sbin/lilo ]; then /sbin/lilo; else /etc/lilo/install; fi
90
91zImage compressed: vmlinux.gz
92
93vmlinux.gz: vmlinux
94
95ifndef CONFIG_KGDB
96 cp vmlinux vmlinux.tmp
97 $(STRIP) vmlinux.tmp
98 gzip -9c vmlinux.tmp >vmlinux.gz
99 rm vmlinux.tmp
100else
101 gzip -9c vmlinux >vmlinux.gz
102endif
103
104bzImage: vmlinux.bz2
105
106vmlinux.bz2: vmlinux
107
108ifndef CONFIG_KGDB
109 cp vmlinux vmlinux.tmp
110 $(STRIP) vmlinux.tmp
111 bzip2 -1c vmlinux.tmp >vmlinux.bz2
112 rm vmlinux.tmp
113else
114 bzip2 -1c vmlinux >vmlinux.bz2
115endif
116
117archclean:
118 rm -f vmlinux.gz vmlinux.bz2
119
120install:
121 sh $(srctree)/arch/m68k/install.sh $(KERNELRELEASE) vmlinux.gz System.map "$(INSTALL_PATH)"
diff --git a/arch/m68k/Makefile_no b/arch/m68k/Makefile_no
new file mode 100644
index 000000000000..81652ab893e1
--- /dev/null
+++ b/arch/m68k/Makefile_no
@@ -0,0 +1,124 @@
1#
2# arch/m68k/Makefile
3#
4# This file is subject to the terms and conditions of the GNU General Public
5# License. See the file "COPYING" in the main directory of this archive
6# for more details.
7#
8# (C) Copyright 2002, Greg Ungerer <gerg@snapgear.com>
9#
10
11platform-$(CONFIG_M68328) := 68328
12platform-$(CONFIG_M68EZ328) := 68EZ328
13platform-$(CONFIG_M68VZ328) := 68VZ328
14platform-$(CONFIG_M68360) := 68360
15platform-$(CONFIG_M5206) := 5206
16platform-$(CONFIG_M5206e) := 5206e
17platform-$(CONFIG_M520x) := 520x
18platform-$(CONFIG_M523x) := 523x
19platform-$(CONFIG_M5249) := 5249
20platform-$(CONFIG_M527x) := 527x
21platform-$(CONFIG_M5272) := 5272
22platform-$(CONFIG_M528x) := 528x
23platform-$(CONFIG_M5307) := 5307
24platform-$(CONFIG_M532x) := 532x
25platform-$(CONFIG_M5407) := 5407
26platform-$(CONFIG_M54xx) := 54xx
27PLATFORM := $(platform-y)
28
29board-$(CONFIG_PILOT) := pilot
30board-$(CONFIG_UC5272) := UC5272
31board-$(CONFIG_UC5282) := UC5282
32board-$(CONFIG_UCSIMM) := ucsimm
33board-$(CONFIG_UCDIMM) := ucdimm
34board-$(CONFIG_UCQUICC) := uCquicc
35board-$(CONFIG_DRAGEN2) := de2
36board-$(CONFIG_ARNEWSH) := ARNEWSH
37board-$(CONFIG_FREESCALE) := FREESCALE
38board-$(CONFIG_M5235EVB) := M5235EVB
39board-$(CONFIG_M5271EVB) := M5271EVB
40board-$(CONFIG_M5275EVB) := M5275EVB
41board-$(CONFIG_M5282EVB) := M5282EVB
42board-$(CONFIG_ELITE) := eLITE
43board-$(CONFIG_NETtel) := NETtel
44board-$(CONFIG_SECUREEDGEMP3) := MP3
45board-$(CONFIG_CLEOPATRA) := CLEOPATRA
46board-$(CONFIG_senTec) := senTec
47board-$(CONFIG_SNEHA) := SNEHA
48board-$(CONFIG_M5208EVB) := M5208EVB
49board-$(CONFIG_MOD5272) := MOD5272
50board-$(CONFIG_AVNET) := AVNET
51board-$(CONFIG_SAVANT) := SAVANT
52BOARD := $(board-y)
53
54model-$(CONFIG_RAMKERNEL) := ram
55model-$(CONFIG_ROMKERNEL) := rom
56MODEL := $(model-y)
57
58#
59# Some code support is grouped together for a common cpu-subclass (for
60# example all ColdFire cpu's are very similar). Determine the sub-class
61# for the selected cpu. ONLY need to define this for the non-base member
62# of the family.
63#
64cpuclass-$(CONFIG_M5206) := coldfire
65cpuclass-$(CONFIG_M5206e) := coldfire
66cpuclass-$(CONFIG_M520x) := coldfire
67cpuclass-$(CONFIG_M523x) := coldfire
68cpuclass-$(CONFIG_M5249) := coldfire
69cpuclass-$(CONFIG_M527x) := coldfire
70cpuclass-$(CONFIG_M5272) := coldfire
71cpuclass-$(CONFIG_M528x) := coldfire
72cpuclass-$(CONFIG_M5307) := coldfire
73cpuclass-$(CONFIG_M532x) := coldfire
74cpuclass-$(CONFIG_M5407) := coldfire
75cpuclass-$(CONFIG_M54xx) := coldfire
76cpuclass-$(CONFIG_M68328) := 68328
77cpuclass-$(CONFIG_M68EZ328) := 68328
78cpuclass-$(CONFIG_M68VZ328) := 68328
79cpuclass-$(CONFIG_M68360) := 68360
80CPUCLASS := $(cpuclass-y)
81
82ifneq ($(CPUCLASS),$(PLATFORM))
83CLASSDIR := arch/m68k/platform/$(cpuclass-y)/
84endif
85
86export PLATFORM BOARD MODEL CPUCLASS
87
88#
89# Some CFLAG additions based on specific CPU type.
90#
91cflags-$(CONFIG_M5206) := $(call cc-option,-mcpu=5206,-m5200)
92cflags-$(CONFIG_M5206e) := $(call cc-option,-mcpu=5206e,-m5200)
93cflags-$(CONFIG_M520x) := $(call cc-option,-mcpu=5208,-m5200)
94cflags-$(CONFIG_M523x) := $(call cc-option,-mcpu=523x,-m5307)
95cflags-$(CONFIG_M5249) := $(call cc-option,-mcpu=5249,-m5200)
96cflags-$(CONFIG_M5271) := $(call cc-option,-mcpu=5271,-m5307)
97cflags-$(CONFIG_M5272) := $(call cc-option,-mcpu=5272,-m5307)
98cflags-$(CONFIG_M5275) := $(call cc-option,-mcpu=5275,-m5307)
99cflags-$(CONFIG_M528x) := $(call cc-option,-mcpu=528x,-m5307)
100cflags-$(CONFIG_M5307) := $(call cc-option,-mcpu=5307,-m5200)
101cflags-$(CONFIG_M532x) := $(call cc-option,-mcpu=532x,-m5307)
102cflags-$(CONFIG_M5407) := $(call cc-option,-mcpu=5407,-m5200)
103cflags-$(CONFIG_M54xx) := $(call cc-option,-mcpu=5475,-m5200)
104cflags-$(CONFIG_M68328) := -m68000
105cflags-$(CONFIG_M68EZ328) := -m68000
106cflags-$(CONFIG_M68VZ328) := -m68000
107cflags-$(CONFIG_M68360) := -m68332
108
109KBUILD_AFLAGS += $(cflags-y)
110
111KBUILD_CFLAGS += $(cflags-y)
112KBUILD_CFLAGS += -D__linux__
113KBUILD_CFLAGS += -DUTS_SYSNAME=\"uClinux\"
114
115head-y := arch/m68k/platform/$(cpuclass-y)/head.o
116
117core-y += arch/m68k/kernel/ \
118 arch/m68k/mm/ \
119 $(CLASSDIR) \
120 arch/m68k/platform/$(PLATFORM)/
121libs-y += arch/m68k/lib/
122
123archclean:
124
diff --git a/arch/m68k/atari/atakeyb.c b/arch/m68k/atari/atakeyb.c
index 5890897d28bf..b995513d527f 100644
--- a/arch/m68k/atari/atakeyb.c
+++ b/arch/m68k/atari/atakeyb.c
@@ -130,7 +130,7 @@ KEYBOARD_STATE kb_state;
130 * it's really hard to decide whether they're mouse or keyboard bytes. Since 130 * it's really hard to decide whether they're mouse or keyboard bytes. Since
131 * overruns usually occur when moving the Atari mouse rapidly, they're seen as 131 * overruns usually occur when moving the Atari mouse rapidly, they're seen as
132 * mouse bytes here. If this is wrong, only a make code of the keyboard gets 132 * mouse bytes here. If this is wrong, only a make code of the keyboard gets
133 * lost, which isn't too bad. Loosing a break code would be disastrous, 133 * lost, which isn't too bad. Losing a break code would be disastrous,
134 * because then the keyboard repeat strikes... 134 * because then the keyboard repeat strikes...
135 */ 135 */
136 136
diff --git a/arch/m68k/configs/m5208evb_defconfig b/arch/m68k/configs/m5208evb_defconfig
new file mode 100644
index 000000000000..c1616824e201
--- /dev/null
+++ b/arch/m68k/configs/m5208evb_defconfig
@@ -0,0 +1,76 @@
1# CONFIG_MMU is not set
2CONFIG_EXPERIMENTAL=y
3CONFIG_LOG_BUF_SHIFT=14
4# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
5CONFIG_EXPERT=y
6# CONFIG_KALLSYMS is not set
7# CONFIG_HOTPLUG is not set
8# CONFIG_FUTEX is not set
9# CONFIG_EPOLL is not set
10# CONFIG_SIGNALFD is not set
11# CONFIG_TIMERFD is not set
12# CONFIG_EVENTFD is not set
13# CONFIG_AIO is not set
14# CONFIG_VM_EVENT_COUNTERS is not set
15# CONFIG_COMPAT_BRK is not set
16# CONFIG_BLK_DEV_BSG is not set
17# CONFIG_IOSCHED_DEADLINE is not set
18# CONFIG_IOSCHED_CFQ is not set
19CONFIG_M520x=y
20CONFIG_CLOCK_SET=y
21CONFIG_CLOCK_FREQ=166666666
22CONFIG_CLOCK_DIV=2
23CONFIG_M5208EVB=y
24# CONFIG_4KSTACKS is not set
25CONFIG_RAMBASE=0x40000000
26CONFIG_RAMSIZE=0x2000000
27CONFIG_VECTORBASE=0x40000000
28CONFIG_KERNELBASE=0x40020000
29CONFIG_RAM16BIT=y
30CONFIG_BINFMT_FLAT=y
31CONFIG_NET=y
32CONFIG_PACKET=y
33CONFIG_UNIX=y
34CONFIG_INET=y
35# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
36# CONFIG_INET_XFRM_MODE_TUNNEL is not set
37# CONFIG_INET_XFRM_MODE_BEET is not set
38# CONFIG_INET_LRO is not set
39# CONFIG_INET_DIAG is not set
40# CONFIG_IPV6 is not set
41# CONFIG_FW_LOADER is not set
42CONFIG_MTD=y
43CONFIG_MTD_PARTITIONS=y
44CONFIG_MTD_CHAR=y
45CONFIG_MTD_BLOCK=y
46CONFIG_MTD_RAM=y
47CONFIG_MTD_UCLINUX=y
48CONFIG_BLK_DEV_RAM=y
49# CONFIG_MISC_DEVICES is not set
50CONFIG_NETDEVICES=y
51CONFIG_NET_ETHERNET=y
52CONFIG_FEC=y
53# CONFIG_NETDEV_1000 is not set
54# CONFIG_NETDEV_10000 is not set
55# CONFIG_INPUT is not set
56# CONFIG_SERIO is not set
57# CONFIG_VT is not set
58CONFIG_SERIAL_MCF=y
59CONFIG_SERIAL_MCF_BAUDRATE=115200
60CONFIG_SERIAL_MCF_CONSOLE=y
61# CONFIG_UNIX98_PTYS is not set
62# CONFIG_HW_RANDOM is not set
63# CONFIG_HWMON is not set
64# CONFIG_USB_SUPPORT is not set
65CONFIG_EXT2_FS=y
66# CONFIG_FILE_LOCKING is not set
67# CONFIG_DNOTIFY is not set
68# CONFIG_SYSFS is not set
69CONFIG_ROMFS_FS=y
70CONFIG_ROMFS_BACKED_BY_MTD=y
71# CONFIG_NETWORK_FILESYSTEMS is not set
72# CONFIG_RCU_CPU_STALL_DETECTOR is not set
73CONFIG_SYSCTL_SYSCALL_CHECK=y
74CONFIG_FULLDEBUG=y
75CONFIG_BOOTPARAM=y
76CONFIG_BOOTPARAM_STRING="root=/dev/mtdblock0"
diff --git a/arch/m68k/configs/m5249evb_defconfig b/arch/m68k/configs/m5249evb_defconfig
new file mode 100644
index 000000000000..a6599e42facf
--- /dev/null
+++ b/arch/m68k/configs/m5249evb_defconfig
@@ -0,0 +1,69 @@
1# CONFIG_MMU is not set
2CONFIG_EXPERIMENTAL=y
3CONFIG_LOG_BUF_SHIFT=14
4# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
5CONFIG_EXPERT=y
6# CONFIG_KALLSYMS is not set
7# CONFIG_HOTPLUG is not set
8# CONFIG_FUTEX is not set
9# CONFIG_EPOLL is not set
10# CONFIG_SIGNALFD is not set
11# CONFIG_TIMERFD is not set
12# CONFIG_EVENTFD is not set
13# CONFIG_AIO is not set
14# CONFIG_VM_EVENT_COUNTERS is not set
15# CONFIG_SLUB_DEBUG is not set
16# CONFIG_BLK_DEV_BSG is not set
17# CONFIG_IOSCHED_DEADLINE is not set
18# CONFIG_IOSCHED_CFQ is not set
19CONFIG_M5249=y
20CONFIG_CLOCK_SET=y
21CONFIG_CLOCK_FREQ=140000000
22CONFIG_CLOCK_DIV=2
23CONFIG_M5249C3=y
24CONFIG_RAMBASE=0x00000000
25CONFIG_RAMSIZE=0x00800000
26CONFIG_VECTORBASE=0x00000000
27CONFIG_KERNELBASE=0x00020000
28CONFIG_BINFMT_FLAT=y
29CONFIG_NET=y
30CONFIG_PACKET=y
31CONFIG_UNIX=y
32CONFIG_INET=y
33# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
34# CONFIG_INET_XFRM_MODE_TUNNEL is not set
35# CONFIG_INET_XFRM_MODE_BEET is not set
36# CONFIG_INET_LRO is not set
37# CONFIG_INET_DIAG is not set
38# CONFIG_IPV6 is not set
39# CONFIG_FW_LOADER is not set
40CONFIG_MTD=y
41CONFIG_MTD_PARTITIONS=y
42CONFIG_MTD_CHAR=y
43CONFIG_MTD_BLOCK=y
44CONFIG_MTD_RAM=y
45CONFIG_MTD_UCLINUX=y
46CONFIG_BLK_DEV_RAM=y
47# CONFIG_MISC_DEVICES is not set
48CONFIG_NETDEVICES=y
49CONFIG_NET_ETHERNET=y
50# CONFIG_NETDEV_1000 is not set
51# CONFIG_NETDEV_10000 is not set
52CONFIG_PPP=y
53# CONFIG_INPUT is not set
54# CONFIG_SERIO is not set
55# CONFIG_VT is not set
56CONFIG_SERIAL_MCF=y
57CONFIG_SERIAL_MCF_CONSOLE=y
58# CONFIG_UNIX98_PTYS is not set
59# CONFIG_HWMON is not set
60# CONFIG_USB_SUPPORT is not set
61CONFIG_EXT2_FS=y
62# CONFIG_FILE_LOCKING is not set
63CONFIG_ROMFS_FS=y
64CONFIG_ROMFS_BACKED_BY_MTD=y
65# CONFIG_NETWORK_FILESYSTEMS is not set
66# CONFIG_RCU_CPU_STALL_DETECTOR is not set
67CONFIG_BOOTPARAM=y
68CONFIG_BOOTPARAM_STRING="root=/dev/mtdblock0"
69# CONFIG_CRC32 is not set
diff --git a/arch/m68k/configs/m5272c3_defconfig b/arch/m68k/configs/m5272c3_defconfig
new file mode 100644
index 000000000000..3fa60a57a0f9
--- /dev/null
+++ b/arch/m68k/configs/m5272c3_defconfig
@@ -0,0 +1,67 @@
1# CONFIG_MMU is not set
2CONFIG_EXPERIMENTAL=y
3CONFIG_LOG_BUF_SHIFT=14
4# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
5CONFIG_EXPERT=y
6# CONFIG_KALLSYMS is not set
7# CONFIG_HOTPLUG is not set
8# CONFIG_FUTEX is not set
9# CONFIG_EPOLL is not set
10# CONFIG_SIGNALFD is not set
11# CONFIG_TIMERFD is not set
12# CONFIG_EVENTFD is not set
13# CONFIG_AIO is not set
14# CONFIG_VM_EVENT_COUNTERS is not set
15# CONFIG_SLUB_DEBUG is not set
16# CONFIG_BLK_DEV_BSG is not set
17# CONFIG_IOSCHED_DEADLINE is not set
18# CONFIG_IOSCHED_CFQ is not set
19CONFIG_M5272=y
20CONFIG_CLOCK_SET=y
21CONFIG_M5272C3=y
22CONFIG_RAMBASE=0x00000000
23CONFIG_RAMSIZE=0x00800000
24CONFIG_VECTORBASE=0x00000000
25CONFIG_KERNELBASE=0x00020000
26CONFIG_BINFMT_FLAT=y
27CONFIG_NET=y
28CONFIG_PACKET=y
29CONFIG_UNIX=y
30CONFIG_INET=y
31# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
32# CONFIG_INET_XFRM_MODE_TUNNEL is not set
33# CONFIG_INET_XFRM_MODE_BEET is not set
34# CONFIG_INET_LRO is not set
35# CONFIG_INET_DIAG is not set
36# CONFIG_IPV6 is not set
37# CONFIG_FW_LOADER is not set
38CONFIG_MTD=y
39CONFIG_MTD_PARTITIONS=y
40CONFIG_MTD_CHAR=y
41CONFIG_MTD_BLOCK=y
42CONFIG_MTD_RAM=y
43CONFIG_MTD_UCLINUX=y
44CONFIG_BLK_DEV_RAM=y
45# CONFIG_MISC_DEVICES is not set
46CONFIG_NETDEVICES=y
47CONFIG_NET_ETHERNET=y
48CONFIG_FEC=y
49# CONFIG_NETDEV_1000 is not set
50# CONFIG_NETDEV_10000 is not set
51# CONFIG_INPUT is not set
52# CONFIG_SERIO is not set
53# CONFIG_VT is not set
54CONFIG_SERIAL_MCF=y
55CONFIG_SERIAL_MCF_CONSOLE=y
56# CONFIG_UNIX98_PTYS is not set
57# CONFIG_HWMON is not set
58# CONFIG_USB_SUPPORT is not set
59CONFIG_EXT2_FS=y
60# CONFIG_FILE_LOCKING is not set
61# CONFIG_DNOTIFY is not set
62CONFIG_ROMFS_FS=y
63CONFIG_ROMFS_BACKED_BY_MTD=y
64# CONFIG_NETWORK_FILESYSTEMS is not set
65# CONFIG_RCU_CPU_STALL_DETECTOR is not set
66CONFIG_BOOTPARAM=y
67CONFIG_BOOTPARAM_STRING="root=/dev/mtdblock0"
diff --git a/arch/m68k/configs/m5275evb_defconfig b/arch/m68k/configs/m5275evb_defconfig
new file mode 100644
index 000000000000..33c32aeca12b
--- /dev/null
+++ b/arch/m68k/configs/m5275evb_defconfig
@@ -0,0 +1,74 @@
1# CONFIG_MMU is not set
2CONFIG_EXPERIMENTAL=y
3CONFIG_LOG_BUF_SHIFT=14
4# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
5CONFIG_EXPERT=y
6# CONFIG_KALLSYMS is not set
7# CONFIG_HOTPLUG is not set
8# CONFIG_FUTEX is not set
9# CONFIG_EPOLL is not set
10# CONFIG_SIGNALFD is not set
11# CONFIG_TIMERFD is not set
12# CONFIG_EVENTFD is not set
13# CONFIG_AIO is not set
14# CONFIG_VM_EVENT_COUNTERS is not set
15# CONFIG_SLUB_DEBUG is not set
16# CONFIG_BLK_DEV_BSG is not set
17# CONFIG_IOSCHED_DEADLINE is not set
18# CONFIG_IOSCHED_CFQ is not set
19CONFIG_M5275=y
20CONFIG_CLOCK_SET=y
21CONFIG_CLOCK_FREQ=150000000
22CONFIG_CLOCK_DIV=2
23CONFIG_M5275EVB=y
24# CONFIG_4KSTACKS is not set
25CONFIG_RAMBASE=0x00000000
26CONFIG_RAMSIZE=0x00000000
27CONFIG_VECTORBASE=0x00000000
28CONFIG_KERNELBASE=0x00020000
29CONFIG_BINFMT_FLAT=y
30CONFIG_NET=y
31CONFIG_PACKET=y
32CONFIG_UNIX=y
33CONFIG_INET=y
34# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
35# CONFIG_INET_XFRM_MODE_TUNNEL is not set
36# CONFIG_INET_XFRM_MODE_BEET is not set
37# CONFIG_INET_LRO is not set
38# CONFIG_INET_DIAG is not set
39# CONFIG_IPV6 is not set
40# CONFIG_FW_LOADER is not set
41CONFIG_MTD=y
42CONFIG_MTD_PARTITIONS=y
43CONFIG_MTD_CHAR=y
44CONFIG_MTD_BLOCK=y
45CONFIG_MTD_RAM=y
46CONFIG_MTD_UCLINUX=y
47CONFIG_BLK_DEV_RAM=y
48# CONFIG_MISC_DEVICES is not set
49CONFIG_NETDEVICES=y
50CONFIG_NET_ETHERNET=y
51CONFIG_FEC=y
52CONFIG_FEC2=y
53# CONFIG_NETDEV_1000 is not set
54# CONFIG_NETDEV_10000 is not set
55CONFIG_PPP=y
56# CONFIG_INPUT is not set
57# CONFIG_SERIO is not set
58# CONFIG_VT is not set
59CONFIG_SERIAL_MCF=y
60CONFIG_SERIAL_MCF_CONSOLE=y
61# CONFIG_UNIX98_PTYS is not set
62# CONFIG_HWMON is not set
63# CONFIG_USB_SUPPORT is not set
64CONFIG_EXT2_FS=y
65# CONFIG_FILE_LOCKING is not set
66# CONFIG_DNOTIFY is not set
67CONFIG_ROMFS_FS=y
68CONFIG_ROMFS_BACKED_BY_MTD=y
69# CONFIG_NETWORK_FILESYSTEMS is not set
70# CONFIG_RCU_CPU_STALL_DETECTOR is not set
71CONFIG_SYSCTL_SYSCALL_CHECK=y
72CONFIG_BOOTPARAM=y
73CONFIG_BOOTPARAM_STRING="root=/dev/mtdblock0"
74# CONFIG_CRC32 is not set
diff --git a/arch/m68k/configs/m5307c3_defconfig b/arch/m68k/configs/m5307c3_defconfig
new file mode 100644
index 000000000000..43795f41f7c7
--- /dev/null
+++ b/arch/m68k/configs/m5307c3_defconfig
@@ -0,0 +1,77 @@
1# CONFIG_MMU is not set
2CONFIG_EXPERIMENTAL=y
3CONFIG_LOG_BUF_SHIFT=14
4# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
5CONFIG_EXPERT=y
6# CONFIG_KALLSYMS is not set
7# CONFIG_HOTPLUG is not set
8# CONFIG_FUTEX is not set
9# CONFIG_EPOLL is not set
10# CONFIG_SIGNALFD is not set
11# CONFIG_TIMERFD is not set
12# CONFIG_EVENTFD is not set
13# CONFIG_AIO is not set
14# CONFIG_VM_EVENT_COUNTERS is not set
15# CONFIG_SLUB_DEBUG is not set
16# CONFIG_BLK_DEV_BSG is not set
17# CONFIG_IOSCHED_DEADLINE is not set
18# CONFIG_IOSCHED_CFQ is not set
19CONFIG_M5307=y
20CONFIG_CLOCK_SET=y
21CONFIG_CLOCK_FREQ=90000000
22CONFIG_CLOCK_DIV=2
23CONFIG_M5307C3=y
24CONFIG_RAMBASE=0x00000000
25CONFIG_RAMSIZE=0x00800000
26CONFIG_VECTORBASE=0x00000000
27CONFIG_KERNELBASE=0x00020000
28CONFIG_BINFMT_FLAT=y
29CONFIG_NET=y
30CONFIG_PACKET=y
31CONFIG_UNIX=y
32CONFIG_INET=y
33# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
34# CONFIG_INET_XFRM_MODE_TUNNEL is not set
35# CONFIG_INET_XFRM_MODE_BEET is not set
36# CONFIG_INET_LRO is not set
37# CONFIG_INET_DIAG is not set
38# CONFIG_IPV6 is not set
39# CONFIG_FW_LOADER is not set
40CONFIG_MTD=y
41CONFIG_MTD_PARTITIONS=y
42CONFIG_MTD_CHAR=y
43CONFIG_MTD_BLOCK=y
44CONFIG_MTD_RAM=y
45CONFIG_MTD_UCLINUX=y
46CONFIG_BLK_DEV_RAM=y
47# CONFIG_MISC_DEVICES is not set
48CONFIG_NETDEVICES=y
49CONFIG_NET_ETHERNET=y
50# CONFIG_NETDEV_1000 is not set
51# CONFIG_NETDEV_10000 is not set
52CONFIG_PPP=y
53CONFIG_SLIP=y
54CONFIG_SLIP_COMPRESSED=y
55# CONFIG_INPUT_MOUSEDEV is not set
56# CONFIG_INPUT_KEYBOARD is not set
57# CONFIG_INPUT_MOUSE is not set
58# CONFIG_SERIO is not set
59# CONFIG_VT is not set
60CONFIG_SERIAL_MCF=y
61CONFIG_SERIAL_MCF_CONSOLE=y
62# CONFIG_LEGACY_PTYS is not set
63# CONFIG_HW_RANDOM is not set
64# CONFIG_HWMON is not set
65# CONFIG_HID_SUPPORT is not set
66# CONFIG_USB_SUPPORT is not set
67CONFIG_EXT2_FS=y
68# CONFIG_DNOTIFY is not set
69CONFIG_ROMFS_FS=y
70CONFIG_ROMFS_BACKED_BY_MTD=y
71# CONFIG_NETWORK_FILESYSTEMS is not set
72# CONFIG_RCU_CPU_STALL_DETECTOR is not set
73CONFIG_SYSCTL_SYSCALL_CHECK=y
74CONFIG_FULLDEBUG=y
75CONFIG_BOOTPARAM=y
76CONFIG_BOOTPARAM_STRING="root=/dev/mtdblock0"
77# CONFIG_CRC32 is not set
diff --git a/arch/m68k/configs/m5407c3_defconfig b/arch/m68k/configs/m5407c3_defconfig
new file mode 100644
index 000000000000..72746c57a571
--- /dev/null
+++ b/arch/m68k/configs/m5407c3_defconfig
@@ -0,0 +1,71 @@
1# CONFIG_MMU is not set
2CONFIG_EXPERIMENTAL=y
3CONFIG_LOG_BUF_SHIFT=14
4# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
5CONFIG_EXPERT=y
6# CONFIG_KALLSYMS is not set
7# CONFIG_HOTPLUG is not set
8# CONFIG_FUTEX is not set
9# CONFIG_EPOLL is not set
10# CONFIG_SIGNALFD is not set
11# CONFIG_TIMERFD is not set
12# CONFIG_EVENTFD is not set
13# CONFIG_AIO is not set
14# CONFIG_VM_EVENT_COUNTERS is not set
15CONFIG_MODULES=y
16CONFIG_MODULE_UNLOAD=y
17# CONFIG_BLK_DEV_BSG is not set
18# CONFIG_IOSCHED_DEADLINE is not set
19# CONFIG_IOSCHED_CFQ is not set
20CONFIG_M5407=y
21CONFIG_CLOCK_SET=y
22CONFIG_CLOCK_FREQ=50000000
23CONFIG_M5407C3=y
24CONFIG_RAMBASE=0x00000000
25CONFIG_RAMSIZE=0x00000000
26CONFIG_VECTORBASE=0x00000000
27CONFIG_KERNELBASE=0x00020000
28CONFIG_BINFMT_FLAT=y
29CONFIG_NET=y
30CONFIG_PACKET=y
31CONFIG_UNIX=y
32CONFIG_INET=y
33# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
34# CONFIG_INET_XFRM_MODE_TUNNEL is not set
35# CONFIG_INET_XFRM_MODE_BEET is not set
36# CONFIG_INET_LRO is not set
37# CONFIG_INET_DIAG is not set
38# CONFIG_IPV6 is not set
39# CONFIG_FW_LOADER is not set
40CONFIG_MTD=y
41CONFIG_MTD_PARTITIONS=y
42CONFIG_MTD_CHAR=y
43CONFIG_MTD_BLOCK=y
44CONFIG_MTD_RAM=y
45CONFIG_MTD_UCLINUX=y
46CONFIG_BLK_DEV_RAM=y
47# CONFIG_MISC_DEVICES is not set
48CONFIG_NETDEVICES=y
49CONFIG_NET_ETHERNET=y
50# CONFIG_NETDEV_1000 is not set
51# CONFIG_NETDEV_10000 is not set
52CONFIG_PPP=y
53# CONFIG_INPUT is not set
54# CONFIG_VT is not set
55CONFIG_SERIAL_MCF=y
56CONFIG_SERIAL_MCF_CONSOLE=y
57# CONFIG_UNIX98_PTYS is not set
58# CONFIG_HW_RANDOM is not set
59# CONFIG_HWMON is not set
60# CONFIG_USB_SUPPORT is not set
61CONFIG_EXT2_FS=y
62# CONFIG_FILE_LOCKING is not set
63# CONFIG_DNOTIFY is not set
64CONFIG_ROMFS_FS=y
65CONFIG_ROMFS_BACKED_BY_MTD=y
66# CONFIG_NETWORK_FILESYSTEMS is not set
67# CONFIG_RCU_CPU_STALL_DETECTOR is not set
68CONFIG_SYSCTL_SYSCALL_CHECK=y
69CONFIG_BOOTPARAM=y
70CONFIG_BOOTPARAM_STRING="root=/dev/mtdblock0"
71# CONFIG_CRC32 is not set
diff --git a/arch/m68k/fpsp040/bindec.S b/arch/m68k/fpsp040/bindec.S
index 72f1159cb804..f2e795231046 100644
--- a/arch/m68k/fpsp040/bindec.S
+++ b/arch/m68k/fpsp040/bindec.S
@@ -609,7 +609,7 @@ do_fint:
609| A6. This test occurs only on the first pass. If the 609| A6. This test occurs only on the first pass. If the
610| result is exactly 10^LEN, decrement ILOG and divide 610| result is exactly 10^LEN, decrement ILOG and divide
611| the mantissa by 10. The calculation of 10^LEN cannot 611| the mantissa by 10. The calculation of 10^LEN cannot
612| be inexact, since all powers of ten upto 10^27 are exact 612| be inexact, since all powers of ten up to 10^27 are exact
613| in extended precision, so the use of a previous power-of-ten 613| in extended precision, so the use of a previous power-of-ten
614| table will introduce no error. 614| table will introduce no error.
615| 615|
diff --git a/arch/m68k/ifpsp060/src/fpsp.S b/arch/m68k/ifpsp060/src/fpsp.S
index 26e85e2b7a5e..78cb60f5bb4d 100644
--- a/arch/m68k/ifpsp060/src/fpsp.S
+++ b/arch/m68k/ifpsp060/src/fpsp.S
@@ -11813,7 +11813,7 @@ fmul_unfl_ena:
11813 bne.b fmul_unfl_ena_sd # no, sgl or dbl 11813 bne.b fmul_unfl_ena_sd # no, sgl or dbl
11814 11814
11815# if the rnd mode is anything but RZ, then we have to re-do the above 11815# if the rnd mode is anything but RZ, then we have to re-do the above
11816# multiplication becuase we used RZ for all. 11816# multiplication because we used RZ for all.
11817 fmov.l L_SCR3(%a6),%fpcr # set FPCR 11817 fmov.l L_SCR3(%a6),%fpcr # set FPCR
11818 11818
11819fmul_unfl_ena_cont: 11819fmul_unfl_ena_cont:
@@ -18095,7 +18095,7 @@ fscc_mem_op:
18095 18095
18096 rts 18096 rts
18097 18097
18098# addresing mode is post-increment. write the result byte. if the write 18098# addressing mode is post-increment. write the result byte. if the write
18099# fails then don't update the address register. if write passes then 18099# fails then don't update the address register. if write passes then
18100# call inc_areg() to update the address register. 18100# call inc_areg() to update the address register.
18101fscc_mem_inc: 18101fscc_mem_inc:
@@ -20876,7 +20876,7 @@ dst_get_dupper:
20876 swap %d0 # d0 now in upper word 20876 swap %d0 # d0 now in upper word
20877 lsl.l &0x4,%d0 # d0 in proper place for dbl prec exp 20877 lsl.l &0x4,%d0 # d0 in proper place for dbl prec exp
20878 tst.b FTEMP_EX(%a0) # test sign 20878 tst.b FTEMP_EX(%a0) # test sign
20879 bpl.b dst_get_dman # if postive, go process mantissa 20879 bpl.b dst_get_dman # if positive, go process mantissa
20880 bset &0x1f,%d0 # if negative, set sign 20880 bset &0x1f,%d0 # if negative, set sign
20881dst_get_dman: 20881dst_get_dman:
20882 mov.l FTEMP_HI(%a0),%d1 # get ms mantissa 20882 mov.l FTEMP_HI(%a0),%d1 # get ms mantissa
@@ -22943,7 +22943,7 @@ tbl_ovfl_result:
22943# FP_SRC(a6) = packed operand now as a binary FP number # 22943# FP_SRC(a6) = packed operand now as a binary FP number #
22944# # 22944# #
22945# ALGORITHM *********************************************************** # 22945# ALGORITHM *********************************************************** #
22946# Get the correct <ea> whihc is the value on the exception stack # 22946# Get the correct <ea> which is the value on the exception stack #
22947# frame w/ maybe a correction factor if the <ea> is -(an) or (an)+. # 22947# frame w/ maybe a correction factor if the <ea> is -(an) or (an)+. #
22948# Then, fetch the operand from memory. If the fetch fails, exit # 22948# Then, fetch the operand from memory. If the fetch fails, exit #
22949# through facc_in_x(). # 22949# through facc_in_x(). #
@@ -24096,7 +24096,7 @@ do_fint12:
24096# A6. This test occurs only on the first pass. If the 24096# A6. This test occurs only on the first pass. If the
24097# result is exactly 10^LEN, decrement ILOG and divide 24097# result is exactly 10^LEN, decrement ILOG and divide
24098# the mantissa by 10. The calculation of 10^LEN cannot 24098# the mantissa by 10. The calculation of 10^LEN cannot
24099# be inexact, since all powers of ten upto 10^27 are exact 24099# be inexact, since all powers of ten up to 10^27 are exact
24100# in extended precision, so the use of a previous power-of-ten 24100# in extended precision, so the use of a previous power-of-ten
24101# table will introduce no error. 24101# table will introduce no error.
24102# 24102#
diff --git a/arch/m68k/ifpsp060/src/pfpsp.S b/arch/m68k/ifpsp060/src/pfpsp.S
index e71ba0ab013c..4aedef973cf6 100644
--- a/arch/m68k/ifpsp060/src/pfpsp.S
+++ b/arch/m68k/ifpsp060/src/pfpsp.S
@@ -7777,7 +7777,7 @@ dst_get_dupper:
7777 swap %d0 # d0 now in upper word 7777 swap %d0 # d0 now in upper word
7778 lsl.l &0x4,%d0 # d0 in proper place for dbl prec exp 7778 lsl.l &0x4,%d0 # d0 in proper place for dbl prec exp
7779 tst.b FTEMP_EX(%a0) # test sign 7779 tst.b FTEMP_EX(%a0) # test sign
7780 bpl.b dst_get_dman # if postive, go process mantissa 7780 bpl.b dst_get_dman # if positive, go process mantissa
7781 bset &0x1f,%d0 # if negative, set sign 7781 bset &0x1f,%d0 # if negative, set sign
7782dst_get_dman: 7782dst_get_dman:
7783 mov.l FTEMP_HI(%a0),%d1 # get ms mantissa 7783 mov.l FTEMP_HI(%a0),%d1 # get ms mantissa
@@ -8244,7 +8244,7 @@ fmul_unfl_ena:
8244 bne.b fmul_unfl_ena_sd # no, sgl or dbl 8244 bne.b fmul_unfl_ena_sd # no, sgl or dbl
8245 8245
8246# if the rnd mode is anything but RZ, then we have to re-do the above 8246# if the rnd mode is anything but RZ, then we have to re-do the above
8247# multiplication becuase we used RZ for all. 8247# multiplication because we used RZ for all.
8248 fmov.l L_SCR3(%a6),%fpcr # set FPCR 8248 fmov.l L_SCR3(%a6),%fpcr # set FPCR
8249 8249
8250fmul_unfl_ena_cont: 8250fmul_unfl_ena_cont:
@@ -12903,7 +12903,7 @@ store_fpreg_7:
12903# FP_SRC(a6) = packed operand now as a binary FP number # 12903# FP_SRC(a6) = packed operand now as a binary FP number #
12904# # 12904# #
12905# ALGORITHM *********************************************************** # 12905# ALGORITHM *********************************************************** #
12906# Get the correct <ea> whihc is the value on the exception stack # 12906# Get the correct <ea> which is the value on the exception stack #
12907# frame w/ maybe a correction factor if the <ea> is -(an) or (an)+. # 12907# frame w/ maybe a correction factor if the <ea> is -(an) or (an)+. #
12908# Then, fetch the operand from memory. If the fetch fails, exit # 12908# Then, fetch the operand from memory. If the fetch fails, exit #
12909# through facc_in_x(). # 12909# through facc_in_x(). #
@@ -14056,7 +14056,7 @@ do_fint12:
14056# A6. This test occurs only on the first pass. If the 14056# A6. This test occurs only on the first pass. If the
14057# result is exactly 10^LEN, decrement ILOG and divide 14057# result is exactly 10^LEN, decrement ILOG and divide
14058# the mantissa by 10. The calculation of 10^LEN cannot 14058# the mantissa by 10. The calculation of 10^LEN cannot
14059# be inexact, since all powers of ten upto 10^27 are exact 14059# be inexact, since all powers of ten up to 10^27 are exact
14060# in extended precision, so the use of a previous power-of-ten 14060# in extended precision, so the use of a previous power-of-ten
14061# table will introduce no error. 14061# table will introduce no error.
14062# 14062#
diff --git a/arch/m68k/include/asm/atariints.h b/arch/m68k/include/asm/atariints.h
index f597892e43a0..656bbbf5a6ff 100644
--- a/arch/m68k/include/asm/atariints.h
+++ b/arch/m68k/include/asm/atariints.h
@@ -146,7 +146,7 @@ static inline void clear_mfp_bit( unsigned irq, int type )
146 146
147/* 147/*
148 * {en,dis}able_irq have the usual semantics of temporary blocking the 148 * {en,dis}able_irq have the usual semantics of temporary blocking the
149 * interrupt, but not loosing requests that happen between disabling and 149 * interrupt, but not losing requests that happen between disabling and
150 * enabling. This is done with the MFP mask registers. 150 * enabling. This is done with the MFP mask registers.
151 */ 151 */
152 152
diff --git a/arch/m68k/include/asm/bitops_mm.h b/arch/m68k/include/asm/bitops_mm.h
index b4ecdaada520..9d69f6e62365 100644
--- a/arch/m68k/include/asm/bitops_mm.h
+++ b/arch/m68k/include/asm/bitops_mm.h
@@ -325,58 +325,45 @@ static inline int __fls(int x)
325#include <asm-generic/bitops/hweight.h> 325#include <asm-generic/bitops/hweight.h>
326#include <asm-generic/bitops/lock.h> 326#include <asm-generic/bitops/lock.h>
327 327
328/* Bitmap functions for the minix filesystem */ 328/* Bitmap functions for the little endian bitmap. */
329 329
330static inline int minix_find_first_zero_bit(const void *vaddr, unsigned size) 330static inline void __set_bit_le(int nr, void *addr)
331{ 331{
332 const unsigned short *p = vaddr, *addr = vaddr; 332 __set_bit(nr ^ 24, addr);
333 int res; 333}
334 unsigned short num;
335
336 if (!size)
337 return 0;
338
339 size = (size >> 4) + ((size & 15) > 0);
340 while (*p++ == 0xffff)
341 {
342 if (--size == 0)
343 return (p - addr) << 4;
344 }
345 334
346 num = ~*--p; 335static inline void __clear_bit_le(int nr, void *addr)
347 __asm__ __volatile__ ("bfffo %1{#16,#16},%0" 336{
348 : "=d" (res) : "d" (num & -num)); 337 __clear_bit(nr ^ 24, addr);
349 return ((p - addr) << 4) + (res ^ 31);
350} 338}
351 339
352#define minix_test_and_set_bit(nr, addr) __test_and_set_bit((nr) ^ 16, (unsigned long *)(addr)) 340static inline int __test_and_set_bit_le(int nr, void *addr)
353#define minix_set_bit(nr,addr) __set_bit((nr) ^ 16, (unsigned long *)(addr)) 341{
354#define minix_test_and_clear_bit(nr, addr) __test_and_clear_bit((nr) ^ 16, (unsigned long *)(addr)) 342 return __test_and_set_bit(nr ^ 24, addr);
343}
355 344
356static inline int minix_test_bit(int nr, const void *vaddr) 345static inline int test_and_set_bit_le(int nr, void *addr)
357{ 346{
358 const unsigned short *p = vaddr; 347 return test_and_set_bit(nr ^ 24, addr);
359 return (p[nr >> 4] & (1U << (nr & 15))) != 0;
360} 348}
361 349
362/* Bitmap functions for the ext2 filesystem. */ 350static inline int __test_and_clear_bit_le(int nr, void *addr)
351{
352 return __test_and_clear_bit(nr ^ 24, addr);
353}
363 354
364#define ext2_set_bit(nr, addr) __test_and_set_bit((nr) ^ 24, (unsigned long *)(addr)) 355static inline int test_and_clear_bit_le(int nr, void *addr)
365#define ext2_set_bit_atomic(lock, nr, addr) test_and_set_bit((nr) ^ 24, (unsigned long *)(addr)) 356{
366#define ext2_clear_bit(nr, addr) __test_and_clear_bit((nr) ^ 24, (unsigned long *)(addr)) 357 return test_and_clear_bit(nr ^ 24, addr);
367#define ext2_clear_bit_atomic(lock, nr, addr) test_and_clear_bit((nr) ^ 24, (unsigned long *)(addr)) 358}
368#define ext2_find_next_zero_bit(addr, size, offset) \
369 generic_find_next_zero_le_bit((unsigned long *)addr, size, offset)
370#define ext2_find_next_bit(addr, size, offset) \
371 generic_find_next_le_bit((unsigned long *)addr, size, offset)
372 359
373static inline int ext2_test_bit(int nr, const void *vaddr) 360static inline int test_bit_le(int nr, const void *vaddr)
374{ 361{
375 const unsigned char *p = vaddr; 362 const unsigned char *p = vaddr;
376 return (p[nr >> 3] & (1U << (nr & 7))) != 0; 363 return (p[nr >> 3] & (1U << (nr & 7))) != 0;
377} 364}
378 365
379static inline int ext2_find_first_zero_bit(const void *vaddr, unsigned size) 366static inline int find_first_zero_bit_le(const void *vaddr, unsigned size)
380{ 367{
381 const unsigned long *p = vaddr, *addr = vaddr; 368 const unsigned long *p = vaddr, *addr = vaddr;
382 int res; 369 int res;
@@ -393,33 +380,36 @@ static inline int ext2_find_first_zero_bit(const void *vaddr, unsigned size)
393 380
394 --p; 381 --p;
395 for (res = 0; res < 32; res++) 382 for (res = 0; res < 32; res++)
396 if (!ext2_test_bit (res, p)) 383 if (!test_bit_le(res, p))
397 break; 384 break;
398 return (p - addr) * 32 + res; 385 return (p - addr) * 32 + res;
399} 386}
400 387
401static inline unsigned long generic_find_next_zero_le_bit(const unsigned long *addr, 388static inline unsigned long find_next_zero_bit_le(const void *addr,
402 unsigned long size, unsigned long offset) 389 unsigned long size, unsigned long offset)
403{ 390{
404 const unsigned long *p = addr + (offset >> 5); 391 const unsigned long *p = addr;
405 int bit = offset & 31UL, res; 392 int bit = offset & 31UL, res;
406 393
407 if (offset >= size) 394 if (offset >= size)
408 return size; 395 return size;
409 396
397 p += offset >> 5;
398
410 if (bit) { 399 if (bit) {
400 offset -= bit;
411 /* Look for zero in first longword */ 401 /* Look for zero in first longword */
412 for (res = bit; res < 32; res++) 402 for (res = bit; res < 32; res++)
413 if (!ext2_test_bit (res, p)) 403 if (!test_bit_le(res, p))
414 return (p - addr) * 32 + res; 404 return offset + res;
415 p++; 405 p++;
406 offset += 32;
416 } 407 }
417 /* No zero yet, search remaining full bytes for a zero */ 408 /* No zero yet, search remaining full bytes for a zero */
418 res = ext2_find_first_zero_bit (p, size - 32 * (p - addr)); 409 return offset + find_first_zero_bit_le(p, size - offset);
419 return (p - addr) * 32 + res;
420} 410}
421 411
422static inline int ext2_find_first_bit(const void *vaddr, unsigned size) 412static inline int find_first_bit_le(const void *vaddr, unsigned size)
423{ 413{
424 const unsigned long *p = vaddr, *addr = vaddr; 414 const unsigned long *p = vaddr, *addr = vaddr;
425 int res; 415 int res;
@@ -435,32 +425,42 @@ static inline int ext2_find_first_bit(const void *vaddr, unsigned size)
435 425
436 --p; 426 --p;
437 for (res = 0; res < 32; res++) 427 for (res = 0; res < 32; res++)
438 if (ext2_test_bit(res, p)) 428 if (test_bit_le(res, p))
439 break; 429 break;
440 return (p - addr) * 32 + res; 430 return (p - addr) * 32 + res;
441} 431}
442 432
443static inline unsigned long generic_find_next_le_bit(const unsigned long *addr, 433static inline unsigned long find_next_bit_le(const void *addr,
444 unsigned long size, unsigned long offset) 434 unsigned long size, unsigned long offset)
445{ 435{
446 const unsigned long *p = addr + (offset >> 5); 436 const unsigned long *p = addr;
447 int bit = offset & 31UL, res; 437 int bit = offset & 31UL, res;
448 438
449 if (offset >= size) 439 if (offset >= size)
450 return size; 440 return size;
451 441
442 p += offset >> 5;
443
452 if (bit) { 444 if (bit) {
445 offset -= bit;
453 /* Look for one in first longword */ 446 /* Look for one in first longword */
454 for (res = bit; res < 32; res++) 447 for (res = bit; res < 32; res++)
455 if (ext2_test_bit(res, p)) 448 if (test_bit_le(res, p))
456 return (p - addr) * 32 + res; 449 return offset + res;
457 p++; 450 p++;
451 offset += 32;
458 } 452 }
459 /* No set bit yet, search remaining full bytes for a set bit */ 453 /* No set bit yet, search remaining full bytes for a set bit */
460 res = ext2_find_first_bit(p, size - 32 * (p - addr)); 454 return offset + find_first_bit_le(p, size - offset);
461 return (p - addr) * 32 + res;
462} 455}
463 456
457/* Bitmap functions for the ext2 filesystem. */
458
459#define ext2_set_bit_atomic(lock, nr, addr) \
460 test_and_set_bit_le(nr, addr)
461#define ext2_clear_bit_atomic(lock, nr, addr) \
462 test_and_clear_bit_le(nr, addr)
463
464#endif /* __KERNEL__ */ 464#endif /* __KERNEL__ */
465 465
466#endif /* _M68K_BITOPS_H */ 466#endif /* _M68K_BITOPS_H */
diff --git a/arch/m68k/include/asm/bitops_no.h b/arch/m68k/include/asm/bitops_no.h
index 9d3cbe5fad1e..7d3779fdc5b6 100644
--- a/arch/m68k/include/asm/bitops_no.h
+++ b/arch/m68k/include/asm/bitops_no.h
@@ -196,7 +196,19 @@ static __inline__ int __test_bit(int nr, const volatile unsigned long * addr)
196#include <asm-generic/bitops/hweight.h> 196#include <asm-generic/bitops/hweight.h>
197#include <asm-generic/bitops/lock.h> 197#include <asm-generic/bitops/lock.h>
198 198
199static __inline__ int ext2_set_bit(int nr, volatile void * addr) 199#define BITOP_LE_SWIZZLE ((BITS_PER_LONG-1) & ~0x7)
200
201static inline void __set_bit_le(int nr, void *addr)
202{
203 __set_bit(nr ^ BITOP_LE_SWIZZLE, addr);
204}
205
206static inline void __clear_bit_le(int nr, void *addr)
207{
208 __clear_bit(nr ^ BITOP_LE_SWIZZLE, addr);
209}
210
211static inline int __test_and_set_bit_le(int nr, volatile void *addr)
200{ 212{
201 char retval; 213 char retval;
202 214
@@ -215,7 +227,7 @@ static __inline__ int ext2_set_bit(int nr, volatile void * addr)
215 return retval; 227 return retval;
216} 228}
217 229
218static __inline__ int ext2_clear_bit(int nr, volatile void * addr) 230static inline int __test_and_clear_bit_le(int nr, volatile void *addr)
219{ 231{
220 char retval; 232 char retval;
221 233
@@ -238,7 +250,7 @@ static __inline__ int ext2_clear_bit(int nr, volatile void * addr)
238 ({ \ 250 ({ \
239 int ret; \ 251 int ret; \
240 spin_lock(lock); \ 252 spin_lock(lock); \
241 ret = ext2_set_bit((nr), (addr)); \ 253 ret = __test_and_set_bit_le((nr), (addr)); \
242 spin_unlock(lock); \ 254 spin_unlock(lock); \
243 ret; \ 255 ret; \
244 }) 256 })
@@ -247,12 +259,12 @@ static __inline__ int ext2_clear_bit(int nr, volatile void * addr)
247 ({ \ 259 ({ \
248 int ret; \ 260 int ret; \
249 spin_lock(lock); \ 261 spin_lock(lock); \
250 ret = ext2_clear_bit((nr), (addr)); \ 262 ret = __test_and_clear_bit_le((nr), (addr)); \
251 spin_unlock(lock); \ 263 spin_unlock(lock); \
252 ret; \ 264 ret; \
253 }) 265 })
254 266
255static __inline__ int ext2_test_bit(int nr, const volatile void * addr) 267static inline int test_bit_le(int nr, const volatile void *addr)
256{ 268{
257 char retval; 269 char retval;
258 270
@@ -271,10 +283,10 @@ static __inline__ int ext2_test_bit(int nr, const volatile void * addr)
271 return retval; 283 return retval;
272} 284}
273 285
274#define ext2_find_first_zero_bit(addr, size) \ 286#define find_first_zero_bit_le(addr, size) \
275 ext2_find_next_zero_bit((addr), (size), 0) 287 find_next_zero_bit_le((addr), (size), 0)
276 288
277static __inline__ unsigned long ext2_find_next_zero_bit(void *addr, unsigned long size, unsigned long offset) 289static inline unsigned long find_next_zero_bit_le(void *addr, unsigned long size, unsigned long offset)
278{ 290{
279 unsigned long *p = ((unsigned long *) addr) + (offset >> 5); 291 unsigned long *p = ((unsigned long *) addr) + (offset >> 5);
280 unsigned long result = offset & ~31UL; 292 unsigned long result = offset & ~31UL;
@@ -324,10 +336,6 @@ found_middle:
324 return result + ffz(__swab32(tmp)); 336 return result + ffz(__swab32(tmp));
325} 337}
326 338
327#define ext2_find_next_bit(addr, size, off) \
328 generic_find_next_le_bit((unsigned long *)(addr), (size), (off))
329#include <asm-generic/bitops/minix.h>
330
331#endif /* __KERNEL__ */ 339#endif /* __KERNEL__ */
332 340
333#include <asm-generic/bitops/fls.h> 341#include <asm-generic/bitops/fls.h>
diff --git a/arch/m68k/include/asm/bootstd.h b/arch/m68k/include/asm/bootstd.h
index bdc1a4ac4fe9..e518f5a575b7 100644
--- a/arch/m68k/include/asm/bootstd.h
+++ b/arch/m68k/include/asm/bootstd.h
@@ -31,7 +31,7 @@
31#define __BN_flash_write_range 20 31#define __BN_flash_write_range 20
32 32
33/* Calling conventions compatible to (uC)linux/68k 33/* Calling conventions compatible to (uC)linux/68k
34 * We use simmilar macros to call into the bootloader as for uClinux 34 * We use similar macros to call into the bootloader as for uClinux
35 */ 35 */
36 36
37#define __bsc_return(type, res) \ 37#define __bsc_return(type, res) \
diff --git a/arch/m68k/include/asm/commproc.h b/arch/m68k/include/asm/commproc.h
index edf5eb6c08d2..a73998528d26 100644
--- a/arch/m68k/include/asm/commproc.h
+++ b/arch/m68k/include/asm/commproc.h
@@ -88,7 +88,7 @@ typedef struct cpm_buf_desc {
88 88
89 89
90/* rx bd status/control bits */ 90/* rx bd status/control bits */
91#define BD_SC_EMPTY ((ushort)0x8000) /* Recieve is empty */ 91#define BD_SC_EMPTY ((ushort)0x8000) /* Receive is empty */
92#define BD_SC_WRAP ((ushort)0x2000) /* Last buffer descriptor in table */ 92#define BD_SC_WRAP ((ushort)0x2000) /* Last buffer descriptor in table */
93#define BD_SC_INTRPT ((ushort)0x1000) /* Interrupt on change */ 93#define BD_SC_INTRPT ((ushort)0x1000) /* Interrupt on change */
94#define BD_SC_LAST ((ushort)0x0800) /* Last buffer in frame OR control char */ 94#define BD_SC_LAST ((ushort)0x0800) /* Last buffer in frame OR control char */
@@ -96,7 +96,7 @@ typedef struct cpm_buf_desc {
96#define BD_SC_FIRST ((ushort)0x0400) /* 1st buffer in an HDLC frame */ 96#define BD_SC_FIRST ((ushort)0x0400) /* 1st buffer in an HDLC frame */
97#define BD_SC_ADDR ((ushort)0x0400) /* 1st byte is a multidrop address */ 97#define BD_SC_ADDR ((ushort)0x0400) /* 1st byte is a multidrop address */
98 98
99#define BD_SC_CM ((ushort)0x0200) /* Continous mode */ 99#define BD_SC_CM ((ushort)0x0200) /* Continuous mode */
100#define BD_SC_ID ((ushort)0x0100) /* Received too many idles */ 100#define BD_SC_ID ((ushort)0x0100) /* Received too many idles */
101 101
102#define BD_SC_AM ((ushort)0x0080) /* Multidrop address match */ 102#define BD_SC_AM ((ushort)0x0080) /* Multidrop address match */
diff --git a/arch/m68k/include/asm/delay_no.h b/arch/m68k/include/asm/delay_no.h
index 55cbd6294ab6..c3a0edc90f21 100644
--- a/arch/m68k/include/asm/delay_no.h
+++ b/arch/m68k/include/asm/delay_no.h
@@ -16,7 +16,7 @@ static inline void __delay(unsigned long loops)
16 * long word alignment which is the faster version. 16 * long word alignment which is the faster version.
17 * The 0x4a8e is of course a 'tstl %fp' instruction. This is better 17 * The 0x4a8e is of course a 'tstl %fp' instruction. This is better
18 * than using a NOP (0x4e71) instruction because it executes in one 18 * than using a NOP (0x4e71) instruction because it executes in one
19 * cycle not three and doesn't allow for an arbitary delay waiting 19 * cycle not three and doesn't allow for an arbitrary delay waiting
20 * for bus cycles to finish. Also fp/a6 isn't likely to cause a 20 * for bus cycles to finish. Also fp/a6 isn't likely to cause a
21 * stall waiting for the register to become valid if such is added 21 * stall waiting for the register to become valid if such is added
22 * to the coldfire at some stage. 22 * to the coldfire at some stage.
diff --git a/arch/m68k/include/asm/gpio.h b/arch/m68k/include/asm/gpio.h
index c64c7b74cf86..b2046839f4b2 100644
--- a/arch/m68k/include/asm/gpio.h
+++ b/arch/m68k/include/asm/gpio.h
@@ -31,7 +31,7 @@
31 * GPIOs in a single control area, others have some GPIOs implemented in 31 * GPIOs in a single control area, others have some GPIOs implemented in
32 * different modules. 32 * different modules.
33 * 33 *
34 * This implementation attempts accomodate the differences while presenting 34 * This implementation attempts accommodate the differences while presenting
35 * a generic interface that will optimize to as few instructions as possible. 35 * a generic interface that will optimize to as few instructions as possible.
36 */ 36 */
37#if defined(CONFIG_M5206) || defined(CONFIG_M5206e) || \ 37#if defined(CONFIG_M5206) || defined(CONFIG_M5206e) || \
diff --git a/arch/m68k/include/asm/m520xsim.h b/arch/m68k/include/asm/m520xsim.h
index 55d5a4c5fe0b..b6bf2c518bac 100644
--- a/arch/m68k/include/asm/m520xsim.h
+++ b/arch/m68k/include/asm/m520xsim.h
@@ -157,7 +157,7 @@
157#define MCFFEC_SIZE 0x800 /* Register set size */ 157#define MCFFEC_SIZE 0x800 /* Register set size */
158 158
159/* 159/*
160 * Reset Controll Unit. 160 * Reset Control Unit.
161 */ 161 */
162#define MCF_RCR 0xFC0A0000 162#define MCF_RCR 0xFC0A0000
163#define MCF_RSR 0xFC0A0001 163#define MCF_RSR 0xFC0A0001
diff --git a/arch/m68k/include/asm/m523xsim.h b/arch/m68k/include/asm/m523xsim.h
index 8996df62ede4..6235921eca4e 100644
--- a/arch/m68k/include/asm/m523xsim.h
+++ b/arch/m68k/include/asm/m523xsim.h
@@ -48,7 +48,7 @@
48#define MCFSIM_DMR1 (MCF_IPSBAR + 0x54) /* Address mask 1 */ 48#define MCFSIM_DMR1 (MCF_IPSBAR + 0x54) /* Address mask 1 */
49 49
50/* 50/*
51 * Reset Controll Unit (relative to IPSBAR). 51 * Reset Control Unit (relative to IPSBAR).
52 */ 52 */
53#define MCF_RCR 0x110000 53#define MCF_RCR 0x110000
54#define MCF_RSR 0x110001 54#define MCF_RSR 0x110001
diff --git a/arch/m68k/include/asm/m527xsim.h b/arch/m68k/include/asm/m527xsim.h
index 74855a66c050..758810ef91ec 100644
--- a/arch/m68k/include/asm/m527xsim.h
+++ b/arch/m68k/include/asm/m527xsim.h
@@ -283,7 +283,7 @@
283#endif 283#endif
284 284
285/* 285/*
286 * Reset Controll Unit (relative to IPSBAR). 286 * Reset Control Unit (relative to IPSBAR).
287 */ 287 */
288#define MCF_RCR 0x110000 288#define MCF_RCR 0x110000
289#define MCF_RSR 0x110001 289#define MCF_RSR 0x110001
diff --git a/arch/m68k/include/asm/m5307sim.h b/arch/m68k/include/asm/m5307sim.h
index 4c94c01f36c4..8f8609fcc9b8 100644
--- a/arch/m68k/include/asm/m5307sim.h
+++ b/arch/m68k/include/asm/m5307sim.h
@@ -29,7 +29,7 @@
29#define MCFSIM_SWSR 0x03 /* SW Watchdog service (r/w) */ 29#define MCFSIM_SWSR 0x03 /* SW Watchdog service (r/w) */
30#define MCFSIM_PAR 0x04 /* Pin Assignment reg (r/w) */ 30#define MCFSIM_PAR 0x04 /* Pin Assignment reg (r/w) */
31#define MCFSIM_IRQPAR 0x06 /* Interrupt Assignment reg (r/w) */ 31#define MCFSIM_IRQPAR 0x06 /* Interrupt Assignment reg (r/w) */
32#define MCFSIM_PLLCR 0x08 /* PLL Controll Reg*/ 32#define MCFSIM_PLLCR 0x08 /* PLL Control Reg*/
33#define MCFSIM_MPARK 0x0C /* BUS Master Control Reg*/ 33#define MCFSIM_MPARK 0x0C /* BUS Master Control Reg*/
34#define MCFSIM_IPR 0x40 /* Interrupt Pend reg (r/w) */ 34#define MCFSIM_IPR 0x40 /* Interrupt Pend reg (r/w) */
35#define MCFSIM_IMR 0x44 /* Interrupt Mask reg (r/w) */ 35#define MCFSIM_IMR 0x44 /* Interrupt Mask reg (r/w) */
diff --git a/arch/m68k/include/asm/m5407sim.h b/arch/m68k/include/asm/m5407sim.h
index 762c58c89050..51e00b00b8a6 100644
--- a/arch/m68k/include/asm/m5407sim.h
+++ b/arch/m68k/include/asm/m5407sim.h
@@ -29,7 +29,7 @@
29#define MCFSIM_SWSR 0x03 /* SW Watchdog service (r/w) */ 29#define MCFSIM_SWSR 0x03 /* SW Watchdog service (r/w) */
30#define MCFSIM_PAR 0x04 /* Pin Assignment reg (r/w) */ 30#define MCFSIM_PAR 0x04 /* Pin Assignment reg (r/w) */
31#define MCFSIM_IRQPAR 0x06 /* Interrupt Assignment reg (r/w) */ 31#define MCFSIM_IRQPAR 0x06 /* Interrupt Assignment reg (r/w) */
32#define MCFSIM_PLLCR 0x08 /* PLL Controll Reg*/ 32#define MCFSIM_PLLCR 0x08 /* PLL Control Reg*/
33#define MCFSIM_MPARK 0x0C /* BUS Master Control Reg*/ 33#define MCFSIM_MPARK 0x0C /* BUS Master Control Reg*/
34#define MCFSIM_IPR 0x40 /* Interrupt Pend reg (r/w) */ 34#define MCFSIM_IPR 0x40 /* Interrupt Pend reg (r/w) */
35#define MCFSIM_IMR 0x44 /* Interrupt Mask reg (r/w) */ 35#define MCFSIM_IMR 0x44 /* Interrupt Mask reg (r/w) */
diff --git a/arch/m68k/include/asm/m68360_quicc.h b/arch/m68k/include/asm/m68360_quicc.h
index 6d40f4d18e10..59414cc108d3 100644
--- a/arch/m68k/include/asm/m68360_quicc.h
+++ b/arch/m68k/include/asm/m68360_quicc.h
@@ -32,7 +32,7 @@ struct user_data {
32 /* BASE + 0x000: user data memory */ 32 /* BASE + 0x000: user data memory */
33 volatile unsigned char udata_bd_ucode[0x400]; /*user data bd's Ucode*/ 33 volatile unsigned char udata_bd_ucode[0x400]; /*user data bd's Ucode*/
34 volatile unsigned char udata_bd[0x200]; /*user data Ucode */ 34 volatile unsigned char udata_bd[0x200]; /*user data Ucode */
35 volatile unsigned char ucode_ext[0x100]; /*Ucode Extention ram */ 35 volatile unsigned char ucode_ext[0x100]; /*Ucode Extension ram */
36 volatile unsigned char RESERVED1[0x500]; /* Reserved area */ 36 volatile unsigned char RESERVED1[0x500]; /* Reserved area */
37}; 37};
38#else 38#else
diff --git a/arch/m68k/include/asm/mac_oss.h b/arch/m68k/include/asm/mac_oss.h
index 7221f7251934..3cf2b6ed685a 100644
--- a/arch/m68k/include/asm/mac_oss.h
+++ b/arch/m68k/include/asm/mac_oss.h
@@ -61,7 +61,7 @@
61/* 61/*
62 * OSS Interrupt levels for various sub-systems 62 * OSS Interrupt levels for various sub-systems
63 * 63 *
64 * This mapping is layed out with two things in mind: first, we try to keep 64 * This mapping is laid out with two things in mind: first, we try to keep
65 * things on their own levels to avoid having to do double-dispatches. Second, 65 * things on their own levels to avoid having to do double-dispatches. Second,
66 * the levels match as closely as possible the alternate IRQ mapping mode (aka 66 * the levels match as closely as possible the alternate IRQ mapping mode (aka
67 * "A/UX mode") available on some VIA machines. 67 * "A/UX mode") available on some VIA machines.
diff --git a/arch/m68k/include/asm/mac_via.h b/arch/m68k/include/asm/mac_via.h
index 39afb438b656..a59665e1d41b 100644
--- a/arch/m68k/include/asm/mac_via.h
+++ b/arch/m68k/include/asm/mac_via.h
@@ -204,7 +204,7 @@
204#define vT2CL 0x1000 /* [VIA only] Timer two counter low. */ 204#define vT2CL 0x1000 /* [VIA only] Timer two counter low. */
205#define vT2CH 0x1200 /* [VIA only] Timer two counter high. */ 205#define vT2CH 0x1200 /* [VIA only] Timer two counter high. */
206#define vSR 0x1400 /* [VIA only] Shift register. */ 206#define vSR 0x1400 /* [VIA only] Shift register. */
207#define vACR 0x1600 /* [VIA only] Auxilary control register. */ 207#define vACR 0x1600 /* [VIA only] Auxiliary control register. */
208#define vPCR 0x1800 /* [VIA only] Peripheral control register. */ 208#define vPCR 0x1800 /* [VIA only] Peripheral control register. */
209 /* CHRP sez never ever to *write* this. 209 /* CHRP sez never ever to *write* this.
210 * Mac family says never to *change* this. 210 * Mac family says never to *change* this.
diff --git a/arch/m68k/include/asm/macintosh.h b/arch/m68k/include/asm/macintosh.h
index 50db3591ca15..c2a1c5eac1a6 100644
--- a/arch/m68k/include/asm/macintosh.h
+++ b/arch/m68k/include/asm/macintosh.h
@@ -14,7 +14,7 @@ extern void mac_init_IRQ(void);
14extern int mac_irq_pending(unsigned int); 14extern int mac_irq_pending(unsigned int);
15 15
16/* 16/*
17 * Floppy driver magic hook - probably shouldnt be here 17 * Floppy driver magic hook - probably shouldn't be here
18 */ 18 */
19 19
20extern void via1_set_head(int); 20extern void via1_set_head(int);
diff --git a/arch/m68k/include/asm/mcftimer.h b/arch/m68k/include/asm/mcftimer.h
index 92b276fe8240..351c27237874 100644
--- a/arch/m68k/include/asm/mcftimer.h
+++ b/arch/m68k/include/asm/mcftimer.h
@@ -27,7 +27,7 @@
27 27
28/* 28/*
29 * Bit definitions for the Timer Mode Register (TMR). 29 * Bit definitions for the Timer Mode Register (TMR).
30 * Register bit flags are common accross ColdFires. 30 * Register bit flags are common across ColdFires.
31 */ 31 */
32#define MCFTIMER_TMR_PREMASK 0xff00 /* Prescalar mask */ 32#define MCFTIMER_TMR_PREMASK 0xff00 /* Prescalar mask */
33#define MCFTIMER_TMR_DISCE 0x0000 /* Disable capture */ 33#define MCFTIMER_TMR_DISCE 0x0000 /* Disable capture */
diff --git a/arch/m68k/include/asm/types.h b/arch/m68k/include/asm/types.h
index 6441cb5f8e7c..b17fd115a4e7 100644
--- a/arch/m68k/include/asm/types.h
+++ b/arch/m68k/include/asm/types.h
@@ -23,15 +23,6 @@ typedef unsigned short umode_t;
23 23
24#define BITS_PER_LONG 32 24#define BITS_PER_LONG 32
25 25
26#ifndef __ASSEMBLY__
27
28/* DMA addresses are always 32-bits wide */
29
30typedef u32 dma_addr_t;
31typedef u32 dma64_addr_t;
32
33#endif /* __ASSEMBLY__ */
34
35#endif /* __KERNEL__ */ 26#endif /* __KERNEL__ */
36 27
37#endif /* _M68K_TYPES_H */ 28#endif /* _M68K_TYPES_H */
diff --git a/arch/m68k/include/asm/unistd.h b/arch/m68k/include/asm/unistd.h
index 26d851d385bb..29e17907d9f2 100644
--- a/arch/m68k/include/asm/unistd.h
+++ b/arch/m68k/include/asm/unistd.h
@@ -343,10 +343,14 @@
343#define __NR_fanotify_init 337 343#define __NR_fanotify_init 337
344#define __NR_fanotify_mark 338 344#define __NR_fanotify_mark 338
345#define __NR_prlimit64 339 345#define __NR_prlimit64 339
346#define __NR_name_to_handle_at 340
347#define __NR_open_by_handle_at 341
348#define __NR_clock_adjtime 342
349#define __NR_syncfs 343
346 350
347#ifdef __KERNEL__ 351#ifdef __KERNEL__
348 352
349#define NR_syscalls 340 353#define NR_syscalls 344
350 354
351#define __ARCH_WANT_IPC_PARSE_VERSION 355#define __ARCH_WANT_IPC_PARSE_VERSION
352#define __ARCH_WANT_OLD_READDIR 356#define __ARCH_WANT_OLD_READDIR
diff --git a/arch/m68k/kernel/Makefile b/arch/m68k/kernel/Makefile
index 55d5d6b680a2..c482ebc9dd54 100644
--- a/arch/m68k/kernel/Makefile
+++ b/arch/m68k/kernel/Makefile
@@ -1,17 +1,5 @@
1# 1ifdef CONFIG_MMU
2# Makefile for the linux kernel. 2include arch/m68k/kernel/Makefile_mm
3#
4
5ifndef CONFIG_SUN3
6 extra-y := head.o
7else 3else
8 extra-y := sun3-head.o 4include arch/m68k/kernel/Makefile_no
9endif 5endif
10extra-y += vmlinux.lds
11
12obj-y := entry.o process.o traps.o ints.o signal.o ptrace.o module.o \
13 sys_m68k.o time.o setup.o m68k_ksyms.o devres.o
14
15devres-y = ../../../kernel/irq/devres.o
16
17obj-y$(CONFIG_MMU_SUN3) += dma.o # no, it's not a typo
diff --git a/arch/m68k/kernel/Makefile_mm b/arch/m68k/kernel/Makefile_mm
new file mode 100644
index 000000000000..55d5d6b680a2
--- /dev/null
+++ b/arch/m68k/kernel/Makefile_mm
@@ -0,0 +1,17 @@
1#
2# Makefile for the linux kernel.
3#
4
5ifndef CONFIG_SUN3
6 extra-y := head.o
7else
8 extra-y := sun3-head.o
9endif
10extra-y += vmlinux.lds
11
12obj-y := entry.o process.o traps.o ints.o signal.o ptrace.o module.o \
13 sys_m68k.o time.o setup.o m68k_ksyms.o devres.o
14
15devres-y = ../../../kernel/irq/devres.o
16
17obj-y$(CONFIG_MMU_SUN3) += dma.o # no, it's not a typo
diff --git a/arch/m68k/kernel/Makefile_no b/arch/m68k/kernel/Makefile_no
new file mode 100644
index 000000000000..37c3fc074c0a
--- /dev/null
+++ b/arch/m68k/kernel/Makefile_no
@@ -0,0 +1,10 @@
1#
2# Makefile for arch/m68knommu/kernel.
3#
4
5extra-y := vmlinux.lds
6
7obj-y += dma.o entry.o init_task.o irq.o m68k_ksyms.o process.o ptrace.o \
8 setup.o signal.o syscalltable.o sys_m68k.o time.o traps.o
9
10obj-$(CONFIG_MODULES) += module.o
diff --git a/arch/m68k/kernel/asm-offsets.c b/arch/m68k/kernel/asm-offsets.c
index 78e59b82ebc3..59a69a5c62f2 100644
--- a/arch/m68k/kernel/asm-offsets.c
+++ b/arch/m68k/kernel/asm-offsets.c
@@ -1,100 +1,5 @@
1/*
2 * This program is used to generate definitions needed by
3 * assembly language modules.
4 *
5 * We use the technique used in the OSF Mach kernel code:
6 * generate asm statements containing #defines,
7 * compile this file to assembler, and then extract the
8 * #defines from the assembly-language output.
9 */
10
11#define ASM_OFFSETS_C
12
13#include <linux/stddef.h>
14#include <linux/sched.h>
15#include <linux/kernel_stat.h>
16#include <linux/kbuild.h>
17#include <asm/bootinfo.h>
18#include <asm/irq.h>
19#include <asm/amigahw.h>
20#include <linux/font.h>
21
22int main(void)
23{
24 /* offsets into the task struct */
25 DEFINE(TASK_THREAD, offsetof(struct task_struct, thread));
26 DEFINE(TASK_INFO, offsetof(struct task_struct, thread.info));
27 DEFINE(TASK_MM, offsetof(struct task_struct, mm));
28#ifdef CONFIG_MMU 1#ifdef CONFIG_MMU
29 DEFINE(TASK_TINFO, offsetof(struct task_struct, thread.info)); 2#include "asm-offsets_mm.c"
3#else
4#include "asm-offsets_no.c"
30#endif 5#endif
31
32 /* offsets into the thread struct */
33 DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp));
34 DEFINE(THREAD_USP, offsetof(struct thread_struct, usp));
35 DEFINE(THREAD_SR, offsetof(struct thread_struct, sr));
36 DEFINE(THREAD_FS, offsetof(struct thread_struct, fs));
37 DEFINE(THREAD_CRP, offsetof(struct thread_struct, crp));
38 DEFINE(THREAD_ESP0, offsetof(struct thread_struct, esp0));
39 DEFINE(THREAD_FPREG, offsetof(struct thread_struct, fp));
40 DEFINE(THREAD_FPCNTL, offsetof(struct thread_struct, fpcntl));
41 DEFINE(THREAD_FPSTATE, offsetof(struct thread_struct, fpstate));
42
43 /* offsets into the thread_info struct */
44 DEFINE(TINFO_PREEMPT, offsetof(struct thread_info, preempt_count));
45 DEFINE(TINFO_FLAGS, offsetof(struct thread_info, flags));
46
47 /* offsets into the pt_regs */
48 DEFINE(PT_OFF_D0, offsetof(struct pt_regs, d0));
49 DEFINE(PT_OFF_ORIG_D0, offsetof(struct pt_regs, orig_d0));
50 DEFINE(PT_OFF_D1, offsetof(struct pt_regs, d1));
51 DEFINE(PT_OFF_D2, offsetof(struct pt_regs, d2));
52 DEFINE(PT_OFF_D3, offsetof(struct pt_regs, d3));
53 DEFINE(PT_OFF_D4, offsetof(struct pt_regs, d4));
54 DEFINE(PT_OFF_D5, offsetof(struct pt_regs, d5));
55 DEFINE(PT_OFF_A0, offsetof(struct pt_regs, a0));
56 DEFINE(PT_OFF_A1, offsetof(struct pt_regs, a1));
57 DEFINE(PT_OFF_A2, offsetof(struct pt_regs, a2));
58 DEFINE(PT_OFF_PC, offsetof(struct pt_regs, pc));
59 DEFINE(PT_OFF_SR, offsetof(struct pt_regs, sr));
60 /* bitfields are a bit difficult */
61 DEFINE(PT_OFF_FORMATVEC, offsetof(struct pt_regs, pc) + 4);
62
63 /* offsets into the irq_cpustat_t struct */
64 DEFINE(CPUSTAT_SOFTIRQ_PENDING, offsetof(irq_cpustat_t, __softirq_pending));
65
66 /* offsets into the bi_record struct */
67 DEFINE(BIR_TAG, offsetof(struct bi_record, tag));
68 DEFINE(BIR_SIZE, offsetof(struct bi_record, size));
69 DEFINE(BIR_DATA, offsetof(struct bi_record, data));
70
71 /* offsets into font_desc (drivers/video/console/font.h) */
72 DEFINE(FONT_DESC_IDX, offsetof(struct font_desc, idx));
73 DEFINE(FONT_DESC_NAME, offsetof(struct font_desc, name));
74 DEFINE(FONT_DESC_WIDTH, offsetof(struct font_desc, width));
75 DEFINE(FONT_DESC_HEIGHT, offsetof(struct font_desc, height));
76 DEFINE(FONT_DESC_DATA, offsetof(struct font_desc, data));
77 DEFINE(FONT_DESC_PREF, offsetof(struct font_desc, pref));
78
79 /* signal defines */
80 DEFINE(LSIGSEGV, SIGSEGV);
81 DEFINE(LSEGV_MAPERR, SEGV_MAPERR);
82 DEFINE(LSIGTRAP, SIGTRAP);
83 DEFINE(LTRAP_TRACE, TRAP_TRACE);
84
85 /* offsets into the custom struct */
86 DEFINE(CUSTOMBASE, &amiga_custom);
87 DEFINE(C_INTENAR, offsetof(struct CUSTOM, intenar));
88 DEFINE(C_INTREQR, offsetof(struct CUSTOM, intreqr));
89 DEFINE(C_INTENA, offsetof(struct CUSTOM, intena));
90 DEFINE(C_INTREQ, offsetof(struct CUSTOM, intreq));
91 DEFINE(C_SERDATR, offsetof(struct CUSTOM, serdatr));
92 DEFINE(C_SERDAT, offsetof(struct CUSTOM, serdat));
93 DEFINE(C_SERPER, offsetof(struct CUSTOM, serper));
94 DEFINE(CIAABASE, &ciaa);
95 DEFINE(CIABBASE, &ciab);
96 DEFINE(C_PRA, offsetof(struct CIA, pra));
97 DEFINE(ZTWOBASE, zTwoBase);
98
99 return 0;
100}
diff --git a/arch/m68k/kernel/asm-offsets_mm.c b/arch/m68k/kernel/asm-offsets_mm.c
new file mode 100644
index 000000000000..78e59b82ebc3
--- /dev/null
+++ b/arch/m68k/kernel/asm-offsets_mm.c
@@ -0,0 +1,100 @@
1/*
2 * This program is used to generate definitions needed by
3 * assembly language modules.
4 *
5 * We use the technique used in the OSF Mach kernel code:
6 * generate asm statements containing #defines,
7 * compile this file to assembler, and then extract the
8 * #defines from the assembly-language output.
9 */
10
11#define ASM_OFFSETS_C
12
13#include <linux/stddef.h>
14#include <linux/sched.h>
15#include <linux/kernel_stat.h>
16#include <linux/kbuild.h>
17#include <asm/bootinfo.h>
18#include <asm/irq.h>
19#include <asm/amigahw.h>
20#include <linux/font.h>
21
22int main(void)
23{
24 /* offsets into the task struct */
25 DEFINE(TASK_THREAD, offsetof(struct task_struct, thread));
26 DEFINE(TASK_INFO, offsetof(struct task_struct, thread.info));
27 DEFINE(TASK_MM, offsetof(struct task_struct, mm));
28#ifdef CONFIG_MMU
29 DEFINE(TASK_TINFO, offsetof(struct task_struct, thread.info));
30#endif
31
32 /* offsets into the thread struct */
33 DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp));
34 DEFINE(THREAD_USP, offsetof(struct thread_struct, usp));
35 DEFINE(THREAD_SR, offsetof(struct thread_struct, sr));
36 DEFINE(THREAD_FS, offsetof(struct thread_struct, fs));
37 DEFINE(THREAD_CRP, offsetof(struct thread_struct, crp));
38 DEFINE(THREAD_ESP0, offsetof(struct thread_struct, esp0));
39 DEFINE(THREAD_FPREG, offsetof(struct thread_struct, fp));
40 DEFINE(THREAD_FPCNTL, offsetof(struct thread_struct, fpcntl));
41 DEFINE(THREAD_FPSTATE, offsetof(struct thread_struct, fpstate));
42
43 /* offsets into the thread_info struct */
44 DEFINE(TINFO_PREEMPT, offsetof(struct thread_info, preempt_count));
45 DEFINE(TINFO_FLAGS, offsetof(struct thread_info, flags));
46
47 /* offsets into the pt_regs */
48 DEFINE(PT_OFF_D0, offsetof(struct pt_regs, d0));
49 DEFINE(PT_OFF_ORIG_D0, offsetof(struct pt_regs, orig_d0));
50 DEFINE(PT_OFF_D1, offsetof(struct pt_regs, d1));
51 DEFINE(PT_OFF_D2, offsetof(struct pt_regs, d2));
52 DEFINE(PT_OFF_D3, offsetof(struct pt_regs, d3));
53 DEFINE(PT_OFF_D4, offsetof(struct pt_regs, d4));
54 DEFINE(PT_OFF_D5, offsetof(struct pt_regs, d5));
55 DEFINE(PT_OFF_A0, offsetof(struct pt_regs, a0));
56 DEFINE(PT_OFF_A1, offsetof(struct pt_regs, a1));
57 DEFINE(PT_OFF_A2, offsetof(struct pt_regs, a2));
58 DEFINE(PT_OFF_PC, offsetof(struct pt_regs, pc));
59 DEFINE(PT_OFF_SR, offsetof(struct pt_regs, sr));
60 /* bitfields are a bit difficult */
61 DEFINE(PT_OFF_FORMATVEC, offsetof(struct pt_regs, pc) + 4);
62
63 /* offsets into the irq_cpustat_t struct */
64 DEFINE(CPUSTAT_SOFTIRQ_PENDING, offsetof(irq_cpustat_t, __softirq_pending));
65
66 /* offsets into the bi_record struct */
67 DEFINE(BIR_TAG, offsetof(struct bi_record, tag));
68 DEFINE(BIR_SIZE, offsetof(struct bi_record, size));
69 DEFINE(BIR_DATA, offsetof(struct bi_record, data));
70
71 /* offsets into font_desc (drivers/video/console/font.h) */
72 DEFINE(FONT_DESC_IDX, offsetof(struct font_desc, idx));
73 DEFINE(FONT_DESC_NAME, offsetof(struct font_desc, name));
74 DEFINE(FONT_DESC_WIDTH, offsetof(struct font_desc, width));
75 DEFINE(FONT_DESC_HEIGHT, offsetof(struct font_desc, height));
76 DEFINE(FONT_DESC_DATA, offsetof(struct font_desc, data));
77 DEFINE(FONT_DESC_PREF, offsetof(struct font_desc, pref));
78
79 /* signal defines */
80 DEFINE(LSIGSEGV, SIGSEGV);
81 DEFINE(LSEGV_MAPERR, SEGV_MAPERR);
82 DEFINE(LSIGTRAP, SIGTRAP);
83 DEFINE(LTRAP_TRACE, TRAP_TRACE);
84
85 /* offsets into the custom struct */
86 DEFINE(CUSTOMBASE, &amiga_custom);
87 DEFINE(C_INTENAR, offsetof(struct CUSTOM, intenar));
88 DEFINE(C_INTREQR, offsetof(struct CUSTOM, intreqr));
89 DEFINE(C_INTENA, offsetof(struct CUSTOM, intena));
90 DEFINE(C_INTREQ, offsetof(struct CUSTOM, intreq));
91 DEFINE(C_SERDATR, offsetof(struct CUSTOM, serdatr));
92 DEFINE(C_SERDAT, offsetof(struct CUSTOM, serdat));
93 DEFINE(C_SERPER, offsetof(struct CUSTOM, serper));
94 DEFINE(CIAABASE, &ciaa);
95 DEFINE(CIABBASE, &ciab);
96 DEFINE(C_PRA, offsetof(struct CIA, pra));
97 DEFINE(ZTWOBASE, zTwoBase);
98
99 return 0;
100}
diff --git a/arch/m68k/kernel/asm-offsets_no.c b/arch/m68k/kernel/asm-offsets_no.c
new file mode 100644
index 000000000000..ffe02f41ad46
--- /dev/null
+++ b/arch/m68k/kernel/asm-offsets_no.c
@@ -0,0 +1,76 @@
1/*
2 * This program is used to generate definitions needed by
3 * assembly language modules.
4 *
5 * We use the technique used in the OSF Mach kernel code:
6 * generate asm statements containing #defines,
7 * compile this file to assembler, and then extract the
8 * #defines from the assembly-language output.
9 */
10
11#include <linux/stddef.h>
12#include <linux/sched.h>
13#include <linux/kernel_stat.h>
14#include <linux/ptrace.h>
15#include <linux/hardirq.h>
16#include <linux/kbuild.h>
17#include <asm/bootinfo.h>
18#include <asm/irq.h>
19#include <asm/thread_info.h>
20
21int main(void)
22{
23 /* offsets into the task struct */
24 DEFINE(TASK_THREAD, offsetof(struct task_struct, thread));
25 DEFINE(TASK_MM, offsetof(struct task_struct, mm));
26
27 /* offsets into the irq_cpustat_t struct */
28 DEFINE(CPUSTAT_SOFTIRQ_PENDING, offsetof(irq_cpustat_t, __softirq_pending));
29
30 /* offsets into the thread struct */
31 DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp));
32 DEFINE(THREAD_USP, offsetof(struct thread_struct, usp));
33 DEFINE(THREAD_SR, offsetof(struct thread_struct, sr));
34 DEFINE(THREAD_FS, offsetof(struct thread_struct, fs));
35 DEFINE(THREAD_CRP, offsetof(struct thread_struct, crp));
36 DEFINE(THREAD_ESP0, offsetof(struct thread_struct, esp0));
37 DEFINE(THREAD_FPREG, offsetof(struct thread_struct, fp));
38 DEFINE(THREAD_FPCNTL, offsetof(struct thread_struct, fpcntl));
39 DEFINE(THREAD_FPSTATE, offsetof(struct thread_struct, fpstate));
40
41 /* offsets into the pt_regs */
42 DEFINE(PT_OFF_D0, offsetof(struct pt_regs, d0));
43 DEFINE(PT_OFF_ORIG_D0, offsetof(struct pt_regs, orig_d0));
44 DEFINE(PT_OFF_D1, offsetof(struct pt_regs, d1));
45 DEFINE(PT_OFF_D2, offsetof(struct pt_regs, d2));
46 DEFINE(PT_OFF_D3, offsetof(struct pt_regs, d3));
47 DEFINE(PT_OFF_D4, offsetof(struct pt_regs, d4));
48 DEFINE(PT_OFF_D5, offsetof(struct pt_regs, d5));
49 DEFINE(PT_OFF_A0, offsetof(struct pt_regs, a0));
50 DEFINE(PT_OFF_A1, offsetof(struct pt_regs, a1));
51 DEFINE(PT_OFF_A2, offsetof(struct pt_regs, a2));
52 DEFINE(PT_OFF_PC, offsetof(struct pt_regs, pc));
53 DEFINE(PT_OFF_SR, offsetof(struct pt_regs, sr));
54
55#ifdef CONFIG_COLDFIRE
56 /* bitfields are a bit difficult */
57 DEFINE(PT_OFF_FORMATVEC, offsetof(struct pt_regs, sr) - 2);
58#else
59 /* bitfields are a bit difficult */
60 DEFINE(PT_OFF_FORMATVEC, offsetof(struct pt_regs, pc) + 4);
61#endif
62
63 /* signal defines */
64 DEFINE(SIGSEGV, SIGSEGV);
65 DEFINE(SEGV_MAPERR, SEGV_MAPERR);
66 DEFINE(SIGTRAP, SIGTRAP);
67 DEFINE(TRAP_TRACE, TRAP_TRACE);
68
69 DEFINE(PT_PTRACED, PT_PTRACED);
70
71 /* Offsets in thread_info structure */
72 DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
73 DEFINE(TI_PREEMPTCOUNT, offsetof(struct thread_info, preempt_count));
74
75 return 0;
76}
diff --git a/arch/m68k/kernel/dma.c b/arch/m68k/kernel/dma.c
index 4bbb3c2a8880..90e8cb726c8c 100644
--- a/arch/m68k/kernel/dma.c
+++ b/arch/m68k/kernel/dma.c
@@ -1,130 +1,5 @@
1/* 1#ifdef CONFIG_MMU
2 * This file is subject to the terms and conditions of the GNU General Public 2#include "dma_mm.c"
3 * License. See the file COPYING in the main directory of this archive 3#else
4 * for more details. 4#include "dma_no.c"
5 */ 5#endif
6
7#undef DEBUG
8
9#include <linux/dma-mapping.h>
10#include <linux/device.h>
11#include <linux/kernel.h>
12#include <linux/scatterlist.h>
13#include <linux/slab.h>
14#include <linux/vmalloc.h>
15
16#include <asm/pgalloc.h>
17
18void *dma_alloc_coherent(struct device *dev, size_t size,
19 dma_addr_t *handle, gfp_t flag)
20{
21 struct page *page, **map;
22 pgprot_t pgprot;
23 void *addr;
24 int i, order;
25
26 pr_debug("dma_alloc_coherent: %d,%x\n", size, flag);
27
28 size = PAGE_ALIGN(size);
29 order = get_order(size);
30
31 page = alloc_pages(flag, order);
32 if (!page)
33 return NULL;
34
35 *handle = page_to_phys(page);
36 map = kmalloc(sizeof(struct page *) << order, flag & ~__GFP_DMA);
37 if (!map) {
38 __free_pages(page, order);
39 return NULL;
40 }
41 split_page(page, order);
42
43 order = 1 << order;
44 size >>= PAGE_SHIFT;
45 map[0] = page;
46 for (i = 1; i < size; i++)
47 map[i] = page + i;
48 for (; i < order; i++)
49 __free_page(page + i);
50 pgprot = __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_DIRTY);
51 if (CPU_IS_040_OR_060)
52 pgprot_val(pgprot) |= _PAGE_GLOBAL040 | _PAGE_NOCACHE_S;
53 else
54 pgprot_val(pgprot) |= _PAGE_NOCACHE030;
55 addr = vmap(map, size, VM_MAP, pgprot);
56 kfree(map);
57
58 return addr;
59}
60EXPORT_SYMBOL(dma_alloc_coherent);
61
62void dma_free_coherent(struct device *dev, size_t size,
63 void *addr, dma_addr_t handle)
64{
65 pr_debug("dma_free_coherent: %p, %x\n", addr, handle);
66 vfree(addr);
67}
68EXPORT_SYMBOL(dma_free_coherent);
69
70void dma_sync_single_for_device(struct device *dev, dma_addr_t handle,
71 size_t size, enum dma_data_direction dir)
72{
73 switch (dir) {
74 case DMA_TO_DEVICE:
75 cache_push(handle, size);
76 break;
77 case DMA_FROM_DEVICE:
78 cache_clear(handle, size);
79 break;
80 default:
81 if (printk_ratelimit())
82 printk("dma_sync_single_for_device: unsupported dir %u\n", dir);
83 break;
84 }
85}
86EXPORT_SYMBOL(dma_sync_single_for_device);
87
88void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,
89 enum dma_data_direction dir)
90{
91 int i;
92
93 for (i = 0; i < nents; sg++, i++)
94 dma_sync_single_for_device(dev, sg->dma_address, sg->length, dir);
95}
96EXPORT_SYMBOL(dma_sync_sg_for_device);
97
98dma_addr_t dma_map_single(struct device *dev, void *addr, size_t size,
99 enum dma_data_direction dir)
100{
101 dma_addr_t handle = virt_to_bus(addr);
102
103 dma_sync_single_for_device(dev, handle, size, dir);
104 return handle;
105}
106EXPORT_SYMBOL(dma_map_single);
107
108dma_addr_t dma_map_page(struct device *dev, struct page *page,
109 unsigned long offset, size_t size,
110 enum dma_data_direction dir)
111{
112 dma_addr_t handle = page_to_phys(page) + offset;
113
114 dma_sync_single_for_device(dev, handle, size, dir);
115 return handle;
116}
117EXPORT_SYMBOL(dma_map_page);
118
119int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
120 enum dma_data_direction dir)
121{
122 int i;
123
124 for (i = 0; i < nents; sg++, i++) {
125 sg->dma_address = sg_phys(sg);
126 dma_sync_single_for_device(dev, sg->dma_address, sg->length, dir);
127 }
128 return nents;
129}
130EXPORT_SYMBOL(dma_map_sg);
diff --git a/arch/m68k/kernel/dma_mm.c b/arch/m68k/kernel/dma_mm.c
new file mode 100644
index 000000000000..4bbb3c2a8880
--- /dev/null
+++ b/arch/m68k/kernel/dma_mm.c
@@ -0,0 +1,130 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file COPYING in the main directory of this archive
4 * for more details.
5 */
6
7#undef DEBUG
8
9#include <linux/dma-mapping.h>
10#include <linux/device.h>
11#include <linux/kernel.h>
12#include <linux/scatterlist.h>
13#include <linux/slab.h>
14#include <linux/vmalloc.h>
15
16#include <asm/pgalloc.h>
17
18void *dma_alloc_coherent(struct device *dev, size_t size,
19 dma_addr_t *handle, gfp_t flag)
20{
21 struct page *page, **map;
22 pgprot_t pgprot;
23 void *addr;
24 int i, order;
25
26 pr_debug("dma_alloc_coherent: %d,%x\n", size, flag);
27
28 size = PAGE_ALIGN(size);
29 order = get_order(size);
30
31 page = alloc_pages(flag, order);
32 if (!page)
33 return NULL;
34
35 *handle = page_to_phys(page);
36 map = kmalloc(sizeof(struct page *) << order, flag & ~__GFP_DMA);
37 if (!map) {
38 __free_pages(page, order);
39 return NULL;
40 }
41 split_page(page, order);
42
43 order = 1 << order;
44 size >>= PAGE_SHIFT;
45 map[0] = page;
46 for (i = 1; i < size; i++)
47 map[i] = page + i;
48 for (; i < order; i++)
49 __free_page(page + i);
50 pgprot = __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_DIRTY);
51 if (CPU_IS_040_OR_060)
52 pgprot_val(pgprot) |= _PAGE_GLOBAL040 | _PAGE_NOCACHE_S;
53 else
54 pgprot_val(pgprot) |= _PAGE_NOCACHE030;
55 addr = vmap(map, size, VM_MAP, pgprot);
56 kfree(map);
57
58 return addr;
59}
60EXPORT_SYMBOL(dma_alloc_coherent);
61
62void dma_free_coherent(struct device *dev, size_t size,
63 void *addr, dma_addr_t handle)
64{
65 pr_debug("dma_free_coherent: %p, %x\n", addr, handle);
66 vfree(addr);
67}
68EXPORT_SYMBOL(dma_free_coherent);
69
70void dma_sync_single_for_device(struct device *dev, dma_addr_t handle,
71 size_t size, enum dma_data_direction dir)
72{
73 switch (dir) {
74 case DMA_TO_DEVICE:
75 cache_push(handle, size);
76 break;
77 case DMA_FROM_DEVICE:
78 cache_clear(handle, size);
79 break;
80 default:
81 if (printk_ratelimit())
82 printk("dma_sync_single_for_device: unsupported dir %u\n", dir);
83 break;
84 }
85}
86EXPORT_SYMBOL(dma_sync_single_for_device);
87
88void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,
89 enum dma_data_direction dir)
90{
91 int i;
92
93 for (i = 0; i < nents; sg++, i++)
94 dma_sync_single_for_device(dev, sg->dma_address, sg->length, dir);
95}
96EXPORT_SYMBOL(dma_sync_sg_for_device);
97
98dma_addr_t dma_map_single(struct device *dev, void *addr, size_t size,
99 enum dma_data_direction dir)
100{
101 dma_addr_t handle = virt_to_bus(addr);
102
103 dma_sync_single_for_device(dev, handle, size, dir);
104 return handle;
105}
106EXPORT_SYMBOL(dma_map_single);
107
108dma_addr_t dma_map_page(struct device *dev, struct page *page,
109 unsigned long offset, size_t size,
110 enum dma_data_direction dir)
111{
112 dma_addr_t handle = page_to_phys(page) + offset;
113
114 dma_sync_single_for_device(dev, handle, size, dir);
115 return handle;
116}
117EXPORT_SYMBOL(dma_map_page);
118
119int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
120 enum dma_data_direction dir)
121{
122 int i;
123
124 for (i = 0; i < nents; sg++, i++) {
125 sg->dma_address = sg_phys(sg);
126 dma_sync_single_for_device(dev, sg->dma_address, sg->length, dir);
127 }
128 return nents;
129}
130EXPORT_SYMBOL(dma_map_sg);
diff --git a/arch/m68k/kernel/dma_no.c b/arch/m68k/kernel/dma_no.c
new file mode 100644
index 000000000000..fc61541aeb71
--- /dev/null
+++ b/arch/m68k/kernel/dma_no.c
@@ -0,0 +1,74 @@
1/*
2 * Dynamic DMA mapping support.
3 *
4 * We never have any address translations to worry about, so this
5 * is just alloc/free.
6 */
7
8#include <linux/types.h>
9#include <linux/gfp.h>
10#include <linux/mm.h>
11#include <linux/device.h>
12#include <linux/dma-mapping.h>
13#include <asm/cacheflush.h>
14
15void *dma_alloc_coherent(struct device *dev, size_t size,
16 dma_addr_t *dma_handle, gfp_t gfp)
17{
18 void *ret;
19 /* ignore region specifiers */
20 gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
21
22 if (dev == NULL || (*dev->dma_mask < 0xffffffff))
23 gfp |= GFP_DMA;
24 ret = (void *)__get_free_pages(gfp, get_order(size));
25
26 if (ret != NULL) {
27 memset(ret, 0, size);
28 *dma_handle = virt_to_phys(ret);
29 }
30 return ret;
31}
32
33void dma_free_coherent(struct device *dev, size_t size,
34 void *vaddr, dma_addr_t dma_handle)
35{
36 free_pages((unsigned long)vaddr, get_order(size));
37}
38
39void dma_sync_single_for_device(struct device *dev, dma_addr_t handle,
40 size_t size, enum dma_data_direction dir)
41{
42 switch (dir) {
43 case DMA_TO_DEVICE:
44 flush_dcache_range(handle, size);
45 break;
46 case DMA_FROM_DEVICE:
47 /* Should be clear already */
48 break;
49 default:
50 if (printk_ratelimit())
51 printk("dma_sync_single_for_device: unsupported dir %u\n", dir);
52 break;
53 }
54}
55
56EXPORT_SYMBOL(dma_sync_single_for_device);
57dma_addr_t dma_map_single(struct device *dev, void *addr, size_t size,
58 enum dma_data_direction dir)
59{
60 dma_addr_t handle = virt_to_phys(addr);
61 flush_dcache_range(handle, size);
62 return handle;
63}
64EXPORT_SYMBOL(dma_map_single);
65
66dma_addr_t dma_map_page(struct device *dev, struct page *page,
67 unsigned long offset, size_t size,
68 enum dma_data_direction dir)
69{
70 dma_addr_t handle = page_to_phys(page) + offset;
71 dma_sync_single_for_device(dev, handle, size, dir);
72 return handle;
73}
74EXPORT_SYMBOL(dma_map_page);
diff --git a/arch/m68k/kernel/entry.S b/arch/m68k/kernel/entry.S
index 1559dea36e55..081cf96f243b 100644
--- a/arch/m68k/kernel/entry.S
+++ b/arch/m68k/kernel/entry.S
@@ -1,753 +1,5 @@
1/* -*- mode: asm -*- 1#ifdef CONFIG_MMU
2 * 2#include "entry_mm.S"
3 * linux/arch/m68k/kernel/entry.S 3#else
4 * 4#include "entry_no.S"
5 * Copyright (C) 1991, 1992 Linus Torvalds
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file README.legal in the main directory of this archive
9 * for more details.
10 *
11 * Linux/m68k support by Hamish Macdonald
12 *
13 * 68060 fixes by Jesper Skov
14 *
15 */
16
17/*
18 * entry.S contains the system-call and fault low-level handling routines.
19 * This also contains the timer-interrupt handler, as well as all interrupts
20 * and faults that can result in a task-switch.
21 *
22 * NOTE: This code handles signal-recognition, which happens every time
23 * after a timer-interrupt and after each system call.
24 *
25 */
26
27/*
28 * 12/03/96 Jes: Currently we only support m68k single-cpu systems, so
29 * all pointers that used to be 'current' are now entry
30 * number 0 in the 'current_set' list.
31 *
32 * 6/05/00 RZ: addedd writeback completion after return from sighandler
33 * for 68040
34 */
35
36#include <linux/linkage.h>
37#include <asm/entry.h>
38#include <asm/errno.h>
39#include <asm/setup.h>
40#include <asm/segment.h>
41#include <asm/traps.h>
42#include <asm/unistd.h>
43
44#include <asm/asm-offsets.h>
45
46.globl system_call, buserr, trap, resume
47.globl sys_call_table
48.globl sys_fork, sys_clone, sys_vfork
49.globl ret_from_interrupt, bad_interrupt
50.globl auto_irqhandler_fixup
51.globl user_irqvec_fixup, user_irqhandler_fixup
52
53.text
54ENTRY(buserr)
55 SAVE_ALL_INT
56 GET_CURRENT(%d0)
57 movel %sp,%sp@- | stack frame pointer argument
58 bsrl buserr_c
59 addql #4,%sp
60 jra .Lret_from_exception
61
62ENTRY(trap)
63 SAVE_ALL_INT
64 GET_CURRENT(%d0)
65 movel %sp,%sp@- | stack frame pointer argument
66 bsrl trap_c
67 addql #4,%sp
68 jra .Lret_from_exception
69
70 | After a fork we jump here directly from resume,
71 | so that %d1 contains the previous task
72 | schedule_tail now used regardless of CONFIG_SMP
73ENTRY(ret_from_fork)
74 movel %d1,%sp@-
75 jsr schedule_tail
76 addql #4,%sp
77 jra .Lret_from_exception
78
79do_trace_entry:
80 movel #-ENOSYS,%sp@(PT_OFF_D0)| needed for strace
81 subql #4,%sp
82 SAVE_SWITCH_STACK
83 jbsr syscall_trace
84 RESTORE_SWITCH_STACK
85 addql #4,%sp
86 movel %sp@(PT_OFF_ORIG_D0),%d0
87 cmpl #NR_syscalls,%d0
88 jcs syscall
89badsys:
90 movel #-ENOSYS,%sp@(PT_OFF_D0)
91 jra ret_from_syscall
92
93do_trace_exit:
94 subql #4,%sp
95 SAVE_SWITCH_STACK
96 jbsr syscall_trace
97 RESTORE_SWITCH_STACK
98 addql #4,%sp
99 jra .Lret_from_exception
100
101ENTRY(ret_from_signal)
102 tstb %curptr@(TASK_INFO+TINFO_FLAGS+2)
103 jge 1f
104 jbsr syscall_trace
1051: RESTORE_SWITCH_STACK
106 addql #4,%sp
107/* on 68040 complete pending writebacks if any */
108#ifdef CONFIG_M68040
109 bfextu %sp@(PT_OFF_FORMATVEC){#0,#4},%d0
110 subql #7,%d0 | bus error frame ?
111 jbne 1f
112 movel %sp,%sp@-
113 jbsr berr_040cleanup
114 addql #4,%sp
1151:
116#endif 5#endif
117 jra .Lret_from_exception
118
119ENTRY(system_call)
120 SAVE_ALL_SYS
121
122 GET_CURRENT(%d1)
123 | save top of frame
124 movel %sp,%curptr@(TASK_THREAD+THREAD_ESP0)
125
126 | syscall trace?
127 tstb %curptr@(TASK_INFO+TINFO_FLAGS+2)
128 jmi do_trace_entry
129 cmpl #NR_syscalls,%d0
130 jcc badsys
131syscall:
132 jbsr @(sys_call_table,%d0:l:4)@(0)
133 movel %d0,%sp@(PT_OFF_D0) | save the return value
134ret_from_syscall:
135 |oriw #0x0700,%sr
136 movew %curptr@(TASK_INFO+TINFO_FLAGS+2),%d0
137 jne syscall_exit_work
1381: RESTORE_ALL
139
140syscall_exit_work:
141 btst #5,%sp@(PT_OFF_SR) | check if returning to kernel
142 bnes 1b | if so, skip resched, signals
143 lslw #1,%d0
144 jcs do_trace_exit
145 jmi do_delayed_trace
146 lslw #8,%d0
147 jmi do_signal_return
148 pea resume_userspace
149 jra schedule
150
151
152ENTRY(ret_from_exception)
153.Lret_from_exception:
154 btst #5,%sp@(PT_OFF_SR) | check if returning to kernel
155 bnes 1f | if so, skip resched, signals
156 | only allow interrupts when we are really the last one on the
157 | kernel stack, otherwise stack overflow can occur during
158 | heavy interrupt load
159 andw #ALLOWINT,%sr
160
161resume_userspace:
162 moveb %curptr@(TASK_INFO+TINFO_FLAGS+3),%d0
163 jne exit_work
1641: RESTORE_ALL
165
166exit_work:
167 | save top of frame
168 movel %sp,%curptr@(TASK_THREAD+THREAD_ESP0)
169 lslb #1,%d0
170 jmi do_signal_return
171 pea resume_userspace
172 jra schedule
173
174
175do_signal_return:
176 |andw #ALLOWINT,%sr
177 subql #4,%sp | dummy return address
178 SAVE_SWITCH_STACK
179 pea %sp@(SWITCH_STACK_SIZE)
180 bsrl do_signal
181 addql #4,%sp
182 RESTORE_SWITCH_STACK
183 addql #4,%sp
184 jbra resume_userspace
185
186do_delayed_trace:
187 bclr #7,%sp@(PT_OFF_SR) | clear trace bit in SR
188 pea 1 | send SIGTRAP
189 movel %curptr,%sp@-
190 pea LSIGTRAP
191 jbsr send_sig
192 addql #8,%sp
193 addql #4,%sp
194 jbra resume_userspace
195
196
197/* This is the main interrupt handler for autovector interrupts */
198
199ENTRY(auto_inthandler)
200 SAVE_ALL_INT
201 GET_CURRENT(%d0)
202 addqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
203 | put exception # in d0
204 bfextu %sp@(PT_OFF_FORMATVEC){#4,#10},%d0
205 subw #VEC_SPUR,%d0
206
207 movel %sp,%sp@-
208 movel %d0,%sp@- | put vector # on stack
209auto_irqhandler_fixup = . + 2
210 jsr __m68k_handle_int | process the IRQ
211 addql #8,%sp | pop parameters off stack
212
213ret_from_interrupt:
214 subqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
215 jeq ret_from_last_interrupt
2162: RESTORE_ALL
217
218 ALIGN
219ret_from_last_interrupt:
220 moveq #(~ALLOWINT>>8)&0xff,%d0
221 andb %sp@(PT_OFF_SR),%d0
222 jne 2b
223
224 /* check if we need to do software interrupts */
225 tstl irq_stat+CPUSTAT_SOFTIRQ_PENDING
226 jeq .Lret_from_exception
227 pea ret_from_exception
228 jra do_softirq
229
230/* Handler for user defined interrupt vectors */
231
232ENTRY(user_inthandler)
233 SAVE_ALL_INT
234 GET_CURRENT(%d0)
235 addqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
236 | put exception # in d0
237 bfextu %sp@(PT_OFF_FORMATVEC){#4,#10},%d0
238user_irqvec_fixup = . + 2
239 subw #VEC_USER,%d0
240
241 movel %sp,%sp@-
242 movel %d0,%sp@- | put vector # on stack
243user_irqhandler_fixup = . + 2
244 jsr __m68k_handle_int | process the IRQ
245 addql #8,%sp | pop parameters off stack
246
247 subqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
248 jeq ret_from_last_interrupt
249 RESTORE_ALL
250
251/* Handler for uninitialized and spurious interrupts */
252
253ENTRY(bad_inthandler)
254 SAVE_ALL_INT
255 GET_CURRENT(%d0)
256 addqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
257
258 movel %sp,%sp@-
259 jsr handle_badint
260 addql #4,%sp
261
262 subqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
263 jeq ret_from_last_interrupt
264 RESTORE_ALL
265
266
267ENTRY(sys_fork)
268 SAVE_SWITCH_STACK
269 pea %sp@(SWITCH_STACK_SIZE)
270 jbsr m68k_fork
271 addql #4,%sp
272 RESTORE_SWITCH_STACK
273 rts
274
275ENTRY(sys_clone)
276 SAVE_SWITCH_STACK
277 pea %sp@(SWITCH_STACK_SIZE)
278 jbsr m68k_clone
279 addql #4,%sp
280 RESTORE_SWITCH_STACK
281 rts
282
283ENTRY(sys_vfork)
284 SAVE_SWITCH_STACK
285 pea %sp@(SWITCH_STACK_SIZE)
286 jbsr m68k_vfork
287 addql #4,%sp
288 RESTORE_SWITCH_STACK
289 rts
290
291ENTRY(sys_sigreturn)
292 SAVE_SWITCH_STACK
293 jbsr do_sigreturn
294 RESTORE_SWITCH_STACK
295 rts
296
297ENTRY(sys_rt_sigreturn)
298 SAVE_SWITCH_STACK
299 jbsr do_rt_sigreturn
300 RESTORE_SWITCH_STACK
301 rts
302
303resume:
304 /*
305 * Beware - when entering resume, prev (the current task) is
306 * in a0, next (the new task) is in a1,so don't change these
307 * registers until their contents are no longer needed.
308 */
309
310 /* save sr */
311 movew %sr,%a0@(TASK_THREAD+THREAD_SR)
312
313 /* save fs (sfc,%dfc) (may be pointing to kernel memory) */
314 movec %sfc,%d0
315 movew %d0,%a0@(TASK_THREAD+THREAD_FS)
316
317 /* save usp */
318 /* it is better to use a movel here instead of a movew 8*) */
319 movec %usp,%d0
320 movel %d0,%a0@(TASK_THREAD+THREAD_USP)
321
322 /* save non-scratch registers on stack */
323 SAVE_SWITCH_STACK
324
325 /* save current kernel stack pointer */
326 movel %sp,%a0@(TASK_THREAD+THREAD_KSP)
327
328 /* save floating point context */
329#ifndef CONFIG_M68KFPU_EMU_ONLY
330#ifdef CONFIG_M68KFPU_EMU
331 tstl m68k_fputype
332 jeq 3f
333#endif
334 fsave %a0@(TASK_THREAD+THREAD_FPSTATE)
335
336#if defined(CONFIG_M68060)
337#if !defined(CPU_M68060_ONLY)
338 btst #3,m68k_cputype+3
339 beqs 1f
340#endif
341 /* The 060 FPU keeps status in bits 15-8 of the first longword */
342 tstb %a0@(TASK_THREAD+THREAD_FPSTATE+2)
343 jeq 3f
344#if !defined(CPU_M68060_ONLY)
345 jra 2f
346#endif
347#endif /* CONFIG_M68060 */
348#if !defined(CPU_M68060_ONLY)
3491: tstb %a0@(TASK_THREAD+THREAD_FPSTATE)
350 jeq 3f
351#endif
3522: fmovemx %fp0-%fp7,%a0@(TASK_THREAD+THREAD_FPREG)
353 fmoveml %fpcr/%fpsr/%fpiar,%a0@(TASK_THREAD+THREAD_FPCNTL)
3543:
355#endif /* CONFIG_M68KFPU_EMU_ONLY */
356 /* Return previous task in %d1 */
357 movel %curptr,%d1
358
359 /* switch to new task (a1 contains new task) */
360 movel %a1,%curptr
361
362 /* restore floating point context */
363#ifndef CONFIG_M68KFPU_EMU_ONLY
364#ifdef CONFIG_M68KFPU_EMU
365 tstl m68k_fputype
366 jeq 4f
367#endif
368#if defined(CONFIG_M68060)
369#if !defined(CPU_M68060_ONLY)
370 btst #3,m68k_cputype+3
371 beqs 1f
372#endif
373 /* The 060 FPU keeps status in bits 15-8 of the first longword */
374 tstb %a1@(TASK_THREAD+THREAD_FPSTATE+2)
375 jeq 3f
376#if !defined(CPU_M68060_ONLY)
377 jra 2f
378#endif
379#endif /* CONFIG_M68060 */
380#if !defined(CPU_M68060_ONLY)
3811: tstb %a1@(TASK_THREAD+THREAD_FPSTATE)
382 jeq 3f
383#endif
3842: fmovemx %a1@(TASK_THREAD+THREAD_FPREG),%fp0-%fp7
385 fmoveml %a1@(TASK_THREAD+THREAD_FPCNTL),%fpcr/%fpsr/%fpiar
3863: frestore %a1@(TASK_THREAD+THREAD_FPSTATE)
3874:
388#endif /* CONFIG_M68KFPU_EMU_ONLY */
389
390 /* restore the kernel stack pointer */
391 movel %a1@(TASK_THREAD+THREAD_KSP),%sp
392
393 /* restore non-scratch registers */
394 RESTORE_SWITCH_STACK
395
396 /* restore user stack pointer */
397 movel %a1@(TASK_THREAD+THREAD_USP),%a0
398 movel %a0,%usp
399
400 /* restore fs (sfc,%dfc) */
401 movew %a1@(TASK_THREAD+THREAD_FS),%a0
402 movec %a0,%sfc
403 movec %a0,%dfc
404
405 /* restore status register */
406 movew %a1@(TASK_THREAD+THREAD_SR),%sr
407
408 rts
409
410.data
411ALIGN
412sys_call_table:
413 .long sys_restart_syscall /* 0 - old "setup()" system call, used for restarting */
414 .long sys_exit
415 .long sys_fork
416 .long sys_read
417 .long sys_write
418 .long sys_open /* 5 */
419 .long sys_close
420 .long sys_waitpid
421 .long sys_creat
422 .long sys_link
423 .long sys_unlink /* 10 */
424 .long sys_execve
425 .long sys_chdir
426 .long sys_time
427 .long sys_mknod
428 .long sys_chmod /* 15 */
429 .long sys_chown16
430 .long sys_ni_syscall /* old break syscall holder */
431 .long sys_stat
432 .long sys_lseek
433 .long sys_getpid /* 20 */
434 .long sys_mount
435 .long sys_oldumount
436 .long sys_setuid16
437 .long sys_getuid16
438 .long sys_stime /* 25 */
439 .long sys_ptrace
440 .long sys_alarm
441 .long sys_fstat
442 .long sys_pause
443 .long sys_utime /* 30 */
444 .long sys_ni_syscall /* old stty syscall holder */
445 .long sys_ni_syscall /* old gtty syscall holder */
446 .long sys_access
447 .long sys_nice
448 .long sys_ni_syscall /* 35 */ /* old ftime syscall holder */
449 .long sys_sync
450 .long sys_kill
451 .long sys_rename
452 .long sys_mkdir
453 .long sys_rmdir /* 40 */
454 .long sys_dup
455 .long sys_pipe
456 .long sys_times
457 .long sys_ni_syscall /* old prof syscall holder */
458 .long sys_brk /* 45 */
459 .long sys_setgid16
460 .long sys_getgid16
461 .long sys_signal
462 .long sys_geteuid16
463 .long sys_getegid16 /* 50 */
464 .long sys_acct
465 .long sys_umount /* recycled never used phys() */
466 .long sys_ni_syscall /* old lock syscall holder */
467 .long sys_ioctl
468 .long sys_fcntl /* 55 */
469 .long sys_ni_syscall /* old mpx syscall holder */
470 .long sys_setpgid
471 .long sys_ni_syscall /* old ulimit syscall holder */
472 .long sys_ni_syscall
473 .long sys_umask /* 60 */
474 .long sys_chroot
475 .long sys_ustat
476 .long sys_dup2
477 .long sys_getppid
478 .long sys_getpgrp /* 65 */
479 .long sys_setsid
480 .long sys_sigaction
481 .long sys_sgetmask
482 .long sys_ssetmask
483 .long sys_setreuid16 /* 70 */
484 .long sys_setregid16
485 .long sys_sigsuspend
486 .long sys_sigpending
487 .long sys_sethostname
488 .long sys_setrlimit /* 75 */
489 .long sys_old_getrlimit
490 .long sys_getrusage
491 .long sys_gettimeofday
492 .long sys_settimeofday
493 .long sys_getgroups16 /* 80 */
494 .long sys_setgroups16
495 .long sys_old_select
496 .long sys_symlink
497 .long sys_lstat
498 .long sys_readlink /* 85 */
499 .long sys_uselib
500 .long sys_swapon
501 .long sys_reboot
502 .long sys_old_readdir
503 .long sys_old_mmap /* 90 */
504 .long sys_munmap
505 .long sys_truncate
506 .long sys_ftruncate
507 .long sys_fchmod
508 .long sys_fchown16 /* 95 */
509 .long sys_getpriority
510 .long sys_setpriority
511 .long sys_ni_syscall /* old profil syscall holder */
512 .long sys_statfs
513 .long sys_fstatfs /* 100 */
514 .long sys_ni_syscall /* ioperm for i386 */
515 .long sys_socketcall
516 .long sys_syslog
517 .long sys_setitimer
518 .long sys_getitimer /* 105 */
519 .long sys_newstat
520 .long sys_newlstat
521 .long sys_newfstat
522 .long sys_ni_syscall
523 .long sys_ni_syscall /* 110 */ /* iopl for i386 */
524 .long sys_vhangup
525 .long sys_ni_syscall /* obsolete idle() syscall */
526 .long sys_ni_syscall /* vm86old for i386 */
527 .long sys_wait4
528 .long sys_swapoff /* 115 */
529 .long sys_sysinfo
530 .long sys_ipc
531 .long sys_fsync
532 .long sys_sigreturn
533 .long sys_clone /* 120 */
534 .long sys_setdomainname
535 .long sys_newuname
536 .long sys_cacheflush /* modify_ldt for i386 */
537 .long sys_adjtimex
538 .long sys_mprotect /* 125 */
539 .long sys_sigprocmask
540 .long sys_ni_syscall /* old "create_module" */
541 .long sys_init_module
542 .long sys_delete_module
543 .long sys_ni_syscall /* 130 - old "get_kernel_syms" */
544 .long sys_quotactl
545 .long sys_getpgid
546 .long sys_fchdir
547 .long sys_bdflush
548 .long sys_sysfs /* 135 */
549 .long sys_personality
550 .long sys_ni_syscall /* for afs_syscall */
551 .long sys_setfsuid16
552 .long sys_setfsgid16
553 .long sys_llseek /* 140 */
554 .long sys_getdents
555 .long sys_select
556 .long sys_flock
557 .long sys_msync
558 .long sys_readv /* 145 */
559 .long sys_writev
560 .long sys_getsid
561 .long sys_fdatasync
562 .long sys_sysctl
563 .long sys_mlock /* 150 */
564 .long sys_munlock
565 .long sys_mlockall
566 .long sys_munlockall
567 .long sys_sched_setparam
568 .long sys_sched_getparam /* 155 */
569 .long sys_sched_setscheduler
570 .long sys_sched_getscheduler
571 .long sys_sched_yield
572 .long sys_sched_get_priority_max
573 .long sys_sched_get_priority_min /* 160 */
574 .long sys_sched_rr_get_interval
575 .long sys_nanosleep
576 .long sys_mremap
577 .long sys_setresuid16
578 .long sys_getresuid16 /* 165 */
579 .long sys_getpagesize
580 .long sys_ni_syscall /* old sys_query_module */
581 .long sys_poll
582 .long sys_nfsservctl
583 .long sys_setresgid16 /* 170 */
584 .long sys_getresgid16
585 .long sys_prctl
586 .long sys_rt_sigreturn
587 .long sys_rt_sigaction
588 .long sys_rt_sigprocmask /* 175 */
589 .long sys_rt_sigpending
590 .long sys_rt_sigtimedwait
591 .long sys_rt_sigqueueinfo
592 .long sys_rt_sigsuspend
593 .long sys_pread64 /* 180 */
594 .long sys_pwrite64
595 .long sys_lchown16;
596 .long sys_getcwd
597 .long sys_capget
598 .long sys_capset /* 185 */
599 .long sys_sigaltstack
600 .long sys_sendfile
601 .long sys_ni_syscall /* streams1 */
602 .long sys_ni_syscall /* streams2 */
603 .long sys_vfork /* 190 */
604 .long sys_getrlimit
605 .long sys_mmap2
606 .long sys_truncate64
607 .long sys_ftruncate64
608 .long sys_stat64 /* 195 */
609 .long sys_lstat64
610 .long sys_fstat64
611 .long sys_chown
612 .long sys_getuid
613 .long sys_getgid /* 200 */
614 .long sys_geteuid
615 .long sys_getegid
616 .long sys_setreuid
617 .long sys_setregid
618 .long sys_getgroups /* 205 */
619 .long sys_setgroups
620 .long sys_fchown
621 .long sys_setresuid
622 .long sys_getresuid
623 .long sys_setresgid /* 210 */
624 .long sys_getresgid
625 .long sys_lchown
626 .long sys_setuid
627 .long sys_setgid
628 .long sys_setfsuid /* 215 */
629 .long sys_setfsgid
630 .long sys_pivot_root
631 .long sys_ni_syscall
632 .long sys_ni_syscall
633 .long sys_getdents64 /* 220 */
634 .long sys_gettid
635 .long sys_tkill
636 .long sys_setxattr
637 .long sys_lsetxattr
638 .long sys_fsetxattr /* 225 */
639 .long sys_getxattr
640 .long sys_lgetxattr
641 .long sys_fgetxattr
642 .long sys_listxattr
643 .long sys_llistxattr /* 230 */
644 .long sys_flistxattr
645 .long sys_removexattr
646 .long sys_lremovexattr
647 .long sys_fremovexattr
648 .long sys_futex /* 235 */
649 .long sys_sendfile64
650 .long sys_mincore
651 .long sys_madvise
652 .long sys_fcntl64
653 .long sys_readahead /* 240 */
654 .long sys_io_setup
655 .long sys_io_destroy
656 .long sys_io_getevents
657 .long sys_io_submit
658 .long sys_io_cancel /* 245 */
659 .long sys_fadvise64
660 .long sys_exit_group
661 .long sys_lookup_dcookie
662 .long sys_epoll_create
663 .long sys_epoll_ctl /* 250 */
664 .long sys_epoll_wait
665 .long sys_remap_file_pages
666 .long sys_set_tid_address
667 .long sys_timer_create
668 .long sys_timer_settime /* 255 */
669 .long sys_timer_gettime
670 .long sys_timer_getoverrun
671 .long sys_timer_delete
672 .long sys_clock_settime
673 .long sys_clock_gettime /* 260 */
674 .long sys_clock_getres
675 .long sys_clock_nanosleep
676 .long sys_statfs64
677 .long sys_fstatfs64
678 .long sys_tgkill /* 265 */
679 .long sys_utimes
680 .long sys_fadvise64_64
681 .long sys_mbind
682 .long sys_get_mempolicy
683 .long sys_set_mempolicy /* 270 */
684 .long sys_mq_open
685 .long sys_mq_unlink
686 .long sys_mq_timedsend
687 .long sys_mq_timedreceive
688 .long sys_mq_notify /* 275 */
689 .long sys_mq_getsetattr
690 .long sys_waitid
691 .long sys_ni_syscall /* for sys_vserver */
692 .long sys_add_key
693 .long sys_request_key /* 280 */
694 .long sys_keyctl
695 .long sys_ioprio_set
696 .long sys_ioprio_get
697 .long sys_inotify_init
698 .long sys_inotify_add_watch /* 285 */
699 .long sys_inotify_rm_watch
700 .long sys_migrate_pages
701 .long sys_openat
702 .long sys_mkdirat
703 .long sys_mknodat /* 290 */
704 .long sys_fchownat
705 .long sys_futimesat
706 .long sys_fstatat64
707 .long sys_unlinkat
708 .long sys_renameat /* 295 */
709 .long sys_linkat
710 .long sys_symlinkat
711 .long sys_readlinkat
712 .long sys_fchmodat
713 .long sys_faccessat /* 300 */
714 .long sys_ni_syscall /* Reserved for pselect6 */
715 .long sys_ni_syscall /* Reserved for ppoll */
716 .long sys_unshare
717 .long sys_set_robust_list
718 .long sys_get_robust_list /* 305 */
719 .long sys_splice
720 .long sys_sync_file_range
721 .long sys_tee
722 .long sys_vmsplice
723 .long sys_move_pages /* 310 */
724 .long sys_sched_setaffinity
725 .long sys_sched_getaffinity
726 .long sys_kexec_load
727 .long sys_getcpu
728 .long sys_epoll_pwait /* 315 */
729 .long sys_utimensat
730 .long sys_signalfd
731 .long sys_timerfd_create
732 .long sys_eventfd
733 .long sys_fallocate /* 320 */
734 .long sys_timerfd_settime
735 .long sys_timerfd_gettime
736 .long sys_signalfd4
737 .long sys_eventfd2
738 .long sys_epoll_create1 /* 325 */
739 .long sys_dup3
740 .long sys_pipe2
741 .long sys_inotify_init1
742 .long sys_preadv
743 .long sys_pwritev /* 330 */
744 .long sys_rt_tgsigqueueinfo
745 .long sys_perf_event_open
746 .long sys_get_thread_area
747 .long sys_set_thread_area
748 .long sys_atomic_cmpxchg_32 /* 335 */
749 .long sys_atomic_barrier
750 .long sys_fanotify_init
751 .long sys_fanotify_mark
752 .long sys_prlimit64
753
diff --git a/arch/m68k/kernel/entry_mm.S b/arch/m68k/kernel/entry_mm.S
new file mode 100644
index 000000000000..1359ee659574
--- /dev/null
+++ b/arch/m68k/kernel/entry_mm.S
@@ -0,0 +1,757 @@
1/* -*- mode: asm -*-
2 *
3 * linux/arch/m68k/kernel/entry.S
4 *
5 * Copyright (C) 1991, 1992 Linus Torvalds
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file README.legal in the main directory of this archive
9 * for more details.
10 *
11 * Linux/m68k support by Hamish Macdonald
12 *
13 * 68060 fixes by Jesper Skov
14 *
15 */
16
17/*
18 * entry.S contains the system-call and fault low-level handling routines.
19 * This also contains the timer-interrupt handler, as well as all interrupts
20 * and faults that can result in a task-switch.
21 *
22 * NOTE: This code handles signal-recognition, which happens every time
23 * after a timer-interrupt and after each system call.
24 *
25 */
26
27/*
28 * 12/03/96 Jes: Currently we only support m68k single-cpu systems, so
29 * all pointers that used to be 'current' are now entry
30 * number 0 in the 'current_set' list.
31 *
32 * 6/05/00 RZ: addedd writeback completion after return from sighandler
33 * for 68040
34 */
35
36#include <linux/linkage.h>
37#include <asm/entry.h>
38#include <asm/errno.h>
39#include <asm/setup.h>
40#include <asm/segment.h>
41#include <asm/traps.h>
42#include <asm/unistd.h>
43
44#include <asm/asm-offsets.h>
45
46.globl system_call, buserr, trap, resume
47.globl sys_call_table
48.globl sys_fork, sys_clone, sys_vfork
49.globl ret_from_interrupt, bad_interrupt
50.globl auto_irqhandler_fixup
51.globl user_irqvec_fixup, user_irqhandler_fixup
52
53.text
54ENTRY(buserr)
55 SAVE_ALL_INT
56 GET_CURRENT(%d0)
57 movel %sp,%sp@- | stack frame pointer argument
58 bsrl buserr_c
59 addql #4,%sp
60 jra .Lret_from_exception
61
62ENTRY(trap)
63 SAVE_ALL_INT
64 GET_CURRENT(%d0)
65 movel %sp,%sp@- | stack frame pointer argument
66 bsrl trap_c
67 addql #4,%sp
68 jra .Lret_from_exception
69
70 | After a fork we jump here directly from resume,
71 | so that %d1 contains the previous task
72 | schedule_tail now used regardless of CONFIG_SMP
73ENTRY(ret_from_fork)
74 movel %d1,%sp@-
75 jsr schedule_tail
76 addql #4,%sp
77 jra .Lret_from_exception
78
79do_trace_entry:
80 movel #-ENOSYS,%sp@(PT_OFF_D0)| needed for strace
81 subql #4,%sp
82 SAVE_SWITCH_STACK
83 jbsr syscall_trace
84 RESTORE_SWITCH_STACK
85 addql #4,%sp
86 movel %sp@(PT_OFF_ORIG_D0),%d0
87 cmpl #NR_syscalls,%d0
88 jcs syscall
89badsys:
90 movel #-ENOSYS,%sp@(PT_OFF_D0)
91 jra ret_from_syscall
92
93do_trace_exit:
94 subql #4,%sp
95 SAVE_SWITCH_STACK
96 jbsr syscall_trace
97 RESTORE_SWITCH_STACK
98 addql #4,%sp
99 jra .Lret_from_exception
100
101ENTRY(ret_from_signal)
102 tstb %curptr@(TASK_INFO+TINFO_FLAGS+2)
103 jge 1f
104 jbsr syscall_trace
1051: RESTORE_SWITCH_STACK
106 addql #4,%sp
107/* on 68040 complete pending writebacks if any */
108#ifdef CONFIG_M68040
109 bfextu %sp@(PT_OFF_FORMATVEC){#0,#4},%d0
110 subql #7,%d0 | bus error frame ?
111 jbne 1f
112 movel %sp,%sp@-
113 jbsr berr_040cleanup
114 addql #4,%sp
1151:
116#endif
117 jra .Lret_from_exception
118
119ENTRY(system_call)
120 SAVE_ALL_SYS
121
122 GET_CURRENT(%d1)
123 | save top of frame
124 movel %sp,%curptr@(TASK_THREAD+THREAD_ESP0)
125
126 | syscall trace?
127 tstb %curptr@(TASK_INFO+TINFO_FLAGS+2)
128 jmi do_trace_entry
129 cmpl #NR_syscalls,%d0
130 jcc badsys
131syscall:
132 jbsr @(sys_call_table,%d0:l:4)@(0)
133 movel %d0,%sp@(PT_OFF_D0) | save the return value
134ret_from_syscall:
135 |oriw #0x0700,%sr
136 movew %curptr@(TASK_INFO+TINFO_FLAGS+2),%d0
137 jne syscall_exit_work
1381: RESTORE_ALL
139
140syscall_exit_work:
141 btst #5,%sp@(PT_OFF_SR) | check if returning to kernel
142 bnes 1b | if so, skip resched, signals
143 lslw #1,%d0
144 jcs do_trace_exit
145 jmi do_delayed_trace
146 lslw #8,%d0
147 jmi do_signal_return
148 pea resume_userspace
149 jra schedule
150
151
152ENTRY(ret_from_exception)
153.Lret_from_exception:
154 btst #5,%sp@(PT_OFF_SR) | check if returning to kernel
155 bnes 1f | if so, skip resched, signals
156 | only allow interrupts when we are really the last one on the
157 | kernel stack, otherwise stack overflow can occur during
158 | heavy interrupt load
159 andw #ALLOWINT,%sr
160
161resume_userspace:
162 moveb %curptr@(TASK_INFO+TINFO_FLAGS+3),%d0
163 jne exit_work
1641: RESTORE_ALL
165
166exit_work:
167 | save top of frame
168 movel %sp,%curptr@(TASK_THREAD+THREAD_ESP0)
169 lslb #1,%d0
170 jmi do_signal_return
171 pea resume_userspace
172 jra schedule
173
174
175do_signal_return:
176 |andw #ALLOWINT,%sr
177 subql #4,%sp | dummy return address
178 SAVE_SWITCH_STACK
179 pea %sp@(SWITCH_STACK_SIZE)
180 bsrl do_signal
181 addql #4,%sp
182 RESTORE_SWITCH_STACK
183 addql #4,%sp
184 jbra resume_userspace
185
186do_delayed_trace:
187 bclr #7,%sp@(PT_OFF_SR) | clear trace bit in SR
188 pea 1 | send SIGTRAP
189 movel %curptr,%sp@-
190 pea LSIGTRAP
191 jbsr send_sig
192 addql #8,%sp
193 addql #4,%sp
194 jbra resume_userspace
195
196
197/* This is the main interrupt handler for autovector interrupts */
198
199ENTRY(auto_inthandler)
200 SAVE_ALL_INT
201 GET_CURRENT(%d0)
202 addqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
203 | put exception # in d0
204 bfextu %sp@(PT_OFF_FORMATVEC){#4,#10},%d0
205 subw #VEC_SPUR,%d0
206
207 movel %sp,%sp@-
208 movel %d0,%sp@- | put vector # on stack
209auto_irqhandler_fixup = . + 2
210 jsr __m68k_handle_int | process the IRQ
211 addql #8,%sp | pop parameters off stack
212
213ret_from_interrupt:
214 subqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
215 jeq ret_from_last_interrupt
2162: RESTORE_ALL
217
218 ALIGN
219ret_from_last_interrupt:
220 moveq #(~ALLOWINT>>8)&0xff,%d0
221 andb %sp@(PT_OFF_SR),%d0
222 jne 2b
223
224 /* check if we need to do software interrupts */
225 tstl irq_stat+CPUSTAT_SOFTIRQ_PENDING
226 jeq .Lret_from_exception
227 pea ret_from_exception
228 jra do_softirq
229
230/* Handler for user defined interrupt vectors */
231
232ENTRY(user_inthandler)
233 SAVE_ALL_INT
234 GET_CURRENT(%d0)
235 addqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
236 | put exception # in d0
237 bfextu %sp@(PT_OFF_FORMATVEC){#4,#10},%d0
238user_irqvec_fixup = . + 2
239 subw #VEC_USER,%d0
240
241 movel %sp,%sp@-
242 movel %d0,%sp@- | put vector # on stack
243user_irqhandler_fixup = . + 2
244 jsr __m68k_handle_int | process the IRQ
245 addql #8,%sp | pop parameters off stack
246
247 subqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
248 jeq ret_from_last_interrupt
249 RESTORE_ALL
250
251/* Handler for uninitialized and spurious interrupts */
252
253ENTRY(bad_inthandler)
254 SAVE_ALL_INT
255 GET_CURRENT(%d0)
256 addqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
257
258 movel %sp,%sp@-
259 jsr handle_badint
260 addql #4,%sp
261
262 subqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
263 jeq ret_from_last_interrupt
264 RESTORE_ALL
265
266
267ENTRY(sys_fork)
268 SAVE_SWITCH_STACK
269 pea %sp@(SWITCH_STACK_SIZE)
270 jbsr m68k_fork
271 addql #4,%sp
272 RESTORE_SWITCH_STACK
273 rts
274
275ENTRY(sys_clone)
276 SAVE_SWITCH_STACK
277 pea %sp@(SWITCH_STACK_SIZE)
278 jbsr m68k_clone
279 addql #4,%sp
280 RESTORE_SWITCH_STACK
281 rts
282
283ENTRY(sys_vfork)
284 SAVE_SWITCH_STACK
285 pea %sp@(SWITCH_STACK_SIZE)
286 jbsr m68k_vfork
287 addql #4,%sp
288 RESTORE_SWITCH_STACK
289 rts
290
291ENTRY(sys_sigreturn)
292 SAVE_SWITCH_STACK
293 jbsr do_sigreturn
294 RESTORE_SWITCH_STACK
295 rts
296
297ENTRY(sys_rt_sigreturn)
298 SAVE_SWITCH_STACK
299 jbsr do_rt_sigreturn
300 RESTORE_SWITCH_STACK
301 rts
302
303resume:
304 /*
305 * Beware - when entering resume, prev (the current task) is
306 * in a0, next (the new task) is in a1,so don't change these
307 * registers until their contents are no longer needed.
308 */
309
310 /* save sr */
311 movew %sr,%a0@(TASK_THREAD+THREAD_SR)
312
313 /* save fs (sfc,%dfc) (may be pointing to kernel memory) */
314 movec %sfc,%d0
315 movew %d0,%a0@(TASK_THREAD+THREAD_FS)
316
317 /* save usp */
318 /* it is better to use a movel here instead of a movew 8*) */
319 movec %usp,%d0
320 movel %d0,%a0@(TASK_THREAD+THREAD_USP)
321
322 /* save non-scratch registers on stack */
323 SAVE_SWITCH_STACK
324
325 /* save current kernel stack pointer */
326 movel %sp,%a0@(TASK_THREAD+THREAD_KSP)
327
328 /* save floating point context */
329#ifndef CONFIG_M68KFPU_EMU_ONLY
330#ifdef CONFIG_M68KFPU_EMU
331 tstl m68k_fputype
332 jeq 3f
333#endif
334 fsave %a0@(TASK_THREAD+THREAD_FPSTATE)
335
336#if defined(CONFIG_M68060)
337#if !defined(CPU_M68060_ONLY)
338 btst #3,m68k_cputype+3
339 beqs 1f
340#endif
341 /* The 060 FPU keeps status in bits 15-8 of the first longword */
342 tstb %a0@(TASK_THREAD+THREAD_FPSTATE+2)
343 jeq 3f
344#if !defined(CPU_M68060_ONLY)
345 jra 2f
346#endif
347#endif /* CONFIG_M68060 */
348#if !defined(CPU_M68060_ONLY)
3491: tstb %a0@(TASK_THREAD+THREAD_FPSTATE)
350 jeq 3f
351#endif
3522: fmovemx %fp0-%fp7,%a0@(TASK_THREAD+THREAD_FPREG)
353 fmoveml %fpcr/%fpsr/%fpiar,%a0@(TASK_THREAD+THREAD_FPCNTL)
3543:
355#endif /* CONFIG_M68KFPU_EMU_ONLY */
356 /* Return previous task in %d1 */
357 movel %curptr,%d1
358
359 /* switch to new task (a1 contains new task) */
360 movel %a1,%curptr
361
362 /* restore floating point context */
363#ifndef CONFIG_M68KFPU_EMU_ONLY
364#ifdef CONFIG_M68KFPU_EMU
365 tstl m68k_fputype
366 jeq 4f
367#endif
368#if defined(CONFIG_M68060)
369#if !defined(CPU_M68060_ONLY)
370 btst #3,m68k_cputype+3
371 beqs 1f
372#endif
373 /* The 060 FPU keeps status in bits 15-8 of the first longword */
374 tstb %a1@(TASK_THREAD+THREAD_FPSTATE+2)
375 jeq 3f
376#if !defined(CPU_M68060_ONLY)
377 jra 2f
378#endif
379#endif /* CONFIG_M68060 */
380#if !defined(CPU_M68060_ONLY)
3811: tstb %a1@(TASK_THREAD+THREAD_FPSTATE)
382 jeq 3f
383#endif
3842: fmovemx %a1@(TASK_THREAD+THREAD_FPREG),%fp0-%fp7
385 fmoveml %a1@(TASK_THREAD+THREAD_FPCNTL),%fpcr/%fpsr/%fpiar
3863: frestore %a1@(TASK_THREAD+THREAD_FPSTATE)
3874:
388#endif /* CONFIG_M68KFPU_EMU_ONLY */
389
390 /* restore the kernel stack pointer */
391 movel %a1@(TASK_THREAD+THREAD_KSP),%sp
392
393 /* restore non-scratch registers */
394 RESTORE_SWITCH_STACK
395
396 /* restore user stack pointer */
397 movel %a1@(TASK_THREAD+THREAD_USP),%a0
398 movel %a0,%usp
399
400 /* restore fs (sfc,%dfc) */
401 movew %a1@(TASK_THREAD+THREAD_FS),%a0
402 movec %a0,%sfc
403 movec %a0,%dfc
404
405 /* restore status register */
406 movew %a1@(TASK_THREAD+THREAD_SR),%sr
407
408 rts
409
410.data
411ALIGN
412sys_call_table:
413 .long sys_restart_syscall /* 0 - old "setup()" system call, used for restarting */
414 .long sys_exit
415 .long sys_fork
416 .long sys_read
417 .long sys_write
418 .long sys_open /* 5 */
419 .long sys_close
420 .long sys_waitpid
421 .long sys_creat
422 .long sys_link
423 .long sys_unlink /* 10 */
424 .long sys_execve
425 .long sys_chdir
426 .long sys_time
427 .long sys_mknod
428 .long sys_chmod /* 15 */
429 .long sys_chown16
430 .long sys_ni_syscall /* old break syscall holder */
431 .long sys_stat
432 .long sys_lseek
433 .long sys_getpid /* 20 */
434 .long sys_mount
435 .long sys_oldumount
436 .long sys_setuid16
437 .long sys_getuid16
438 .long sys_stime /* 25 */
439 .long sys_ptrace
440 .long sys_alarm
441 .long sys_fstat
442 .long sys_pause
443 .long sys_utime /* 30 */
444 .long sys_ni_syscall /* old stty syscall holder */
445 .long sys_ni_syscall /* old gtty syscall holder */
446 .long sys_access
447 .long sys_nice
448 .long sys_ni_syscall /* 35 */ /* old ftime syscall holder */
449 .long sys_sync
450 .long sys_kill
451 .long sys_rename
452 .long sys_mkdir
453 .long sys_rmdir /* 40 */
454 .long sys_dup
455 .long sys_pipe
456 .long sys_times
457 .long sys_ni_syscall /* old prof syscall holder */
458 .long sys_brk /* 45 */
459 .long sys_setgid16
460 .long sys_getgid16
461 .long sys_signal
462 .long sys_geteuid16
463 .long sys_getegid16 /* 50 */
464 .long sys_acct
465 .long sys_umount /* recycled never used phys() */
466 .long sys_ni_syscall /* old lock syscall holder */
467 .long sys_ioctl
468 .long sys_fcntl /* 55 */
469 .long sys_ni_syscall /* old mpx syscall holder */
470 .long sys_setpgid
471 .long sys_ni_syscall /* old ulimit syscall holder */
472 .long sys_ni_syscall
473 .long sys_umask /* 60 */
474 .long sys_chroot
475 .long sys_ustat
476 .long sys_dup2
477 .long sys_getppid
478 .long sys_getpgrp /* 65 */
479 .long sys_setsid
480 .long sys_sigaction
481 .long sys_sgetmask
482 .long sys_ssetmask
483 .long sys_setreuid16 /* 70 */
484 .long sys_setregid16
485 .long sys_sigsuspend
486 .long sys_sigpending
487 .long sys_sethostname
488 .long sys_setrlimit /* 75 */
489 .long sys_old_getrlimit
490 .long sys_getrusage
491 .long sys_gettimeofday
492 .long sys_settimeofday
493 .long sys_getgroups16 /* 80 */
494 .long sys_setgroups16
495 .long sys_old_select
496 .long sys_symlink
497 .long sys_lstat
498 .long sys_readlink /* 85 */
499 .long sys_uselib
500 .long sys_swapon
501 .long sys_reboot
502 .long sys_old_readdir
503 .long sys_old_mmap /* 90 */
504 .long sys_munmap
505 .long sys_truncate
506 .long sys_ftruncate
507 .long sys_fchmod
508 .long sys_fchown16 /* 95 */
509 .long sys_getpriority
510 .long sys_setpriority
511 .long sys_ni_syscall /* old profil syscall holder */
512 .long sys_statfs
513 .long sys_fstatfs /* 100 */
514 .long sys_ni_syscall /* ioperm for i386 */
515 .long sys_socketcall
516 .long sys_syslog
517 .long sys_setitimer
518 .long sys_getitimer /* 105 */
519 .long sys_newstat
520 .long sys_newlstat
521 .long sys_newfstat
522 .long sys_ni_syscall
523 .long sys_ni_syscall /* 110 */ /* iopl for i386 */
524 .long sys_vhangup
525 .long sys_ni_syscall /* obsolete idle() syscall */
526 .long sys_ni_syscall /* vm86old for i386 */
527 .long sys_wait4
528 .long sys_swapoff /* 115 */
529 .long sys_sysinfo
530 .long sys_ipc
531 .long sys_fsync
532 .long sys_sigreturn
533 .long sys_clone /* 120 */
534 .long sys_setdomainname
535 .long sys_newuname
536 .long sys_cacheflush /* modify_ldt for i386 */
537 .long sys_adjtimex
538 .long sys_mprotect /* 125 */
539 .long sys_sigprocmask
540 .long sys_ni_syscall /* old "create_module" */
541 .long sys_init_module
542 .long sys_delete_module
543 .long sys_ni_syscall /* 130 - old "get_kernel_syms" */
544 .long sys_quotactl
545 .long sys_getpgid
546 .long sys_fchdir
547 .long sys_bdflush
548 .long sys_sysfs /* 135 */
549 .long sys_personality
550 .long sys_ni_syscall /* for afs_syscall */
551 .long sys_setfsuid16
552 .long sys_setfsgid16
553 .long sys_llseek /* 140 */
554 .long sys_getdents
555 .long sys_select
556 .long sys_flock
557 .long sys_msync
558 .long sys_readv /* 145 */
559 .long sys_writev
560 .long sys_getsid
561 .long sys_fdatasync
562 .long sys_sysctl
563 .long sys_mlock /* 150 */
564 .long sys_munlock
565 .long sys_mlockall
566 .long sys_munlockall
567 .long sys_sched_setparam
568 .long sys_sched_getparam /* 155 */
569 .long sys_sched_setscheduler
570 .long sys_sched_getscheduler
571 .long sys_sched_yield
572 .long sys_sched_get_priority_max
573 .long sys_sched_get_priority_min /* 160 */
574 .long sys_sched_rr_get_interval
575 .long sys_nanosleep
576 .long sys_mremap
577 .long sys_setresuid16
578 .long sys_getresuid16 /* 165 */
579 .long sys_getpagesize
580 .long sys_ni_syscall /* old sys_query_module */
581 .long sys_poll
582 .long sys_nfsservctl
583 .long sys_setresgid16 /* 170 */
584 .long sys_getresgid16
585 .long sys_prctl
586 .long sys_rt_sigreturn
587 .long sys_rt_sigaction
588 .long sys_rt_sigprocmask /* 175 */
589 .long sys_rt_sigpending
590 .long sys_rt_sigtimedwait
591 .long sys_rt_sigqueueinfo
592 .long sys_rt_sigsuspend
593 .long sys_pread64 /* 180 */
594 .long sys_pwrite64
595 .long sys_lchown16;
596 .long sys_getcwd
597 .long sys_capget
598 .long sys_capset /* 185 */
599 .long sys_sigaltstack
600 .long sys_sendfile
601 .long sys_ni_syscall /* streams1 */
602 .long sys_ni_syscall /* streams2 */
603 .long sys_vfork /* 190 */
604 .long sys_getrlimit
605 .long sys_mmap2
606 .long sys_truncate64
607 .long sys_ftruncate64
608 .long sys_stat64 /* 195 */
609 .long sys_lstat64
610 .long sys_fstat64
611 .long sys_chown
612 .long sys_getuid
613 .long sys_getgid /* 200 */
614 .long sys_geteuid
615 .long sys_getegid
616 .long sys_setreuid
617 .long sys_setregid
618 .long sys_getgroups /* 205 */
619 .long sys_setgroups
620 .long sys_fchown
621 .long sys_setresuid
622 .long sys_getresuid
623 .long sys_setresgid /* 210 */
624 .long sys_getresgid
625 .long sys_lchown
626 .long sys_setuid
627 .long sys_setgid
628 .long sys_setfsuid /* 215 */
629 .long sys_setfsgid
630 .long sys_pivot_root
631 .long sys_ni_syscall
632 .long sys_ni_syscall
633 .long sys_getdents64 /* 220 */
634 .long sys_gettid
635 .long sys_tkill
636 .long sys_setxattr
637 .long sys_lsetxattr
638 .long sys_fsetxattr /* 225 */
639 .long sys_getxattr
640 .long sys_lgetxattr
641 .long sys_fgetxattr
642 .long sys_listxattr
643 .long sys_llistxattr /* 230 */
644 .long sys_flistxattr
645 .long sys_removexattr
646 .long sys_lremovexattr
647 .long sys_fremovexattr
648 .long sys_futex /* 235 */
649 .long sys_sendfile64
650 .long sys_mincore
651 .long sys_madvise
652 .long sys_fcntl64
653 .long sys_readahead /* 240 */
654 .long sys_io_setup
655 .long sys_io_destroy
656 .long sys_io_getevents
657 .long sys_io_submit
658 .long sys_io_cancel /* 245 */
659 .long sys_fadvise64
660 .long sys_exit_group
661 .long sys_lookup_dcookie
662 .long sys_epoll_create
663 .long sys_epoll_ctl /* 250 */
664 .long sys_epoll_wait
665 .long sys_remap_file_pages
666 .long sys_set_tid_address
667 .long sys_timer_create
668 .long sys_timer_settime /* 255 */
669 .long sys_timer_gettime
670 .long sys_timer_getoverrun
671 .long sys_timer_delete
672 .long sys_clock_settime
673 .long sys_clock_gettime /* 260 */
674 .long sys_clock_getres
675 .long sys_clock_nanosleep
676 .long sys_statfs64
677 .long sys_fstatfs64
678 .long sys_tgkill /* 265 */
679 .long sys_utimes
680 .long sys_fadvise64_64
681 .long sys_mbind
682 .long sys_get_mempolicy
683 .long sys_set_mempolicy /* 270 */
684 .long sys_mq_open
685 .long sys_mq_unlink
686 .long sys_mq_timedsend
687 .long sys_mq_timedreceive
688 .long sys_mq_notify /* 275 */
689 .long sys_mq_getsetattr
690 .long sys_waitid
691 .long sys_ni_syscall /* for sys_vserver */
692 .long sys_add_key
693 .long sys_request_key /* 280 */
694 .long sys_keyctl
695 .long sys_ioprio_set
696 .long sys_ioprio_get
697 .long sys_inotify_init
698 .long sys_inotify_add_watch /* 285 */
699 .long sys_inotify_rm_watch
700 .long sys_migrate_pages
701 .long sys_openat
702 .long sys_mkdirat
703 .long sys_mknodat /* 290 */
704 .long sys_fchownat
705 .long sys_futimesat
706 .long sys_fstatat64
707 .long sys_unlinkat
708 .long sys_renameat /* 295 */
709 .long sys_linkat
710 .long sys_symlinkat
711 .long sys_readlinkat
712 .long sys_fchmodat
713 .long sys_faccessat /* 300 */
714 .long sys_ni_syscall /* Reserved for pselect6 */
715 .long sys_ni_syscall /* Reserved for ppoll */
716 .long sys_unshare
717 .long sys_set_robust_list
718 .long sys_get_robust_list /* 305 */
719 .long sys_splice
720 .long sys_sync_file_range
721 .long sys_tee
722 .long sys_vmsplice
723 .long sys_move_pages /* 310 */
724 .long sys_sched_setaffinity
725 .long sys_sched_getaffinity
726 .long sys_kexec_load
727 .long sys_getcpu
728 .long sys_epoll_pwait /* 315 */
729 .long sys_utimensat
730 .long sys_signalfd
731 .long sys_timerfd_create
732 .long sys_eventfd
733 .long sys_fallocate /* 320 */
734 .long sys_timerfd_settime
735 .long sys_timerfd_gettime
736 .long sys_signalfd4
737 .long sys_eventfd2
738 .long sys_epoll_create1 /* 325 */
739 .long sys_dup3
740 .long sys_pipe2
741 .long sys_inotify_init1
742 .long sys_preadv
743 .long sys_pwritev /* 330 */
744 .long sys_rt_tgsigqueueinfo
745 .long sys_perf_event_open
746 .long sys_get_thread_area
747 .long sys_set_thread_area
748 .long sys_atomic_cmpxchg_32 /* 335 */
749 .long sys_atomic_barrier
750 .long sys_fanotify_init
751 .long sys_fanotify_mark
752 .long sys_prlimit64
753 .long sys_name_to_handle_at /* 340 */
754 .long sys_open_by_handle_at
755 .long sys_clock_adjtime
756 .long sys_syncfs
757
diff --git a/arch/m68k/kernel/entry_no.S b/arch/m68k/kernel/entry_no.S
new file mode 100644
index 000000000000..2783f25e38bd
--- /dev/null
+++ b/arch/m68k/kernel/entry_no.S
@@ -0,0 +1,134 @@
1/*
2 * linux/arch/m68knommu/kernel/entry.S
3 *
4 * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
5 * Copyright (C) 1998 D. Jeff Dionne <jeff@lineo.ca>,
6 * Kenneth Albanowski <kjahds@kjahds.com>,
7 * Copyright (C) 2000 Lineo Inc. (www.lineo.com)
8 *
9 * Based on:
10 *
11 * linux/arch/m68k/kernel/entry.S
12 *
13 * Copyright (C) 1991, 1992 Linus Torvalds
14 *
15 * This file is subject to the terms and conditions of the GNU General Public
16 * License. See the file README.legal in the main directory of this archive
17 * for more details.
18 *
19 * Linux/m68k support by Hamish Macdonald
20 *
21 * 68060 fixes by Jesper Skov
22 * ColdFire support by Greg Ungerer (gerg@snapgear.com)
23 * 5307 fixes by David W. Miller
24 * linux 2.4 support David McCullough <davidm@snapgear.com>
25 */
26
27#include <linux/sys.h>
28#include <linux/linkage.h>
29#include <asm/errno.h>
30#include <asm/setup.h>
31#include <asm/segment.h>
32#include <asm/asm-offsets.h>
33#include <asm/entry.h>
34#include <asm/unistd.h>
35
36.text
37
38.globl buserr
39.globl trap
40.globl ret_from_exception
41.globl ret_from_signal
42.globl sys_fork
43.globl sys_clone
44.globl sys_vfork
45
46ENTRY(buserr)
47 SAVE_ALL
48 moveq #-1,%d0
49 movel %d0,%sp@(PT_OFF_ORIG_D0)
50 movel %sp,%sp@- /* stack frame pointer argument */
51 jsr buserr_c
52 addql #4,%sp
53 jra ret_from_exception
54
55ENTRY(trap)
56 SAVE_ALL
57 moveq #-1,%d0
58 movel %d0,%sp@(PT_OFF_ORIG_D0)
59 movel %sp,%sp@- /* stack frame pointer argument */
60 jsr trap_c
61 addql #4,%sp
62 jra ret_from_exception
63
64#ifdef TRAP_DBG_INTERRUPT
65
66.globl dbginterrupt
67ENTRY(dbginterrupt)
68 SAVE_ALL
69 moveq #-1,%d0
70 movel %d0,%sp@(PT_OFF_ORIG_D0)
71 movel %sp,%sp@- /* stack frame pointer argument */
72 jsr dbginterrupt_c
73 addql #4,%sp
74 jra ret_from_exception
75#endif
76
77ENTRY(reschedule)
78 /* save top of frame */
79 pea %sp@
80 jbsr set_esp0
81 addql #4,%sp
82 pea ret_from_exception
83 jmp schedule
84
85ENTRY(ret_from_fork)
86 movel %d1,%sp@-
87 jsr schedule_tail
88 addql #4,%sp
89 jra ret_from_exception
90
91ENTRY(sys_fork)
92 SAVE_SWITCH_STACK
93 pea %sp@(SWITCH_STACK_SIZE)
94 jbsr m68k_fork
95 addql #4,%sp
96 RESTORE_SWITCH_STACK
97 rts
98
99ENTRY(sys_vfork)
100 SAVE_SWITCH_STACK
101 pea %sp@(SWITCH_STACK_SIZE)
102 jbsr m68k_vfork
103 addql #4,%sp
104 RESTORE_SWITCH_STACK
105 rts
106
107ENTRY(sys_clone)
108 SAVE_SWITCH_STACK
109 pea %sp@(SWITCH_STACK_SIZE)
110 jbsr m68k_clone
111 addql #4,%sp
112 RESTORE_SWITCH_STACK
113 rts
114
115ENTRY(sys_sigreturn)
116 SAVE_SWITCH_STACK
117 jbsr do_sigreturn
118 RESTORE_SWITCH_STACK
119 rts
120
121ENTRY(sys_rt_sigreturn)
122 SAVE_SWITCH_STACK
123 jbsr do_rt_sigreturn
124 RESTORE_SWITCH_STACK
125 rts
126
127ENTRY(ret_from_user_signal)
128 moveq #__NR_sigreturn,%d0
129 trap #0
130
131ENTRY(ret_from_user_rt_signal)
132 movel #__NR_rt_sigreturn,%d0
133 trap #0
134
diff --git a/arch/m68k/kernel/head.S b/arch/m68k/kernel/head.S
index ef54128baa0b..27622b3273c1 100644
--- a/arch/m68k/kernel/head.S
+++ b/arch/m68k/kernel/head.S
@@ -134,7 +134,7 @@
134 * Thanks to a small helping routine enabling the mmu got quite simple 134 * Thanks to a small helping routine enabling the mmu got quite simple
135 * and there is only one way left. mmu_engage makes a complete a new mapping 135 * and there is only one way left. mmu_engage makes a complete a new mapping
136 * that only includes the absolute necessary to be able to jump to the final 136 * that only includes the absolute necessary to be able to jump to the final
137 * postion and to restore the original mapping. 137 * position and to restore the original mapping.
138 * As this code doesn't need a transparent translation register anymore this 138 * As this code doesn't need a transparent translation register anymore this
139 * means all registers are free to be used by machines that needs them for 139 * means all registers are free to be used by machines that needs them for
140 * other purposes. 140 * other purposes.
@@ -969,7 +969,7 @@ L(mmu_init_amiga):
969 is_not_040_or_060(1f) 969 is_not_040_or_060(1f)
970 970
971 /* 971 /*
972 * 040: Map the 16Meg range physical 0x0 upto logical 0x8000.0000 972 * 040: Map the 16Meg range physical 0x0 up to logical 0x8000.0000
973 */ 973 */
974 mmu_map #0x80000000,#0,#0x01000000,#_PAGE_NOCACHE_S 974 mmu_map #0x80000000,#0,#0x01000000,#_PAGE_NOCACHE_S
975 /* 975 /*
@@ -982,7 +982,7 @@ L(mmu_init_amiga):
982 982
9831: 9831:
984 /* 984 /*
985 * 030: Map the 32Meg range physical 0x0 upto logical 0x8000.0000 985 * 030: Map the 32Meg range physical 0x0 up to logical 0x8000.0000
986 */ 986 */
987 mmu_map #0x80000000,#0,#0x02000000,#_PAGE_NOCACHE030 987 mmu_map #0x80000000,#0,#0x02000000,#_PAGE_NOCACHE030
988 mmu_map_tt #1,#0x40000000,#0x20000000,#_PAGE_NOCACHE030 988 mmu_map_tt #1,#0x40000000,#0x20000000,#_PAGE_NOCACHE030
@@ -1074,7 +1074,7 @@ L(notq40):
1074 is_040(1f) 1074 is_040(1f)
1075 1075
1076 /* 1076 /*
1077 * 030: Map the 32Meg range physical 0x0 upto logical 0xf000.0000 1077 * 030: Map the 32Meg range physical 0x0 up to logical 0xf000.0000
1078 */ 1078 */
1079 mmu_map #0xf0000000,#0,#0x02000000,#_PAGE_NOCACHE030 1079 mmu_map #0xf0000000,#0,#0x02000000,#_PAGE_NOCACHE030
1080 1080
@@ -1082,7 +1082,7 @@ L(notq40):
1082 1082
10831: 10831:
1084 /* 1084 /*
1085 * 040: Map the 16Meg range physical 0x0 upto logical 0xf000.0000 1085 * 040: Map the 16Meg range physical 0x0 up to logical 0xf000.0000
1086 */ 1086 */
1087 mmu_map #0xf0000000,#0,#0x01000000,#_PAGE_NOCACHE_S 1087 mmu_map #0xf0000000,#0,#0x01000000,#_PAGE_NOCACHE_S
1088 1088
@@ -3078,7 +3078,7 @@ func_start serial_putc,%d0/%d1/%a0/%a1
3078 /* 3078 /*
3079 * If the loader gave us a board type then we can use that to 3079 * If the loader gave us a board type then we can use that to
3080 * select an appropriate output routine; otherwise we just use 3080 * select an appropriate output routine; otherwise we just use
3081 * the Bug code. If we haev to use the Bug that means the Bug 3081 * the Bug code. If we have to use the Bug that means the Bug
3082 * workspace has to be valid, which means the Bug has to use 3082 * workspace has to be valid, which means the Bug has to use
3083 * the SRAM, which is non-standard. 3083 * the SRAM, which is non-standard.
3084 */ 3084 */
diff --git a/arch/m68k/kernel/init_task.c b/arch/m68k/kernel/init_task.c
new file mode 100644
index 000000000000..cbf9dc3cc51d
--- /dev/null
+++ b/arch/m68k/kernel/init_task.c
@@ -0,0 +1,36 @@
1/*
2 * linux/arch/m68knommu/kernel/init_task.c
3 */
4#include <linux/mm.h>
5#include <linux/module.h>
6#include <linux/sched.h>
7#include <linux/init.h>
8#include <linux/init_task.h>
9#include <linux/fs.h>
10#include <linux/mqueue.h>
11
12#include <asm/uaccess.h>
13#include <asm/pgtable.h>
14
15static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
16static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
17/*
18 * Initial task structure.
19 *
20 * All other task structs will be allocated on slabs in fork.c
21 */
22__asm__(".align 4");
23struct task_struct init_task = INIT_TASK(init_task);
24
25EXPORT_SYMBOL(init_task);
26
27/*
28 * Initial thread structure.
29 *
30 * We need to make sure that this is 8192-byte aligned due to the
31 * way process stacks are handled. This is done by having a special
32 * "init_task" linker map entry..
33 */
34union thread_union init_thread_union __init_task_data =
35 { INIT_THREAD_INFO(init_task) };
36
diff --git a/arch/m68k/kernel/irq.c b/arch/m68k/kernel/irq.c
new file mode 100644
index 000000000000..15dbc3e9d20c
--- /dev/null
+++ b/arch/m68k/kernel/irq.c
@@ -0,0 +1,58 @@
1/*
2 * irq.c
3 *
4 * (C) Copyright 2007, Greg Ungerer <gerg@snapgear.com>
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/types.h>
12#include <linux/init.h>
13#include <linux/kernel.h>
14#include <linux/kernel_stat.h>
15#include <linux/interrupt.h>
16#include <linux/irq.h>
17#include <linux/seq_file.h>
18#include <asm/system.h>
19#include <asm/traps.h>
20
21asmlinkage void do_IRQ(int irq, struct pt_regs *regs)
22{
23 struct pt_regs *oldregs = set_irq_regs(regs);
24
25 irq_enter();
26 generic_handle_irq(irq);
27 irq_exit();
28
29 set_irq_regs(oldregs);
30}
31
32int show_interrupts(struct seq_file *p, void *v)
33{
34 struct irqaction *ap;
35 int irq = *((loff_t *) v);
36
37 if (irq == 0)
38 seq_puts(p, " CPU0\n");
39
40 if (irq < NR_IRQS) {
41 struct irq_desc *desc = irq_to_desc(irq);
42
43 ap = desc->action;
44 if (ap) {
45 seq_printf(p, "%3d: ", irq);
46 seq_printf(p, "%10u ", kstat_irqs(irq));
47 seq_printf(p, "%14s ", irq_desc_get_chip(desc)->name);
48
49 seq_printf(p, "%s", ap->name);
50 for (ap = ap->next; ap; ap = ap->next)
51 seq_printf(p, ", %s", ap->name);
52 seq_putc(p, '\n');
53 }
54 }
55
56 return 0;
57}
58
diff --git a/arch/m68k/kernel/m68k_ksyms.c b/arch/m68k/kernel/m68k_ksyms.c
index d900e77e5363..4752c28ce0ac 100644
--- a/arch/m68k/kernel/m68k_ksyms.c
+++ b/arch/m68k/kernel/m68k_ksyms.c
@@ -1,16 +1,5 @@
1#include <linux/module.h> 1#ifdef CONFIG_MMU
2 2#include "m68k_ksyms_mm.c"
3asmlinkage long long __ashldi3 (long long, int); 3#else
4asmlinkage long long __ashrdi3 (long long, int); 4#include "m68k_ksyms_no.c"
5asmlinkage long long __lshrdi3 (long long, int); 5#endif
6asmlinkage long long __muldi3 (long long, long long);
7
8/* The following are special because they're not called
9 explicitly (the C compiler generates them). Fortunately,
10 their interface isn't gonna change any time soon now, so
11 it's OK to leave it out of version control. */
12EXPORT_SYMBOL(__ashldi3);
13EXPORT_SYMBOL(__ashrdi3);
14EXPORT_SYMBOL(__lshrdi3);
15EXPORT_SYMBOL(__muldi3);
16
diff --git a/arch/m68k/kernel/m68k_ksyms_mm.c b/arch/m68k/kernel/m68k_ksyms_mm.c
new file mode 100644
index 000000000000..d900e77e5363
--- /dev/null
+++ b/arch/m68k/kernel/m68k_ksyms_mm.c
@@ -0,0 +1,16 @@
1#include <linux/module.h>
2
3asmlinkage long long __ashldi3 (long long, int);
4asmlinkage long long __ashrdi3 (long long, int);
5asmlinkage long long __lshrdi3 (long long, int);
6asmlinkage long long __muldi3 (long long, long long);
7
8/* The following are special because they're not called
9 explicitly (the C compiler generates them). Fortunately,
10 their interface isn't gonna change any time soon now, so
11 it's OK to leave it out of version control. */
12EXPORT_SYMBOL(__ashldi3);
13EXPORT_SYMBOL(__ashrdi3);
14EXPORT_SYMBOL(__lshrdi3);
15EXPORT_SYMBOL(__muldi3);
16
diff --git a/arch/m68k/kernel/m68k_ksyms_no.c b/arch/m68k/kernel/m68k_ksyms_no.c
new file mode 100644
index 000000000000..39fe0a7aec32
--- /dev/null
+++ b/arch/m68k/kernel/m68k_ksyms_no.c
@@ -0,0 +1,78 @@
1#include <linux/module.h>
2#include <linux/linkage.h>
3#include <linux/sched.h>
4#include <linux/string.h>
5#include <linux/mm.h>
6#include <linux/user.h>
7#include <linux/elfcore.h>
8#include <linux/in6.h>
9#include <linux/interrupt.h>
10
11#include <asm/setup.h>
12#include <asm/machdep.h>
13#include <asm/pgalloc.h>
14#include <asm/irq.h>
15#include <asm/io.h>
16#include <asm/checksum.h>
17#include <asm/current.h>
18
19extern int dump_fpu(struct pt_regs *, elf_fpregset_t *);
20
21/* platform dependent support */
22
23EXPORT_SYMBOL(__ioremap);
24EXPORT_SYMBOL(iounmap);
25EXPORT_SYMBOL(dump_fpu);
26
27EXPORT_SYMBOL(ip_fast_csum);
28
29EXPORT_SYMBOL(kernel_thread);
30
31/* Networking helper routines. */
32EXPORT_SYMBOL(csum_partial_copy_nocheck);
33
34/* The following are special because they're not called
35 explicitly (the C compiler generates them). Fortunately,
36 their interface isn't gonna change any time soon now, so
37 it's OK to leave it out of version control. */
38EXPORT_SYMBOL(memcpy);
39EXPORT_SYMBOL(memset);
40
41/*
42 * libgcc functions - functions that are used internally by the
43 * compiler... (prototypes are not correct though, but that
44 * doesn't really matter since they're not versioned).
45 */
46extern void __ashldi3(void);
47extern void __ashrdi3(void);
48extern void __divsi3(void);
49extern void __lshrdi3(void);
50extern void __modsi3(void);
51extern void __muldi3(void);
52extern void __mulsi3(void);
53extern void __udivsi3(void);
54extern void __umodsi3(void);
55
56 /* gcc lib functions */
57EXPORT_SYMBOL(__ashldi3);
58EXPORT_SYMBOL(__ashrdi3);
59EXPORT_SYMBOL(__divsi3);
60EXPORT_SYMBOL(__lshrdi3);
61EXPORT_SYMBOL(__modsi3);
62EXPORT_SYMBOL(__muldi3);
63EXPORT_SYMBOL(__mulsi3);
64EXPORT_SYMBOL(__udivsi3);
65EXPORT_SYMBOL(__umodsi3);
66
67#ifdef CONFIG_COLDFIRE
68extern unsigned int *dma_device_address;
69extern unsigned long dma_base_addr, _ramend;
70EXPORT_SYMBOL(dma_base_addr);
71EXPORT_SYMBOL(dma_device_address);
72EXPORT_SYMBOL(_ramend);
73
74extern asmlinkage void trap(void);
75extern void *_ramvec;
76EXPORT_SYMBOL(trap);
77EXPORT_SYMBOL(_ramvec);
78#endif /* CONFIG_COLDFIRE */
diff --git a/arch/m68k/kernel/module.c b/arch/m68k/kernel/module.c
index cd6bcb1c957e..7ea203ce6b1a 100644
--- a/arch/m68k/kernel/module.c
+++ b/arch/m68k/kernel/module.c
@@ -1,155 +1,5 @@
1/* 1#ifdef CONFIG_MMU
2 * This file is subject to the terms and conditions of the GNU General Public 2#include "module_mm.c"
3 * License. See the file COPYING in the main directory of this archive
4 * for more details.
5 */
6
7#include <linux/moduleloader.h>
8#include <linux/elf.h>
9#include <linux/vmalloc.h>
10#include <linux/fs.h>
11#include <linux/string.h>
12#include <linux/kernel.h>
13
14#if 0
15#define DEBUGP printk
16#else 3#else
17#define DEBUGP(fmt...) 4#include "module_no.c"
18#endif 5#endif
19
20#ifdef CONFIG_MODULES
21
22void *module_alloc(unsigned long size)
23{
24 if (size == 0)
25 return NULL;
26 return vmalloc(size);
27}
28
29
30/* Free memory returned from module_alloc */
31void module_free(struct module *mod, void *module_region)
32{
33 vfree(module_region);
34}
35
36/* We don't need anything special. */
37int module_frob_arch_sections(Elf_Ehdr *hdr,
38 Elf_Shdr *sechdrs,
39 char *secstrings,
40 struct module *mod)
41{
42 return 0;
43}
44
45int apply_relocate(Elf32_Shdr *sechdrs,
46 const char *strtab,
47 unsigned int symindex,
48 unsigned int relsec,
49 struct module *me)
50{
51 unsigned int i;
52 Elf32_Rel *rel = (void *)sechdrs[relsec].sh_addr;
53 Elf32_Sym *sym;
54 uint32_t *location;
55
56 DEBUGP("Applying relocate section %u to %u\n", relsec,
57 sechdrs[relsec].sh_info);
58 for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
59 /* This is where to make the change */
60 location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
61 + rel[i].r_offset;
62 /* This is the symbol it is referring to. Note that all
63 undefined symbols have been resolved. */
64 sym = (Elf32_Sym *)sechdrs[symindex].sh_addr
65 + ELF32_R_SYM(rel[i].r_info);
66
67 switch (ELF32_R_TYPE(rel[i].r_info)) {
68 case R_68K_32:
69 /* We add the value into the location given */
70 *location += sym->st_value;
71 break;
72 case R_68K_PC32:
73 /* Add the value, subtract its postition */
74 *location += sym->st_value - (uint32_t)location;
75 break;
76 default:
77 printk(KERN_ERR "module %s: Unknown relocation: %u\n",
78 me->name, ELF32_R_TYPE(rel[i].r_info));
79 return -ENOEXEC;
80 }
81 }
82 return 0;
83}
84
85int apply_relocate_add(Elf32_Shdr *sechdrs,
86 const char *strtab,
87 unsigned int symindex,
88 unsigned int relsec,
89 struct module *me)
90{
91 unsigned int i;
92 Elf32_Rela *rel = (void *)sechdrs[relsec].sh_addr;
93 Elf32_Sym *sym;
94 uint32_t *location;
95
96 DEBUGP("Applying relocate_add section %u to %u\n", relsec,
97 sechdrs[relsec].sh_info);
98 for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
99 /* This is where to make the change */
100 location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
101 + rel[i].r_offset;
102 /* This is the symbol it is referring to. Note that all
103 undefined symbols have been resolved. */
104 sym = (Elf32_Sym *)sechdrs[symindex].sh_addr
105 + ELF32_R_SYM(rel[i].r_info);
106
107 switch (ELF32_R_TYPE(rel[i].r_info)) {
108 case R_68K_32:
109 /* We add the value into the location given */
110 *location = rel[i].r_addend + sym->st_value;
111 break;
112 case R_68K_PC32:
113 /* Add the value, subtract its postition */
114 *location = rel[i].r_addend + sym->st_value - (uint32_t)location;
115 break;
116 default:
117 printk(KERN_ERR "module %s: Unknown relocation: %u\n",
118 me->name, ELF32_R_TYPE(rel[i].r_info));
119 return -ENOEXEC;
120 }
121 }
122 return 0;
123}
124
125int module_finalize(const Elf_Ehdr *hdr,
126 const Elf_Shdr *sechdrs,
127 struct module *mod)
128{
129 module_fixup(mod, mod->arch.fixup_start, mod->arch.fixup_end);
130
131 return 0;
132}
133
134void module_arch_cleanup(struct module *mod)
135{
136}
137
138#endif /* CONFIG_MODULES */
139
140void module_fixup(struct module *mod, struct m68k_fixup_info *start,
141 struct m68k_fixup_info *end)
142{
143 struct m68k_fixup_info *fixup;
144
145 for (fixup = start; fixup < end; fixup++) {
146 switch (fixup->type) {
147 case m68k_fixup_memoffset:
148 *(u32 *)fixup->addr = m68k_memoffset;
149 break;
150 case m68k_fixup_vnode_shift:
151 *(u16 *)fixup->addr += m68k_virt_to_node_shift;
152 break;
153 }
154 }
155}
diff --git a/arch/m68k/kernel/module_mm.c b/arch/m68k/kernel/module_mm.c
new file mode 100644
index 000000000000..cd6bcb1c957e
--- /dev/null
+++ b/arch/m68k/kernel/module_mm.c
@@ -0,0 +1,155 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file COPYING in the main directory of this archive
4 * for more details.
5 */
6
7#include <linux/moduleloader.h>
8#include <linux/elf.h>
9#include <linux/vmalloc.h>
10#include <linux/fs.h>
11#include <linux/string.h>
12#include <linux/kernel.h>
13
14#if 0
15#define DEBUGP printk
16#else
17#define DEBUGP(fmt...)
18#endif
19
20#ifdef CONFIG_MODULES
21
22void *module_alloc(unsigned long size)
23{
24 if (size == 0)
25 return NULL;
26 return vmalloc(size);
27}
28
29
30/* Free memory returned from module_alloc */
31void module_free(struct module *mod, void *module_region)
32{
33 vfree(module_region);
34}
35
36/* We don't need anything special. */
37int module_frob_arch_sections(Elf_Ehdr *hdr,
38 Elf_Shdr *sechdrs,
39 char *secstrings,
40 struct module *mod)
41{
42 return 0;
43}
44
45int apply_relocate(Elf32_Shdr *sechdrs,
46 const char *strtab,
47 unsigned int symindex,
48 unsigned int relsec,
49 struct module *me)
50{
51 unsigned int i;
52 Elf32_Rel *rel = (void *)sechdrs[relsec].sh_addr;
53 Elf32_Sym *sym;
54 uint32_t *location;
55
56 DEBUGP("Applying relocate section %u to %u\n", relsec,
57 sechdrs[relsec].sh_info);
58 for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
59 /* This is where to make the change */
60 location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
61 + rel[i].r_offset;
62 /* This is the symbol it is referring to. Note that all
63 undefined symbols have been resolved. */
64 sym = (Elf32_Sym *)sechdrs[symindex].sh_addr
65 + ELF32_R_SYM(rel[i].r_info);
66
67 switch (ELF32_R_TYPE(rel[i].r_info)) {
68 case R_68K_32:
69 /* We add the value into the location given */
70 *location += sym->st_value;
71 break;
72 case R_68K_PC32:
73 /* Add the value, subtract its postition */
74 *location += sym->st_value - (uint32_t)location;
75 break;
76 default:
77 printk(KERN_ERR "module %s: Unknown relocation: %u\n",
78 me->name, ELF32_R_TYPE(rel[i].r_info));
79 return -ENOEXEC;
80 }
81 }
82 return 0;
83}
84
85int apply_relocate_add(Elf32_Shdr *sechdrs,
86 const char *strtab,
87 unsigned int symindex,
88 unsigned int relsec,
89 struct module *me)
90{
91 unsigned int i;
92 Elf32_Rela *rel = (void *)sechdrs[relsec].sh_addr;
93 Elf32_Sym *sym;
94 uint32_t *location;
95
96 DEBUGP("Applying relocate_add section %u to %u\n", relsec,
97 sechdrs[relsec].sh_info);
98 for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
99 /* This is where to make the change */
100 location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
101 + rel[i].r_offset;
102 /* This is the symbol it is referring to. Note that all
103 undefined symbols have been resolved. */
104 sym = (Elf32_Sym *)sechdrs[symindex].sh_addr
105 + ELF32_R_SYM(rel[i].r_info);
106
107 switch (ELF32_R_TYPE(rel[i].r_info)) {
108 case R_68K_32:
109 /* We add the value into the location given */
110 *location = rel[i].r_addend + sym->st_value;
111 break;
112 case R_68K_PC32:
113 /* Add the value, subtract its postition */
114 *location = rel[i].r_addend + sym->st_value - (uint32_t)location;
115 break;
116 default:
117 printk(KERN_ERR "module %s: Unknown relocation: %u\n",
118 me->name, ELF32_R_TYPE(rel[i].r_info));
119 return -ENOEXEC;
120 }
121 }
122 return 0;
123}
124
125int module_finalize(const Elf_Ehdr *hdr,
126 const Elf_Shdr *sechdrs,
127 struct module *mod)
128{
129 module_fixup(mod, mod->arch.fixup_start, mod->arch.fixup_end);
130
131 return 0;
132}
133
134void module_arch_cleanup(struct module *mod)
135{
136}
137
138#endif /* CONFIG_MODULES */
139
140void module_fixup(struct module *mod, struct m68k_fixup_info *start,
141 struct m68k_fixup_info *end)
142{
143 struct m68k_fixup_info *fixup;
144
145 for (fixup = start; fixup < end; fixup++) {
146 switch (fixup->type) {
147 case m68k_fixup_memoffset:
148 *(u32 *)fixup->addr = m68k_memoffset;
149 break;
150 case m68k_fixup_vnode_shift:
151 *(u16 *)fixup->addr += m68k_virt_to_node_shift;
152 break;
153 }
154 }
155}
diff --git a/arch/m68k/kernel/module_no.c b/arch/m68k/kernel/module_no.c
new file mode 100644
index 000000000000..d11ffae7956a
--- /dev/null
+++ b/arch/m68k/kernel/module_no.c
@@ -0,0 +1,126 @@
1#include <linux/moduleloader.h>
2#include <linux/elf.h>
3#include <linux/vmalloc.h>
4#include <linux/fs.h>
5#include <linux/string.h>
6#include <linux/kernel.h>
7
8#if 0
9#define DEBUGP printk
10#else
11#define DEBUGP(fmt...)
12#endif
13
14void *module_alloc(unsigned long size)
15{
16 if (size == 0)
17 return NULL;
18 return vmalloc(size);
19}
20
21
22/* Free memory returned from module_alloc */
23void module_free(struct module *mod, void *module_region)
24{
25 vfree(module_region);
26}
27
28/* We don't need anything special. */
29int module_frob_arch_sections(Elf_Ehdr *hdr,
30 Elf_Shdr *sechdrs,
31 char *secstrings,
32 struct module *mod)
33{
34 return 0;
35}
36
37int apply_relocate(Elf32_Shdr *sechdrs,
38 const char *strtab,
39 unsigned int symindex,
40 unsigned int relsec,
41 struct module *me)
42{
43 unsigned int i;
44 Elf32_Rel *rel = (void *)sechdrs[relsec].sh_addr;
45 Elf32_Sym *sym;
46 uint32_t *location;
47
48 DEBUGP("Applying relocate section %u to %u\n", relsec,
49 sechdrs[relsec].sh_info);
50 for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
51 /* This is where to make the change */
52 location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
53 + rel[i].r_offset;
54 /* This is the symbol it is referring to. Note that all
55 undefined symbols have been resolved. */
56 sym = (Elf32_Sym *)sechdrs[symindex].sh_addr
57 + ELF32_R_SYM(rel[i].r_info);
58
59 switch (ELF32_R_TYPE(rel[i].r_info)) {
60 case R_68K_32:
61 /* We add the value into the location given */
62 *location += sym->st_value;
63 break;
64 case R_68K_PC32:
65 /* Add the value, subtract its postition */
66 *location += sym->st_value - (uint32_t)location;
67 break;
68 default:
69 printk(KERN_ERR "module %s: Unknown relocation: %u\n",
70 me->name, ELF32_R_TYPE(rel[i].r_info));
71 return -ENOEXEC;
72 }
73 }
74 return 0;
75}
76
77int apply_relocate_add(Elf32_Shdr *sechdrs,
78 const char *strtab,
79 unsigned int symindex,
80 unsigned int relsec,
81 struct module *me)
82{
83 unsigned int i;
84 Elf32_Rela *rel = (void *)sechdrs[relsec].sh_addr;
85 Elf32_Sym *sym;
86 uint32_t *location;
87
88 DEBUGP("Applying relocate_add section %u to %u\n", relsec,
89 sechdrs[relsec].sh_info);
90 for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
91 /* This is where to make the change */
92 location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
93 + rel[i].r_offset;
94 /* This is the symbol it is referring to. Note that all
95 undefined symbols have been resolved. */
96 sym = (Elf32_Sym *)sechdrs[symindex].sh_addr
97 + ELF32_R_SYM(rel[i].r_info);
98
99 switch (ELF32_R_TYPE(rel[i].r_info)) {
100 case R_68K_32:
101 /* We add the value into the location given */
102 *location = rel[i].r_addend + sym->st_value;
103 break;
104 case R_68K_PC32:
105 /* Add the value, subtract its postition */
106 *location = rel[i].r_addend + sym->st_value - (uint32_t)location;
107 break;
108 default:
109 printk(KERN_ERR "module %s: Unknown relocation: %u\n",
110 me->name, ELF32_R_TYPE(rel[i].r_info));
111 return -ENOEXEC;
112 }
113 }
114 return 0;
115}
116
117int module_finalize(const Elf_Ehdr *hdr,
118 const Elf_Shdr *sechdrs,
119 struct module *me)
120{
121 return 0;
122}
123
124void module_arch_cleanup(struct module *mod)
125{
126}
diff --git a/arch/m68k/kernel/process.c b/arch/m68k/kernel/process.c
index c2a1fc23dd75..6cf4bd6e34f8 100644
--- a/arch/m68k/kernel/process.c
+++ b/arch/m68k/kernel/process.c
@@ -1,354 +1,5 @@
1/* 1#ifdef CONFIG_MMU
2 * linux/arch/m68k/kernel/process.c 2#include "process_mm.c"
3 *
4 * Copyright (C) 1995 Hamish Macdonald
5 *
6 * 68060 fixes by Jesper Skov
7 */
8
9/*
10 * This file handles the architecture-dependent parts of process handling..
11 */
12
13#include <linux/errno.h>
14#include <linux/module.h>
15#include <linux/sched.h>
16#include <linux/kernel.h>
17#include <linux/mm.h>
18#include <linux/slab.h>
19#include <linux/fs.h>
20#include <linux/smp.h>
21#include <linux/stddef.h>
22#include <linux/unistd.h>
23#include <linux/ptrace.h>
24#include <linux/user.h>
25#include <linux/reboot.h>
26#include <linux/init_task.h>
27#include <linux/mqueue.h>
28
29#include <asm/uaccess.h>
30#include <asm/system.h>
31#include <asm/traps.h>
32#include <asm/machdep.h>
33#include <asm/setup.h>
34#include <asm/pgtable.h>
35
36/*
37 * Initial task/thread structure. Make this a per-architecture thing,
38 * because different architectures tend to have different
39 * alignment requirements and potentially different initial
40 * setup.
41 */
42static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
43static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
44union thread_union init_thread_union __init_task_data
45 __attribute__((aligned(THREAD_SIZE))) =
46 { INIT_THREAD_INFO(init_task) };
47
48/* initial task structure */
49struct task_struct init_task = INIT_TASK(init_task);
50
51EXPORT_SYMBOL(init_task);
52
53asmlinkage void ret_from_fork(void);
54
55
56/*
57 * Return saved PC from a blocked thread
58 */
59unsigned long thread_saved_pc(struct task_struct *tsk)
60{
61 struct switch_stack *sw = (struct switch_stack *)tsk->thread.ksp;
62 /* Check whether the thread is blocked in resume() */
63 if (in_sched_functions(sw->retpc))
64 return ((unsigned long *)sw->a6)[1];
65 else
66 return sw->retpc;
67}
68
69/*
70 * The idle loop on an m68k..
71 */
72static void default_idle(void)
73{
74 if (!need_resched())
75#if defined(MACH_ATARI_ONLY)
76 /* block out HSYNC on the atari (falcon) */
77 __asm__("stop #0x2200" : : : "cc");
78#else 3#else
79 __asm__("stop #0x2000" : : : "cc"); 4#include "process_no.c"
80#endif 5#endif
81}
82
83void (*idle)(void) = default_idle;
84
85/*
86 * The idle thread. There's no useful work to be
87 * done, so just try to conserve power and have a
88 * low exit latency (ie sit in a loop waiting for
89 * somebody to say that they'd like to reschedule)
90 */
91void cpu_idle(void)
92{
93 /* endless idle loop with no priority at all */
94 while (1) {
95 while (!need_resched())
96 idle();
97 preempt_enable_no_resched();
98 schedule();
99 preempt_disable();
100 }
101}
102
103void machine_restart(char * __unused)
104{
105 if (mach_reset)
106 mach_reset();
107 for (;;);
108}
109
110void machine_halt(void)
111{
112 if (mach_halt)
113 mach_halt();
114 for (;;);
115}
116
117void machine_power_off(void)
118{
119 if (mach_power_off)
120 mach_power_off();
121 for (;;);
122}
123
124void (*pm_power_off)(void) = machine_power_off;
125EXPORT_SYMBOL(pm_power_off);
126
127void show_regs(struct pt_regs * regs)
128{
129 printk("\n");
130 printk("Format %02x Vector: %04x PC: %08lx Status: %04x %s\n",
131 regs->format, regs->vector, regs->pc, regs->sr, print_tainted());
132 printk("ORIG_D0: %08lx D0: %08lx A2: %08lx A1: %08lx\n",
133 regs->orig_d0, regs->d0, regs->a2, regs->a1);
134 printk("A0: %08lx D5: %08lx D4: %08lx\n",
135 regs->a0, regs->d5, regs->d4);
136 printk("D3: %08lx D2: %08lx D1: %08lx\n",
137 regs->d3, regs->d2, regs->d1);
138 if (!(regs->sr & PS_S))
139 printk("USP: %08lx\n", rdusp());
140}
141
142/*
143 * Create a kernel thread
144 */
145int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
146{
147 int pid;
148 mm_segment_t fs;
149
150 fs = get_fs();
151 set_fs (KERNEL_DS);
152
153 {
154 register long retval __asm__ ("d0");
155 register long clone_arg __asm__ ("d1") = flags | CLONE_VM | CLONE_UNTRACED;
156
157 retval = __NR_clone;
158 __asm__ __volatile__
159 ("clrl %%d2\n\t"
160 "trap #0\n\t" /* Linux/m68k system call */
161 "tstl %0\n\t" /* child or parent */
162 "jne 1f\n\t" /* parent - jump */
163 "lea %%sp@(%c7),%6\n\t" /* reload current */
164 "movel %6@,%6\n\t"
165 "movel %3,%%sp@-\n\t" /* push argument */
166 "jsr %4@\n\t" /* call fn */
167 "movel %0,%%d1\n\t" /* pass exit value */
168 "movel %2,%%d0\n\t" /* exit */
169 "trap #0\n"
170 "1:"
171 : "+d" (retval)
172 : "i" (__NR_clone), "i" (__NR_exit),
173 "r" (arg), "a" (fn), "d" (clone_arg), "r" (current),
174 "i" (-THREAD_SIZE)
175 : "d2");
176
177 pid = retval;
178 }
179
180 set_fs (fs);
181 return pid;
182}
183EXPORT_SYMBOL(kernel_thread);
184
185void flush_thread(void)
186{
187 unsigned long zero = 0;
188 set_fs(USER_DS);
189 current->thread.fs = __USER_DS;
190 if (!FPU_IS_EMU)
191 asm volatile (".chip 68k/68881\n\t"
192 "frestore %0@\n\t"
193 ".chip 68k" : : "a" (&zero));
194}
195
196/*
197 * "m68k_fork()".. By the time we get here, the
198 * non-volatile registers have also been saved on the
199 * stack. We do some ugly pointer stuff here.. (see
200 * also copy_thread)
201 */
202
203asmlinkage int m68k_fork(struct pt_regs *regs)
204{
205 return do_fork(SIGCHLD, rdusp(), regs, 0, NULL, NULL);
206}
207
208asmlinkage int m68k_vfork(struct pt_regs *regs)
209{
210 return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, rdusp(), regs, 0,
211 NULL, NULL);
212}
213
214asmlinkage int m68k_clone(struct pt_regs *regs)
215{
216 unsigned long clone_flags;
217 unsigned long newsp;
218 int __user *parent_tidptr, *child_tidptr;
219
220 /* syscall2 puts clone_flags in d1 and usp in d2 */
221 clone_flags = regs->d1;
222 newsp = regs->d2;
223 parent_tidptr = (int __user *)regs->d3;
224 child_tidptr = (int __user *)regs->d4;
225 if (!newsp)
226 newsp = rdusp();
227 return do_fork(clone_flags, newsp, regs, 0,
228 parent_tidptr, child_tidptr);
229}
230
231int copy_thread(unsigned long clone_flags, unsigned long usp,
232 unsigned long unused,
233 struct task_struct * p, struct pt_regs * regs)
234{
235 struct pt_regs * childregs;
236 struct switch_stack * childstack, *stack;
237 unsigned long *retp;
238
239 childregs = (struct pt_regs *) (task_stack_page(p) + THREAD_SIZE) - 1;
240
241 *childregs = *regs;
242 childregs->d0 = 0;
243
244 retp = ((unsigned long *) regs);
245 stack = ((struct switch_stack *) retp) - 1;
246
247 childstack = ((struct switch_stack *) childregs) - 1;
248 *childstack = *stack;
249 childstack->retpc = (unsigned long)ret_from_fork;
250
251 p->thread.usp = usp;
252 p->thread.ksp = (unsigned long)childstack;
253
254 if (clone_flags & CLONE_SETTLS)
255 task_thread_info(p)->tp_value = regs->d5;
256
257 /*
258 * Must save the current SFC/DFC value, NOT the value when
259 * the parent was last descheduled - RGH 10-08-96
260 */
261 p->thread.fs = get_fs().seg;
262
263 if (!FPU_IS_EMU) {
264 /* Copy the current fpu state */
265 asm volatile ("fsave %0" : : "m" (p->thread.fpstate[0]) : "memory");
266
267 if (!CPU_IS_060 ? p->thread.fpstate[0] : p->thread.fpstate[2])
268 asm volatile ("fmovemx %/fp0-%/fp7,%0\n\t"
269 "fmoveml %/fpiar/%/fpcr/%/fpsr,%1"
270 : : "m" (p->thread.fp[0]), "m" (p->thread.fpcntl[0])
271 : "memory");
272 /* Restore the state in case the fpu was busy */
273 asm volatile ("frestore %0" : : "m" (p->thread.fpstate[0]));
274 }
275
276 return 0;
277}
278
279/* Fill in the fpu structure for a core dump. */
280
281int dump_fpu (struct pt_regs *regs, struct user_m68kfp_struct *fpu)
282{
283 char fpustate[216];
284
285 if (FPU_IS_EMU) {
286 int i;
287
288 memcpy(fpu->fpcntl, current->thread.fpcntl, 12);
289 memcpy(fpu->fpregs, current->thread.fp, 96);
290 /* Convert internal fpu reg representation
291 * into long double format
292 */
293 for (i = 0; i < 24; i += 3)
294 fpu->fpregs[i] = ((fpu->fpregs[i] & 0xffff0000) << 15) |
295 ((fpu->fpregs[i] & 0x0000ffff) << 16);
296 return 1;
297 }
298
299 /* First dump the fpu context to avoid protocol violation. */
300 asm volatile ("fsave %0" :: "m" (fpustate[0]) : "memory");
301 if (!CPU_IS_060 ? !fpustate[0] : !fpustate[2])
302 return 0;
303
304 asm volatile ("fmovem %/fpiar/%/fpcr/%/fpsr,%0"
305 :: "m" (fpu->fpcntl[0])
306 : "memory");
307 asm volatile ("fmovemx %/fp0-%/fp7,%0"
308 :: "m" (fpu->fpregs[0])
309 : "memory");
310 return 1;
311}
312EXPORT_SYMBOL(dump_fpu);
313
314/*
315 * sys_execve() executes a new program.
316 */
317asmlinkage int sys_execve(const char __user *name,
318 const char __user *const __user *argv,
319 const char __user *const __user *envp)
320{
321 int error;
322 char * filename;
323 struct pt_regs *regs = (struct pt_regs *) &name;
324
325 filename = getname(name);
326 error = PTR_ERR(filename);
327 if (IS_ERR(filename))
328 return error;
329 error = do_execve(filename, argv, envp, regs);
330 putname(filename);
331 return error;
332}
333
334unsigned long get_wchan(struct task_struct *p)
335{
336 unsigned long fp, pc;
337 unsigned long stack_page;
338 int count = 0;
339 if (!p || p == current || p->state == TASK_RUNNING)
340 return 0;
341
342 stack_page = (unsigned long)task_stack_page(p);
343 fp = ((struct switch_stack *)p->thread.ksp)->a6;
344 do {
345 if (fp < stack_page+sizeof(struct thread_info) ||
346 fp >= 8184+stack_page)
347 return 0;
348 pc = ((unsigned long *)fp)[1];
349 if (!in_sched_functions(pc))
350 return pc;
351 fp = *(unsigned long *) fp;
352 } while (count++ < 16);
353 return 0;
354}
diff --git a/arch/m68k/kernel/process_mm.c b/arch/m68k/kernel/process_mm.c
new file mode 100644
index 000000000000..c2a1fc23dd75
--- /dev/null
+++ b/arch/m68k/kernel/process_mm.c
@@ -0,0 +1,354 @@
1/*
2 * linux/arch/m68k/kernel/process.c
3 *
4 * Copyright (C) 1995 Hamish Macdonald
5 *
6 * 68060 fixes by Jesper Skov
7 */
8
9/*
10 * This file handles the architecture-dependent parts of process handling..
11 */
12
13#include <linux/errno.h>
14#include <linux/module.h>
15#include <linux/sched.h>
16#include <linux/kernel.h>
17#include <linux/mm.h>
18#include <linux/slab.h>
19#include <linux/fs.h>
20#include <linux/smp.h>
21#include <linux/stddef.h>
22#include <linux/unistd.h>
23#include <linux/ptrace.h>
24#include <linux/user.h>
25#include <linux/reboot.h>
26#include <linux/init_task.h>
27#include <linux/mqueue.h>
28
29#include <asm/uaccess.h>
30#include <asm/system.h>
31#include <asm/traps.h>
32#include <asm/machdep.h>
33#include <asm/setup.h>
34#include <asm/pgtable.h>
35
36/*
37 * Initial task/thread structure. Make this a per-architecture thing,
38 * because different architectures tend to have different
39 * alignment requirements and potentially different initial
40 * setup.
41 */
42static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
43static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
44union thread_union init_thread_union __init_task_data
45 __attribute__((aligned(THREAD_SIZE))) =
46 { INIT_THREAD_INFO(init_task) };
47
48/* initial task structure */
49struct task_struct init_task = INIT_TASK(init_task);
50
51EXPORT_SYMBOL(init_task);
52
53asmlinkage void ret_from_fork(void);
54
55
56/*
57 * Return saved PC from a blocked thread
58 */
59unsigned long thread_saved_pc(struct task_struct *tsk)
60{
61 struct switch_stack *sw = (struct switch_stack *)tsk->thread.ksp;
62 /* Check whether the thread is blocked in resume() */
63 if (in_sched_functions(sw->retpc))
64 return ((unsigned long *)sw->a6)[1];
65 else
66 return sw->retpc;
67}
68
69/*
70 * The idle loop on an m68k..
71 */
72static void default_idle(void)
73{
74 if (!need_resched())
75#if defined(MACH_ATARI_ONLY)
76 /* block out HSYNC on the atari (falcon) */
77 __asm__("stop #0x2200" : : : "cc");
78#else
79 __asm__("stop #0x2000" : : : "cc");
80#endif
81}
82
83void (*idle)(void) = default_idle;
84
85/*
86 * The idle thread. There's no useful work to be
87 * done, so just try to conserve power and have a
88 * low exit latency (ie sit in a loop waiting for
89 * somebody to say that they'd like to reschedule)
90 */
91void cpu_idle(void)
92{
93 /* endless idle loop with no priority at all */
94 while (1) {
95 while (!need_resched())
96 idle();
97 preempt_enable_no_resched();
98 schedule();
99 preempt_disable();
100 }
101}
102
103void machine_restart(char * __unused)
104{
105 if (mach_reset)
106 mach_reset();
107 for (;;);
108}
109
110void machine_halt(void)
111{
112 if (mach_halt)
113 mach_halt();
114 for (;;);
115}
116
117void machine_power_off(void)
118{
119 if (mach_power_off)
120 mach_power_off();
121 for (;;);
122}
123
124void (*pm_power_off)(void) = machine_power_off;
125EXPORT_SYMBOL(pm_power_off);
126
127void show_regs(struct pt_regs * regs)
128{
129 printk("\n");
130 printk("Format %02x Vector: %04x PC: %08lx Status: %04x %s\n",
131 regs->format, regs->vector, regs->pc, regs->sr, print_tainted());
132 printk("ORIG_D0: %08lx D0: %08lx A2: %08lx A1: %08lx\n",
133 regs->orig_d0, regs->d0, regs->a2, regs->a1);
134 printk("A0: %08lx D5: %08lx D4: %08lx\n",
135 regs->a0, regs->d5, regs->d4);
136 printk("D3: %08lx D2: %08lx D1: %08lx\n",
137 regs->d3, regs->d2, regs->d1);
138 if (!(regs->sr & PS_S))
139 printk("USP: %08lx\n", rdusp());
140}
141
142/*
143 * Create a kernel thread
144 */
145int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
146{
147 int pid;
148 mm_segment_t fs;
149
150 fs = get_fs();
151 set_fs (KERNEL_DS);
152
153 {
154 register long retval __asm__ ("d0");
155 register long clone_arg __asm__ ("d1") = flags | CLONE_VM | CLONE_UNTRACED;
156
157 retval = __NR_clone;
158 __asm__ __volatile__
159 ("clrl %%d2\n\t"
160 "trap #0\n\t" /* Linux/m68k system call */
161 "tstl %0\n\t" /* child or parent */
162 "jne 1f\n\t" /* parent - jump */
163 "lea %%sp@(%c7),%6\n\t" /* reload current */
164 "movel %6@,%6\n\t"
165 "movel %3,%%sp@-\n\t" /* push argument */
166 "jsr %4@\n\t" /* call fn */
167 "movel %0,%%d1\n\t" /* pass exit value */
168 "movel %2,%%d0\n\t" /* exit */
169 "trap #0\n"
170 "1:"
171 : "+d" (retval)
172 : "i" (__NR_clone), "i" (__NR_exit),
173 "r" (arg), "a" (fn), "d" (clone_arg), "r" (current),
174 "i" (-THREAD_SIZE)
175 : "d2");
176
177 pid = retval;
178 }
179
180 set_fs (fs);
181 return pid;
182}
183EXPORT_SYMBOL(kernel_thread);
184
185void flush_thread(void)
186{
187 unsigned long zero = 0;
188 set_fs(USER_DS);
189 current->thread.fs = __USER_DS;
190 if (!FPU_IS_EMU)
191 asm volatile (".chip 68k/68881\n\t"
192 "frestore %0@\n\t"
193 ".chip 68k" : : "a" (&zero));
194}
195
196/*
197 * "m68k_fork()".. By the time we get here, the
198 * non-volatile registers have also been saved on the
199 * stack. We do some ugly pointer stuff here.. (see
200 * also copy_thread)
201 */
202
203asmlinkage int m68k_fork(struct pt_regs *regs)
204{
205 return do_fork(SIGCHLD, rdusp(), regs, 0, NULL, NULL);
206}
207
208asmlinkage int m68k_vfork(struct pt_regs *regs)
209{
210 return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, rdusp(), regs, 0,
211 NULL, NULL);
212}
213
214asmlinkage int m68k_clone(struct pt_regs *regs)
215{
216 unsigned long clone_flags;
217 unsigned long newsp;
218 int __user *parent_tidptr, *child_tidptr;
219
220 /* syscall2 puts clone_flags in d1 and usp in d2 */
221 clone_flags = regs->d1;
222 newsp = regs->d2;
223 parent_tidptr = (int __user *)regs->d3;
224 child_tidptr = (int __user *)regs->d4;
225 if (!newsp)
226 newsp = rdusp();
227 return do_fork(clone_flags, newsp, regs, 0,
228 parent_tidptr, child_tidptr);
229}
230
231int copy_thread(unsigned long clone_flags, unsigned long usp,
232 unsigned long unused,
233 struct task_struct * p, struct pt_regs * regs)
234{
235 struct pt_regs * childregs;
236 struct switch_stack * childstack, *stack;
237 unsigned long *retp;
238
239 childregs = (struct pt_regs *) (task_stack_page(p) + THREAD_SIZE) - 1;
240
241 *childregs = *regs;
242 childregs->d0 = 0;
243
244 retp = ((unsigned long *) regs);
245 stack = ((struct switch_stack *) retp) - 1;
246
247 childstack = ((struct switch_stack *) childregs) - 1;
248 *childstack = *stack;
249 childstack->retpc = (unsigned long)ret_from_fork;
250
251 p->thread.usp = usp;
252 p->thread.ksp = (unsigned long)childstack;
253
254 if (clone_flags & CLONE_SETTLS)
255 task_thread_info(p)->tp_value = regs->d5;
256
257 /*
258 * Must save the current SFC/DFC value, NOT the value when
259 * the parent was last descheduled - RGH 10-08-96
260 */
261 p->thread.fs = get_fs().seg;
262
263 if (!FPU_IS_EMU) {
264 /* Copy the current fpu state */
265 asm volatile ("fsave %0" : : "m" (p->thread.fpstate[0]) : "memory");
266
267 if (!CPU_IS_060 ? p->thread.fpstate[0] : p->thread.fpstate[2])
268 asm volatile ("fmovemx %/fp0-%/fp7,%0\n\t"
269 "fmoveml %/fpiar/%/fpcr/%/fpsr,%1"
270 : : "m" (p->thread.fp[0]), "m" (p->thread.fpcntl[0])
271 : "memory");
272 /* Restore the state in case the fpu was busy */
273 asm volatile ("frestore %0" : : "m" (p->thread.fpstate[0]));
274 }
275
276 return 0;
277}
278
279/* Fill in the fpu structure for a core dump. */
280
281int dump_fpu (struct pt_regs *regs, struct user_m68kfp_struct *fpu)
282{
283 char fpustate[216];
284
285 if (FPU_IS_EMU) {
286 int i;
287
288 memcpy(fpu->fpcntl, current->thread.fpcntl, 12);
289 memcpy(fpu->fpregs, current->thread.fp, 96);
290 /* Convert internal fpu reg representation
291 * into long double format
292 */
293 for (i = 0; i < 24; i += 3)
294 fpu->fpregs[i] = ((fpu->fpregs[i] & 0xffff0000) << 15) |
295 ((fpu->fpregs[i] & 0x0000ffff) << 16);
296 return 1;
297 }
298
299 /* First dump the fpu context to avoid protocol violation. */
300 asm volatile ("fsave %0" :: "m" (fpustate[0]) : "memory");
301 if (!CPU_IS_060 ? !fpustate[0] : !fpustate[2])
302 return 0;
303
304 asm volatile ("fmovem %/fpiar/%/fpcr/%/fpsr,%0"
305 :: "m" (fpu->fpcntl[0])
306 : "memory");
307 asm volatile ("fmovemx %/fp0-%/fp7,%0"
308 :: "m" (fpu->fpregs[0])
309 : "memory");
310 return 1;
311}
312EXPORT_SYMBOL(dump_fpu);
313
314/*
315 * sys_execve() executes a new program.
316 */
317asmlinkage int sys_execve(const char __user *name,
318 const char __user *const __user *argv,
319 const char __user *const __user *envp)
320{
321 int error;
322 char * filename;
323 struct pt_regs *regs = (struct pt_regs *) &name;
324
325 filename = getname(name);
326 error = PTR_ERR(filename);
327 if (IS_ERR(filename))
328 return error;
329 error = do_execve(filename, argv, envp, regs);
330 putname(filename);
331 return error;
332}
333
334unsigned long get_wchan(struct task_struct *p)
335{
336 unsigned long fp, pc;
337 unsigned long stack_page;
338 int count = 0;
339 if (!p || p == current || p->state == TASK_RUNNING)
340 return 0;
341
342 stack_page = (unsigned long)task_stack_page(p);
343 fp = ((struct switch_stack *)p->thread.ksp)->a6;
344 do {
345 if (fp < stack_page+sizeof(struct thread_info) ||
346 fp >= 8184+stack_page)
347 return 0;
348 pc = ((unsigned long *)fp)[1];
349 if (!in_sched_functions(pc))
350 return pc;
351 fp = *(unsigned long *) fp;
352 } while (count++ < 16);
353 return 0;
354}
diff --git a/arch/m68k/kernel/process_no.c b/arch/m68k/kernel/process_no.c
new file mode 100644
index 000000000000..e2a63af5d517
--- /dev/null
+++ b/arch/m68k/kernel/process_no.c
@@ -0,0 +1,404 @@
1/*
2 * linux/arch/m68knommu/kernel/process.c
3 *
4 * Copyright (C) 1995 Hamish Macdonald
5 *
6 * 68060 fixes by Jesper Skov
7 *
8 * uClinux changes
9 * Copyright (C) 2000-2002, David McCullough <davidm@snapgear.com>
10 */
11
12/*
13 * This file handles the architecture-dependent parts of process handling..
14 */
15
16#include <linux/module.h>
17#include <linux/errno.h>
18#include <linux/sched.h>
19#include <linux/kernel.h>
20#include <linux/mm.h>
21#include <linux/smp.h>
22#include <linux/stddef.h>
23#include <linux/unistd.h>
24#include <linux/ptrace.h>
25#include <linux/user.h>
26#include <linux/interrupt.h>
27#include <linux/reboot.h>
28#include <linux/fs.h>
29#include <linux/slab.h>
30
31#include <asm/uaccess.h>
32#include <asm/system.h>
33#include <asm/traps.h>
34#include <asm/machdep.h>
35#include <asm/setup.h>
36#include <asm/pgtable.h>
37
38asmlinkage void ret_from_fork(void);
39
40/*
41 * The following aren't currently used.
42 */
43void (*pm_idle)(void);
44EXPORT_SYMBOL(pm_idle);
45
46void (*pm_power_off)(void);
47EXPORT_SYMBOL(pm_power_off);
48
49/*
50 * The idle loop on an m68knommu..
51 */
52static void default_idle(void)
53{
54 local_irq_disable();
55 while (!need_resched()) {
56 /* This stop will re-enable interrupts */
57 __asm__("stop #0x2000" : : : "cc");
58 local_irq_disable();
59 }
60 local_irq_enable();
61}
62
63void (*idle)(void) = default_idle;
64
65/*
66 * The idle thread. There's no useful work to be
67 * done, so just try to conserve power and have a
68 * low exit latency (ie sit in a loop waiting for
69 * somebody to say that they'd like to reschedule)
70 */
71void cpu_idle(void)
72{
73 /* endless idle loop with no priority at all */
74 while (1) {
75 idle();
76 preempt_enable_no_resched();
77 schedule();
78 preempt_disable();
79 }
80}
81
82void machine_restart(char * __unused)
83{
84 if (mach_reset)
85 mach_reset();
86 for (;;);
87}
88
89void machine_halt(void)
90{
91 if (mach_halt)
92 mach_halt();
93 for (;;);
94}
95
96void machine_power_off(void)
97{
98 if (mach_power_off)
99 mach_power_off();
100 for (;;);
101}
102
103void show_regs(struct pt_regs * regs)
104{
105 printk(KERN_NOTICE "\n");
106 printk(KERN_NOTICE "Format %02x Vector: %04x PC: %08lx Status: %04x %s\n",
107 regs->format, regs->vector, regs->pc, regs->sr, print_tainted());
108 printk(KERN_NOTICE "ORIG_D0: %08lx D0: %08lx A2: %08lx A1: %08lx\n",
109 regs->orig_d0, regs->d0, regs->a2, regs->a1);
110 printk(KERN_NOTICE "A0: %08lx D5: %08lx D4: %08lx\n",
111 regs->a0, regs->d5, regs->d4);
112 printk(KERN_NOTICE "D3: %08lx D2: %08lx D1: %08lx\n",
113 regs->d3, regs->d2, regs->d1);
114 if (!(regs->sr & PS_S))
115 printk(KERN_NOTICE "USP: %08lx\n", rdusp());
116}
117
118/*
119 * Create a kernel thread
120 */
121int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
122{
123 int retval;
124 long clone_arg = flags | CLONE_VM;
125 mm_segment_t fs;
126
127 fs = get_fs();
128 set_fs(KERNEL_DS);
129
130 __asm__ __volatile__ (
131 "movel %%sp, %%d2\n\t"
132 "movel %5, %%d1\n\t"
133 "movel %1, %%d0\n\t"
134 "trap #0\n\t"
135 "cmpl %%sp, %%d2\n\t"
136 "jeq 1f\n\t"
137 "movel %3, %%sp@-\n\t"
138 "jsr %4@\n\t"
139 "movel %2, %%d0\n\t"
140 "trap #0\n"
141 "1:\n\t"
142 "movel %%d0, %0\n"
143 : "=d" (retval)
144 : "i" (__NR_clone),
145 "i" (__NR_exit),
146 "a" (arg),
147 "a" (fn),
148 "a" (clone_arg)
149 : "cc", "%d0", "%d1", "%d2");
150
151 set_fs(fs);
152 return retval;
153}
154
155void flush_thread(void)
156{
157#ifdef CONFIG_FPU
158 unsigned long zero = 0;
159#endif
160 set_fs(USER_DS);
161 current->thread.fs = __USER_DS;
162#ifdef CONFIG_FPU
163 if (!FPU_IS_EMU)
164 asm volatile (".chip 68k/68881\n\t"
165 "frestore %0@\n\t"
166 ".chip 68k" : : "a" (&zero));
167#endif
168}
169
170/*
171 * "m68k_fork()".. By the time we get here, the
172 * non-volatile registers have also been saved on the
173 * stack. We do some ugly pointer stuff here.. (see
174 * also copy_thread)
175 */
176
177asmlinkage int m68k_fork(struct pt_regs *regs)
178{
179 /* fork almost works, enough to trick you into looking elsewhere :-( */
180 return(-EINVAL);
181}
182
183asmlinkage int m68k_vfork(struct pt_regs *regs)
184{
185 return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, rdusp(), regs, 0, NULL, NULL);
186}
187
188asmlinkage int m68k_clone(struct pt_regs *regs)
189{
190 unsigned long clone_flags;
191 unsigned long newsp;
192
193 /* syscall2 puts clone_flags in d1 and usp in d2 */
194 clone_flags = regs->d1;
195 newsp = regs->d2;
196 if (!newsp)
197 newsp = rdusp();
198 return do_fork(clone_flags, newsp, regs, 0, NULL, NULL);
199}
200
201int copy_thread(unsigned long clone_flags,
202 unsigned long usp, unsigned long topstk,
203 struct task_struct * p, struct pt_regs * regs)
204{
205 struct pt_regs * childregs;
206 struct switch_stack * childstack, *stack;
207 unsigned long *retp;
208
209 childregs = (struct pt_regs *) (task_stack_page(p) + THREAD_SIZE) - 1;
210
211 *childregs = *regs;
212 childregs->d0 = 0;
213
214 retp = ((unsigned long *) regs);
215 stack = ((struct switch_stack *) retp) - 1;
216
217 childstack = ((struct switch_stack *) childregs) - 1;
218 *childstack = *stack;
219 childstack->retpc = (unsigned long)ret_from_fork;
220
221 p->thread.usp = usp;
222 p->thread.ksp = (unsigned long)childstack;
223
224 if (clone_flags & CLONE_SETTLS)
225 task_thread_info(p)->tp_value = regs->d5;
226
227 /*
228 * Must save the current SFC/DFC value, NOT the value when
229 * the parent was last descheduled - RGH 10-08-96
230 */
231 p->thread.fs = get_fs().seg;
232
233#ifdef CONFIG_FPU
234 if (!FPU_IS_EMU) {
235 /* Copy the current fpu state */
236 asm volatile ("fsave %0" : : "m" (p->thread.fpstate[0]) : "memory");
237
238 if (p->thread.fpstate[0])
239 asm volatile ("fmovemx %/fp0-%/fp7,%0\n\t"
240 "fmoveml %/fpiar/%/fpcr/%/fpsr,%1"
241 : : "m" (p->thread.fp[0]), "m" (p->thread.fpcntl[0])
242 : "memory");
243 /* Restore the state in case the fpu was busy */
244 asm volatile ("frestore %0" : : "m" (p->thread.fpstate[0]));
245 }
246#endif
247
248 return 0;
249}
250
251/* Fill in the fpu structure for a core dump. */
252
253int dump_fpu(struct pt_regs *regs, struct user_m68kfp_struct *fpu)
254{
255#ifdef CONFIG_FPU
256 char fpustate[216];
257
258 if (FPU_IS_EMU) {
259 int i;
260
261 memcpy(fpu->fpcntl, current->thread.fpcntl, 12);
262 memcpy(fpu->fpregs, current->thread.fp, 96);
263 /* Convert internal fpu reg representation
264 * into long double format
265 */
266 for (i = 0; i < 24; i += 3)
267 fpu->fpregs[i] = ((fpu->fpregs[i] & 0xffff0000) << 15) |
268 ((fpu->fpregs[i] & 0x0000ffff) << 16);
269 return 1;
270 }
271
272 /* First dump the fpu context to avoid protocol violation. */
273 asm volatile ("fsave %0" :: "m" (fpustate[0]) : "memory");
274 if (!fpustate[0])
275 return 0;
276
277 asm volatile ("fmovem %/fpiar/%/fpcr/%/fpsr,%0"
278 :: "m" (fpu->fpcntl[0])
279 : "memory");
280 asm volatile ("fmovemx %/fp0-%/fp7,%0"
281 :: "m" (fpu->fpregs[0])
282 : "memory");
283#endif
284 return 1;
285}
286
287/*
288 * Generic dumping code. Used for panic and debug.
289 */
290void dump(struct pt_regs *fp)
291{
292 unsigned long *sp;
293 unsigned char *tp;
294 int i;
295
296 printk(KERN_EMERG "\nCURRENT PROCESS:\n\n");
297 printk(KERN_EMERG "COMM=%s PID=%d\n", current->comm, current->pid);
298
299 if (current->mm) {
300 printk(KERN_EMERG "TEXT=%08x-%08x DATA=%08x-%08x BSS=%08x-%08x\n",
301 (int) current->mm->start_code,
302 (int) current->mm->end_code,
303 (int) current->mm->start_data,
304 (int) current->mm->end_data,
305 (int) current->mm->end_data,
306 (int) current->mm->brk);
307 printk(KERN_EMERG "USER-STACK=%08x KERNEL-STACK=%08x\n\n",
308 (int) current->mm->start_stack,
309 (int)(((unsigned long) current) + THREAD_SIZE));
310 }
311
312 printk(KERN_EMERG "PC: %08lx\n", fp->pc);
313 printk(KERN_EMERG "SR: %08lx SP: %08lx\n", (long) fp->sr, (long) fp);
314 printk(KERN_EMERG "d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n",
315 fp->d0, fp->d1, fp->d2, fp->d3);
316 printk(KERN_EMERG "d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n",
317 fp->d4, fp->d5, fp->a0, fp->a1);
318 printk(KERN_EMERG "\nUSP: %08x TRAPFRAME: %p\n",
319 (unsigned int) rdusp(), fp);
320
321 printk(KERN_EMERG "\nCODE:");
322 tp = ((unsigned char *) fp->pc) - 0x20;
323 for (sp = (unsigned long *) tp, i = 0; (i < 0x40); i += 4) {
324 if ((i % 0x10) == 0)
325 printk(KERN_EMERG "%p: ", tp + i);
326 printk("%08x ", (int) *sp++);
327 }
328 printk(KERN_EMERG "\n");
329
330 printk(KERN_EMERG "KERNEL STACK:");
331 tp = ((unsigned char *) fp) - 0x40;
332 for (sp = (unsigned long *) tp, i = 0; (i < 0xc0); i += 4) {
333 if ((i % 0x10) == 0)
334 printk(KERN_EMERG "%p: ", tp + i);
335 printk("%08x ", (int) *sp++);
336 }
337 printk(KERN_EMERG "\n");
338
339 printk(KERN_EMERG "USER STACK:");
340 tp = (unsigned char *) (rdusp() - 0x10);
341 for (sp = (unsigned long *) tp, i = 0; (i < 0x80); i += 4) {
342 if ((i % 0x10) == 0)
343 printk(KERN_EMERG "%p: ", tp + i);
344 printk("%08x ", (int) *sp++);
345 }
346 printk(KERN_EMERG "\n");
347}
348
349/*
350 * sys_execve() executes a new program.
351 */
352asmlinkage int sys_execve(const char *name,
353 const char *const *argv,
354 const char *const *envp)
355{
356 int error;
357 char * filename;
358 struct pt_regs *regs = (struct pt_regs *) &name;
359
360 filename = getname(name);
361 error = PTR_ERR(filename);
362 if (IS_ERR(filename))
363 return error;
364 error = do_execve(filename, argv, envp, regs);
365 putname(filename);
366 return error;
367}
368
369unsigned long get_wchan(struct task_struct *p)
370{
371 unsigned long fp, pc;
372 unsigned long stack_page;
373 int count = 0;
374 if (!p || p == current || p->state == TASK_RUNNING)
375 return 0;
376
377 stack_page = (unsigned long)p;
378 fp = ((struct switch_stack *)p->thread.ksp)->a6;
379 do {
380 if (fp < stack_page+sizeof(struct thread_info) ||
381 fp >= THREAD_SIZE-8+stack_page)
382 return 0;
383 pc = ((unsigned long *)fp)[1];
384 if (!in_sched_functions(pc))
385 return pc;
386 fp = *(unsigned long *) fp;
387 } while (count++ < 16);
388 return 0;
389}
390
391/*
392 * Return saved PC of a blocked thread.
393 */
394unsigned long thread_saved_pc(struct task_struct *tsk)
395{
396 struct switch_stack *sw = (struct switch_stack *)tsk->thread.ksp;
397
398 /* Check whether the thread is blocked in resume() */
399 if (in_sched_functions(sw->retpc))
400 return ((unsigned long *)sw->a6)[1];
401 else
402 return sw->retpc;
403}
404
diff --git a/arch/m68k/kernel/ptrace.c b/arch/m68k/kernel/ptrace.c
index 0b252683cefb..07a417550e94 100644
--- a/arch/m68k/kernel/ptrace.c
+++ b/arch/m68k/kernel/ptrace.c
@@ -1,277 +1,5 @@
1/* 1#ifdef CONFIG_MMU
2 * linux/arch/m68k/kernel/ptrace.c 2#include "ptrace_mm.c"
3 * 3#else
4 * Copyright (C) 1994 by Hamish Macdonald 4#include "ptrace_no.c"
5 * Taken from linux/kernel/ptrace.c and modified for M680x0. 5#endif
6 * linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds
7 *
8 * This file is subject to the terms and conditions of the GNU General
9 * Public License. See the file COPYING in the main directory of
10 * this archive for more details.
11 */
12
13#include <linux/kernel.h>
14#include <linux/sched.h>
15#include <linux/mm.h>
16#include <linux/smp.h>
17#include <linux/errno.h>
18#include <linux/ptrace.h>
19#include <linux/user.h>
20#include <linux/signal.h>
21
22#include <asm/uaccess.h>
23#include <asm/page.h>
24#include <asm/pgtable.h>
25#include <asm/system.h>
26#include <asm/processor.h>
27
28/*
29 * does not yet catch signals sent when the child dies.
30 * in exit.c or in signal.c.
31 */
32
33/* determines which bits in the SR the user has access to. */
34/* 1 = access 0 = no access */
35#define SR_MASK 0x001f
36
37/* sets the trace bits. */
38#define TRACE_BITS 0xC000
39#define T1_BIT 0x8000
40#define T0_BIT 0x4000
41
42/* Find the stack offset for a register, relative to thread.esp0. */
43#define PT_REG(reg) ((long)&((struct pt_regs *)0)->reg)
44#define SW_REG(reg) ((long)&((struct switch_stack *)0)->reg \
45 - sizeof(struct switch_stack))
46/* Mapping from PT_xxx to the stack offset at which the register is
47 saved. Notice that usp has no stack-slot and needs to be treated
48 specially (see get_reg/put_reg below). */
49static const int regoff[] = {
50 [0] = PT_REG(d1),
51 [1] = PT_REG(d2),
52 [2] = PT_REG(d3),
53 [3] = PT_REG(d4),
54 [4] = PT_REG(d5),
55 [5] = SW_REG(d6),
56 [6] = SW_REG(d7),
57 [7] = PT_REG(a0),
58 [8] = PT_REG(a1),
59 [9] = PT_REG(a2),
60 [10] = SW_REG(a3),
61 [11] = SW_REG(a4),
62 [12] = SW_REG(a5),
63 [13] = SW_REG(a6),
64 [14] = PT_REG(d0),
65 [15] = -1,
66 [16] = PT_REG(orig_d0),
67 [17] = PT_REG(sr),
68 [18] = PT_REG(pc),
69};
70
71/*
72 * Get contents of register REGNO in task TASK.
73 */
74static inline long get_reg(struct task_struct *task, int regno)
75{
76 unsigned long *addr;
77
78 if (regno == PT_USP)
79 addr = &task->thread.usp;
80 else if (regno < ARRAY_SIZE(regoff))
81 addr = (unsigned long *)(task->thread.esp0 + regoff[regno]);
82 else
83 return 0;
84 /* Need to take stkadj into account. */
85 if (regno == PT_SR || regno == PT_PC) {
86 long stkadj = *(long *)(task->thread.esp0 + PT_REG(stkadj));
87 addr = (unsigned long *) ((unsigned long)addr + stkadj);
88 /* The sr is actually a 16 bit register. */
89 if (regno == PT_SR)
90 return *(unsigned short *)addr;
91 }
92 return *addr;
93}
94
95/*
96 * Write contents of register REGNO in task TASK.
97 */
98static inline int put_reg(struct task_struct *task, int regno,
99 unsigned long data)
100{
101 unsigned long *addr;
102
103 if (regno == PT_USP)
104 addr = &task->thread.usp;
105 else if (regno < ARRAY_SIZE(regoff))
106 addr = (unsigned long *)(task->thread.esp0 + regoff[regno]);
107 else
108 return -1;
109 /* Need to take stkadj into account. */
110 if (regno == PT_SR || regno == PT_PC) {
111 long stkadj = *(long *)(task->thread.esp0 + PT_REG(stkadj));
112 addr = (unsigned long *) ((unsigned long)addr + stkadj);
113 /* The sr is actually a 16 bit register. */
114 if (regno == PT_SR) {
115 *(unsigned short *)addr = data;
116 return 0;
117 }
118 }
119 *addr = data;
120 return 0;
121}
122
123/*
124 * Make sure the single step bit is not set.
125 */
126static inline void singlestep_disable(struct task_struct *child)
127{
128 unsigned long tmp = get_reg(child, PT_SR) & ~TRACE_BITS;
129 put_reg(child, PT_SR, tmp);
130 clear_tsk_thread_flag(child, TIF_DELAYED_TRACE);
131}
132
133/*
134 * Called by kernel/ptrace.c when detaching..
135 */
136void ptrace_disable(struct task_struct *child)
137{
138 singlestep_disable(child);
139}
140
141void user_enable_single_step(struct task_struct *child)
142{
143 unsigned long tmp = get_reg(child, PT_SR) & ~TRACE_BITS;
144 put_reg(child, PT_SR, tmp | T1_BIT);
145 set_tsk_thread_flag(child, TIF_DELAYED_TRACE);
146}
147
148void user_enable_block_step(struct task_struct *child)
149{
150 unsigned long tmp = get_reg(child, PT_SR) & ~TRACE_BITS;
151 put_reg(child, PT_SR, tmp | T0_BIT);
152}
153
154void user_disable_single_step(struct task_struct *child)
155{
156 singlestep_disable(child);
157}
158
159long arch_ptrace(struct task_struct *child, long request,
160 unsigned long addr, unsigned long data)
161{
162 unsigned long tmp;
163 int i, ret = 0;
164 int regno = addr >> 2; /* temporary hack. */
165 unsigned long __user *datap = (unsigned long __user *) data;
166
167 switch (request) {
168 /* read the word at location addr in the USER area. */
169 case PTRACE_PEEKUSR:
170 if (addr & 3)
171 goto out_eio;
172
173 if (regno >= 0 && regno < 19) {
174 tmp = get_reg(child, regno);
175 } else if (regno >= 21 && regno < 49) {
176 tmp = child->thread.fp[regno - 21];
177 /* Convert internal fpu reg representation
178 * into long double format
179 */
180 if (FPU_IS_EMU && (regno < 45) && !(regno % 3))
181 tmp = ((tmp & 0xffff0000) << 15) |
182 ((tmp & 0x0000ffff) << 16);
183 } else
184 goto out_eio;
185 ret = put_user(tmp, datap);
186 break;
187
188 case PTRACE_POKEUSR:
189 /* write the word at location addr in the USER area */
190 if (addr & 3)
191 goto out_eio;
192
193 if (regno == PT_SR) {
194 data &= SR_MASK;
195 data |= get_reg(child, PT_SR) & ~SR_MASK;
196 }
197 if (regno >= 0 && regno < 19) {
198 if (put_reg(child, regno, data))
199 goto out_eio;
200 } else if (regno >= 21 && regno < 48) {
201 /* Convert long double format
202 * into internal fpu reg representation
203 */
204 if (FPU_IS_EMU && (regno < 45) && !(regno % 3)) {
205 data <<= 15;
206 data = (data & 0xffff0000) |
207 ((data & 0x0000ffff) >> 1);
208 }
209 child->thread.fp[regno - 21] = data;
210 } else
211 goto out_eio;
212 break;
213
214 case PTRACE_GETREGS: /* Get all gp regs from the child. */
215 for (i = 0; i < 19; i++) {
216 tmp = get_reg(child, i);
217 ret = put_user(tmp, datap);
218 if (ret)
219 break;
220 datap++;
221 }
222 break;
223
224 case PTRACE_SETREGS: /* Set all gp regs in the child. */
225 for (i = 0; i < 19; i++) {
226 ret = get_user(tmp, datap);
227 if (ret)
228 break;
229 if (i == PT_SR) {
230 tmp &= SR_MASK;
231 tmp |= get_reg(child, PT_SR) & ~SR_MASK;
232 }
233 put_reg(child, i, tmp);
234 datap++;
235 }
236 break;
237
238 case PTRACE_GETFPREGS: /* Get the child FPU state. */
239 if (copy_to_user(datap, &child->thread.fp,
240 sizeof(struct user_m68kfp_struct)))
241 ret = -EFAULT;
242 break;
243
244 case PTRACE_SETFPREGS: /* Set the child FPU state. */
245 if (copy_from_user(&child->thread.fp, datap,
246 sizeof(struct user_m68kfp_struct)))
247 ret = -EFAULT;
248 break;
249
250 case PTRACE_GET_THREAD_AREA:
251 ret = put_user(task_thread_info(child)->tp_value, datap);
252 break;
253
254 default:
255 ret = ptrace_request(child, request, addr, data);
256 break;
257 }
258
259 return ret;
260out_eio:
261 return -EIO;
262}
263
264asmlinkage void syscall_trace(void)
265{
266 ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
267 ? 0x80 : 0));
268 /*
269 * this isn't the same as continuing with a signal, but it will do
270 * for normal use. strace only continues with a signal if the
271 * stopping signal is not SIGTRAP. -brl
272 */
273 if (current->exit_code) {
274 send_sig(current->exit_code, current, 1);
275 current->exit_code = 0;
276 }
277}
diff --git a/arch/m68k/kernel/ptrace_mm.c b/arch/m68k/kernel/ptrace_mm.c
new file mode 100644
index 000000000000..0b252683cefb
--- /dev/null
+++ b/arch/m68k/kernel/ptrace_mm.c
@@ -0,0 +1,277 @@
1/*
2 * linux/arch/m68k/kernel/ptrace.c
3 *
4 * Copyright (C) 1994 by Hamish Macdonald
5 * Taken from linux/kernel/ptrace.c and modified for M680x0.
6 * linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds
7 *
8 * This file is subject to the terms and conditions of the GNU General
9 * Public License. See the file COPYING in the main directory of
10 * this archive for more details.
11 */
12
13#include <linux/kernel.h>
14#include <linux/sched.h>
15#include <linux/mm.h>
16#include <linux/smp.h>
17#include <linux/errno.h>
18#include <linux/ptrace.h>
19#include <linux/user.h>
20#include <linux/signal.h>
21
22#include <asm/uaccess.h>
23#include <asm/page.h>
24#include <asm/pgtable.h>
25#include <asm/system.h>
26#include <asm/processor.h>
27
28/*
29 * does not yet catch signals sent when the child dies.
30 * in exit.c or in signal.c.
31 */
32
33/* determines which bits in the SR the user has access to. */
34/* 1 = access 0 = no access */
35#define SR_MASK 0x001f
36
37/* sets the trace bits. */
38#define TRACE_BITS 0xC000
39#define T1_BIT 0x8000
40#define T0_BIT 0x4000
41
42/* Find the stack offset for a register, relative to thread.esp0. */
43#define PT_REG(reg) ((long)&((struct pt_regs *)0)->reg)
44#define SW_REG(reg) ((long)&((struct switch_stack *)0)->reg \
45 - sizeof(struct switch_stack))
46/* Mapping from PT_xxx to the stack offset at which the register is
47 saved. Notice that usp has no stack-slot and needs to be treated
48 specially (see get_reg/put_reg below). */
49static const int regoff[] = {
50 [0] = PT_REG(d1),
51 [1] = PT_REG(d2),
52 [2] = PT_REG(d3),
53 [3] = PT_REG(d4),
54 [4] = PT_REG(d5),
55 [5] = SW_REG(d6),
56 [6] = SW_REG(d7),
57 [7] = PT_REG(a0),
58 [8] = PT_REG(a1),
59 [9] = PT_REG(a2),
60 [10] = SW_REG(a3),
61 [11] = SW_REG(a4),
62 [12] = SW_REG(a5),
63 [13] = SW_REG(a6),
64 [14] = PT_REG(d0),
65 [15] = -1,
66 [16] = PT_REG(orig_d0),
67 [17] = PT_REG(sr),
68 [18] = PT_REG(pc),
69};
70
71/*
72 * Get contents of register REGNO in task TASK.
73 */
74static inline long get_reg(struct task_struct *task, int regno)
75{
76 unsigned long *addr;
77
78 if (regno == PT_USP)
79 addr = &task->thread.usp;
80 else if (regno < ARRAY_SIZE(regoff))
81 addr = (unsigned long *)(task->thread.esp0 + regoff[regno]);
82 else
83 return 0;
84 /* Need to take stkadj into account. */
85 if (regno == PT_SR || regno == PT_PC) {
86 long stkadj = *(long *)(task->thread.esp0 + PT_REG(stkadj));
87 addr = (unsigned long *) ((unsigned long)addr + stkadj);
88 /* The sr is actually a 16 bit register. */
89 if (regno == PT_SR)
90 return *(unsigned short *)addr;
91 }
92 return *addr;
93}
94
95/*
96 * Write contents of register REGNO in task TASK.
97 */
98static inline int put_reg(struct task_struct *task, int regno,
99 unsigned long data)
100{
101 unsigned long *addr;
102
103 if (regno == PT_USP)
104 addr = &task->thread.usp;
105 else if (regno < ARRAY_SIZE(regoff))
106 addr = (unsigned long *)(task->thread.esp0 + regoff[regno]);
107 else
108 return -1;
109 /* Need to take stkadj into account. */
110 if (regno == PT_SR || regno == PT_PC) {
111 long stkadj = *(long *)(task->thread.esp0 + PT_REG(stkadj));
112 addr = (unsigned long *) ((unsigned long)addr + stkadj);
113 /* The sr is actually a 16 bit register. */
114 if (regno == PT_SR) {
115 *(unsigned short *)addr = data;
116 return 0;
117 }
118 }
119 *addr = data;
120 return 0;
121}
122
123/*
124 * Make sure the single step bit is not set.
125 */
126static inline void singlestep_disable(struct task_struct *child)
127{
128 unsigned long tmp = get_reg(child, PT_SR) & ~TRACE_BITS;
129 put_reg(child, PT_SR, tmp);
130 clear_tsk_thread_flag(child, TIF_DELAYED_TRACE);
131}
132
133/*
134 * Called by kernel/ptrace.c when detaching..
135 */
136void ptrace_disable(struct task_struct *child)
137{
138 singlestep_disable(child);
139}
140
141void user_enable_single_step(struct task_struct *child)
142{
143 unsigned long tmp = get_reg(child, PT_SR) & ~TRACE_BITS;
144 put_reg(child, PT_SR, tmp | T1_BIT);
145 set_tsk_thread_flag(child, TIF_DELAYED_TRACE);
146}
147
148void user_enable_block_step(struct task_struct *child)
149{
150 unsigned long tmp = get_reg(child, PT_SR) & ~TRACE_BITS;
151 put_reg(child, PT_SR, tmp | T0_BIT);
152}
153
154void user_disable_single_step(struct task_struct *child)
155{
156 singlestep_disable(child);
157}
158
159long arch_ptrace(struct task_struct *child, long request,
160 unsigned long addr, unsigned long data)
161{
162 unsigned long tmp;
163 int i, ret = 0;
164 int regno = addr >> 2; /* temporary hack. */
165 unsigned long __user *datap = (unsigned long __user *) data;
166
167 switch (request) {
168 /* read the word at location addr in the USER area. */
169 case PTRACE_PEEKUSR:
170 if (addr & 3)
171 goto out_eio;
172
173 if (regno >= 0 && regno < 19) {
174 tmp = get_reg(child, regno);
175 } else if (regno >= 21 && regno < 49) {
176 tmp = child->thread.fp[regno - 21];
177 /* Convert internal fpu reg representation
178 * into long double format
179 */
180 if (FPU_IS_EMU && (regno < 45) && !(regno % 3))
181 tmp = ((tmp & 0xffff0000) << 15) |
182 ((tmp & 0x0000ffff) << 16);
183 } else
184 goto out_eio;
185 ret = put_user(tmp, datap);
186 break;
187
188 case PTRACE_POKEUSR:
189 /* write the word at location addr in the USER area */
190 if (addr & 3)
191 goto out_eio;
192
193 if (regno == PT_SR) {
194 data &= SR_MASK;
195 data |= get_reg(child, PT_SR) & ~SR_MASK;
196 }
197 if (regno >= 0 && regno < 19) {
198 if (put_reg(child, regno, data))
199 goto out_eio;
200 } else if (regno >= 21 && regno < 48) {
201 /* Convert long double format
202 * into internal fpu reg representation
203 */
204 if (FPU_IS_EMU && (regno < 45) && !(regno % 3)) {
205 data <<= 15;
206 data = (data & 0xffff0000) |
207 ((data & 0x0000ffff) >> 1);
208 }
209 child->thread.fp[regno - 21] = data;
210 } else
211 goto out_eio;
212 break;
213
214 case PTRACE_GETREGS: /* Get all gp regs from the child. */
215 for (i = 0; i < 19; i++) {
216 tmp = get_reg(child, i);
217 ret = put_user(tmp, datap);
218 if (ret)
219 break;
220 datap++;
221 }
222 break;
223
224 case PTRACE_SETREGS: /* Set all gp regs in the child. */
225 for (i = 0; i < 19; i++) {
226 ret = get_user(tmp, datap);
227 if (ret)
228 break;
229 if (i == PT_SR) {
230 tmp &= SR_MASK;
231 tmp |= get_reg(child, PT_SR) & ~SR_MASK;
232 }
233 put_reg(child, i, tmp);
234 datap++;
235 }
236 break;
237
238 case PTRACE_GETFPREGS: /* Get the child FPU state. */
239 if (copy_to_user(datap, &child->thread.fp,
240 sizeof(struct user_m68kfp_struct)))
241 ret = -EFAULT;
242 break;
243
244 case PTRACE_SETFPREGS: /* Set the child FPU state. */
245 if (copy_from_user(&child->thread.fp, datap,
246 sizeof(struct user_m68kfp_struct)))
247 ret = -EFAULT;
248 break;
249
250 case PTRACE_GET_THREAD_AREA:
251 ret = put_user(task_thread_info(child)->tp_value, datap);
252 break;
253
254 default:
255 ret = ptrace_request(child, request, addr, data);
256 break;
257 }
258
259 return ret;
260out_eio:
261 return -EIO;
262}
263
264asmlinkage void syscall_trace(void)
265{
266 ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
267 ? 0x80 : 0));
268 /*
269 * this isn't the same as continuing with a signal, but it will do
270 * for normal use. strace only continues with a signal if the
271 * stopping signal is not SIGTRAP. -brl
272 */
273 if (current->exit_code) {
274 send_sig(current->exit_code, current, 1);
275 current->exit_code = 0;
276 }
277}
diff --git a/arch/m68k/kernel/ptrace_no.c b/arch/m68k/kernel/ptrace_no.c
new file mode 100644
index 000000000000..6709fb707335
--- /dev/null
+++ b/arch/m68k/kernel/ptrace_no.c
@@ -0,0 +1,255 @@
1/*
2 * linux/arch/m68knommu/kernel/ptrace.c
3 *
4 * Copyright (C) 1994 by Hamish Macdonald
5 * Taken from linux/kernel/ptrace.c and modified for M680x0.
6 * linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds
7 *
8 * This file is subject to the terms and conditions of the GNU General
9 * Public License. See the file COPYING in the main directory of
10 * this archive for more details.
11 */
12
13#include <linux/kernel.h>
14#include <linux/sched.h>
15#include <linux/mm.h>
16#include <linux/smp.h>
17#include <linux/errno.h>
18#include <linux/ptrace.h>
19#include <linux/user.h>
20#include <linux/signal.h>
21#include <linux/tracehook.h>
22
23#include <asm/uaccess.h>
24#include <asm/page.h>
25#include <asm/pgtable.h>
26#include <asm/system.h>
27#include <asm/processor.h>
28
29/*
30 * does not yet catch signals sent when the child dies.
31 * in exit.c or in signal.c.
32 */
33
34/* determines which bits in the SR the user has access to. */
35/* 1 = access 0 = no access */
36#define SR_MASK 0x001f
37
38/* sets the trace bits. */
39#define TRACE_BITS 0x8000
40
41/* Find the stack offset for a register, relative to thread.esp0. */
42#define PT_REG(reg) ((long)&((struct pt_regs *)0)->reg)
43#define SW_REG(reg) ((long)&((struct switch_stack *)0)->reg \
44 - sizeof(struct switch_stack))
45/* Mapping from PT_xxx to the stack offset at which the register is
46 saved. Notice that usp has no stack-slot and needs to be treated
47 specially (see get_reg/put_reg below). */
48static int regoff[] = {
49 PT_REG(d1), PT_REG(d2), PT_REG(d3), PT_REG(d4),
50 PT_REG(d5), SW_REG(d6), SW_REG(d7), PT_REG(a0),
51 PT_REG(a1), PT_REG(a2), SW_REG(a3), SW_REG(a4),
52 SW_REG(a5), SW_REG(a6), PT_REG(d0), -1,
53 PT_REG(orig_d0), PT_REG(sr), PT_REG(pc),
54};
55
56/*
57 * Get contents of register REGNO in task TASK.
58 */
59static inline long get_reg(struct task_struct *task, int regno)
60{
61 unsigned long *addr;
62
63 if (regno == PT_USP)
64 addr = &task->thread.usp;
65 else if (regno < ARRAY_SIZE(regoff))
66 addr = (unsigned long *)(task->thread.esp0 + regoff[regno]);
67 else
68 return 0;
69 return *addr;
70}
71
72/*
73 * Write contents of register REGNO in task TASK.
74 */
75static inline int put_reg(struct task_struct *task, int regno,
76 unsigned long data)
77{
78 unsigned long *addr;
79
80 if (regno == PT_USP)
81 addr = &task->thread.usp;
82 else if (regno < ARRAY_SIZE(regoff))
83 addr = (unsigned long *) (task->thread.esp0 + regoff[regno]);
84 else
85 return -1;
86 *addr = data;
87 return 0;
88}
89
90void user_enable_single_step(struct task_struct *task)
91{
92 unsigned long srflags;
93 srflags = get_reg(task, PT_SR) | (TRACE_BITS << 16);
94 put_reg(task, PT_SR, srflags);
95}
96
97void user_disable_single_step(struct task_struct *task)
98{
99 unsigned long srflags;
100 srflags = get_reg(task, PT_SR) & ~(TRACE_BITS << 16);
101 put_reg(task, PT_SR, srflags);
102}
103
104/*
105 * Called by kernel/ptrace.c when detaching..
106 *
107 * Make sure the single step bit is not set.
108 */
109void ptrace_disable(struct task_struct *child)
110{
111 /* make sure the single step bit is not set. */
112 user_disable_single_step(child);
113}
114
115long arch_ptrace(struct task_struct *child, long request,
116 unsigned long addr, unsigned long data)
117{
118 int ret;
119 int regno = addr >> 2;
120 unsigned long __user *datap = (unsigned long __user *) data;
121
122 switch (request) {
123 /* read the word at location addr in the USER area. */
124 case PTRACE_PEEKUSR: {
125 unsigned long tmp;
126
127 ret = -EIO;
128 if ((addr & 3) || addr > sizeof(struct user) - 3)
129 break;
130
131 tmp = 0; /* Default return condition */
132 ret = -EIO;
133 if (regno < 19) {
134 tmp = get_reg(child, regno);
135 if (regno == PT_SR)
136 tmp >>= 16;
137 } else if (regno >= 21 && regno < 49) {
138 tmp = child->thread.fp[regno - 21];
139 } else if (regno == 49) {
140 tmp = child->mm->start_code;
141 } else if (regno == 50) {
142 tmp = child->mm->start_data;
143 } else if (regno == 51) {
144 tmp = child->mm->end_code;
145 } else
146 break;
147 ret = put_user(tmp, datap);
148 break;
149 }
150
151 case PTRACE_POKEUSR: /* write the word at location addr in the USER area */
152 ret = -EIO;
153 if ((addr & 3) || addr > sizeof(struct user) - 3)
154 break;
155
156 if (regno == PT_SR) {
157 data &= SR_MASK;
158 data <<= 16;
159 data |= get_reg(child, PT_SR) & ~(SR_MASK << 16);
160 }
161 if (regno < 19) {
162 if (put_reg(child, regno, data))
163 break;
164 ret = 0;
165 break;
166 }
167 if (regno >= 21 && regno < 48)
168 {
169 child->thread.fp[regno - 21] = data;
170 ret = 0;
171 }
172 break;
173
174 case PTRACE_GETREGS: { /* Get all gp regs from the child. */
175 int i;
176 unsigned long tmp;
177 for (i = 0; i < 19; i++) {
178 tmp = get_reg(child, i);
179 if (i == PT_SR)
180 tmp >>= 16;
181 if (put_user(tmp, datap)) {
182 ret = -EFAULT;
183 break;
184 }
185 datap++;
186 }
187 ret = 0;
188 break;
189 }
190
191 case PTRACE_SETREGS: { /* Set all gp regs in the child. */
192 int i;
193 unsigned long tmp;
194 for (i = 0; i < 19; i++) {
195 if (get_user(tmp, datap)) {
196 ret = -EFAULT;
197 break;
198 }
199 if (i == PT_SR) {
200 tmp &= SR_MASK;
201 tmp <<= 16;
202 tmp |= get_reg(child, PT_SR) & ~(SR_MASK << 16);
203 }
204 put_reg(child, i, tmp);
205 datap++;
206 }
207 ret = 0;
208 break;
209 }
210
211#ifdef PTRACE_GETFPREGS
212 case PTRACE_GETFPREGS: { /* Get the child FPU state. */
213 ret = 0;
214 if (copy_to_user(datap, &child->thread.fp,
215 sizeof(struct user_m68kfp_struct)))
216 ret = -EFAULT;
217 break;
218 }
219#endif
220
221#ifdef PTRACE_SETFPREGS
222 case PTRACE_SETFPREGS: { /* Set the child FPU state. */
223 ret = 0;
224 if (copy_from_user(&child->thread.fp, datap,
225 sizeof(struct user_m68kfp_struct)))
226 ret = -EFAULT;
227 break;
228 }
229#endif
230
231 case PTRACE_GET_THREAD_AREA:
232 ret = put_user(task_thread_info(child)->tp_value, datap);
233 break;
234
235 default:
236 ret = ptrace_request(child, request, addr, data);
237 break;
238 }
239 return ret;
240}
241
242asmlinkage int syscall_trace_enter(void)
243{
244 int ret = 0;
245
246 if (test_thread_flag(TIF_SYSCALL_TRACE))
247 ret = tracehook_report_syscall_entry(task_pt_regs(current));
248 return ret;
249}
250
251asmlinkage void syscall_trace_leave(void)
252{
253 if (test_thread_flag(TIF_SYSCALL_TRACE))
254 tracehook_report_syscall_exit(task_pt_regs(current), 0);
255}
diff --git a/arch/m68k/kernel/setup.c b/arch/m68k/kernel/setup.c
index 334d83640376..4bf129f1d2e2 100644
--- a/arch/m68k/kernel/setup.c
+++ b/arch/m68k/kernel/setup.c
@@ -1,533 +1,5 @@
1/* 1#ifdef CONFIG_MMU
2 * linux/arch/m68k/kernel/setup.c 2#include "setup_mm.c"
3 *
4 * Copyright (C) 1995 Hamish Macdonald
5 */
6
7/*
8 * This file handles the architecture-dependent parts of system setup
9 */
10
11#include <linux/kernel.h>
12#include <linux/mm.h>
13#include <linux/sched.h>
14#include <linux/delay.h>
15#include <linux/interrupt.h>
16#include <linux/fs.h>
17#include <linux/console.h>
18#include <linux/genhd.h>
19#include <linux/errno.h>
20#include <linux/string.h>
21#include <linux/init.h>
22#include <linux/bootmem.h>
23#include <linux/proc_fs.h>
24#include <linux/seq_file.h>
25#include <linux/module.h>
26#include <linux/initrd.h>
27
28#include <asm/bootinfo.h>
29#include <asm/sections.h>
30#include <asm/setup.h>
31#include <asm/fpu.h>
32#include <asm/irq.h>
33#include <asm/io.h>
34#include <asm/machdep.h>
35#ifdef CONFIG_AMIGA
36#include <asm/amigahw.h>
37#endif
38#ifdef CONFIG_ATARI
39#include <asm/atarihw.h>
40#include <asm/atari_stram.h>
41#endif
42#ifdef CONFIG_SUN3X
43#include <asm/dvma.h>
44#endif
45#include <asm/natfeat.h>
46
47#if !FPSTATESIZE || !NR_IRQS
48#warning No CPU/platform type selected, your kernel will not work!
49#warning Are you building an allnoconfig kernel?
50#endif
51
52unsigned long m68k_machtype;
53EXPORT_SYMBOL(m68k_machtype);
54unsigned long m68k_cputype;
55EXPORT_SYMBOL(m68k_cputype);
56unsigned long m68k_fputype;
57unsigned long m68k_mmutype;
58EXPORT_SYMBOL(m68k_mmutype);
59#ifdef CONFIG_VME
60unsigned long vme_brdtype;
61EXPORT_SYMBOL(vme_brdtype);
62#endif
63
64int m68k_is040or060;
65EXPORT_SYMBOL(m68k_is040or060);
66
67extern unsigned long availmem;
68
69int m68k_num_memory;
70EXPORT_SYMBOL(m68k_num_memory);
71int m68k_realnum_memory;
72EXPORT_SYMBOL(m68k_realnum_memory);
73unsigned long m68k_memoffset;
74struct mem_info m68k_memory[NUM_MEMINFO];
75EXPORT_SYMBOL(m68k_memory);
76
77struct mem_info m68k_ramdisk;
78
79static char m68k_command_line[CL_SIZE];
80
81void (*mach_sched_init) (irq_handler_t handler) __initdata = NULL;
82/* machine dependent irq functions */
83void (*mach_init_IRQ) (void) __initdata = NULL;
84void (*mach_get_model) (char *model);
85void (*mach_get_hardware_list) (struct seq_file *m);
86/* machine dependent timer functions */
87unsigned long (*mach_gettimeoffset) (void);
88int (*mach_hwclk) (int, struct rtc_time*);
89EXPORT_SYMBOL(mach_hwclk);
90int (*mach_set_clock_mmss) (unsigned long);
91unsigned int (*mach_get_ss)(void);
92int (*mach_get_rtc_pll)(struct rtc_pll_info *);
93int (*mach_set_rtc_pll)(struct rtc_pll_info *);
94EXPORT_SYMBOL(mach_get_ss);
95EXPORT_SYMBOL(mach_get_rtc_pll);
96EXPORT_SYMBOL(mach_set_rtc_pll);
97void (*mach_reset)( void );
98void (*mach_halt)( void );
99void (*mach_power_off)( void );
100long mach_max_dma_address = 0x00ffffff; /* default set to the lower 16MB */
101#ifdef CONFIG_HEARTBEAT
102void (*mach_heartbeat) (int);
103EXPORT_SYMBOL(mach_heartbeat);
104#endif
105#ifdef CONFIG_M68K_L2_CACHE
106void (*mach_l2_flush) (int);
107#endif
108#if defined(CONFIG_INPUT_M68K_BEEP) || defined(CONFIG_INPUT_M68K_BEEP_MODULE)
109void (*mach_beep)(unsigned int, unsigned int);
110EXPORT_SYMBOL(mach_beep);
111#endif
112#if defined(CONFIG_ISA) && defined(MULTI_ISA)
113int isa_type;
114int isa_sex;
115EXPORT_SYMBOL(isa_type);
116EXPORT_SYMBOL(isa_sex);
117#endif
118
119extern int amiga_parse_bootinfo(const struct bi_record *);
120extern int atari_parse_bootinfo(const struct bi_record *);
121extern int mac_parse_bootinfo(const struct bi_record *);
122extern int q40_parse_bootinfo(const struct bi_record *);
123extern int bvme6000_parse_bootinfo(const struct bi_record *);
124extern int mvme16x_parse_bootinfo(const struct bi_record *);
125extern int mvme147_parse_bootinfo(const struct bi_record *);
126extern int hp300_parse_bootinfo(const struct bi_record *);
127extern int apollo_parse_bootinfo(const struct bi_record *);
128
129extern void config_amiga(void);
130extern void config_atari(void);
131extern void config_mac(void);
132extern void config_sun3(void);
133extern void config_apollo(void);
134extern void config_mvme147(void);
135extern void config_mvme16x(void);
136extern void config_bvme6000(void);
137extern void config_hp300(void);
138extern void config_q40(void);
139extern void config_sun3x(void);
140
141#define MASK_256K 0xfffc0000
142
143extern void paging_init(void);
144
145static void __init m68k_parse_bootinfo(const struct bi_record *record)
146{
147 while (record->tag != BI_LAST) {
148 int unknown = 0;
149 const unsigned long *data = record->data;
150
151 switch (record->tag) {
152 case BI_MACHTYPE:
153 case BI_CPUTYPE:
154 case BI_FPUTYPE:
155 case BI_MMUTYPE:
156 /* Already set up by head.S */
157 break;
158
159 case BI_MEMCHUNK:
160 if (m68k_num_memory < NUM_MEMINFO) {
161 m68k_memory[m68k_num_memory].addr = data[0];
162 m68k_memory[m68k_num_memory].size = data[1];
163 m68k_num_memory++;
164 } else
165 printk("m68k_parse_bootinfo: too many memory chunks\n");
166 break;
167
168 case BI_RAMDISK:
169 m68k_ramdisk.addr = data[0];
170 m68k_ramdisk.size = data[1];
171 break;
172
173 case BI_COMMAND_LINE:
174 strlcpy(m68k_command_line, (const char *)data,
175 sizeof(m68k_command_line));
176 break;
177
178 default:
179 if (MACH_IS_AMIGA)
180 unknown = amiga_parse_bootinfo(record);
181 else if (MACH_IS_ATARI)
182 unknown = atari_parse_bootinfo(record);
183 else if (MACH_IS_MAC)
184 unknown = mac_parse_bootinfo(record);
185 else if (MACH_IS_Q40)
186 unknown = q40_parse_bootinfo(record);
187 else if (MACH_IS_BVME6000)
188 unknown = bvme6000_parse_bootinfo(record);
189 else if (MACH_IS_MVME16x)
190 unknown = mvme16x_parse_bootinfo(record);
191 else if (MACH_IS_MVME147)
192 unknown = mvme147_parse_bootinfo(record);
193 else if (MACH_IS_HP300)
194 unknown = hp300_parse_bootinfo(record);
195 else if (MACH_IS_APOLLO)
196 unknown = apollo_parse_bootinfo(record);
197 else
198 unknown = 1;
199 }
200 if (unknown)
201 printk("m68k_parse_bootinfo: unknown tag 0x%04x ignored\n",
202 record->tag);
203 record = (struct bi_record *)((unsigned long)record +
204 record->size);
205 }
206
207 m68k_realnum_memory = m68k_num_memory;
208#ifdef CONFIG_SINGLE_MEMORY_CHUNK
209 if (m68k_num_memory > 1) {
210 printk("Ignoring last %i chunks of physical memory\n",
211 (m68k_num_memory - 1));
212 m68k_num_memory = 1;
213 }
214#endif
215}
216
217void __init setup_arch(char **cmdline_p)
218{
219 int i;
220
221 /* The bootinfo is located right after the kernel bss */
222 m68k_parse_bootinfo((const struct bi_record *)_end);
223
224 if (CPU_IS_040)
225 m68k_is040or060 = 4;
226 else if (CPU_IS_060)
227 m68k_is040or060 = 6;
228
229 /* FIXME: m68k_fputype is passed in by Penguin booter, which can
230 * be confused by software FPU emulation. BEWARE.
231 * We should really do our own FPU check at startup.
232 * [what do we do with buggy 68LC040s? if we have problems
233 * with them, we should add a test to check_bugs() below] */
234#ifndef CONFIG_M68KFPU_EMU_ONLY
235 /* clear the fpu if we have one */
236 if (m68k_fputype & (FPU_68881|FPU_68882|FPU_68040|FPU_68060)) {
237 volatile int zero = 0;
238 asm volatile ("frestore %0" : : "m" (zero));
239 }
240#endif
241
242 if (CPU_IS_060) {
243 u32 pcr;
244
245 asm (".chip 68060; movec %%pcr,%0; .chip 68k"
246 : "=d" (pcr));
247 if (((pcr >> 8) & 0xff) <= 5) {
248 printk("Enabling workaround for errata I14\n");
249 asm (".chip 68060; movec %0,%%pcr; .chip 68k"
250 : : "d" (pcr | 0x20));
251 }
252 }
253
254 init_mm.start_code = PAGE_OFFSET;
255 init_mm.end_code = (unsigned long)_etext;
256 init_mm.end_data = (unsigned long)_edata;
257 init_mm.brk = (unsigned long)_end;
258
259 *cmdline_p = m68k_command_line;
260 memcpy(boot_command_line, *cmdline_p, CL_SIZE);
261
262 parse_early_param();
263
264#ifdef CONFIG_DUMMY_CONSOLE
265 conswitchp = &dummy_con;
266#endif
267
268 switch (m68k_machtype) {
269#ifdef CONFIG_AMIGA
270 case MACH_AMIGA:
271 config_amiga();
272 break;
273#endif
274#ifdef CONFIG_ATARI
275 case MACH_ATARI:
276 config_atari();
277 break;
278#endif
279#ifdef CONFIG_MAC
280 case MACH_MAC:
281 config_mac();
282 break;
283#endif
284#ifdef CONFIG_SUN3
285 case MACH_SUN3:
286 config_sun3();
287 break;
288#endif
289#ifdef CONFIG_APOLLO
290 case MACH_APOLLO:
291 config_apollo();
292 break;
293#endif
294#ifdef CONFIG_MVME147
295 case MACH_MVME147:
296 config_mvme147();
297 break;
298#endif
299#ifdef CONFIG_MVME16x
300 case MACH_MVME16x:
301 config_mvme16x();
302 break;
303#endif
304#ifdef CONFIG_BVME6000
305 case MACH_BVME6000:
306 config_bvme6000();
307 break;
308#endif
309#ifdef CONFIG_HP300
310 case MACH_HP300:
311 config_hp300();
312 break;
313#endif
314#ifdef CONFIG_Q40
315 case MACH_Q40:
316 config_q40();
317 break;
318#endif
319#ifdef CONFIG_SUN3X
320 case MACH_SUN3X:
321 config_sun3x();
322 break;
323#endif
324 default:
325 panic("No configuration setup");
326 }
327
328#ifdef CONFIG_NATFEAT
329 nf_init();
330#endif
331
332 paging_init();
333
334#ifndef CONFIG_SUN3
335 for (i = 1; i < m68k_num_memory; i++)
336 free_bootmem_node(NODE_DATA(i), m68k_memory[i].addr,
337 m68k_memory[i].size);
338#ifdef CONFIG_BLK_DEV_INITRD
339 if (m68k_ramdisk.size) {
340 reserve_bootmem_node(__virt_to_node(phys_to_virt(m68k_ramdisk.addr)),
341 m68k_ramdisk.addr, m68k_ramdisk.size,
342 BOOTMEM_DEFAULT);
343 initrd_start = (unsigned long)phys_to_virt(m68k_ramdisk.addr);
344 initrd_end = initrd_start + m68k_ramdisk.size;
345 printk("initrd: %08lx - %08lx\n", initrd_start, initrd_end);
346 }
347#endif
348
349#ifdef CONFIG_ATARI
350 if (MACH_IS_ATARI)
351 atari_stram_reserve_pages((void *)availmem);
352#endif
353#ifdef CONFIG_SUN3X
354 if (MACH_IS_SUN3X) {
355 dvma_init();
356 }
357#endif
358
359#endif /* !CONFIG_SUN3 */
360
361/* set ISA defs early as possible */
362#if defined(CONFIG_ISA) && defined(MULTI_ISA)
363 if (MACH_IS_Q40) {
364 isa_type = ISA_TYPE_Q40;
365 isa_sex = 0;
366 }
367#ifdef CONFIG_AMIGA_PCMCIA
368 if (MACH_IS_AMIGA && AMIGAHW_PRESENT(PCMCIA)) {
369 isa_type = ISA_TYPE_AG;
370 isa_sex = 1;
371 }
372#endif
373#endif
374}
375
376static int show_cpuinfo(struct seq_file *m, void *v)
377{
378 const char *cpu, *mmu, *fpu;
379 unsigned long clockfreq, clockfactor;
380
381#define LOOP_CYCLES_68020 (8)
382#define LOOP_CYCLES_68030 (8)
383#define LOOP_CYCLES_68040 (3)
384#define LOOP_CYCLES_68060 (1)
385
386 if (CPU_IS_020) {
387 cpu = "68020";
388 clockfactor = LOOP_CYCLES_68020;
389 } else if (CPU_IS_030) {
390 cpu = "68030";
391 clockfactor = LOOP_CYCLES_68030;
392 } else if (CPU_IS_040) {
393 cpu = "68040";
394 clockfactor = LOOP_CYCLES_68040;
395 } else if (CPU_IS_060) {
396 cpu = "68060";
397 clockfactor = LOOP_CYCLES_68060;
398 } else {
399 cpu = "680x0";
400 clockfactor = 0;
401 }
402
403#ifdef CONFIG_M68KFPU_EMU_ONLY
404 fpu = "none(soft float)";
405#else 3#else
406 if (m68k_fputype & FPU_68881) 4#include "setup_no.c"
407 fpu = "68881";
408 else if (m68k_fputype & FPU_68882)
409 fpu = "68882";
410 else if (m68k_fputype & FPU_68040)
411 fpu = "68040";
412 else if (m68k_fputype & FPU_68060)
413 fpu = "68060";
414 else if (m68k_fputype & FPU_SUNFPA)
415 fpu = "Sun FPA";
416 else
417 fpu = "none";
418#endif
419
420 if (m68k_mmutype & MMU_68851)
421 mmu = "68851";
422 else if (m68k_mmutype & MMU_68030)
423 mmu = "68030";
424 else if (m68k_mmutype & MMU_68040)
425 mmu = "68040";
426 else if (m68k_mmutype & MMU_68060)
427 mmu = "68060";
428 else if (m68k_mmutype & MMU_SUN3)
429 mmu = "Sun-3";
430 else if (m68k_mmutype & MMU_APOLLO)
431 mmu = "Apollo";
432 else
433 mmu = "unknown";
434
435 clockfreq = loops_per_jiffy * HZ * clockfactor;
436
437 seq_printf(m, "CPU:\t\t%s\n"
438 "MMU:\t\t%s\n"
439 "FPU:\t\t%s\n"
440 "Clocking:\t%lu.%1luMHz\n"
441 "BogoMips:\t%lu.%02lu\n"
442 "Calibration:\t%lu loops\n",
443 cpu, mmu, fpu,
444 clockfreq/1000000,(clockfreq/100000)%10,
445 loops_per_jiffy/(500000/HZ),(loops_per_jiffy/(5000/HZ))%100,
446 loops_per_jiffy);
447 return 0;
448}
449
450static void *c_start(struct seq_file *m, loff_t *pos)
451{
452 return *pos < 1 ? (void *)1 : NULL;
453}
454static void *c_next(struct seq_file *m, void *v, loff_t *pos)
455{
456 ++*pos;
457 return NULL;
458}
459static void c_stop(struct seq_file *m, void *v)
460{
461}
462const struct seq_operations cpuinfo_op = {
463 .start = c_start,
464 .next = c_next,
465 .stop = c_stop,
466 .show = show_cpuinfo,
467};
468
469#ifdef CONFIG_PROC_HARDWARE
470static int hardware_proc_show(struct seq_file *m, void *v)
471{
472 char model[80];
473 unsigned long mem;
474 int i;
475
476 if (mach_get_model)
477 mach_get_model(model);
478 else
479 strcpy(model, "Unknown m68k");
480
481 seq_printf(m, "Model:\t\t%s\n", model);
482 for (mem = 0, i = 0; i < m68k_num_memory; i++)
483 mem += m68k_memory[i].size;
484 seq_printf(m, "System Memory:\t%ldK\n", mem >> 10);
485
486 if (mach_get_hardware_list)
487 mach_get_hardware_list(m);
488
489 return 0;
490}
491
492static int hardware_proc_open(struct inode *inode, struct file *file)
493{
494 return single_open(file, hardware_proc_show, NULL);
495}
496
497static const struct file_operations hardware_proc_fops = {
498 .open = hardware_proc_open,
499 .read = seq_read,
500 .llseek = seq_lseek,
501 .release = single_release,
502};
503
504static int __init proc_hardware_init(void)
505{
506 proc_create("hardware", 0, NULL, &hardware_proc_fops);
507 return 0;
508}
509module_init(proc_hardware_init);
510#endif 5#endif
511
512void check_bugs(void)
513{
514#ifndef CONFIG_M68KFPU_EMU
515 if (m68k_fputype == 0) {
516 printk(KERN_EMERG "*** YOU DO NOT HAVE A FLOATING POINT UNIT, "
517 "WHICH IS REQUIRED BY LINUX/M68K ***\n");
518 printk(KERN_EMERG "Upgrade your hardware or join the FPU "
519 "emulation project\n");
520 panic("no FPU");
521 }
522#endif /* !CONFIG_M68KFPU_EMU */
523}
524
525#ifdef CONFIG_ADB
526static int __init adb_probe_sync_enable (char *str) {
527 extern int __adb_probe_sync;
528 __adb_probe_sync = 1;
529 return 1;
530}
531
532__setup("adb_sync", adb_probe_sync_enable);
533#endif /* CONFIG_ADB */
diff --git a/arch/m68k/kernel/setup_mm.c b/arch/m68k/kernel/setup_mm.c
new file mode 100644
index 000000000000..334d83640376
--- /dev/null
+++ b/arch/m68k/kernel/setup_mm.c
@@ -0,0 +1,533 @@
1/*
2 * linux/arch/m68k/kernel/setup.c
3 *
4 * Copyright (C) 1995 Hamish Macdonald
5 */
6
7/*
8 * This file handles the architecture-dependent parts of system setup
9 */
10
11#include <linux/kernel.h>
12#include <linux/mm.h>
13#include <linux/sched.h>
14#include <linux/delay.h>
15#include <linux/interrupt.h>
16#include <linux/fs.h>
17#include <linux/console.h>
18#include <linux/genhd.h>
19#include <linux/errno.h>
20#include <linux/string.h>
21#include <linux/init.h>
22#include <linux/bootmem.h>
23#include <linux/proc_fs.h>
24#include <linux/seq_file.h>
25#include <linux/module.h>
26#include <linux/initrd.h>
27
28#include <asm/bootinfo.h>
29#include <asm/sections.h>
30#include <asm/setup.h>
31#include <asm/fpu.h>
32#include <asm/irq.h>
33#include <asm/io.h>
34#include <asm/machdep.h>
35#ifdef CONFIG_AMIGA
36#include <asm/amigahw.h>
37#endif
38#ifdef CONFIG_ATARI
39#include <asm/atarihw.h>
40#include <asm/atari_stram.h>
41#endif
42#ifdef CONFIG_SUN3X
43#include <asm/dvma.h>
44#endif
45#include <asm/natfeat.h>
46
47#if !FPSTATESIZE || !NR_IRQS
48#warning No CPU/platform type selected, your kernel will not work!
49#warning Are you building an allnoconfig kernel?
50#endif
51
52unsigned long m68k_machtype;
53EXPORT_SYMBOL(m68k_machtype);
54unsigned long m68k_cputype;
55EXPORT_SYMBOL(m68k_cputype);
56unsigned long m68k_fputype;
57unsigned long m68k_mmutype;
58EXPORT_SYMBOL(m68k_mmutype);
59#ifdef CONFIG_VME
60unsigned long vme_brdtype;
61EXPORT_SYMBOL(vme_brdtype);
62#endif
63
64int m68k_is040or060;
65EXPORT_SYMBOL(m68k_is040or060);
66
67extern unsigned long availmem;
68
69int m68k_num_memory;
70EXPORT_SYMBOL(m68k_num_memory);
71int m68k_realnum_memory;
72EXPORT_SYMBOL(m68k_realnum_memory);
73unsigned long m68k_memoffset;
74struct mem_info m68k_memory[NUM_MEMINFO];
75EXPORT_SYMBOL(m68k_memory);
76
77struct mem_info m68k_ramdisk;
78
79static char m68k_command_line[CL_SIZE];
80
81void (*mach_sched_init) (irq_handler_t handler) __initdata = NULL;
82/* machine dependent irq functions */
83void (*mach_init_IRQ) (void) __initdata = NULL;
84void (*mach_get_model) (char *model);
85void (*mach_get_hardware_list) (struct seq_file *m);
86/* machine dependent timer functions */
87unsigned long (*mach_gettimeoffset) (void);
88int (*mach_hwclk) (int, struct rtc_time*);
89EXPORT_SYMBOL(mach_hwclk);
90int (*mach_set_clock_mmss) (unsigned long);
91unsigned int (*mach_get_ss)(void);
92int (*mach_get_rtc_pll)(struct rtc_pll_info *);
93int (*mach_set_rtc_pll)(struct rtc_pll_info *);
94EXPORT_SYMBOL(mach_get_ss);
95EXPORT_SYMBOL(mach_get_rtc_pll);
96EXPORT_SYMBOL(mach_set_rtc_pll);
97void (*mach_reset)( void );
98void (*mach_halt)( void );
99void (*mach_power_off)( void );
100long mach_max_dma_address = 0x00ffffff; /* default set to the lower 16MB */
101#ifdef CONFIG_HEARTBEAT
102void (*mach_heartbeat) (int);
103EXPORT_SYMBOL(mach_heartbeat);
104#endif
105#ifdef CONFIG_M68K_L2_CACHE
106void (*mach_l2_flush) (int);
107#endif
108#if defined(CONFIG_INPUT_M68K_BEEP) || defined(CONFIG_INPUT_M68K_BEEP_MODULE)
109void (*mach_beep)(unsigned int, unsigned int);
110EXPORT_SYMBOL(mach_beep);
111#endif
112#if defined(CONFIG_ISA) && defined(MULTI_ISA)
113int isa_type;
114int isa_sex;
115EXPORT_SYMBOL(isa_type);
116EXPORT_SYMBOL(isa_sex);
117#endif
118
119extern int amiga_parse_bootinfo(const struct bi_record *);
120extern int atari_parse_bootinfo(const struct bi_record *);
121extern int mac_parse_bootinfo(const struct bi_record *);
122extern int q40_parse_bootinfo(const struct bi_record *);
123extern int bvme6000_parse_bootinfo(const struct bi_record *);
124extern int mvme16x_parse_bootinfo(const struct bi_record *);
125extern int mvme147_parse_bootinfo(const struct bi_record *);
126extern int hp300_parse_bootinfo(const struct bi_record *);
127extern int apollo_parse_bootinfo(const struct bi_record *);
128
129extern void config_amiga(void);
130extern void config_atari(void);
131extern void config_mac(void);
132extern void config_sun3(void);
133extern void config_apollo(void);
134extern void config_mvme147(void);
135extern void config_mvme16x(void);
136extern void config_bvme6000(void);
137extern void config_hp300(void);
138extern void config_q40(void);
139extern void config_sun3x(void);
140
141#define MASK_256K 0xfffc0000
142
143extern void paging_init(void);
144
145static void __init m68k_parse_bootinfo(const struct bi_record *record)
146{
147 while (record->tag != BI_LAST) {
148 int unknown = 0;
149 const unsigned long *data = record->data;
150
151 switch (record->tag) {
152 case BI_MACHTYPE:
153 case BI_CPUTYPE:
154 case BI_FPUTYPE:
155 case BI_MMUTYPE:
156 /* Already set up by head.S */
157 break;
158
159 case BI_MEMCHUNK:
160 if (m68k_num_memory < NUM_MEMINFO) {
161 m68k_memory[m68k_num_memory].addr = data[0];
162 m68k_memory[m68k_num_memory].size = data[1];
163 m68k_num_memory++;
164 } else
165 printk("m68k_parse_bootinfo: too many memory chunks\n");
166 break;
167
168 case BI_RAMDISK:
169 m68k_ramdisk.addr = data[0];
170 m68k_ramdisk.size = data[1];
171 break;
172
173 case BI_COMMAND_LINE:
174 strlcpy(m68k_command_line, (const char *)data,
175 sizeof(m68k_command_line));
176 break;
177
178 default:
179 if (MACH_IS_AMIGA)
180 unknown = amiga_parse_bootinfo(record);
181 else if (MACH_IS_ATARI)
182 unknown = atari_parse_bootinfo(record);
183 else if (MACH_IS_MAC)
184 unknown = mac_parse_bootinfo(record);
185 else if (MACH_IS_Q40)
186 unknown = q40_parse_bootinfo(record);
187 else if (MACH_IS_BVME6000)
188 unknown = bvme6000_parse_bootinfo(record);
189 else if (MACH_IS_MVME16x)
190 unknown = mvme16x_parse_bootinfo(record);
191 else if (MACH_IS_MVME147)
192 unknown = mvme147_parse_bootinfo(record);
193 else if (MACH_IS_HP300)
194 unknown = hp300_parse_bootinfo(record);
195 else if (MACH_IS_APOLLO)
196 unknown = apollo_parse_bootinfo(record);
197 else
198 unknown = 1;
199 }
200 if (unknown)
201 printk("m68k_parse_bootinfo: unknown tag 0x%04x ignored\n",
202 record->tag);
203 record = (struct bi_record *)((unsigned long)record +
204 record->size);
205 }
206
207 m68k_realnum_memory = m68k_num_memory;
208#ifdef CONFIG_SINGLE_MEMORY_CHUNK
209 if (m68k_num_memory > 1) {
210 printk("Ignoring last %i chunks of physical memory\n",
211 (m68k_num_memory - 1));
212 m68k_num_memory = 1;
213 }
214#endif
215}
216
217void __init setup_arch(char **cmdline_p)
218{
219 int i;
220
221 /* The bootinfo is located right after the kernel bss */
222 m68k_parse_bootinfo((const struct bi_record *)_end);
223
224 if (CPU_IS_040)
225 m68k_is040or060 = 4;
226 else if (CPU_IS_060)
227 m68k_is040or060 = 6;
228
229 /* FIXME: m68k_fputype is passed in by Penguin booter, which can
230 * be confused by software FPU emulation. BEWARE.
231 * We should really do our own FPU check at startup.
232 * [what do we do with buggy 68LC040s? if we have problems
233 * with them, we should add a test to check_bugs() below] */
234#ifndef CONFIG_M68KFPU_EMU_ONLY
235 /* clear the fpu if we have one */
236 if (m68k_fputype & (FPU_68881|FPU_68882|FPU_68040|FPU_68060)) {
237 volatile int zero = 0;
238 asm volatile ("frestore %0" : : "m" (zero));
239 }
240#endif
241
242 if (CPU_IS_060) {
243 u32 pcr;
244
245 asm (".chip 68060; movec %%pcr,%0; .chip 68k"
246 : "=d" (pcr));
247 if (((pcr >> 8) & 0xff) <= 5) {
248 printk("Enabling workaround for errata I14\n");
249 asm (".chip 68060; movec %0,%%pcr; .chip 68k"
250 : : "d" (pcr | 0x20));
251 }
252 }
253
254 init_mm.start_code = PAGE_OFFSET;
255 init_mm.end_code = (unsigned long)_etext;
256 init_mm.end_data = (unsigned long)_edata;
257 init_mm.brk = (unsigned long)_end;
258
259 *cmdline_p = m68k_command_line;
260 memcpy(boot_command_line, *cmdline_p, CL_SIZE);
261
262 parse_early_param();
263
264#ifdef CONFIG_DUMMY_CONSOLE
265 conswitchp = &dummy_con;
266#endif
267
268 switch (m68k_machtype) {
269#ifdef CONFIG_AMIGA
270 case MACH_AMIGA:
271 config_amiga();
272 break;
273#endif
274#ifdef CONFIG_ATARI
275 case MACH_ATARI:
276 config_atari();
277 break;
278#endif
279#ifdef CONFIG_MAC
280 case MACH_MAC:
281 config_mac();
282 break;
283#endif
284#ifdef CONFIG_SUN3
285 case MACH_SUN3:
286 config_sun3();
287 break;
288#endif
289#ifdef CONFIG_APOLLO
290 case MACH_APOLLO:
291 config_apollo();
292 break;
293#endif
294#ifdef CONFIG_MVME147
295 case MACH_MVME147:
296 config_mvme147();
297 break;
298#endif
299#ifdef CONFIG_MVME16x
300 case MACH_MVME16x:
301 config_mvme16x();
302 break;
303#endif
304#ifdef CONFIG_BVME6000
305 case MACH_BVME6000:
306 config_bvme6000();
307 break;
308#endif
309#ifdef CONFIG_HP300
310 case MACH_HP300:
311 config_hp300();
312 break;
313#endif
314#ifdef CONFIG_Q40
315 case MACH_Q40:
316 config_q40();
317 break;
318#endif
319#ifdef CONFIG_SUN3X
320 case MACH_SUN3X:
321 config_sun3x();
322 break;
323#endif
324 default:
325 panic("No configuration setup");
326 }
327
328#ifdef CONFIG_NATFEAT
329 nf_init();
330#endif
331
332 paging_init();
333
334#ifndef CONFIG_SUN3
335 for (i = 1; i < m68k_num_memory; i++)
336 free_bootmem_node(NODE_DATA(i), m68k_memory[i].addr,
337 m68k_memory[i].size);
338#ifdef CONFIG_BLK_DEV_INITRD
339 if (m68k_ramdisk.size) {
340 reserve_bootmem_node(__virt_to_node(phys_to_virt(m68k_ramdisk.addr)),
341 m68k_ramdisk.addr, m68k_ramdisk.size,
342 BOOTMEM_DEFAULT);
343 initrd_start = (unsigned long)phys_to_virt(m68k_ramdisk.addr);
344 initrd_end = initrd_start + m68k_ramdisk.size;
345 printk("initrd: %08lx - %08lx\n", initrd_start, initrd_end);
346 }
347#endif
348
349#ifdef CONFIG_ATARI
350 if (MACH_IS_ATARI)
351 atari_stram_reserve_pages((void *)availmem);
352#endif
353#ifdef CONFIG_SUN3X
354 if (MACH_IS_SUN3X) {
355 dvma_init();
356 }
357#endif
358
359#endif /* !CONFIG_SUN3 */
360
361/* set ISA defs early as possible */
362#if defined(CONFIG_ISA) && defined(MULTI_ISA)
363 if (MACH_IS_Q40) {
364 isa_type = ISA_TYPE_Q40;
365 isa_sex = 0;
366 }
367#ifdef CONFIG_AMIGA_PCMCIA
368 if (MACH_IS_AMIGA && AMIGAHW_PRESENT(PCMCIA)) {
369 isa_type = ISA_TYPE_AG;
370 isa_sex = 1;
371 }
372#endif
373#endif
374}
375
376static int show_cpuinfo(struct seq_file *m, void *v)
377{
378 const char *cpu, *mmu, *fpu;
379 unsigned long clockfreq, clockfactor;
380
381#define LOOP_CYCLES_68020 (8)
382#define LOOP_CYCLES_68030 (8)
383#define LOOP_CYCLES_68040 (3)
384#define LOOP_CYCLES_68060 (1)
385
386 if (CPU_IS_020) {
387 cpu = "68020";
388 clockfactor = LOOP_CYCLES_68020;
389 } else if (CPU_IS_030) {
390 cpu = "68030";
391 clockfactor = LOOP_CYCLES_68030;
392 } else if (CPU_IS_040) {
393 cpu = "68040";
394 clockfactor = LOOP_CYCLES_68040;
395 } else if (CPU_IS_060) {
396 cpu = "68060";
397 clockfactor = LOOP_CYCLES_68060;
398 } else {
399 cpu = "680x0";
400 clockfactor = 0;
401 }
402
403#ifdef CONFIG_M68KFPU_EMU_ONLY
404 fpu = "none(soft float)";
405#else
406 if (m68k_fputype & FPU_68881)
407 fpu = "68881";
408 else if (m68k_fputype & FPU_68882)
409 fpu = "68882";
410 else if (m68k_fputype & FPU_68040)
411 fpu = "68040";
412 else if (m68k_fputype & FPU_68060)
413 fpu = "68060";
414 else if (m68k_fputype & FPU_SUNFPA)
415 fpu = "Sun FPA";
416 else
417 fpu = "none";
418#endif
419
420 if (m68k_mmutype & MMU_68851)
421 mmu = "68851";
422 else if (m68k_mmutype & MMU_68030)
423 mmu = "68030";
424 else if (m68k_mmutype & MMU_68040)
425 mmu = "68040";
426 else if (m68k_mmutype & MMU_68060)
427 mmu = "68060";
428 else if (m68k_mmutype & MMU_SUN3)
429 mmu = "Sun-3";
430 else if (m68k_mmutype & MMU_APOLLO)
431 mmu = "Apollo";
432 else
433 mmu = "unknown";
434
435 clockfreq = loops_per_jiffy * HZ * clockfactor;
436
437 seq_printf(m, "CPU:\t\t%s\n"
438 "MMU:\t\t%s\n"
439 "FPU:\t\t%s\n"
440 "Clocking:\t%lu.%1luMHz\n"
441 "BogoMips:\t%lu.%02lu\n"
442 "Calibration:\t%lu loops\n",
443 cpu, mmu, fpu,
444 clockfreq/1000000,(clockfreq/100000)%10,
445 loops_per_jiffy/(500000/HZ),(loops_per_jiffy/(5000/HZ))%100,
446 loops_per_jiffy);
447 return 0;
448}
449
450static void *c_start(struct seq_file *m, loff_t *pos)
451{
452 return *pos < 1 ? (void *)1 : NULL;
453}
454static void *c_next(struct seq_file *m, void *v, loff_t *pos)
455{
456 ++*pos;
457 return NULL;
458}
459static void c_stop(struct seq_file *m, void *v)
460{
461}
462const struct seq_operations cpuinfo_op = {
463 .start = c_start,
464 .next = c_next,
465 .stop = c_stop,
466 .show = show_cpuinfo,
467};
468
469#ifdef CONFIG_PROC_HARDWARE
470static int hardware_proc_show(struct seq_file *m, void *v)
471{
472 char model[80];
473 unsigned long mem;
474 int i;
475
476 if (mach_get_model)
477 mach_get_model(model);
478 else
479 strcpy(model, "Unknown m68k");
480
481 seq_printf(m, "Model:\t\t%s\n", model);
482 for (mem = 0, i = 0; i < m68k_num_memory; i++)
483 mem += m68k_memory[i].size;
484 seq_printf(m, "System Memory:\t%ldK\n", mem >> 10);
485
486 if (mach_get_hardware_list)
487 mach_get_hardware_list(m);
488
489 return 0;
490}
491
492static int hardware_proc_open(struct inode *inode, struct file *file)
493{
494 return single_open(file, hardware_proc_show, NULL);
495}
496
497static const struct file_operations hardware_proc_fops = {
498 .open = hardware_proc_open,
499 .read = seq_read,
500 .llseek = seq_lseek,
501 .release = single_release,
502};
503
504static int __init proc_hardware_init(void)
505{
506 proc_create("hardware", 0, NULL, &hardware_proc_fops);
507 return 0;
508}
509module_init(proc_hardware_init);
510#endif
511
512void check_bugs(void)
513{
514#ifndef CONFIG_M68KFPU_EMU
515 if (m68k_fputype == 0) {
516 printk(KERN_EMERG "*** YOU DO NOT HAVE A FLOATING POINT UNIT, "
517 "WHICH IS REQUIRED BY LINUX/M68K ***\n");
518 printk(KERN_EMERG "Upgrade your hardware or join the FPU "
519 "emulation project\n");
520 panic("no FPU");
521 }
522#endif /* !CONFIG_M68KFPU_EMU */
523}
524
525#ifdef CONFIG_ADB
526static int __init adb_probe_sync_enable (char *str) {
527 extern int __adb_probe_sync;
528 __adb_probe_sync = 1;
529 return 1;
530}
531
532__setup("adb_sync", adb_probe_sync_enable);
533#endif /* CONFIG_ADB */
diff --git a/arch/m68k/kernel/setup_no.c b/arch/m68k/kernel/setup_no.c
new file mode 100644
index 000000000000..16b2de7f5101
--- /dev/null
+++ b/arch/m68k/kernel/setup_no.c
@@ -0,0 +1,317 @@
1/*
2 * linux/arch/m68knommu/kernel/setup.c
3 *
4 * Copyright (C) 1999-2007 Greg Ungerer (gerg@snapgear.com)
5 * Copyright (C) 1998,1999 D. Jeff Dionne <jeff@uClinux.org>
6 * Copyleft ()) 2000 James D. Schettine {james@telos-systems.com}
7 * Copyright (C) 1998 Kenneth Albanowski <kjahds@kjahds.com>
8 * Copyright (C) 1995 Hamish Macdonald
9 * Copyright (C) 2000 Lineo Inc. (www.lineo.com)
10 * Copyright (C) 2001 Lineo, Inc. <www.lineo.com>
11 *
12 * 68VZ328 Fixes/support Evan Stawnyczy <e@lineo.ca>
13 */
14
15/*
16 * This file handles the architecture-dependent parts of system setup
17 */
18
19#include <linux/kernel.h>
20#include <linux/sched.h>
21#include <linux/delay.h>
22#include <linux/interrupt.h>
23#include <linux/fb.h>
24#include <linux/module.h>
25#include <linux/mm.h>
26#include <linux/console.h>
27#include <linux/errno.h>
28#include <linux/string.h>
29#include <linux/bootmem.h>
30#include <linux/seq_file.h>
31#include <linux/init.h>
32#include <linux/initrd.h>
33#include <linux/root_dev.h>
34
35#include <asm/setup.h>
36#include <asm/irq.h>
37#include <asm/machdep.h>
38#include <asm/pgtable.h>
39
40unsigned long memory_start;
41unsigned long memory_end;
42
43EXPORT_SYMBOL(memory_start);
44EXPORT_SYMBOL(memory_end);
45
46char __initdata command_line[COMMAND_LINE_SIZE];
47
48/* machine dependent timer functions */
49void (*mach_gettod)(int*, int*, int*, int*, int*, int*);
50int (*mach_set_clock_mmss)(unsigned long);
51
52/* machine dependent reboot functions */
53void (*mach_reset)(void);
54void (*mach_halt)(void);
55void (*mach_power_off)(void);
56
57#ifdef CONFIG_M68328
58#define CPU_NAME "MC68328"
59#endif
60#ifdef CONFIG_M68EZ328
61#define CPU_NAME "MC68EZ328"
62#endif
63#ifdef CONFIG_M68VZ328
64#define CPU_NAME "MC68VZ328"
65#endif
66#ifdef CONFIG_M68360
67#define CPU_NAME "MC68360"
68#endif
69#ifndef CPU_NAME
70#define CPU_NAME "UNKNOWN"
71#endif
72
73/*
74 * Different cores have different instruction execution timings.
75 * The old/traditional 68000 cores are basically all the same, at 16.
76 * The ColdFire cores vary a little, their values are defined in their
77 * headers. We default to the standard 68000 value here.
78 */
79#ifndef CPU_INSTR_PER_JIFFY
80#define CPU_INSTR_PER_JIFFY 16
81#endif
82
83extern int _stext, _etext, _sdata, _edata, _sbss, _ebss, _end;
84extern int _ramstart, _ramend;
85
86#if defined(CONFIG_UBOOT)
87/*
88 * parse_uboot_commandline
89 *
90 * Copies u-boot commandline arguments and store them in the proper linux
91 * variables.
92 *
93 * Assumes:
94 * _init_sp global contains the address in the stack pointer when the
95 * kernel starts (see head.S::_start)
96 *
97 * U-Boot calling convention:
98 * (*kernel) (kbd, initrd_start, initrd_end, cmd_start, cmd_end);
99 *
100 * _init_sp can be parsed as such
101 *
102 * _init_sp+00 = u-boot cmd after jsr into kernel (skip)
103 * _init_sp+04 = &kernel board_info (residual data)
104 * _init_sp+08 = &initrd_start
105 * _init_sp+12 = &initrd_end
106 * _init_sp+16 = &cmd_start
107 * _init_sp+20 = &cmd_end
108 *
109 * This also assumes that the memory locations pointed to are still
110 * unmodified. U-boot places them near the end of external SDRAM.
111 *
112 * Argument(s):
113 * commandp = the linux commandline arg container to fill.
114 * size = the sizeof commandp.
115 *
116 * Returns:
117 */
118void parse_uboot_commandline(char *commandp, int size)
119{
120 extern unsigned long _init_sp;
121 unsigned long *sp;
122 unsigned long uboot_kbd;
123 unsigned long uboot_initrd_start, uboot_initrd_end;
124 unsigned long uboot_cmd_start, uboot_cmd_end;
125
126
127 sp = (unsigned long *)_init_sp;
128 uboot_kbd = sp[1];
129 uboot_initrd_start = sp[2];
130 uboot_initrd_end = sp[3];
131 uboot_cmd_start = sp[4];
132 uboot_cmd_end = sp[5];
133
134 if (uboot_cmd_start && uboot_cmd_end)
135 strncpy(commandp, (const char *)uboot_cmd_start, size);
136#if defined(CONFIG_BLK_DEV_INITRD)
137 if (uboot_initrd_start && uboot_initrd_end &&
138 (uboot_initrd_end > uboot_initrd_start)) {
139 initrd_start = uboot_initrd_start;
140 initrd_end = uboot_initrd_end;
141 ROOT_DEV = Root_RAM0;
142 printk(KERN_INFO "initrd at 0x%lx:0x%lx\n",
143 initrd_start, initrd_end);
144 }
145#endif /* if defined(CONFIG_BLK_DEV_INITRD) */
146}
147#endif /* #if defined(CONFIG_UBOOT) */
148
149void __init setup_arch(char **cmdline_p)
150{
151 int bootmap_size;
152
153 memory_start = PAGE_ALIGN(_ramstart);
154 memory_end = _ramend;
155
156 init_mm.start_code = (unsigned long) &_stext;
157 init_mm.end_code = (unsigned long) &_etext;
158 init_mm.end_data = (unsigned long) &_edata;
159 init_mm.brk = (unsigned long) 0;
160
161 config_BSP(&command_line[0], sizeof(command_line));
162
163#if defined(CONFIG_BOOTPARAM)
164 strncpy(&command_line[0], CONFIG_BOOTPARAM_STRING, sizeof(command_line));
165 command_line[sizeof(command_line) - 1] = 0;
166#endif /* CONFIG_BOOTPARAM */
167
168#if defined(CONFIG_UBOOT)
169 /* CONFIG_UBOOT and CONFIG_BOOTPARAM defined, concatenate cmdline */
170 #if defined(CONFIG_BOOTPARAM)
171 /* Add the whitespace separator */
172 command_line[strlen(CONFIG_BOOTPARAM_STRING)] = ' ';
173 /* Parse uboot command line into the rest of the buffer */
174 parse_uboot_commandline(
175 &command_line[(strlen(CONFIG_BOOTPARAM_STRING)+1)],
176 (sizeof(command_line) -
177 (strlen(CONFIG_BOOTPARAM_STRING)+1)));
178 /* Only CONFIG_UBOOT defined, create cmdline */
179 #else
180 parse_uboot_commandline(&command_line[0], sizeof(command_line));
181 #endif /* CONFIG_BOOTPARAM */
182 command_line[sizeof(command_line) - 1] = 0;
183#endif /* CONFIG_UBOOT */
184
185 printk(KERN_INFO "\x0F\r\n\nuClinux/" CPU_NAME "\n");
186
187#ifdef CONFIG_UCDIMM
188 printk(KERN_INFO "uCdimm by Lineo, Inc. <www.lineo.com>\n");
189#endif
190#ifdef CONFIG_M68VZ328
191 printk(KERN_INFO "M68VZ328 support by Evan Stawnyczy <e@lineo.ca>\n");
192#endif
193#ifdef CONFIG_COLDFIRE
194 printk(KERN_INFO "COLDFIRE port done by Greg Ungerer, gerg@snapgear.com\n");
195#ifdef CONFIG_M5307
196 printk(KERN_INFO "Modified for M5307 by Dave Miller, dmiller@intellistor.com\n");
197#endif
198#ifdef CONFIG_ELITE
199 printk(KERN_INFO "Modified for M5206eLITE by Rob Scott, rscott@mtrob.fdns.net\n");
200#endif
201#endif
202 printk(KERN_INFO "Flat model support (C) 1998,1999 Kenneth Albanowski, D. Jeff Dionne\n");
203
204#if defined( CONFIG_PILOT ) && defined( CONFIG_M68328 )
205 printk(KERN_INFO "TRG SuperPilot FLASH card support <info@trgnet.com>\n");
206#endif
207#if defined( CONFIG_PILOT ) && defined( CONFIG_M68EZ328 )
208 printk(KERN_INFO "PalmV support by Lineo Inc. <jeff@uclinux.com>\n");
209#endif
210#if defined (CONFIG_M68360)
211 printk(KERN_INFO "QUICC port done by SED Systems <hamilton@sedsystems.ca>,\n");
212 printk(KERN_INFO "based on 2.0.38 port by Lineo Inc. <mleslie@lineo.com>.\n");
213#endif
214#ifdef CONFIG_DRAGEN2
215 printk(KERN_INFO "DragonEngine II board support by Georges Menie\n");
216#endif
217#ifdef CONFIG_M5235EVB
218 printk(KERN_INFO "Motorola M5235EVB support (C)2005 Syn-tech Systems, Inc. (Jate Sujjavanich)\n");
219#endif
220
221 pr_debug("KERNEL -> TEXT=0x%06x-0x%06x DATA=0x%06x-0x%06x "
222 "BSS=0x%06x-0x%06x\n", (int) &_stext, (int) &_etext,
223 (int) &_sdata, (int) &_edata,
224 (int) &_sbss, (int) &_ebss);
225 pr_debug("MEMORY -> ROMFS=0x%06x-0x%06x MEM=0x%06x-0x%06x\n ",
226 (int) &_ebss, (int) memory_start,
227 (int) memory_start, (int) memory_end);
228
229 /* Keep a copy of command line */
230 *cmdline_p = &command_line[0];
231 memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
232 boot_command_line[COMMAND_LINE_SIZE-1] = 0;
233
234#if defined(CONFIG_FRAMEBUFFER_CONSOLE) && defined(CONFIG_DUMMY_CONSOLE)
235 conswitchp = &dummy_con;
236#endif
237
238 /*
239 * Give all the memory to the bootmap allocator, tell it to put the
240 * boot mem_map at the start of memory.
241 */
242 bootmap_size = init_bootmem_node(
243 NODE_DATA(0),
244 memory_start >> PAGE_SHIFT, /* map goes here */
245 PAGE_OFFSET >> PAGE_SHIFT, /* 0 on coldfire */
246 memory_end >> PAGE_SHIFT);
247 /*
248 * Free the usable memory, we have to make sure we do not free
249 * the bootmem bitmap so we then reserve it after freeing it :-)
250 */
251 free_bootmem(memory_start, memory_end - memory_start);
252 reserve_bootmem(memory_start, bootmap_size, BOOTMEM_DEFAULT);
253
254#if defined(CONFIG_UBOOT) && defined(CONFIG_BLK_DEV_INITRD)
255 if ((initrd_start > 0) && (initrd_start < initrd_end) &&
256 (initrd_end < memory_end))
257 reserve_bootmem(initrd_start, initrd_end - initrd_start,
258 BOOTMEM_DEFAULT);
259#endif /* if defined(CONFIG_BLK_DEV_INITRD) */
260
261 /*
262 * Get kmalloc into gear.
263 */
264 paging_init();
265}
266
267/*
268 * Get CPU information for use by the procfs.
269 */
270static int show_cpuinfo(struct seq_file *m, void *v)
271{
272 char *cpu, *mmu, *fpu;
273 u_long clockfreq;
274
275 cpu = CPU_NAME;
276 mmu = "none";
277 fpu = "none";
278 clockfreq = (loops_per_jiffy * HZ) * CPU_INSTR_PER_JIFFY;
279
280 seq_printf(m, "CPU:\t\t%s\n"
281 "MMU:\t\t%s\n"
282 "FPU:\t\t%s\n"
283 "Clocking:\t%lu.%1luMHz\n"
284 "BogoMips:\t%lu.%02lu\n"
285 "Calibration:\t%lu loops\n",
286 cpu, mmu, fpu,
287 clockfreq / 1000000,
288 (clockfreq / 100000) % 10,
289 (loops_per_jiffy * HZ) / 500000,
290 ((loops_per_jiffy * HZ) / 5000) % 100,
291 (loops_per_jiffy * HZ));
292
293 return 0;
294}
295
296static void *c_start(struct seq_file *m, loff_t *pos)
297{
298 return *pos < NR_CPUS ? ((void *) 0x12345678) : NULL;
299}
300
301static void *c_next(struct seq_file *m, void *v, loff_t *pos)
302{
303 ++*pos;
304 return c_start(m, pos);
305}
306
307static void c_stop(struct seq_file *m, void *v)
308{
309}
310
311const struct seq_operations cpuinfo_op = {
312 .start = c_start,
313 .next = c_next,
314 .stop = c_stop,
315 .show = show_cpuinfo,
316};
317
diff --git a/arch/m68k/kernel/signal.c b/arch/m68k/kernel/signal.c
index a0afc239304e..2e25713e2ead 100644
--- a/arch/m68k/kernel/signal.c
+++ b/arch/m68k/kernel/signal.c
@@ -1,1017 +1,5 @@
1/* 1#ifdef CONFIG_MMU
2 * linux/arch/m68k/kernel/signal.c 2#include "signal_mm.c"
3 *
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive
8 * for more details.
9 */
10
11/*
12 * Linux/m68k support by Hamish Macdonald
13 *
14 * 68060 fixes by Jesper Skov
15 *
16 * 1997-12-01 Modified for POSIX.1b signals by Andreas Schwab
17 *
18 * mathemu support by Roman Zippel
19 * (Note: fpstate in the signal context is completely ignored for the emulator
20 * and the internal floating point format is put on stack)
21 */
22
23/*
24 * ++roman (07/09/96): implemented signal stacks (specially for tosemu on
25 * Atari :-) Current limitation: Only one sigstack can be active at one time.
26 * If a second signal with SA_ONSTACK set arrives while working on a sigstack,
27 * SA_ONSTACK is ignored. This behaviour avoids lots of trouble with nested
28 * signal handlers!
29 */
30
31#include <linux/sched.h>
32#include <linux/mm.h>
33#include <linux/kernel.h>
34#include <linux/signal.h>
35#include <linux/syscalls.h>
36#include <linux/errno.h>
37#include <linux/wait.h>
38#include <linux/ptrace.h>
39#include <linux/unistd.h>
40#include <linux/stddef.h>
41#include <linux/highuid.h>
42#include <linux/personality.h>
43#include <linux/tty.h>
44#include <linux/binfmts.h>
45#include <linux/module.h>
46
47#include <asm/setup.h>
48#include <asm/uaccess.h>
49#include <asm/pgtable.h>
50#include <asm/traps.h>
51#include <asm/ucontext.h>
52
53#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
54
55static const int frame_extra_sizes[16] = {
56 [1] = -1, /* sizeof(((struct frame *)0)->un.fmt1), */
57 [2] = sizeof(((struct frame *)0)->un.fmt2),
58 [3] = sizeof(((struct frame *)0)->un.fmt3),
59 [4] = sizeof(((struct frame *)0)->un.fmt4),
60 [5] = -1, /* sizeof(((struct frame *)0)->un.fmt5), */
61 [6] = -1, /* sizeof(((struct frame *)0)->un.fmt6), */
62 [7] = sizeof(((struct frame *)0)->un.fmt7),
63 [8] = -1, /* sizeof(((struct frame *)0)->un.fmt8), */
64 [9] = sizeof(((struct frame *)0)->un.fmt9),
65 [10] = sizeof(((struct frame *)0)->un.fmta),
66 [11] = sizeof(((struct frame *)0)->un.fmtb),
67 [12] = -1, /* sizeof(((struct frame *)0)->un.fmtc), */
68 [13] = -1, /* sizeof(((struct frame *)0)->un.fmtd), */
69 [14] = -1, /* sizeof(((struct frame *)0)->un.fmte), */
70 [15] = -1, /* sizeof(((struct frame *)0)->un.fmtf), */
71};
72
73int handle_kernel_fault(struct pt_regs *regs)
74{
75 const struct exception_table_entry *fixup;
76 struct pt_regs *tregs;
77
78 /* Are we prepared to handle this kernel fault? */
79 fixup = search_exception_tables(regs->pc);
80 if (!fixup)
81 return 0;
82
83 /* Create a new four word stack frame, discarding the old one. */
84 regs->stkadj = frame_extra_sizes[regs->format];
85 tregs = (struct pt_regs *)((long)regs + regs->stkadj);
86 tregs->vector = regs->vector;
87 tregs->format = 0;
88 tregs->pc = fixup->fixup;
89 tregs->sr = regs->sr;
90
91 return 1;
92}
93
94/*
95 * Atomically swap in the new signal mask, and wait for a signal.
96 */
97asmlinkage int
98sys_sigsuspend(int unused0, int unused1, old_sigset_t mask)
99{
100 mask &= _BLOCKABLE;
101 spin_lock_irq(&current->sighand->siglock);
102 current->saved_sigmask = current->blocked;
103 siginitset(&current->blocked, mask);
104 recalc_sigpending();
105 spin_unlock_irq(&current->sighand->siglock);
106
107 current->state = TASK_INTERRUPTIBLE;
108 schedule();
109 set_restore_sigmask();
110
111 return -ERESTARTNOHAND;
112}
113
114asmlinkage int
115sys_sigaction(int sig, const struct old_sigaction __user *act,
116 struct old_sigaction __user *oact)
117{
118 struct k_sigaction new_ka, old_ka;
119 int ret;
120
121 if (act) {
122 old_sigset_t mask;
123 if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||
124 __get_user(new_ka.sa.sa_handler, &act->sa_handler) ||
125 __get_user(new_ka.sa.sa_restorer, &act->sa_restorer) ||
126 __get_user(new_ka.sa.sa_flags, &act->sa_flags) ||
127 __get_user(mask, &act->sa_mask))
128 return -EFAULT;
129 siginitset(&new_ka.sa.sa_mask, mask);
130 }
131
132 ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL);
133
134 if (!ret && oact) {
135 if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||
136 __put_user(old_ka.sa.sa_handler, &oact->sa_handler) ||
137 __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer) ||
138 __put_user(old_ka.sa.sa_flags, &oact->sa_flags) ||
139 __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask))
140 return -EFAULT;
141 }
142
143 return ret;
144}
145
146asmlinkage int
147sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss)
148{
149 return do_sigaltstack(uss, uoss, rdusp());
150}
151
152
153/*
154 * Do a signal return; undo the signal stack.
155 *
156 * Keep the return code on the stack quadword aligned!
157 * That makes the cache flush below easier.
158 */
159
160struct sigframe
161{
162 char __user *pretcode;
163 int sig;
164 int code;
165 struct sigcontext __user *psc;
166 char retcode[8];
167 unsigned long extramask[_NSIG_WORDS-1];
168 struct sigcontext sc;
169};
170
171struct rt_sigframe
172{
173 char __user *pretcode;
174 int sig;
175 struct siginfo __user *pinfo;
176 void __user *puc;
177 char retcode[8];
178 struct siginfo info;
179 struct ucontext uc;
180};
181
182
183static unsigned char fpu_version; /* version number of fpu, set by setup_frame */
184
185static inline int restore_fpu_state(struct sigcontext *sc)
186{
187 int err = 1;
188
189 if (FPU_IS_EMU) {
190 /* restore registers */
191 memcpy(current->thread.fpcntl, sc->sc_fpcntl, 12);
192 memcpy(current->thread.fp, sc->sc_fpregs, 24);
193 return 0;
194 }
195
196 if (CPU_IS_060 ? sc->sc_fpstate[2] : sc->sc_fpstate[0]) {
197 /* Verify the frame format. */
198 if (!CPU_IS_060 && (sc->sc_fpstate[0] != fpu_version))
199 goto out;
200 if (CPU_IS_020_OR_030) {
201 if (m68k_fputype & FPU_68881 &&
202 !(sc->sc_fpstate[1] == 0x18 || sc->sc_fpstate[1] == 0xb4))
203 goto out;
204 if (m68k_fputype & FPU_68882 &&
205 !(sc->sc_fpstate[1] == 0x38 || sc->sc_fpstate[1] == 0xd4))
206 goto out;
207 } else if (CPU_IS_040) {
208 if (!(sc->sc_fpstate[1] == 0x00 ||
209 sc->sc_fpstate[1] == 0x28 ||
210 sc->sc_fpstate[1] == 0x60))
211 goto out;
212 } else if (CPU_IS_060) {
213 if (!(sc->sc_fpstate[3] == 0x00 ||
214 sc->sc_fpstate[3] == 0x60 ||
215 sc->sc_fpstate[3] == 0xe0))
216 goto out;
217 } else
218 goto out;
219
220 __asm__ volatile (".chip 68k/68881\n\t"
221 "fmovemx %0,%%fp0-%%fp1\n\t"
222 "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t"
223 ".chip 68k"
224 : /* no outputs */
225 : "m" (*sc->sc_fpregs), "m" (*sc->sc_fpcntl));
226 }
227 __asm__ volatile (".chip 68k/68881\n\t"
228 "frestore %0\n\t"
229 ".chip 68k" : : "m" (*sc->sc_fpstate));
230 err = 0;
231
232out:
233 return err;
234}
235
236#define FPCONTEXT_SIZE 216
237#define uc_fpstate uc_filler[0]
238#define uc_formatvec uc_filler[FPCONTEXT_SIZE/4]
239#define uc_extra uc_filler[FPCONTEXT_SIZE/4+1]
240
241static inline int rt_restore_fpu_state(struct ucontext __user *uc)
242{
243 unsigned char fpstate[FPCONTEXT_SIZE];
244 int context_size = CPU_IS_060 ? 8 : 0;
245 fpregset_t fpregs;
246 int err = 1;
247
248 if (FPU_IS_EMU) {
249 /* restore fpu control register */
250 if (__copy_from_user(current->thread.fpcntl,
251 uc->uc_mcontext.fpregs.f_fpcntl, 12))
252 goto out;
253 /* restore all other fpu register */
254 if (__copy_from_user(current->thread.fp,
255 uc->uc_mcontext.fpregs.f_fpregs, 96))
256 goto out;
257 return 0;
258 }
259
260 if (__get_user(*(long *)fpstate, (long __user *)&uc->uc_fpstate))
261 goto out;
262 if (CPU_IS_060 ? fpstate[2] : fpstate[0]) {
263 if (!CPU_IS_060)
264 context_size = fpstate[1];
265 /* Verify the frame format. */
266 if (!CPU_IS_060 && (fpstate[0] != fpu_version))
267 goto out;
268 if (CPU_IS_020_OR_030) {
269 if (m68k_fputype & FPU_68881 &&
270 !(context_size == 0x18 || context_size == 0xb4))
271 goto out;
272 if (m68k_fputype & FPU_68882 &&
273 !(context_size == 0x38 || context_size == 0xd4))
274 goto out;
275 } else if (CPU_IS_040) {
276 if (!(context_size == 0x00 ||
277 context_size == 0x28 ||
278 context_size == 0x60))
279 goto out;
280 } else if (CPU_IS_060) {
281 if (!(fpstate[3] == 0x00 ||
282 fpstate[3] == 0x60 ||
283 fpstate[3] == 0xe0))
284 goto out;
285 } else
286 goto out;
287 if (__copy_from_user(&fpregs, &uc->uc_mcontext.fpregs,
288 sizeof(fpregs)))
289 goto out;
290 __asm__ volatile (".chip 68k/68881\n\t"
291 "fmovemx %0,%%fp0-%%fp7\n\t"
292 "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t"
293 ".chip 68k"
294 : /* no outputs */
295 : "m" (*fpregs.f_fpregs),
296 "m" (*fpregs.f_fpcntl));
297 }
298 if (context_size &&
299 __copy_from_user(fpstate + 4, (long __user *)&uc->uc_fpstate + 1,
300 context_size))
301 goto out;
302 __asm__ volatile (".chip 68k/68881\n\t"
303 "frestore %0\n\t"
304 ".chip 68k" : : "m" (*fpstate));
305 err = 0;
306
307out:
308 return err;
309}
310
311static int mangle_kernel_stack(struct pt_regs *regs, int formatvec,
312 void __user *fp)
313{
314 int fsize = frame_extra_sizes[formatvec >> 12];
315 if (fsize < 0) {
316 /*
317 * user process trying to return with weird frame format
318 */
319#ifdef DEBUG
320 printk("user process returning with weird frame format\n");
321#endif
322 return 1;
323 }
324 if (!fsize) {
325 regs->format = formatvec >> 12;
326 regs->vector = formatvec & 0xfff;
327 } else {
328 struct switch_stack *sw = (struct switch_stack *)regs - 1;
329 unsigned long buf[fsize / 2]; /* yes, twice as much */
330
331 /* that'll make sure that expansion won't crap over data */
332 if (copy_from_user(buf + fsize / 4, fp, fsize))
333 return 1;
334
335 /* point of no return */
336 regs->format = formatvec >> 12;
337 regs->vector = formatvec & 0xfff;
338#define frame_offset (sizeof(struct pt_regs)+sizeof(struct switch_stack))
339 __asm__ __volatile__
340 (" movel %0,%/a0\n\t"
341 " subl %1,%/a0\n\t" /* make room on stack */
342 " movel %/a0,%/sp\n\t" /* set stack pointer */
343 /* move switch_stack and pt_regs */
344 "1: movel %0@+,%/a0@+\n\t"
345 " dbra %2,1b\n\t"
346 " lea %/sp@(%c3),%/a0\n\t" /* add offset of fmt */
347 " lsrl #2,%1\n\t"
348 " subql #1,%1\n\t"
349 /* copy to the gap we'd made */
350 "2: movel %4@+,%/a0@+\n\t"
351 " dbra %1,2b\n\t"
352 " bral ret_from_signal\n"
353 : /* no outputs, it doesn't ever return */
354 : "a" (sw), "d" (fsize), "d" (frame_offset/4-1),
355 "n" (frame_offset), "a" (buf + fsize/4)
356 : "a0");
357#undef frame_offset
358 }
359 return 0;
360}
361
362static inline int
363restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *usc, void __user *fp)
364{
365 int formatvec;
366 struct sigcontext context;
367 int err;
368
369 /* Always make any pending restarted system calls return -EINTR */
370 current_thread_info()->restart_block.fn = do_no_restart_syscall;
371
372 /* get previous context */
373 if (copy_from_user(&context, usc, sizeof(context)))
374 goto badframe;
375
376 /* restore passed registers */
377 regs->d0 = context.sc_d0;
378 regs->d1 = context.sc_d1;
379 regs->a0 = context.sc_a0;
380 regs->a1 = context.sc_a1;
381 regs->sr = (regs->sr & 0xff00) | (context.sc_sr & 0xff);
382 regs->pc = context.sc_pc;
383 regs->orig_d0 = -1; /* disable syscall checks */
384 wrusp(context.sc_usp);
385 formatvec = context.sc_formatvec;
386
387 err = restore_fpu_state(&context);
388
389 if (err || mangle_kernel_stack(regs, formatvec, fp))
390 goto badframe;
391
392 return 0;
393
394badframe:
395 return 1;
396}
397
398static inline int
399rt_restore_ucontext(struct pt_regs *regs, struct switch_stack *sw,
400 struct ucontext __user *uc)
401{
402 int temp;
403 greg_t __user *gregs = uc->uc_mcontext.gregs;
404 unsigned long usp;
405 int err;
406
407 /* Always make any pending restarted system calls return -EINTR */
408 current_thread_info()->restart_block.fn = do_no_restart_syscall;
409
410 err = __get_user(temp, &uc->uc_mcontext.version);
411 if (temp != MCONTEXT_VERSION)
412 goto badframe;
413 /* restore passed registers */
414 err |= __get_user(regs->d0, &gregs[0]);
415 err |= __get_user(regs->d1, &gregs[1]);
416 err |= __get_user(regs->d2, &gregs[2]);
417 err |= __get_user(regs->d3, &gregs[3]);
418 err |= __get_user(regs->d4, &gregs[4]);
419 err |= __get_user(regs->d5, &gregs[5]);
420 err |= __get_user(sw->d6, &gregs[6]);
421 err |= __get_user(sw->d7, &gregs[7]);
422 err |= __get_user(regs->a0, &gregs[8]);
423 err |= __get_user(regs->a1, &gregs[9]);
424 err |= __get_user(regs->a2, &gregs[10]);
425 err |= __get_user(sw->a3, &gregs[11]);
426 err |= __get_user(sw->a4, &gregs[12]);
427 err |= __get_user(sw->a5, &gregs[13]);
428 err |= __get_user(sw->a6, &gregs[14]);
429 err |= __get_user(usp, &gregs[15]);
430 wrusp(usp);
431 err |= __get_user(regs->pc, &gregs[16]);
432 err |= __get_user(temp, &gregs[17]);
433 regs->sr = (regs->sr & 0xff00) | (temp & 0xff);
434 regs->orig_d0 = -1; /* disable syscall checks */
435 err |= __get_user(temp, &uc->uc_formatvec);
436
437 err |= rt_restore_fpu_state(uc);
438
439 if (err || do_sigaltstack(&uc->uc_stack, NULL, usp) == -EFAULT)
440 goto badframe;
441
442 if (mangle_kernel_stack(regs, temp, &uc->uc_extra))
443 goto badframe;
444
445 return 0;
446
447badframe:
448 return 1;
449}
450
451asmlinkage int do_sigreturn(unsigned long __unused)
452{
453 struct switch_stack *sw = (struct switch_stack *) &__unused;
454 struct pt_regs *regs = (struct pt_regs *) (sw + 1);
455 unsigned long usp = rdusp();
456 struct sigframe __user *frame = (struct sigframe __user *)(usp - 4);
457 sigset_t set;
458
459 if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
460 goto badframe;
461 if (__get_user(set.sig[0], &frame->sc.sc_mask) ||
462 (_NSIG_WORDS > 1 &&
463 __copy_from_user(&set.sig[1], &frame->extramask,
464 sizeof(frame->extramask))))
465 goto badframe;
466
467 sigdelsetmask(&set, ~_BLOCKABLE);
468 current->blocked = set;
469 recalc_sigpending();
470
471 if (restore_sigcontext(regs, &frame->sc, frame + 1))
472 goto badframe;
473 return regs->d0;
474
475badframe:
476 force_sig(SIGSEGV, current);
477 return 0;
478}
479
480asmlinkage int do_rt_sigreturn(unsigned long __unused)
481{
482 struct switch_stack *sw = (struct switch_stack *) &__unused;
483 struct pt_regs *regs = (struct pt_regs *) (sw + 1);
484 unsigned long usp = rdusp();
485 struct rt_sigframe __user *frame = (struct rt_sigframe __user *)(usp - 4);
486 sigset_t set;
487
488 if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
489 goto badframe;
490 if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set)))
491 goto badframe;
492
493 sigdelsetmask(&set, ~_BLOCKABLE);
494 current->blocked = set;
495 recalc_sigpending();
496
497 if (rt_restore_ucontext(regs, sw, &frame->uc))
498 goto badframe;
499 return regs->d0;
500
501badframe:
502 force_sig(SIGSEGV, current);
503 return 0;
504}
505
506/*
507 * Set up a signal frame.
508 */
509
510static inline void save_fpu_state(struct sigcontext *sc, struct pt_regs *regs)
511{
512 if (FPU_IS_EMU) {
513 /* save registers */
514 memcpy(sc->sc_fpcntl, current->thread.fpcntl, 12);
515 memcpy(sc->sc_fpregs, current->thread.fp, 24);
516 return;
517 }
518
519 __asm__ volatile (".chip 68k/68881\n\t"
520 "fsave %0\n\t"
521 ".chip 68k"
522 : : "m" (*sc->sc_fpstate) : "memory");
523
524 if (CPU_IS_060 ? sc->sc_fpstate[2] : sc->sc_fpstate[0]) {
525 fpu_version = sc->sc_fpstate[0];
526 if (CPU_IS_020_OR_030 &&
527 regs->vector >= (VEC_FPBRUC * 4) &&
528 regs->vector <= (VEC_FPNAN * 4)) {
529 /* Clear pending exception in 68882 idle frame */
530 if (*(unsigned short *) sc->sc_fpstate == 0x1f38)
531 sc->sc_fpstate[0x38] |= 1 << 3;
532 }
533 __asm__ volatile (".chip 68k/68881\n\t"
534 "fmovemx %%fp0-%%fp1,%0\n\t"
535 "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t"
536 ".chip 68k"
537 : "=m" (*sc->sc_fpregs),
538 "=m" (*sc->sc_fpcntl)
539 : /* no inputs */
540 : "memory");
541 }
542}
543
544static inline int rt_save_fpu_state(struct ucontext __user *uc, struct pt_regs *regs)
545{
546 unsigned char fpstate[FPCONTEXT_SIZE];
547 int context_size = CPU_IS_060 ? 8 : 0;
548 int err = 0;
549
550 if (FPU_IS_EMU) {
551 /* save fpu control register */
552 err |= copy_to_user(uc->uc_mcontext.fpregs.f_fpcntl,
553 current->thread.fpcntl, 12);
554 /* save all other fpu register */
555 err |= copy_to_user(uc->uc_mcontext.fpregs.f_fpregs,
556 current->thread.fp, 96);
557 return err;
558 }
559
560 __asm__ volatile (".chip 68k/68881\n\t"
561 "fsave %0\n\t"
562 ".chip 68k"
563 : : "m" (*fpstate) : "memory");
564
565 err |= __put_user(*(long *)fpstate, (long __user *)&uc->uc_fpstate);
566 if (CPU_IS_060 ? fpstate[2] : fpstate[0]) {
567 fpregset_t fpregs;
568 if (!CPU_IS_060)
569 context_size = fpstate[1];
570 fpu_version = fpstate[0];
571 if (CPU_IS_020_OR_030 &&
572 regs->vector >= (VEC_FPBRUC * 4) &&
573 regs->vector <= (VEC_FPNAN * 4)) {
574 /* Clear pending exception in 68882 idle frame */
575 if (*(unsigned short *) fpstate == 0x1f38)
576 fpstate[0x38] |= 1 << 3;
577 }
578 __asm__ volatile (".chip 68k/68881\n\t"
579 "fmovemx %%fp0-%%fp7,%0\n\t"
580 "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t"
581 ".chip 68k"
582 : "=m" (*fpregs.f_fpregs),
583 "=m" (*fpregs.f_fpcntl)
584 : /* no inputs */
585 : "memory");
586 err |= copy_to_user(&uc->uc_mcontext.fpregs, &fpregs,
587 sizeof(fpregs));
588 }
589 if (context_size)
590 err |= copy_to_user((long __user *)&uc->uc_fpstate + 1, fpstate + 4,
591 context_size);
592 return err;
593}
594
595static void setup_sigcontext(struct sigcontext *sc, struct pt_regs *regs,
596 unsigned long mask)
597{
598 sc->sc_mask = mask;
599 sc->sc_usp = rdusp();
600 sc->sc_d0 = regs->d0;
601 sc->sc_d1 = regs->d1;
602 sc->sc_a0 = regs->a0;
603 sc->sc_a1 = regs->a1;
604 sc->sc_sr = regs->sr;
605 sc->sc_pc = regs->pc;
606 sc->sc_formatvec = regs->format << 12 | regs->vector;
607 save_fpu_state(sc, regs);
608}
609
610static inline int rt_setup_ucontext(struct ucontext __user *uc, struct pt_regs *regs)
611{
612 struct switch_stack *sw = (struct switch_stack *)regs - 1;
613 greg_t __user *gregs = uc->uc_mcontext.gregs;
614 int err = 0;
615
616 err |= __put_user(MCONTEXT_VERSION, &uc->uc_mcontext.version);
617 err |= __put_user(regs->d0, &gregs[0]);
618 err |= __put_user(regs->d1, &gregs[1]);
619 err |= __put_user(regs->d2, &gregs[2]);
620 err |= __put_user(regs->d3, &gregs[3]);
621 err |= __put_user(regs->d4, &gregs[4]);
622 err |= __put_user(regs->d5, &gregs[5]);
623 err |= __put_user(sw->d6, &gregs[6]);
624 err |= __put_user(sw->d7, &gregs[7]);
625 err |= __put_user(regs->a0, &gregs[8]);
626 err |= __put_user(regs->a1, &gregs[9]);
627 err |= __put_user(regs->a2, &gregs[10]);
628 err |= __put_user(sw->a3, &gregs[11]);
629 err |= __put_user(sw->a4, &gregs[12]);
630 err |= __put_user(sw->a5, &gregs[13]);
631 err |= __put_user(sw->a6, &gregs[14]);
632 err |= __put_user(rdusp(), &gregs[15]);
633 err |= __put_user(regs->pc, &gregs[16]);
634 err |= __put_user(regs->sr, &gregs[17]);
635 err |= __put_user((regs->format << 12) | regs->vector, &uc->uc_formatvec);
636 err |= rt_save_fpu_state(uc, regs);
637 return err;
638}
639
640static inline void push_cache (unsigned long vaddr)
641{
642 /*
643 * Using the old cache_push_v() was really a big waste.
644 *
645 * What we are trying to do is to flush 8 bytes to ram.
646 * Flushing 2 cache lines of 16 bytes is much cheaper than
647 * flushing 1 or 2 pages, as previously done in
648 * cache_push_v().
649 * Jes
650 */
651 if (CPU_IS_040) {
652 unsigned long temp;
653
654 __asm__ __volatile__ (".chip 68040\n\t"
655 "nop\n\t"
656 "ptestr (%1)\n\t"
657 "movec %%mmusr,%0\n\t"
658 ".chip 68k"
659 : "=r" (temp)
660 : "a" (vaddr));
661
662 temp &= PAGE_MASK;
663 temp |= vaddr & ~PAGE_MASK;
664
665 __asm__ __volatile__ (".chip 68040\n\t"
666 "nop\n\t"
667 "cpushl %%bc,(%0)\n\t"
668 ".chip 68k"
669 : : "a" (temp));
670 }
671 else if (CPU_IS_060) {
672 unsigned long temp;
673 __asm__ __volatile__ (".chip 68060\n\t"
674 "plpar (%0)\n\t"
675 ".chip 68k"
676 : "=a" (temp)
677 : "0" (vaddr));
678 __asm__ __volatile__ (".chip 68060\n\t"
679 "cpushl %%bc,(%0)\n\t"
680 ".chip 68k"
681 : : "a" (temp));
682 }
683 else {
684 /*
685 * 68030/68020 have no writeback cache;
686 * still need to clear icache.
687 * Note that vaddr is guaranteed to be long word aligned.
688 */
689 unsigned long temp;
690 asm volatile ("movec %%cacr,%0" : "=r" (temp));
691 temp += 4;
692 asm volatile ("movec %0,%%caar\n\t"
693 "movec %1,%%cacr"
694 : : "r" (vaddr), "r" (temp));
695 asm volatile ("movec %0,%%caar\n\t"
696 "movec %1,%%cacr"
697 : : "r" (vaddr + 4), "r" (temp));
698 }
699}
700
701static inline void __user *
702get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size)
703{
704 unsigned long usp;
705
706 /* Default to using normal stack. */
707 usp = rdusp();
708
709 /* This is the X/Open sanctioned signal stack switching. */
710 if (ka->sa.sa_flags & SA_ONSTACK) {
711 if (!sas_ss_flags(usp))
712 usp = current->sas_ss_sp + current->sas_ss_size;
713 }
714 return (void __user *)((usp - frame_size) & -8UL);
715}
716
717static int setup_frame (int sig, struct k_sigaction *ka,
718 sigset_t *set, struct pt_regs *regs)
719{
720 struct sigframe __user *frame;
721 int fsize = frame_extra_sizes[regs->format];
722 struct sigcontext context;
723 int err = 0;
724
725 if (fsize < 0) {
726#ifdef DEBUG
727 printk ("setup_frame: Unknown frame format %#x\n",
728 regs->format);
729#endif
730 goto give_sigsegv;
731 }
732
733 frame = get_sigframe(ka, regs, sizeof(*frame) + fsize);
734
735 if (fsize)
736 err |= copy_to_user (frame + 1, regs + 1, fsize);
737
738 err |= __put_user((current_thread_info()->exec_domain
739 && current_thread_info()->exec_domain->signal_invmap
740 && sig < 32
741 ? current_thread_info()->exec_domain->signal_invmap[sig]
742 : sig),
743 &frame->sig);
744
745 err |= __put_user(regs->vector, &frame->code);
746 err |= __put_user(&frame->sc, &frame->psc);
747
748 if (_NSIG_WORDS > 1)
749 err |= copy_to_user(frame->extramask, &set->sig[1],
750 sizeof(frame->extramask));
751
752 setup_sigcontext(&context, regs, set->sig[0]);
753 err |= copy_to_user (&frame->sc, &context, sizeof(context));
754
755 /* Set up to return from userspace. */
756 err |= __put_user(frame->retcode, &frame->pretcode);
757 /* moveq #,d0; trap #0 */
758 err |= __put_user(0x70004e40 + (__NR_sigreturn << 16),
759 (long __user *)(frame->retcode));
760
761 if (err)
762 goto give_sigsegv;
763
764 push_cache ((unsigned long) &frame->retcode);
765
766 /*
767 * Set up registers for signal handler. All the state we are about
768 * to destroy is successfully copied to sigframe.
769 */
770 wrusp ((unsigned long) frame);
771 regs->pc = (unsigned long) ka->sa.sa_handler;
772
773 /*
774 * This is subtle; if we build more than one sigframe, all but the
775 * first one will see frame format 0 and have fsize == 0, so we won't
776 * screw stkadj.
777 */
778 if (fsize)
779 regs->stkadj = fsize;
780
781 /* Prepare to skip over the extra stuff in the exception frame. */
782 if (regs->stkadj) {
783 struct pt_regs *tregs =
784 (struct pt_regs *)((ulong)regs + regs->stkadj);
785#ifdef DEBUG
786 printk("Performing stackadjust=%04x\n", regs->stkadj);
787#endif
788 /* This must be copied with decreasing addresses to
789 handle overlaps. */
790 tregs->vector = 0;
791 tregs->format = 0;
792 tregs->pc = regs->pc;
793 tregs->sr = regs->sr;
794 }
795 return 0;
796
797give_sigsegv:
798 force_sigsegv(sig, current);
799 return err;
800}
801
802static int setup_rt_frame (int sig, struct k_sigaction *ka, siginfo_t *info,
803 sigset_t *set, struct pt_regs *regs)
804{
805 struct rt_sigframe __user *frame;
806 int fsize = frame_extra_sizes[regs->format];
807 int err = 0;
808
809 if (fsize < 0) {
810#ifdef DEBUG
811 printk ("setup_frame: Unknown frame format %#x\n",
812 regs->format);
813#endif
814 goto give_sigsegv;
815 }
816
817 frame = get_sigframe(ka, regs, sizeof(*frame));
818
819 if (fsize)
820 err |= copy_to_user (&frame->uc.uc_extra, regs + 1, fsize);
821
822 err |= __put_user((current_thread_info()->exec_domain
823 && current_thread_info()->exec_domain->signal_invmap
824 && sig < 32
825 ? current_thread_info()->exec_domain->signal_invmap[sig]
826 : sig),
827 &frame->sig);
828 err |= __put_user(&frame->info, &frame->pinfo);
829 err |= __put_user(&frame->uc, &frame->puc);
830 err |= copy_siginfo_to_user(&frame->info, info);
831
832 /* Create the ucontext. */
833 err |= __put_user(0, &frame->uc.uc_flags);
834 err |= __put_user(NULL, &frame->uc.uc_link);
835 err |= __put_user((void __user *)current->sas_ss_sp,
836 &frame->uc.uc_stack.ss_sp);
837 err |= __put_user(sas_ss_flags(rdusp()),
838 &frame->uc.uc_stack.ss_flags);
839 err |= __put_user(current->sas_ss_size, &frame->uc.uc_stack.ss_size);
840 err |= rt_setup_ucontext(&frame->uc, regs);
841 err |= copy_to_user (&frame->uc.uc_sigmask, set, sizeof(*set));
842
843 /* Set up to return from userspace. */
844 err |= __put_user(frame->retcode, &frame->pretcode);
845#ifdef __mcoldfire__
846 /* movel #__NR_rt_sigreturn,d0; trap #0 */
847 err |= __put_user(0x203c0000, (long __user *)(frame->retcode + 0));
848 err |= __put_user(0x00004e40 + (__NR_rt_sigreturn << 16),
849 (long __user *)(frame->retcode + 4));
850#else 3#else
851 /* moveq #,d0; notb d0; trap #0 */ 4#include "signal_no.c"
852 err |= __put_user(0x70004600 + ((__NR_rt_sigreturn ^ 0xff) << 16),
853 (long __user *)(frame->retcode + 0));
854 err |= __put_user(0x4e40, (short __user *)(frame->retcode + 4));
855#endif
856
857 if (err)
858 goto give_sigsegv;
859
860 push_cache ((unsigned long) &frame->retcode);
861
862 /*
863 * Set up registers for signal handler. All the state we are about
864 * to destroy is successfully copied to sigframe.
865 */
866 wrusp ((unsigned long) frame);
867 regs->pc = (unsigned long) ka->sa.sa_handler;
868
869 /*
870 * This is subtle; if we build more than one sigframe, all but the
871 * first one will see frame format 0 and have fsize == 0, so we won't
872 * screw stkadj.
873 */
874 if (fsize)
875 regs->stkadj = fsize;
876
877 /* Prepare to skip over the extra stuff in the exception frame. */
878 if (regs->stkadj) {
879 struct pt_regs *tregs =
880 (struct pt_regs *)((ulong)regs + regs->stkadj);
881#ifdef DEBUG
882 printk("Performing stackadjust=%04x\n", regs->stkadj);
883#endif 5#endif
884 /* This must be copied with decreasing addresses to
885 handle overlaps. */
886 tregs->vector = 0;
887 tregs->format = 0;
888 tregs->pc = regs->pc;
889 tregs->sr = regs->sr;
890 }
891 return 0;
892
893give_sigsegv:
894 force_sigsegv(sig, current);
895 return err;
896}
897
898static inline void
899handle_restart(struct pt_regs *regs, struct k_sigaction *ka, int has_handler)
900{
901 switch (regs->d0) {
902 case -ERESTARTNOHAND:
903 if (!has_handler)
904 goto do_restart;
905 regs->d0 = -EINTR;
906 break;
907
908 case -ERESTART_RESTARTBLOCK:
909 if (!has_handler) {
910 regs->d0 = __NR_restart_syscall;
911 regs->pc -= 2;
912 break;
913 }
914 regs->d0 = -EINTR;
915 break;
916
917 case -ERESTARTSYS:
918 if (has_handler && !(ka->sa.sa_flags & SA_RESTART)) {
919 regs->d0 = -EINTR;
920 break;
921 }
922 /* fallthrough */
923 case -ERESTARTNOINTR:
924 do_restart:
925 regs->d0 = regs->orig_d0;
926 regs->pc -= 2;
927 break;
928 }
929}
930
931void ptrace_signal_deliver(struct pt_regs *regs, void *cookie)
932{
933 if (regs->orig_d0 < 0)
934 return;
935 switch (regs->d0) {
936 case -ERESTARTNOHAND:
937 case -ERESTARTSYS:
938 case -ERESTARTNOINTR:
939 regs->d0 = regs->orig_d0;
940 regs->orig_d0 = -1;
941 regs->pc -= 2;
942 break;
943 }
944}
945
946/*
947 * OK, we're invoking a handler
948 */
949static void
950handle_signal(int sig, struct k_sigaction *ka, siginfo_t *info,
951 sigset_t *oldset, struct pt_regs *regs)
952{
953 int err;
954 /* are we from a system call? */
955 if (regs->orig_d0 >= 0)
956 /* If so, check system call restarting.. */
957 handle_restart(regs, ka, 1);
958
959 /* set up the stack frame */
960 if (ka->sa.sa_flags & SA_SIGINFO)
961 err = setup_rt_frame(sig, ka, info, oldset, regs);
962 else
963 err = setup_frame(sig, ka, oldset, regs);
964
965 if (err)
966 return;
967
968 sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
969 if (!(ka->sa.sa_flags & SA_NODEFER))
970 sigaddset(&current->blocked,sig);
971 recalc_sigpending();
972
973 if (test_thread_flag(TIF_DELAYED_TRACE)) {
974 regs->sr &= ~0x8000;
975 send_sig(SIGTRAP, current, 1);
976 }
977
978 clear_thread_flag(TIF_RESTORE_SIGMASK);
979}
980
981/*
982 * Note that 'init' is a special process: it doesn't get signals it doesn't
983 * want to handle. Thus you cannot kill init even with a SIGKILL even by
984 * mistake.
985 */
986asmlinkage void do_signal(struct pt_regs *regs)
987{
988 siginfo_t info;
989 struct k_sigaction ka;
990 int signr;
991 sigset_t *oldset;
992
993 current->thread.esp0 = (unsigned long) regs;
994
995 if (test_thread_flag(TIF_RESTORE_SIGMASK))
996 oldset = &current->saved_sigmask;
997 else
998 oldset = &current->blocked;
999
1000 signr = get_signal_to_deliver(&info, &ka, regs, NULL);
1001 if (signr > 0) {
1002 /* Whee! Actually deliver the signal. */
1003 handle_signal(signr, &ka, &info, oldset, regs);
1004 return;
1005 }
1006
1007 /* Did we come from a system call? */
1008 if (regs->orig_d0 >= 0)
1009 /* Restart the system call - no handlers present */
1010 handle_restart(regs, NULL, 0);
1011
1012 /* If there's no signal to deliver, we just restore the saved mask. */
1013 if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
1014 clear_thread_flag(TIF_RESTORE_SIGMASK);
1015 sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
1016 }
1017}
diff --git a/arch/m68k/kernel/signal_mm.c b/arch/m68k/kernel/signal_mm.c
new file mode 100644
index 000000000000..a0afc239304e
--- /dev/null
+++ b/arch/m68k/kernel/signal_mm.c
@@ -0,0 +1,1017 @@
1/*
2 * linux/arch/m68k/kernel/signal.c
3 *
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive
8 * for more details.
9 */
10
11/*
12 * Linux/m68k support by Hamish Macdonald
13 *
14 * 68060 fixes by Jesper Skov
15 *
16 * 1997-12-01 Modified for POSIX.1b signals by Andreas Schwab
17 *
18 * mathemu support by Roman Zippel
19 * (Note: fpstate in the signal context is completely ignored for the emulator
20 * and the internal floating point format is put on stack)
21 */
22
23/*
24 * ++roman (07/09/96): implemented signal stacks (specially for tosemu on
25 * Atari :-) Current limitation: Only one sigstack can be active at one time.
26 * If a second signal with SA_ONSTACK set arrives while working on a sigstack,
27 * SA_ONSTACK is ignored. This behaviour avoids lots of trouble with nested
28 * signal handlers!
29 */
30
31#include <linux/sched.h>
32#include <linux/mm.h>
33#include <linux/kernel.h>
34#include <linux/signal.h>
35#include <linux/syscalls.h>
36#include <linux/errno.h>
37#include <linux/wait.h>
38#include <linux/ptrace.h>
39#include <linux/unistd.h>
40#include <linux/stddef.h>
41#include <linux/highuid.h>
42#include <linux/personality.h>
43#include <linux/tty.h>
44#include <linux/binfmts.h>
45#include <linux/module.h>
46
47#include <asm/setup.h>
48#include <asm/uaccess.h>
49#include <asm/pgtable.h>
50#include <asm/traps.h>
51#include <asm/ucontext.h>
52
53#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
54
55static const int frame_extra_sizes[16] = {
56 [1] = -1, /* sizeof(((struct frame *)0)->un.fmt1), */
57 [2] = sizeof(((struct frame *)0)->un.fmt2),
58 [3] = sizeof(((struct frame *)0)->un.fmt3),
59 [4] = sizeof(((struct frame *)0)->un.fmt4),
60 [5] = -1, /* sizeof(((struct frame *)0)->un.fmt5), */
61 [6] = -1, /* sizeof(((struct frame *)0)->un.fmt6), */
62 [7] = sizeof(((struct frame *)0)->un.fmt7),
63 [8] = -1, /* sizeof(((struct frame *)0)->un.fmt8), */
64 [9] = sizeof(((struct frame *)0)->un.fmt9),
65 [10] = sizeof(((struct frame *)0)->un.fmta),
66 [11] = sizeof(((struct frame *)0)->un.fmtb),
67 [12] = -1, /* sizeof(((struct frame *)0)->un.fmtc), */
68 [13] = -1, /* sizeof(((struct frame *)0)->un.fmtd), */
69 [14] = -1, /* sizeof(((struct frame *)0)->un.fmte), */
70 [15] = -1, /* sizeof(((struct frame *)0)->un.fmtf), */
71};
72
73int handle_kernel_fault(struct pt_regs *regs)
74{
75 const struct exception_table_entry *fixup;
76 struct pt_regs *tregs;
77
78 /* Are we prepared to handle this kernel fault? */
79 fixup = search_exception_tables(regs->pc);
80 if (!fixup)
81 return 0;
82
83 /* Create a new four word stack frame, discarding the old one. */
84 regs->stkadj = frame_extra_sizes[regs->format];
85 tregs = (struct pt_regs *)((long)regs + regs->stkadj);
86 tregs->vector = regs->vector;
87 tregs->format = 0;
88 tregs->pc = fixup->fixup;
89 tregs->sr = regs->sr;
90
91 return 1;
92}
93
94/*
95 * Atomically swap in the new signal mask, and wait for a signal.
96 */
97asmlinkage int
98sys_sigsuspend(int unused0, int unused1, old_sigset_t mask)
99{
100 mask &= _BLOCKABLE;
101 spin_lock_irq(&current->sighand->siglock);
102 current->saved_sigmask = current->blocked;
103 siginitset(&current->blocked, mask);
104 recalc_sigpending();
105 spin_unlock_irq(&current->sighand->siglock);
106
107 current->state = TASK_INTERRUPTIBLE;
108 schedule();
109 set_restore_sigmask();
110
111 return -ERESTARTNOHAND;
112}
113
114asmlinkage int
115sys_sigaction(int sig, const struct old_sigaction __user *act,
116 struct old_sigaction __user *oact)
117{
118 struct k_sigaction new_ka, old_ka;
119 int ret;
120
121 if (act) {
122 old_sigset_t mask;
123 if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||
124 __get_user(new_ka.sa.sa_handler, &act->sa_handler) ||
125 __get_user(new_ka.sa.sa_restorer, &act->sa_restorer) ||
126 __get_user(new_ka.sa.sa_flags, &act->sa_flags) ||
127 __get_user(mask, &act->sa_mask))
128 return -EFAULT;
129 siginitset(&new_ka.sa.sa_mask, mask);
130 }
131
132 ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL);
133
134 if (!ret && oact) {
135 if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||
136 __put_user(old_ka.sa.sa_handler, &oact->sa_handler) ||
137 __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer) ||
138 __put_user(old_ka.sa.sa_flags, &oact->sa_flags) ||
139 __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask))
140 return -EFAULT;
141 }
142
143 return ret;
144}
145
146asmlinkage int
147sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss)
148{
149 return do_sigaltstack(uss, uoss, rdusp());
150}
151
152
153/*
154 * Do a signal return; undo the signal stack.
155 *
156 * Keep the return code on the stack quadword aligned!
157 * That makes the cache flush below easier.
158 */
159
160struct sigframe
161{
162 char __user *pretcode;
163 int sig;
164 int code;
165 struct sigcontext __user *psc;
166 char retcode[8];
167 unsigned long extramask[_NSIG_WORDS-1];
168 struct sigcontext sc;
169};
170
171struct rt_sigframe
172{
173 char __user *pretcode;
174 int sig;
175 struct siginfo __user *pinfo;
176 void __user *puc;
177 char retcode[8];
178 struct siginfo info;
179 struct ucontext uc;
180};
181
182
183static unsigned char fpu_version; /* version number of fpu, set by setup_frame */
184
185static inline int restore_fpu_state(struct sigcontext *sc)
186{
187 int err = 1;
188
189 if (FPU_IS_EMU) {
190 /* restore registers */
191 memcpy(current->thread.fpcntl, sc->sc_fpcntl, 12);
192 memcpy(current->thread.fp, sc->sc_fpregs, 24);
193 return 0;
194 }
195
196 if (CPU_IS_060 ? sc->sc_fpstate[2] : sc->sc_fpstate[0]) {
197 /* Verify the frame format. */
198 if (!CPU_IS_060 && (sc->sc_fpstate[0] != fpu_version))
199 goto out;
200 if (CPU_IS_020_OR_030) {
201 if (m68k_fputype & FPU_68881 &&
202 !(sc->sc_fpstate[1] == 0x18 || sc->sc_fpstate[1] == 0xb4))
203 goto out;
204 if (m68k_fputype & FPU_68882 &&
205 !(sc->sc_fpstate[1] == 0x38 || sc->sc_fpstate[1] == 0xd4))
206 goto out;
207 } else if (CPU_IS_040) {
208 if (!(sc->sc_fpstate[1] == 0x00 ||
209 sc->sc_fpstate[1] == 0x28 ||
210 sc->sc_fpstate[1] == 0x60))
211 goto out;
212 } else if (CPU_IS_060) {
213 if (!(sc->sc_fpstate[3] == 0x00 ||
214 sc->sc_fpstate[3] == 0x60 ||
215 sc->sc_fpstate[3] == 0xe0))
216 goto out;
217 } else
218 goto out;
219
220 __asm__ volatile (".chip 68k/68881\n\t"
221 "fmovemx %0,%%fp0-%%fp1\n\t"
222 "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t"
223 ".chip 68k"
224 : /* no outputs */
225 : "m" (*sc->sc_fpregs), "m" (*sc->sc_fpcntl));
226 }
227 __asm__ volatile (".chip 68k/68881\n\t"
228 "frestore %0\n\t"
229 ".chip 68k" : : "m" (*sc->sc_fpstate));
230 err = 0;
231
232out:
233 return err;
234}
235
236#define FPCONTEXT_SIZE 216
237#define uc_fpstate uc_filler[0]
238#define uc_formatvec uc_filler[FPCONTEXT_SIZE/4]
239#define uc_extra uc_filler[FPCONTEXT_SIZE/4+1]
240
241static inline int rt_restore_fpu_state(struct ucontext __user *uc)
242{
243 unsigned char fpstate[FPCONTEXT_SIZE];
244 int context_size = CPU_IS_060 ? 8 : 0;
245 fpregset_t fpregs;
246 int err = 1;
247
248 if (FPU_IS_EMU) {
249 /* restore fpu control register */
250 if (__copy_from_user(current->thread.fpcntl,
251 uc->uc_mcontext.fpregs.f_fpcntl, 12))
252 goto out;
253 /* restore all other fpu register */
254 if (__copy_from_user(current->thread.fp,
255 uc->uc_mcontext.fpregs.f_fpregs, 96))
256 goto out;
257 return 0;
258 }
259
260 if (__get_user(*(long *)fpstate, (long __user *)&uc->uc_fpstate))
261 goto out;
262 if (CPU_IS_060 ? fpstate[2] : fpstate[0]) {
263 if (!CPU_IS_060)
264 context_size = fpstate[1];
265 /* Verify the frame format. */
266 if (!CPU_IS_060 && (fpstate[0] != fpu_version))
267 goto out;
268 if (CPU_IS_020_OR_030) {
269 if (m68k_fputype & FPU_68881 &&
270 !(context_size == 0x18 || context_size == 0xb4))
271 goto out;
272 if (m68k_fputype & FPU_68882 &&
273 !(context_size == 0x38 || context_size == 0xd4))
274 goto out;
275 } else if (CPU_IS_040) {
276 if (!(context_size == 0x00 ||
277 context_size == 0x28 ||
278 context_size == 0x60))
279 goto out;
280 } else if (CPU_IS_060) {
281 if (!(fpstate[3] == 0x00 ||
282 fpstate[3] == 0x60 ||
283 fpstate[3] == 0xe0))
284 goto out;
285 } else
286 goto out;
287 if (__copy_from_user(&fpregs, &uc->uc_mcontext.fpregs,
288 sizeof(fpregs)))
289 goto out;
290 __asm__ volatile (".chip 68k/68881\n\t"
291 "fmovemx %0,%%fp0-%%fp7\n\t"
292 "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t"
293 ".chip 68k"
294 : /* no outputs */
295 : "m" (*fpregs.f_fpregs),
296 "m" (*fpregs.f_fpcntl));
297 }
298 if (context_size &&
299 __copy_from_user(fpstate + 4, (long __user *)&uc->uc_fpstate + 1,
300 context_size))
301 goto out;
302 __asm__ volatile (".chip 68k/68881\n\t"
303 "frestore %0\n\t"
304 ".chip 68k" : : "m" (*fpstate));
305 err = 0;
306
307out:
308 return err;
309}
310
311static int mangle_kernel_stack(struct pt_regs *regs, int formatvec,
312 void __user *fp)
313{
314 int fsize = frame_extra_sizes[formatvec >> 12];
315 if (fsize < 0) {
316 /*
317 * user process trying to return with weird frame format
318 */
319#ifdef DEBUG
320 printk("user process returning with weird frame format\n");
321#endif
322 return 1;
323 }
324 if (!fsize) {
325 regs->format = formatvec >> 12;
326 regs->vector = formatvec & 0xfff;
327 } else {
328 struct switch_stack *sw = (struct switch_stack *)regs - 1;
329 unsigned long buf[fsize / 2]; /* yes, twice as much */
330
331 /* that'll make sure that expansion won't crap over data */
332 if (copy_from_user(buf + fsize / 4, fp, fsize))
333 return 1;
334
335 /* point of no return */
336 regs->format = formatvec >> 12;
337 regs->vector = formatvec & 0xfff;
338#define frame_offset (sizeof(struct pt_regs)+sizeof(struct switch_stack))
339 __asm__ __volatile__
340 (" movel %0,%/a0\n\t"
341 " subl %1,%/a0\n\t" /* make room on stack */
342 " movel %/a0,%/sp\n\t" /* set stack pointer */
343 /* move switch_stack and pt_regs */
344 "1: movel %0@+,%/a0@+\n\t"
345 " dbra %2,1b\n\t"
346 " lea %/sp@(%c3),%/a0\n\t" /* add offset of fmt */
347 " lsrl #2,%1\n\t"
348 " subql #1,%1\n\t"
349 /* copy to the gap we'd made */
350 "2: movel %4@+,%/a0@+\n\t"
351 " dbra %1,2b\n\t"
352 " bral ret_from_signal\n"
353 : /* no outputs, it doesn't ever return */
354 : "a" (sw), "d" (fsize), "d" (frame_offset/4-1),
355 "n" (frame_offset), "a" (buf + fsize/4)
356 : "a0");
357#undef frame_offset
358 }
359 return 0;
360}
361
362static inline int
363restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *usc, void __user *fp)
364{
365 int formatvec;
366 struct sigcontext context;
367 int err;
368
369 /* Always make any pending restarted system calls return -EINTR */
370 current_thread_info()->restart_block.fn = do_no_restart_syscall;
371
372 /* get previous context */
373 if (copy_from_user(&context, usc, sizeof(context)))
374 goto badframe;
375
376 /* restore passed registers */
377 regs->d0 = context.sc_d0;
378 regs->d1 = context.sc_d1;
379 regs->a0 = context.sc_a0;
380 regs->a1 = context.sc_a1;
381 regs->sr = (regs->sr & 0xff00) | (context.sc_sr & 0xff);
382 regs->pc = context.sc_pc;
383 regs->orig_d0 = -1; /* disable syscall checks */
384 wrusp(context.sc_usp);
385 formatvec = context.sc_formatvec;
386
387 err = restore_fpu_state(&context);
388
389 if (err || mangle_kernel_stack(regs, formatvec, fp))
390 goto badframe;
391
392 return 0;
393
394badframe:
395 return 1;
396}
397
398static inline int
399rt_restore_ucontext(struct pt_regs *regs, struct switch_stack *sw,
400 struct ucontext __user *uc)
401{
402 int temp;
403 greg_t __user *gregs = uc->uc_mcontext.gregs;
404 unsigned long usp;
405 int err;
406
407 /* Always make any pending restarted system calls return -EINTR */
408 current_thread_info()->restart_block.fn = do_no_restart_syscall;
409
410 err = __get_user(temp, &uc->uc_mcontext.version);
411 if (temp != MCONTEXT_VERSION)
412 goto badframe;
413 /* restore passed registers */
414 err |= __get_user(regs->d0, &gregs[0]);
415 err |= __get_user(regs->d1, &gregs[1]);
416 err |= __get_user(regs->d2, &gregs[2]);
417 err |= __get_user(regs->d3, &gregs[3]);
418 err |= __get_user(regs->d4, &gregs[4]);
419 err |= __get_user(regs->d5, &gregs[5]);
420 err |= __get_user(sw->d6, &gregs[6]);
421 err |= __get_user(sw->d7, &gregs[7]);
422 err |= __get_user(regs->a0, &gregs[8]);
423 err |= __get_user(regs->a1, &gregs[9]);
424 err |= __get_user(regs->a2, &gregs[10]);
425 err |= __get_user(sw->a3, &gregs[11]);
426 err |= __get_user(sw->a4, &gregs[12]);
427 err |= __get_user(sw->a5, &gregs[13]);
428 err |= __get_user(sw->a6, &gregs[14]);
429 err |= __get_user(usp, &gregs[15]);
430 wrusp(usp);
431 err |= __get_user(regs->pc, &gregs[16]);
432 err |= __get_user(temp, &gregs[17]);
433 regs->sr = (regs->sr & 0xff00) | (temp & 0xff);
434 regs->orig_d0 = -1; /* disable syscall checks */
435 err |= __get_user(temp, &uc->uc_formatvec);
436
437 err |= rt_restore_fpu_state(uc);
438
439 if (err || do_sigaltstack(&uc->uc_stack, NULL, usp) == -EFAULT)
440 goto badframe;
441
442 if (mangle_kernel_stack(regs, temp, &uc->uc_extra))
443 goto badframe;
444
445 return 0;
446
447badframe:
448 return 1;
449}
450
451asmlinkage int do_sigreturn(unsigned long __unused)
452{
453 struct switch_stack *sw = (struct switch_stack *) &__unused;
454 struct pt_regs *regs = (struct pt_regs *) (sw + 1);
455 unsigned long usp = rdusp();
456 struct sigframe __user *frame = (struct sigframe __user *)(usp - 4);
457 sigset_t set;
458
459 if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
460 goto badframe;
461 if (__get_user(set.sig[0], &frame->sc.sc_mask) ||
462 (_NSIG_WORDS > 1 &&
463 __copy_from_user(&set.sig[1], &frame->extramask,
464 sizeof(frame->extramask))))
465 goto badframe;
466
467 sigdelsetmask(&set, ~_BLOCKABLE);
468 current->blocked = set;
469 recalc_sigpending();
470
471 if (restore_sigcontext(regs, &frame->sc, frame + 1))
472 goto badframe;
473 return regs->d0;
474
475badframe:
476 force_sig(SIGSEGV, current);
477 return 0;
478}
479
480asmlinkage int do_rt_sigreturn(unsigned long __unused)
481{
482 struct switch_stack *sw = (struct switch_stack *) &__unused;
483 struct pt_regs *regs = (struct pt_regs *) (sw + 1);
484 unsigned long usp = rdusp();
485 struct rt_sigframe __user *frame = (struct rt_sigframe __user *)(usp - 4);
486 sigset_t set;
487
488 if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
489 goto badframe;
490 if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set)))
491 goto badframe;
492
493 sigdelsetmask(&set, ~_BLOCKABLE);
494 current->blocked = set;
495 recalc_sigpending();
496
497 if (rt_restore_ucontext(regs, sw, &frame->uc))
498 goto badframe;
499 return regs->d0;
500
501badframe:
502 force_sig(SIGSEGV, current);
503 return 0;
504}
505
506/*
507 * Set up a signal frame.
508 */
509
510static inline void save_fpu_state(struct sigcontext *sc, struct pt_regs *regs)
511{
512 if (FPU_IS_EMU) {
513 /* save registers */
514 memcpy(sc->sc_fpcntl, current->thread.fpcntl, 12);
515 memcpy(sc->sc_fpregs, current->thread.fp, 24);
516 return;
517 }
518
519 __asm__ volatile (".chip 68k/68881\n\t"
520 "fsave %0\n\t"
521 ".chip 68k"
522 : : "m" (*sc->sc_fpstate) : "memory");
523
524 if (CPU_IS_060 ? sc->sc_fpstate[2] : sc->sc_fpstate[0]) {
525 fpu_version = sc->sc_fpstate[0];
526 if (CPU_IS_020_OR_030 &&
527 regs->vector >= (VEC_FPBRUC * 4) &&
528 regs->vector <= (VEC_FPNAN * 4)) {
529 /* Clear pending exception in 68882 idle frame */
530 if (*(unsigned short *) sc->sc_fpstate == 0x1f38)
531 sc->sc_fpstate[0x38] |= 1 << 3;
532 }
533 __asm__ volatile (".chip 68k/68881\n\t"
534 "fmovemx %%fp0-%%fp1,%0\n\t"
535 "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t"
536 ".chip 68k"
537 : "=m" (*sc->sc_fpregs),
538 "=m" (*sc->sc_fpcntl)
539 : /* no inputs */
540 : "memory");
541 }
542}
543
544static inline int rt_save_fpu_state(struct ucontext __user *uc, struct pt_regs *regs)
545{
546 unsigned char fpstate[FPCONTEXT_SIZE];
547 int context_size = CPU_IS_060 ? 8 : 0;
548 int err = 0;
549
550 if (FPU_IS_EMU) {
551 /* save fpu control register */
552 err |= copy_to_user(uc->uc_mcontext.fpregs.f_fpcntl,
553 current->thread.fpcntl, 12);
554 /* save all other fpu register */
555 err |= copy_to_user(uc->uc_mcontext.fpregs.f_fpregs,
556 current->thread.fp, 96);
557 return err;
558 }
559
560 __asm__ volatile (".chip 68k/68881\n\t"
561 "fsave %0\n\t"
562 ".chip 68k"
563 : : "m" (*fpstate) : "memory");
564
565 err |= __put_user(*(long *)fpstate, (long __user *)&uc->uc_fpstate);
566 if (CPU_IS_060 ? fpstate[2] : fpstate[0]) {
567 fpregset_t fpregs;
568 if (!CPU_IS_060)
569 context_size = fpstate[1];
570 fpu_version = fpstate[0];
571 if (CPU_IS_020_OR_030 &&
572 regs->vector >= (VEC_FPBRUC * 4) &&
573 regs->vector <= (VEC_FPNAN * 4)) {
574 /* Clear pending exception in 68882 idle frame */
575 if (*(unsigned short *) fpstate == 0x1f38)
576 fpstate[0x38] |= 1 << 3;
577 }
578 __asm__ volatile (".chip 68k/68881\n\t"
579 "fmovemx %%fp0-%%fp7,%0\n\t"
580 "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t"
581 ".chip 68k"
582 : "=m" (*fpregs.f_fpregs),
583 "=m" (*fpregs.f_fpcntl)
584 : /* no inputs */
585 : "memory");
586 err |= copy_to_user(&uc->uc_mcontext.fpregs, &fpregs,
587 sizeof(fpregs));
588 }
589 if (context_size)
590 err |= copy_to_user((long __user *)&uc->uc_fpstate + 1, fpstate + 4,
591 context_size);
592 return err;
593}
594
595static void setup_sigcontext(struct sigcontext *sc, struct pt_regs *regs,
596 unsigned long mask)
597{
598 sc->sc_mask = mask;
599 sc->sc_usp = rdusp();
600 sc->sc_d0 = regs->d0;
601 sc->sc_d1 = regs->d1;
602 sc->sc_a0 = regs->a0;
603 sc->sc_a1 = regs->a1;
604 sc->sc_sr = regs->sr;
605 sc->sc_pc = regs->pc;
606 sc->sc_formatvec = regs->format << 12 | regs->vector;
607 save_fpu_state(sc, regs);
608}
609
610static inline int rt_setup_ucontext(struct ucontext __user *uc, struct pt_regs *regs)
611{
612 struct switch_stack *sw = (struct switch_stack *)regs - 1;
613 greg_t __user *gregs = uc->uc_mcontext.gregs;
614 int err = 0;
615
616 err |= __put_user(MCONTEXT_VERSION, &uc->uc_mcontext.version);
617 err |= __put_user(regs->d0, &gregs[0]);
618 err |= __put_user(regs->d1, &gregs[1]);
619 err |= __put_user(regs->d2, &gregs[2]);
620 err |= __put_user(regs->d3, &gregs[3]);
621 err |= __put_user(regs->d4, &gregs[4]);
622 err |= __put_user(regs->d5, &gregs[5]);
623 err |= __put_user(sw->d6, &gregs[6]);
624 err |= __put_user(sw->d7, &gregs[7]);
625 err |= __put_user(regs->a0, &gregs[8]);
626 err |= __put_user(regs->a1, &gregs[9]);
627 err |= __put_user(regs->a2, &gregs[10]);
628 err |= __put_user(sw->a3, &gregs[11]);
629 err |= __put_user(sw->a4, &gregs[12]);
630 err |= __put_user(sw->a5, &gregs[13]);
631 err |= __put_user(sw->a6, &gregs[14]);
632 err |= __put_user(rdusp(), &gregs[15]);
633 err |= __put_user(regs->pc, &gregs[16]);
634 err |= __put_user(regs->sr, &gregs[17]);
635 err |= __put_user((regs->format << 12) | regs->vector, &uc->uc_formatvec);
636 err |= rt_save_fpu_state(uc, regs);
637 return err;
638}
639
640static inline void push_cache (unsigned long vaddr)
641{
642 /*
643 * Using the old cache_push_v() was really a big waste.
644 *
645 * What we are trying to do is to flush 8 bytes to ram.
646 * Flushing 2 cache lines of 16 bytes is much cheaper than
647 * flushing 1 or 2 pages, as previously done in
648 * cache_push_v().
649 * Jes
650 */
651 if (CPU_IS_040) {
652 unsigned long temp;
653
654 __asm__ __volatile__ (".chip 68040\n\t"
655 "nop\n\t"
656 "ptestr (%1)\n\t"
657 "movec %%mmusr,%0\n\t"
658 ".chip 68k"
659 : "=r" (temp)
660 : "a" (vaddr));
661
662 temp &= PAGE_MASK;
663 temp |= vaddr & ~PAGE_MASK;
664
665 __asm__ __volatile__ (".chip 68040\n\t"
666 "nop\n\t"
667 "cpushl %%bc,(%0)\n\t"
668 ".chip 68k"
669 : : "a" (temp));
670 }
671 else if (CPU_IS_060) {
672 unsigned long temp;
673 __asm__ __volatile__ (".chip 68060\n\t"
674 "plpar (%0)\n\t"
675 ".chip 68k"
676 : "=a" (temp)
677 : "0" (vaddr));
678 __asm__ __volatile__ (".chip 68060\n\t"
679 "cpushl %%bc,(%0)\n\t"
680 ".chip 68k"
681 : : "a" (temp));
682 }
683 else {
684 /*
685 * 68030/68020 have no writeback cache;
686 * still need to clear icache.
687 * Note that vaddr is guaranteed to be long word aligned.
688 */
689 unsigned long temp;
690 asm volatile ("movec %%cacr,%0" : "=r" (temp));
691 temp += 4;
692 asm volatile ("movec %0,%%caar\n\t"
693 "movec %1,%%cacr"
694 : : "r" (vaddr), "r" (temp));
695 asm volatile ("movec %0,%%caar\n\t"
696 "movec %1,%%cacr"
697 : : "r" (vaddr + 4), "r" (temp));
698 }
699}
700
701static inline void __user *
702get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size)
703{
704 unsigned long usp;
705
706 /* Default to using normal stack. */
707 usp = rdusp();
708
709 /* This is the X/Open sanctioned signal stack switching. */
710 if (ka->sa.sa_flags & SA_ONSTACK) {
711 if (!sas_ss_flags(usp))
712 usp = current->sas_ss_sp + current->sas_ss_size;
713 }
714 return (void __user *)((usp - frame_size) & -8UL);
715}
716
717static int setup_frame (int sig, struct k_sigaction *ka,
718 sigset_t *set, struct pt_regs *regs)
719{
720 struct sigframe __user *frame;
721 int fsize = frame_extra_sizes[regs->format];
722 struct sigcontext context;
723 int err = 0;
724
725 if (fsize < 0) {
726#ifdef DEBUG
727 printk ("setup_frame: Unknown frame format %#x\n",
728 regs->format);
729#endif
730 goto give_sigsegv;
731 }
732
733 frame = get_sigframe(ka, regs, sizeof(*frame) + fsize);
734
735 if (fsize)
736 err |= copy_to_user (frame + 1, regs + 1, fsize);
737
738 err |= __put_user((current_thread_info()->exec_domain
739 && current_thread_info()->exec_domain->signal_invmap
740 && sig < 32
741 ? current_thread_info()->exec_domain->signal_invmap[sig]
742 : sig),
743 &frame->sig);
744
745 err |= __put_user(regs->vector, &frame->code);
746 err |= __put_user(&frame->sc, &frame->psc);
747
748 if (_NSIG_WORDS > 1)
749 err |= copy_to_user(frame->extramask, &set->sig[1],
750 sizeof(frame->extramask));
751
752 setup_sigcontext(&context, regs, set->sig[0]);
753 err |= copy_to_user (&frame->sc, &context, sizeof(context));
754
755 /* Set up to return from userspace. */
756 err |= __put_user(frame->retcode, &frame->pretcode);
757 /* moveq #,d0; trap #0 */
758 err |= __put_user(0x70004e40 + (__NR_sigreturn << 16),
759 (long __user *)(frame->retcode));
760
761 if (err)
762 goto give_sigsegv;
763
764 push_cache ((unsigned long) &frame->retcode);
765
766 /*
767 * Set up registers for signal handler. All the state we are about
768 * to destroy is successfully copied to sigframe.
769 */
770 wrusp ((unsigned long) frame);
771 regs->pc = (unsigned long) ka->sa.sa_handler;
772
773 /*
774 * This is subtle; if we build more than one sigframe, all but the
775 * first one will see frame format 0 and have fsize == 0, so we won't
776 * screw stkadj.
777 */
778 if (fsize)
779 regs->stkadj = fsize;
780
781 /* Prepare to skip over the extra stuff in the exception frame. */
782 if (regs->stkadj) {
783 struct pt_regs *tregs =
784 (struct pt_regs *)((ulong)regs + regs->stkadj);
785#ifdef DEBUG
786 printk("Performing stackadjust=%04x\n", regs->stkadj);
787#endif
788 /* This must be copied with decreasing addresses to
789 handle overlaps. */
790 tregs->vector = 0;
791 tregs->format = 0;
792 tregs->pc = regs->pc;
793 tregs->sr = regs->sr;
794 }
795 return 0;
796
797give_sigsegv:
798 force_sigsegv(sig, current);
799 return err;
800}
801
802static int setup_rt_frame (int sig, struct k_sigaction *ka, siginfo_t *info,
803 sigset_t *set, struct pt_regs *regs)
804{
805 struct rt_sigframe __user *frame;
806 int fsize = frame_extra_sizes[regs->format];
807 int err = 0;
808
809 if (fsize < 0) {
810#ifdef DEBUG
811 printk ("setup_frame: Unknown frame format %#x\n",
812 regs->format);
813#endif
814 goto give_sigsegv;
815 }
816
817 frame = get_sigframe(ka, regs, sizeof(*frame));
818
819 if (fsize)
820 err |= copy_to_user (&frame->uc.uc_extra, regs + 1, fsize);
821
822 err |= __put_user((current_thread_info()->exec_domain
823 && current_thread_info()->exec_domain->signal_invmap
824 && sig < 32
825 ? current_thread_info()->exec_domain->signal_invmap[sig]
826 : sig),
827 &frame->sig);
828 err |= __put_user(&frame->info, &frame->pinfo);
829 err |= __put_user(&frame->uc, &frame->puc);
830 err |= copy_siginfo_to_user(&frame->info, info);
831
832 /* Create the ucontext. */
833 err |= __put_user(0, &frame->uc.uc_flags);
834 err |= __put_user(NULL, &frame->uc.uc_link);
835 err |= __put_user((void __user *)current->sas_ss_sp,
836 &frame->uc.uc_stack.ss_sp);
837 err |= __put_user(sas_ss_flags(rdusp()),
838 &frame->uc.uc_stack.ss_flags);
839 err |= __put_user(current->sas_ss_size, &frame->uc.uc_stack.ss_size);
840 err |= rt_setup_ucontext(&frame->uc, regs);
841 err |= copy_to_user (&frame->uc.uc_sigmask, set, sizeof(*set));
842
843 /* Set up to return from userspace. */
844 err |= __put_user(frame->retcode, &frame->pretcode);
845#ifdef __mcoldfire__
846 /* movel #__NR_rt_sigreturn,d0; trap #0 */
847 err |= __put_user(0x203c0000, (long __user *)(frame->retcode + 0));
848 err |= __put_user(0x00004e40 + (__NR_rt_sigreturn << 16),
849 (long __user *)(frame->retcode + 4));
850#else
851 /* moveq #,d0; notb d0; trap #0 */
852 err |= __put_user(0x70004600 + ((__NR_rt_sigreturn ^ 0xff) << 16),
853 (long __user *)(frame->retcode + 0));
854 err |= __put_user(0x4e40, (short __user *)(frame->retcode + 4));
855#endif
856
857 if (err)
858 goto give_sigsegv;
859
860 push_cache ((unsigned long) &frame->retcode);
861
862 /*
863 * Set up registers for signal handler. All the state we are about
864 * to destroy is successfully copied to sigframe.
865 */
866 wrusp ((unsigned long) frame);
867 regs->pc = (unsigned long) ka->sa.sa_handler;
868
869 /*
870 * This is subtle; if we build more than one sigframe, all but the
871 * first one will see frame format 0 and have fsize == 0, so we won't
872 * screw stkadj.
873 */
874 if (fsize)
875 regs->stkadj = fsize;
876
877 /* Prepare to skip over the extra stuff in the exception frame. */
878 if (regs->stkadj) {
879 struct pt_regs *tregs =
880 (struct pt_regs *)((ulong)regs + regs->stkadj);
881#ifdef DEBUG
882 printk("Performing stackadjust=%04x\n", regs->stkadj);
883#endif
884 /* This must be copied with decreasing addresses to
885 handle overlaps. */
886 tregs->vector = 0;
887 tregs->format = 0;
888 tregs->pc = regs->pc;
889 tregs->sr = regs->sr;
890 }
891 return 0;
892
893give_sigsegv:
894 force_sigsegv(sig, current);
895 return err;
896}
897
898static inline void
899handle_restart(struct pt_regs *regs, struct k_sigaction *ka, int has_handler)
900{
901 switch (regs->d0) {
902 case -ERESTARTNOHAND:
903 if (!has_handler)
904 goto do_restart;
905 regs->d0 = -EINTR;
906 break;
907
908 case -ERESTART_RESTARTBLOCK:
909 if (!has_handler) {
910 regs->d0 = __NR_restart_syscall;
911 regs->pc -= 2;
912 break;
913 }
914 regs->d0 = -EINTR;
915 break;
916
917 case -ERESTARTSYS:
918 if (has_handler && !(ka->sa.sa_flags & SA_RESTART)) {
919 regs->d0 = -EINTR;
920 break;
921 }
922 /* fallthrough */
923 case -ERESTARTNOINTR:
924 do_restart:
925 regs->d0 = regs->orig_d0;
926 regs->pc -= 2;
927 break;
928 }
929}
930
931void ptrace_signal_deliver(struct pt_regs *regs, void *cookie)
932{
933 if (regs->orig_d0 < 0)
934 return;
935 switch (regs->d0) {
936 case -ERESTARTNOHAND:
937 case -ERESTARTSYS:
938 case -ERESTARTNOINTR:
939 regs->d0 = regs->orig_d0;
940 regs->orig_d0 = -1;
941 regs->pc -= 2;
942 break;
943 }
944}
945
946/*
947 * OK, we're invoking a handler
948 */
949static void
950handle_signal(int sig, struct k_sigaction *ka, siginfo_t *info,
951 sigset_t *oldset, struct pt_regs *regs)
952{
953 int err;
954 /* are we from a system call? */
955 if (regs->orig_d0 >= 0)
956 /* If so, check system call restarting.. */
957 handle_restart(regs, ka, 1);
958
959 /* set up the stack frame */
960 if (ka->sa.sa_flags & SA_SIGINFO)
961 err = setup_rt_frame(sig, ka, info, oldset, regs);
962 else
963 err = setup_frame(sig, ka, oldset, regs);
964
965 if (err)
966 return;
967
968 sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
969 if (!(ka->sa.sa_flags & SA_NODEFER))
970 sigaddset(&current->blocked,sig);
971 recalc_sigpending();
972
973 if (test_thread_flag(TIF_DELAYED_TRACE)) {
974 regs->sr &= ~0x8000;
975 send_sig(SIGTRAP, current, 1);
976 }
977
978 clear_thread_flag(TIF_RESTORE_SIGMASK);
979}
980
981/*
982 * Note that 'init' is a special process: it doesn't get signals it doesn't
983 * want to handle. Thus you cannot kill init even with a SIGKILL even by
984 * mistake.
985 */
986asmlinkage void do_signal(struct pt_regs *regs)
987{
988 siginfo_t info;
989 struct k_sigaction ka;
990 int signr;
991 sigset_t *oldset;
992
993 current->thread.esp0 = (unsigned long) regs;
994
995 if (test_thread_flag(TIF_RESTORE_SIGMASK))
996 oldset = &current->saved_sigmask;
997 else
998 oldset = &current->blocked;
999
1000 signr = get_signal_to_deliver(&info, &ka, regs, NULL);
1001 if (signr > 0) {
1002 /* Whee! Actually deliver the signal. */
1003 handle_signal(signr, &ka, &info, oldset, regs);
1004 return;
1005 }
1006
1007 /* Did we come from a system call? */
1008 if (regs->orig_d0 >= 0)
1009 /* Restart the system call - no handlers present */
1010 handle_restart(regs, NULL, 0);
1011
1012 /* If there's no signal to deliver, we just restore the saved mask. */
1013 if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
1014 clear_thread_flag(TIF_RESTORE_SIGMASK);
1015 sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
1016 }
1017}
diff --git a/arch/m68k/kernel/signal_no.c b/arch/m68k/kernel/signal_no.c
new file mode 100644
index 000000000000..36a81bb6835a
--- /dev/null
+++ b/arch/m68k/kernel/signal_no.c
@@ -0,0 +1,765 @@
1/*
2 * linux/arch/m68knommu/kernel/signal.c
3 *
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive
8 * for more details.
9 */
10
11/*
12 * Linux/m68k support by Hamish Macdonald
13 *
14 * 68060 fixes by Jesper Skov
15 *
16 * 1997-12-01 Modified for POSIX.1b signals by Andreas Schwab
17 *
18 * mathemu support by Roman Zippel
19 * (Note: fpstate in the signal context is completely ignored for the emulator
20 * and the internal floating point format is put on stack)
21 */
22
23/*
24 * ++roman (07/09/96): implemented signal stacks (specially for tosemu on
25 * Atari :-) Current limitation: Only one sigstack can be active at one time.
26 * If a second signal with SA_ONSTACK set arrives while working on a sigstack,
27 * SA_ONSTACK is ignored. This behaviour avoids lots of trouble with nested
28 * signal handlers!
29 */
30
31#include <linux/sched.h>
32#include <linux/mm.h>
33#include <linux/kernel.h>
34#include <linux/signal.h>
35#include <linux/syscalls.h>
36#include <linux/errno.h>
37#include <linux/wait.h>
38#include <linux/ptrace.h>
39#include <linux/unistd.h>
40#include <linux/stddef.h>
41#include <linux/highuid.h>
42#include <linux/tty.h>
43#include <linux/personality.h>
44#include <linux/binfmts.h>
45
46#include <asm/setup.h>
47#include <asm/uaccess.h>
48#include <asm/pgtable.h>
49#include <asm/traps.h>
50#include <asm/ucontext.h>
51
52#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
53
54void ret_from_user_signal(void);
55void ret_from_user_rt_signal(void);
56
57/*
58 * Atomically swap in the new signal mask, and wait for a signal.
59 */
60asmlinkage int
61sys_sigsuspend(int unused0, int unused1, old_sigset_t mask)
62{
63 mask &= _BLOCKABLE;
64 spin_lock_irq(&current->sighand->siglock);
65 current->saved_sigmask = current->blocked;
66 siginitset(&current->blocked, mask);
67 recalc_sigpending();
68 spin_unlock_irq(&current->sighand->siglock);
69
70 current->state = TASK_INTERRUPTIBLE;
71 schedule();
72 set_restore_sigmask();
73
74 return -ERESTARTNOHAND;
75}
76
77asmlinkage int
78sys_sigaction(int sig, const struct old_sigaction __user *act,
79 struct old_sigaction __user *oact)
80{
81 struct k_sigaction new_ka, old_ka;
82 int ret;
83
84 if (act) {
85 old_sigset_t mask;
86 if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||
87 __get_user(new_ka.sa.sa_handler, &act->sa_handler) ||
88 __get_user(new_ka.sa.sa_restorer, &act->sa_restorer) ||
89 __get_user(new_ka.sa.sa_flags, &act->sa_flags) ||
90 __get_user(mask, &act->sa_mask))
91 return -EFAULT;
92 siginitset(&new_ka.sa.sa_mask, mask);
93 }
94
95 ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL);
96
97 if (!ret && oact) {
98 if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||
99 __put_user(old_ka.sa.sa_handler, &oact->sa_handler) ||
100 __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer) ||
101 __put_user(old_ka.sa.sa_flags, &oact->sa_flags) ||
102 __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask))
103 return -EFAULT;
104 }
105
106 return ret;
107}
108
109asmlinkage int
110sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss)
111{
112 return do_sigaltstack(uss, uoss, rdusp());
113}
114
115
116/*
117 * Do a signal return; undo the signal stack.
118 *
119 * Keep the return code on the stack quadword aligned!
120 * That makes the cache flush below easier.
121 */
122
123struct sigframe
124{
125 char __user *pretcode;
126 int sig;
127 int code;
128 struct sigcontext __user *psc;
129 char retcode[8];
130 unsigned long extramask[_NSIG_WORDS-1];
131 struct sigcontext sc;
132};
133
134struct rt_sigframe
135{
136 char __user *pretcode;
137 int sig;
138 struct siginfo __user *pinfo;
139 void __user *puc;
140 char retcode[8];
141 struct siginfo info;
142 struct ucontext uc;
143};
144
145#ifdef CONFIG_FPU
146
147static unsigned char fpu_version = 0; /* version number of fpu, set by setup_frame */
148
149static inline int restore_fpu_state(struct sigcontext *sc)
150{
151 int err = 1;
152
153 if (FPU_IS_EMU) {
154 /* restore registers */
155 memcpy(current->thread.fpcntl, sc->sc_fpcntl, 12);
156 memcpy(current->thread.fp, sc->sc_fpregs, 24);
157 return 0;
158 }
159
160 if (sc->sc_fpstate[0]) {
161 /* Verify the frame format. */
162 if (sc->sc_fpstate[0] != fpu_version)
163 goto out;
164
165 __asm__ volatile (".chip 68k/68881\n\t"
166 "fmovemx %0,%%fp0-%%fp1\n\t"
167 "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t"
168 ".chip 68k"
169 : /* no outputs */
170 : "m" (*sc->sc_fpregs), "m" (*sc->sc_fpcntl));
171 }
172 __asm__ volatile (".chip 68k/68881\n\t"
173 "frestore %0\n\t"
174 ".chip 68k" : : "m" (*sc->sc_fpstate));
175 err = 0;
176
177out:
178 return err;
179}
180
181#define FPCONTEXT_SIZE 216
182#define uc_fpstate uc_filler[0]
183#define uc_formatvec uc_filler[FPCONTEXT_SIZE/4]
184#define uc_extra uc_filler[FPCONTEXT_SIZE/4+1]
185
186static inline int rt_restore_fpu_state(struct ucontext __user *uc)
187{
188 unsigned char fpstate[FPCONTEXT_SIZE];
189 int context_size = 0;
190 fpregset_t fpregs;
191 int err = 1;
192
193 if (FPU_IS_EMU) {
194 /* restore fpu control register */
195 if (__copy_from_user(current->thread.fpcntl,
196 uc->uc_mcontext.fpregs.f_fpcntl, 12))
197 goto out;
198 /* restore all other fpu register */
199 if (__copy_from_user(current->thread.fp,
200 uc->uc_mcontext.fpregs.f_fpregs, 96))
201 goto out;
202 return 0;
203 }
204
205 if (__get_user(*(long *)fpstate, (long __user *)&uc->uc_fpstate))
206 goto out;
207 if (fpstate[0]) {
208 context_size = fpstate[1];
209
210 /* Verify the frame format. */
211 if (fpstate[0] != fpu_version)
212 goto out;
213 if (__copy_from_user(&fpregs, &uc->uc_mcontext.fpregs,
214 sizeof(fpregs)))
215 goto out;
216 __asm__ volatile (".chip 68k/68881\n\t"
217 "fmovemx %0,%%fp0-%%fp7\n\t"
218 "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t"
219 ".chip 68k"
220 : /* no outputs */
221 : "m" (*fpregs.f_fpregs),
222 "m" (*fpregs.f_fpcntl));
223 }
224 if (context_size &&
225 __copy_from_user(fpstate + 4, (long __user *)&uc->uc_fpstate + 1,
226 context_size))
227 goto out;
228 __asm__ volatile (".chip 68k/68881\n\t"
229 "frestore %0\n\t"
230 ".chip 68k" : : "m" (*fpstate));
231 err = 0;
232
233out:
234 return err;
235}
236
237#endif
238
239static inline int
240restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *usc, void __user *fp,
241 int *pd0)
242{
243 int formatvec;
244 struct sigcontext context;
245 int err = 0;
246
247 /* Always make any pending restarted system calls return -EINTR */
248 current_thread_info()->restart_block.fn = do_no_restart_syscall;
249
250 /* get previous context */
251 if (copy_from_user(&context, usc, sizeof(context)))
252 goto badframe;
253
254 /* restore passed registers */
255 regs->d1 = context.sc_d1;
256 regs->a0 = context.sc_a0;
257 regs->a1 = context.sc_a1;
258 ((struct switch_stack *)regs - 1)->a5 = context.sc_a5;
259 regs->sr = (regs->sr & 0xff00) | (context.sc_sr & 0xff);
260 regs->pc = context.sc_pc;
261 regs->orig_d0 = -1; /* disable syscall checks */
262 wrusp(context.sc_usp);
263 formatvec = context.sc_formatvec;
264 regs->format = formatvec >> 12;
265 regs->vector = formatvec & 0xfff;
266
267#ifdef CONFIG_FPU
268 err = restore_fpu_state(&context);
269#endif
270
271 *pd0 = context.sc_d0;
272 return err;
273
274badframe:
275 return 1;
276}
277
278static inline int
279rt_restore_ucontext(struct pt_regs *regs, struct switch_stack *sw,
280 struct ucontext __user *uc, int *pd0)
281{
282 int temp;
283 greg_t __user *gregs = uc->uc_mcontext.gregs;
284 unsigned long usp;
285 int err;
286
287 /* Always make any pending restarted system calls return -EINTR */
288 current_thread_info()->restart_block.fn = do_no_restart_syscall;
289
290 err = __get_user(temp, &uc->uc_mcontext.version);
291 if (temp != MCONTEXT_VERSION)
292 goto badframe;
293 /* restore passed registers */
294 err |= __get_user(regs->d0, &gregs[0]);
295 err |= __get_user(regs->d1, &gregs[1]);
296 err |= __get_user(regs->d2, &gregs[2]);
297 err |= __get_user(regs->d3, &gregs[3]);
298 err |= __get_user(regs->d4, &gregs[4]);
299 err |= __get_user(regs->d5, &gregs[5]);
300 err |= __get_user(sw->d6, &gregs[6]);
301 err |= __get_user(sw->d7, &gregs[7]);
302 err |= __get_user(regs->a0, &gregs[8]);
303 err |= __get_user(regs->a1, &gregs[9]);
304 err |= __get_user(regs->a2, &gregs[10]);
305 err |= __get_user(sw->a3, &gregs[11]);
306 err |= __get_user(sw->a4, &gregs[12]);
307 err |= __get_user(sw->a5, &gregs[13]);
308 err |= __get_user(sw->a6, &gregs[14]);
309 err |= __get_user(usp, &gregs[15]);
310 wrusp(usp);
311 err |= __get_user(regs->pc, &gregs[16]);
312 err |= __get_user(temp, &gregs[17]);
313 regs->sr = (regs->sr & 0xff00) | (temp & 0xff);
314 regs->orig_d0 = -1; /* disable syscall checks */
315 regs->format = temp >> 12;
316 regs->vector = temp & 0xfff;
317
318 if (do_sigaltstack(&uc->uc_stack, NULL, usp) == -EFAULT)
319 goto badframe;
320
321 *pd0 = regs->d0;
322 return err;
323
324badframe:
325 return 1;
326}
327
328asmlinkage int do_sigreturn(unsigned long __unused)
329{
330 struct switch_stack *sw = (struct switch_stack *) &__unused;
331 struct pt_regs *regs = (struct pt_regs *) (sw + 1);
332 unsigned long usp = rdusp();
333 struct sigframe __user *frame = (struct sigframe __user *)(usp - 4);
334 sigset_t set;
335 int d0;
336
337 if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
338 goto badframe;
339 if (__get_user(set.sig[0], &frame->sc.sc_mask) ||
340 (_NSIG_WORDS > 1 &&
341 __copy_from_user(&set.sig[1], &frame->extramask,
342 sizeof(frame->extramask))))
343 goto badframe;
344
345 sigdelsetmask(&set, ~_BLOCKABLE);
346 spin_lock_irq(&current->sighand->siglock);
347 current->blocked = set;
348 recalc_sigpending();
349 spin_unlock_irq(&current->sighand->siglock);
350
351 if (restore_sigcontext(regs, &frame->sc, frame + 1, &d0))
352 goto badframe;
353 return d0;
354
355badframe:
356 force_sig(SIGSEGV, current);
357 return 0;
358}
359
360asmlinkage int do_rt_sigreturn(unsigned long __unused)
361{
362 struct switch_stack *sw = (struct switch_stack *) &__unused;
363 struct pt_regs *regs = (struct pt_regs *) (sw + 1);
364 unsigned long usp = rdusp();
365 struct rt_sigframe __user *frame = (struct rt_sigframe __user *)(usp - 4);
366 sigset_t set;
367 int d0;
368
369 if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
370 goto badframe;
371 if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set)))
372 goto badframe;
373
374 sigdelsetmask(&set, ~_BLOCKABLE);
375 spin_lock_irq(&current->sighand->siglock);
376 current->blocked = set;
377 recalc_sigpending();
378 spin_unlock_irq(&current->sighand->siglock);
379
380 if (rt_restore_ucontext(regs, sw, &frame->uc, &d0))
381 goto badframe;
382 return d0;
383
384badframe:
385 force_sig(SIGSEGV, current);
386 return 0;
387}
388
389#ifdef CONFIG_FPU
390/*
391 * Set up a signal frame.
392 */
393
394static inline void save_fpu_state(struct sigcontext *sc, struct pt_regs *regs)
395{
396 if (FPU_IS_EMU) {
397 /* save registers */
398 memcpy(sc->sc_fpcntl, current->thread.fpcntl, 12);
399 memcpy(sc->sc_fpregs, current->thread.fp, 24);
400 return;
401 }
402
403 __asm__ volatile (".chip 68k/68881\n\t"
404 "fsave %0\n\t"
405 ".chip 68k"
406 : : "m" (*sc->sc_fpstate) : "memory");
407
408 if (sc->sc_fpstate[0]) {
409 fpu_version = sc->sc_fpstate[0];
410 __asm__ volatile (".chip 68k/68881\n\t"
411 "fmovemx %%fp0-%%fp1,%0\n\t"
412 "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t"
413 ".chip 68k"
414 : "=m" (*sc->sc_fpregs),
415 "=m" (*sc->sc_fpcntl)
416 : /* no inputs */
417 : "memory");
418 }
419}
420
421static inline int rt_save_fpu_state(struct ucontext __user *uc, struct pt_regs *regs)
422{
423 unsigned char fpstate[FPCONTEXT_SIZE];
424 int context_size = 0;
425 int err = 0;
426
427 if (FPU_IS_EMU) {
428 /* save fpu control register */
429 err |= copy_to_user(uc->uc_mcontext.fpregs.f_pcntl,
430 current->thread.fpcntl, 12);
431 /* save all other fpu register */
432 err |= copy_to_user(uc->uc_mcontext.fpregs.f_fpregs,
433 current->thread.fp, 96);
434 return err;
435 }
436
437 __asm__ volatile (".chip 68k/68881\n\t"
438 "fsave %0\n\t"
439 ".chip 68k"
440 : : "m" (*fpstate) : "memory");
441
442 err |= __put_user(*(long *)fpstate, (long __user *)&uc->uc_fpstate);
443 if (fpstate[0]) {
444 fpregset_t fpregs;
445 context_size = fpstate[1];
446 fpu_version = fpstate[0];
447 __asm__ volatile (".chip 68k/68881\n\t"
448 "fmovemx %%fp0-%%fp7,%0\n\t"
449 "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t"
450 ".chip 68k"
451 : "=m" (*fpregs.f_fpregs),
452 "=m" (*fpregs.f_fpcntl)
453 : /* no inputs */
454 : "memory");
455 err |= copy_to_user(&uc->uc_mcontext.fpregs, &fpregs,
456 sizeof(fpregs));
457 }
458 if (context_size)
459 err |= copy_to_user((long __user *)&uc->uc_fpstate + 1, fpstate + 4,
460 context_size);
461 return err;
462}
463
464#endif
465
466static void setup_sigcontext(struct sigcontext *sc, struct pt_regs *regs,
467 unsigned long mask)
468{
469 sc->sc_mask = mask;
470 sc->sc_usp = rdusp();
471 sc->sc_d0 = regs->d0;
472 sc->sc_d1 = regs->d1;
473 sc->sc_a0 = regs->a0;
474 sc->sc_a1 = regs->a1;
475 sc->sc_a5 = ((struct switch_stack *)regs - 1)->a5;
476 sc->sc_sr = regs->sr;
477 sc->sc_pc = regs->pc;
478 sc->sc_formatvec = regs->format << 12 | regs->vector;
479#ifdef CONFIG_FPU
480 save_fpu_state(sc, regs);
481#endif
482}
483
484static inline int rt_setup_ucontext(struct ucontext __user *uc, struct pt_regs *regs)
485{
486 struct switch_stack *sw = (struct switch_stack *)regs - 1;
487 greg_t __user *gregs = uc->uc_mcontext.gregs;
488 int err = 0;
489
490 err |= __put_user(MCONTEXT_VERSION, &uc->uc_mcontext.version);
491 err |= __put_user(regs->d0, &gregs[0]);
492 err |= __put_user(regs->d1, &gregs[1]);
493 err |= __put_user(regs->d2, &gregs[2]);
494 err |= __put_user(regs->d3, &gregs[3]);
495 err |= __put_user(regs->d4, &gregs[4]);
496 err |= __put_user(regs->d5, &gregs[5]);
497 err |= __put_user(sw->d6, &gregs[6]);
498 err |= __put_user(sw->d7, &gregs[7]);
499 err |= __put_user(regs->a0, &gregs[8]);
500 err |= __put_user(regs->a1, &gregs[9]);
501 err |= __put_user(regs->a2, &gregs[10]);
502 err |= __put_user(sw->a3, &gregs[11]);
503 err |= __put_user(sw->a4, &gregs[12]);
504 err |= __put_user(sw->a5, &gregs[13]);
505 err |= __put_user(sw->a6, &gregs[14]);
506 err |= __put_user(rdusp(), &gregs[15]);
507 err |= __put_user(regs->pc, &gregs[16]);
508 err |= __put_user(regs->sr, &gregs[17]);
509#ifdef CONFIG_FPU
510 err |= rt_save_fpu_state(uc, regs);
511#endif
512 return err;
513}
514
515static inline void __user *
516get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size)
517{
518 unsigned long usp;
519
520 /* Default to using normal stack. */
521 usp = rdusp();
522
523 /* This is the X/Open sanctioned signal stack switching. */
524 if (ka->sa.sa_flags & SA_ONSTACK) {
525 if (!sas_ss_flags(usp))
526 usp = current->sas_ss_sp + current->sas_ss_size;
527 }
528 return (void __user *)((usp - frame_size) & -8UL);
529}
530
531static int setup_frame (int sig, struct k_sigaction *ka,
532 sigset_t *set, struct pt_regs *regs)
533{
534 struct sigframe __user *frame;
535 struct sigcontext context;
536 int err = 0;
537
538 frame = get_sigframe(ka, regs, sizeof(*frame));
539
540 err |= __put_user((current_thread_info()->exec_domain
541 && current_thread_info()->exec_domain->signal_invmap
542 && sig < 32
543 ? current_thread_info()->exec_domain->signal_invmap[sig]
544 : sig),
545 &frame->sig);
546
547 err |= __put_user(regs->vector, &frame->code);
548 err |= __put_user(&frame->sc, &frame->psc);
549
550 if (_NSIG_WORDS > 1)
551 err |= copy_to_user(frame->extramask, &set->sig[1],
552 sizeof(frame->extramask));
553
554 setup_sigcontext(&context, regs, set->sig[0]);
555 err |= copy_to_user (&frame->sc, &context, sizeof(context));
556
557 /* Set up to return from userspace. */
558 err |= __put_user((void *) ret_from_user_signal, &frame->pretcode);
559
560 if (err)
561 goto give_sigsegv;
562
563 /* Set up registers for signal handler */
564 wrusp ((unsigned long) frame);
565 regs->pc = (unsigned long) ka->sa.sa_handler;
566 ((struct switch_stack *)regs - 1)->a5 = current->mm->start_data;
567 regs->format = 0x4; /*set format byte to make stack appear modulo 4
568 which it will be when doing the rte */
569
570adjust_stack:
571 /* Prepare to skip over the extra stuff in the exception frame. */
572 if (regs->stkadj) {
573 struct pt_regs *tregs =
574 (struct pt_regs *)((ulong)regs + regs->stkadj);
575#if defined(DEBUG)
576 printk(KERN_DEBUG "Performing stackadjust=%04x\n", regs->stkadj);
577#endif
578 /* This must be copied with decreasing addresses to
579 handle overlaps. */
580 tregs->vector = 0;
581 tregs->format = 0;
582 tregs->pc = regs->pc;
583 tregs->sr = regs->sr;
584 }
585 return err;
586
587give_sigsegv:
588 force_sigsegv(sig, current);
589 goto adjust_stack;
590}
591
592static int setup_rt_frame (int sig, struct k_sigaction *ka, siginfo_t *info,
593 sigset_t *set, struct pt_regs *regs)
594{
595 struct rt_sigframe __user *frame;
596 int err = 0;
597
598 frame = get_sigframe(ka, regs, sizeof(*frame));
599
600 err |= __put_user((current_thread_info()->exec_domain
601 && current_thread_info()->exec_domain->signal_invmap
602 && sig < 32
603 ? current_thread_info()->exec_domain->signal_invmap[sig]
604 : sig),
605 &frame->sig);
606 err |= __put_user(&frame->info, &frame->pinfo);
607 err |= __put_user(&frame->uc, &frame->puc);
608 err |= copy_siginfo_to_user(&frame->info, info);
609
610 /* Create the ucontext. */
611 err |= __put_user(0, &frame->uc.uc_flags);
612 err |= __put_user(NULL, &frame->uc.uc_link);
613 err |= __put_user((void __user *)current->sas_ss_sp,
614 &frame->uc.uc_stack.ss_sp);
615 err |= __put_user(sas_ss_flags(rdusp()),
616 &frame->uc.uc_stack.ss_flags);
617 err |= __put_user(current->sas_ss_size, &frame->uc.uc_stack.ss_size);
618 err |= rt_setup_ucontext(&frame->uc, regs);
619 err |= copy_to_user (&frame->uc.uc_sigmask, set, sizeof(*set));
620
621 /* Set up to return from userspace. */
622 err |= __put_user((void *) ret_from_user_rt_signal, &frame->pretcode);
623
624 if (err)
625 goto give_sigsegv;
626
627 /* Set up registers for signal handler */
628 wrusp ((unsigned long) frame);
629 regs->pc = (unsigned long) ka->sa.sa_handler;
630 ((struct switch_stack *)regs - 1)->a5 = current->mm->start_data;
631 regs->format = 0x4; /*set format byte to make stack appear modulo 4
632 which it will be when doing the rte */
633
634adjust_stack:
635 /* Prepare to skip over the extra stuff in the exception frame. */
636 if (regs->stkadj) {
637 struct pt_regs *tregs =
638 (struct pt_regs *)((ulong)regs + regs->stkadj);
639#if defined(DEBUG)
640 printk(KERN_DEBUG "Performing stackadjust=%04x\n", regs->stkadj);
641#endif
642 /* This must be copied with decreasing addresses to
643 handle overlaps. */
644 tregs->vector = 0;
645 tregs->format = 0;
646 tregs->pc = regs->pc;
647 tregs->sr = regs->sr;
648 }
649 return err;
650
651give_sigsegv:
652 force_sigsegv(sig, current);
653 goto adjust_stack;
654}
655
656static inline void
657handle_restart(struct pt_regs *regs, struct k_sigaction *ka, int has_handler)
658{
659 switch (regs->d0) {
660 case -ERESTARTNOHAND:
661 if (!has_handler)
662 goto do_restart;
663 regs->d0 = -EINTR;
664 break;
665
666 case -ERESTART_RESTARTBLOCK:
667 if (!has_handler) {
668 regs->d0 = __NR_restart_syscall;
669 regs->pc -= 2;
670 break;
671 }
672 regs->d0 = -EINTR;
673 break;
674
675 case -ERESTARTSYS:
676 if (has_handler && !(ka->sa.sa_flags & SA_RESTART)) {
677 regs->d0 = -EINTR;
678 break;
679 }
680 /* fallthrough */
681 case -ERESTARTNOINTR:
682 do_restart:
683 regs->d0 = regs->orig_d0;
684 regs->pc -= 2;
685 break;
686 }
687}
688
689/*
690 * OK, we're invoking a handler
691 */
692static void
693handle_signal(int sig, struct k_sigaction *ka, siginfo_t *info,
694 sigset_t *oldset, struct pt_regs *regs)
695{
696 int err;
697 /* are we from a system call? */
698 if (regs->orig_d0 >= 0)
699 /* If so, check system call restarting.. */
700 handle_restart(regs, ka, 1);
701
702 /* set up the stack frame */
703 if (ka->sa.sa_flags & SA_SIGINFO)
704 err = setup_rt_frame(sig, ka, info, oldset, regs);
705 else
706 err = setup_frame(sig, ka, oldset, regs);
707
708 if (err)
709 return;
710
711 spin_lock_irq(&current->sighand->siglock);
712 sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
713 if (!(ka->sa.sa_flags & SA_NODEFER))
714 sigaddset(&current->blocked,sig);
715 recalc_sigpending();
716 spin_unlock_irq(&current->sighand->siglock);
717
718 clear_thread_flag(TIF_RESTORE_SIGMASK);
719}
720
721/*
722 * Note that 'init' is a special process: it doesn't get signals it doesn't
723 * want to handle. Thus you cannot kill init even with a SIGKILL even by
724 * mistake.
725 */
726asmlinkage void do_signal(struct pt_regs *regs)
727{
728 struct k_sigaction ka;
729 siginfo_t info;
730 int signr;
731 sigset_t *oldset;
732
733 /*
734 * We want the common case to go fast, which
735 * is why we may in certain cases get here from
736 * kernel mode. Just return without doing anything
737 * if so.
738 */
739 if (!user_mode(regs))
740 return;
741
742 if (test_thread_flag(TIF_RESTORE_SIGMASK))
743 oldset = &current->saved_sigmask;
744 else
745 oldset = &current->blocked;
746
747 signr = get_signal_to_deliver(&info, &ka, regs, NULL);
748 if (signr > 0) {
749 /* Whee! Actually deliver the signal. */
750 handle_signal(signr, &ka, &info, oldset, regs);
751 return;
752 }
753
754 /* Did we come from a system call? */
755 if (regs->orig_d0 >= 0) {
756 /* Restart the system call - no handlers present */
757 handle_restart(regs, NULL, 0);
758 }
759
760 /* If there's no signal to deliver, we just restore the saved mask. */
761 if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
762 clear_thread_flag(TIF_RESTORE_SIGMASK);
763 sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
764 }
765}
diff --git a/arch/m68k/kernel/sys_m68k.c b/arch/m68k/kernel/sys_m68k.c
index 3db2e7f902aa..63013df33584 100644
--- a/arch/m68k/kernel/sys_m68k.c
+++ b/arch/m68k/kernel/sys_m68k.c
@@ -1,546 +1,5 @@
1/* 1#ifdef CONFIG_MMU
2 * linux/arch/m68k/kernel/sys_m68k.c 2#include "sys_m68k_mm.c"
3 * 3#else
4 * This file contains various random system calls that 4#include "sys_m68k_no.c"
5 * have a non-standard calling sequence on the Linux/m68k 5#endif
6 * platform.
7 */
8
9#include <linux/capability.h>
10#include <linux/errno.h>
11#include <linux/sched.h>
12#include <linux/mm.h>
13#include <linux/fs.h>
14#include <linux/smp.h>
15#include <linux/sem.h>
16#include <linux/msg.h>
17#include <linux/shm.h>
18#include <linux/stat.h>
19#include <linux/syscalls.h>
20#include <linux/mman.h>
21#include <linux/file.h>
22#include <linux/ipc.h>
23
24#include <asm/setup.h>
25#include <asm/uaccess.h>
26#include <asm/cachectl.h>
27#include <asm/traps.h>
28#include <asm/page.h>
29#include <asm/unistd.h>
30#include <linux/elf.h>
31#include <asm/tlb.h>
32
33asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address,
34 unsigned long error_code);
35
36asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
37 unsigned long prot, unsigned long flags,
38 unsigned long fd, unsigned long pgoff)
39{
40 /*
41 * This is wrong for sun3 - there PAGE_SIZE is 8Kb,
42 * so we need to shift the argument down by 1; m68k mmap64(3)
43 * (in libc) expects the last argument of mmap2 in 4Kb units.
44 */
45 return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff);
46}
47
48/* Convert virtual (user) address VADDR to physical address PADDR */
49#define virt_to_phys_040(vaddr) \
50({ \
51 unsigned long _mmusr, _paddr; \
52 \
53 __asm__ __volatile__ (".chip 68040\n\t" \
54 "ptestr (%1)\n\t" \
55 "movec %%mmusr,%0\n\t" \
56 ".chip 68k" \
57 : "=r" (_mmusr) \
58 : "a" (vaddr)); \
59 _paddr = (_mmusr & MMU_R_040) ? (_mmusr & PAGE_MASK) : 0; \
60 _paddr; \
61})
62
63static inline int
64cache_flush_040 (unsigned long addr, int scope, int cache, unsigned long len)
65{
66 unsigned long paddr, i;
67
68 switch (scope)
69 {
70 case FLUSH_SCOPE_ALL:
71 switch (cache)
72 {
73 case FLUSH_CACHE_DATA:
74 /* This nop is needed for some broken versions of the 68040. */
75 __asm__ __volatile__ ("nop\n\t"
76 ".chip 68040\n\t"
77 "cpusha %dc\n\t"
78 ".chip 68k");
79 break;
80 case FLUSH_CACHE_INSN:
81 __asm__ __volatile__ ("nop\n\t"
82 ".chip 68040\n\t"
83 "cpusha %ic\n\t"
84 ".chip 68k");
85 break;
86 default:
87 case FLUSH_CACHE_BOTH:
88 __asm__ __volatile__ ("nop\n\t"
89 ".chip 68040\n\t"
90 "cpusha %bc\n\t"
91 ".chip 68k");
92 break;
93 }
94 break;
95
96 case FLUSH_SCOPE_LINE:
97 /* Find the physical address of the first mapped page in the
98 address range. */
99 if ((paddr = virt_to_phys_040(addr))) {
100 paddr += addr & ~(PAGE_MASK | 15);
101 len = (len + (addr & 15) + 15) >> 4;
102 } else {
103 unsigned long tmp = PAGE_SIZE - (addr & ~PAGE_MASK);
104
105 if (len <= tmp)
106 return 0;
107 addr += tmp;
108 len -= tmp;
109 tmp = PAGE_SIZE;
110 for (;;)
111 {
112 if ((paddr = virt_to_phys_040(addr)))
113 break;
114 if (len <= tmp)
115 return 0;
116 addr += tmp;
117 len -= tmp;
118 }
119 len = (len + 15) >> 4;
120 }
121 i = (PAGE_SIZE - (paddr & ~PAGE_MASK)) >> 4;
122 while (len--)
123 {
124 switch (cache)
125 {
126 case FLUSH_CACHE_DATA:
127 __asm__ __volatile__ ("nop\n\t"
128 ".chip 68040\n\t"
129 "cpushl %%dc,(%0)\n\t"
130 ".chip 68k"
131 : : "a" (paddr));
132 break;
133 case FLUSH_CACHE_INSN:
134 __asm__ __volatile__ ("nop\n\t"
135 ".chip 68040\n\t"
136 "cpushl %%ic,(%0)\n\t"
137 ".chip 68k"
138 : : "a" (paddr));
139 break;
140 default:
141 case FLUSH_CACHE_BOTH:
142 __asm__ __volatile__ ("nop\n\t"
143 ".chip 68040\n\t"
144 "cpushl %%bc,(%0)\n\t"
145 ".chip 68k"
146 : : "a" (paddr));
147 break;
148 }
149 if (!--i && len)
150 {
151 /*
152 * No need to page align here since it is done by
153 * virt_to_phys_040().
154 */
155 addr += PAGE_SIZE;
156 i = PAGE_SIZE / 16;
157 /* Recompute physical address when crossing a page
158 boundary. */
159 for (;;)
160 {
161 if ((paddr = virt_to_phys_040(addr)))
162 break;
163 if (len <= i)
164 return 0;
165 len -= i;
166 addr += PAGE_SIZE;
167 }
168 }
169 else
170 paddr += 16;
171 }
172 break;
173
174 default:
175 case FLUSH_SCOPE_PAGE:
176 len += (addr & ~PAGE_MASK) + (PAGE_SIZE - 1);
177 for (len >>= PAGE_SHIFT; len--; addr += PAGE_SIZE)
178 {
179 if (!(paddr = virt_to_phys_040(addr)))
180 continue;
181 switch (cache)
182 {
183 case FLUSH_CACHE_DATA:
184 __asm__ __volatile__ ("nop\n\t"
185 ".chip 68040\n\t"
186 "cpushp %%dc,(%0)\n\t"
187 ".chip 68k"
188 : : "a" (paddr));
189 break;
190 case FLUSH_CACHE_INSN:
191 __asm__ __volatile__ ("nop\n\t"
192 ".chip 68040\n\t"
193 "cpushp %%ic,(%0)\n\t"
194 ".chip 68k"
195 : : "a" (paddr));
196 break;
197 default:
198 case FLUSH_CACHE_BOTH:
199 __asm__ __volatile__ ("nop\n\t"
200 ".chip 68040\n\t"
201 "cpushp %%bc,(%0)\n\t"
202 ".chip 68k"
203 : : "a" (paddr));
204 break;
205 }
206 }
207 break;
208 }
209 return 0;
210}
211
212#define virt_to_phys_060(vaddr) \
213({ \
214 unsigned long paddr; \
215 __asm__ __volatile__ (".chip 68060\n\t" \
216 "plpar (%0)\n\t" \
217 ".chip 68k" \
218 : "=a" (paddr) \
219 : "0" (vaddr)); \
220 (paddr); /* XXX */ \
221})
222
223static inline int
224cache_flush_060 (unsigned long addr, int scope, int cache, unsigned long len)
225{
226 unsigned long paddr, i;
227
228 /*
229 * 68060 manual says:
230 * cpush %dc : flush DC, remains valid (with our %cacr setup)
231 * cpush %ic : invalidate IC
232 * cpush %bc : flush DC + invalidate IC
233 */
234 switch (scope)
235 {
236 case FLUSH_SCOPE_ALL:
237 switch (cache)
238 {
239 case FLUSH_CACHE_DATA:
240 __asm__ __volatile__ (".chip 68060\n\t"
241 "cpusha %dc\n\t"
242 ".chip 68k");
243 break;
244 case FLUSH_CACHE_INSN:
245 __asm__ __volatile__ (".chip 68060\n\t"
246 "cpusha %ic\n\t"
247 ".chip 68k");
248 break;
249 default:
250 case FLUSH_CACHE_BOTH:
251 __asm__ __volatile__ (".chip 68060\n\t"
252 "cpusha %bc\n\t"
253 ".chip 68k");
254 break;
255 }
256 break;
257
258 case FLUSH_SCOPE_LINE:
259 /* Find the physical address of the first mapped page in the
260 address range. */
261 len += addr & 15;
262 addr &= -16;
263 if (!(paddr = virt_to_phys_060(addr))) {
264 unsigned long tmp = PAGE_SIZE - (addr & ~PAGE_MASK);
265
266 if (len <= tmp)
267 return 0;
268 addr += tmp;
269 len -= tmp;
270 tmp = PAGE_SIZE;
271 for (;;)
272 {
273 if ((paddr = virt_to_phys_060(addr)))
274 break;
275 if (len <= tmp)
276 return 0;
277 addr += tmp;
278 len -= tmp;
279 }
280 }
281 len = (len + 15) >> 4;
282 i = (PAGE_SIZE - (paddr & ~PAGE_MASK)) >> 4;
283 while (len--)
284 {
285 switch (cache)
286 {
287 case FLUSH_CACHE_DATA:
288 __asm__ __volatile__ (".chip 68060\n\t"
289 "cpushl %%dc,(%0)\n\t"
290 ".chip 68k"
291 : : "a" (paddr));
292 break;
293 case FLUSH_CACHE_INSN:
294 __asm__ __volatile__ (".chip 68060\n\t"
295 "cpushl %%ic,(%0)\n\t"
296 ".chip 68k"
297 : : "a" (paddr));
298 break;
299 default:
300 case FLUSH_CACHE_BOTH:
301 __asm__ __volatile__ (".chip 68060\n\t"
302 "cpushl %%bc,(%0)\n\t"
303 ".chip 68k"
304 : : "a" (paddr));
305 break;
306 }
307 if (!--i && len)
308 {
309
310 /*
311 * We just want to jump to the first cache line
312 * in the next page.
313 */
314 addr += PAGE_SIZE;
315 addr &= PAGE_MASK;
316
317 i = PAGE_SIZE / 16;
318 /* Recompute physical address when crossing a page
319 boundary. */
320 for (;;)
321 {
322 if ((paddr = virt_to_phys_060(addr)))
323 break;
324 if (len <= i)
325 return 0;
326 len -= i;
327 addr += PAGE_SIZE;
328 }
329 }
330 else
331 paddr += 16;
332 }
333 break;
334
335 default:
336 case FLUSH_SCOPE_PAGE:
337 len += (addr & ~PAGE_MASK) + (PAGE_SIZE - 1);
338 addr &= PAGE_MASK; /* Workaround for bug in some
339 revisions of the 68060 */
340 for (len >>= PAGE_SHIFT; len--; addr += PAGE_SIZE)
341 {
342 if (!(paddr = virt_to_phys_060(addr)))
343 continue;
344 switch (cache)
345 {
346 case FLUSH_CACHE_DATA:
347 __asm__ __volatile__ (".chip 68060\n\t"
348 "cpushp %%dc,(%0)\n\t"
349 ".chip 68k"
350 : : "a" (paddr));
351 break;
352 case FLUSH_CACHE_INSN:
353 __asm__ __volatile__ (".chip 68060\n\t"
354 "cpushp %%ic,(%0)\n\t"
355 ".chip 68k"
356 : : "a" (paddr));
357 break;
358 default:
359 case FLUSH_CACHE_BOTH:
360 __asm__ __volatile__ (".chip 68060\n\t"
361 "cpushp %%bc,(%0)\n\t"
362 ".chip 68k"
363 : : "a" (paddr));
364 break;
365 }
366 }
367 break;
368 }
369 return 0;
370}
371
372/* sys_cacheflush -- flush (part of) the processor cache. */
373asmlinkage int
374sys_cacheflush (unsigned long addr, int scope, int cache, unsigned long len)
375{
376 struct vm_area_struct *vma;
377 int ret = -EINVAL;
378
379 if (scope < FLUSH_SCOPE_LINE || scope > FLUSH_SCOPE_ALL ||
380 cache & ~FLUSH_CACHE_BOTH)
381 goto out;
382
383 if (scope == FLUSH_SCOPE_ALL) {
384 /* Only the superuser may explicitly flush the whole cache. */
385 ret = -EPERM;
386 if (!capable(CAP_SYS_ADMIN))
387 goto out;
388 } else {
389 /*
390 * Verify that the specified address region actually belongs
391 * to this process.
392 */
393 vma = find_vma (current->mm, addr);
394 ret = -EINVAL;
395 /* Check for overflow. */
396 if (addr + len < addr)
397 goto out;
398 if (vma == NULL || addr < vma->vm_start || addr + len > vma->vm_end)
399 goto out;
400 }
401
402 if (CPU_IS_020_OR_030) {
403 if (scope == FLUSH_SCOPE_LINE && len < 256) {
404 unsigned long cacr;
405 __asm__ ("movec %%cacr, %0" : "=r" (cacr));
406 if (cache & FLUSH_CACHE_INSN)
407 cacr |= 4;
408 if (cache & FLUSH_CACHE_DATA)
409 cacr |= 0x400;
410 len >>= 2;
411 while (len--) {
412 __asm__ __volatile__ ("movec %1, %%caar\n\t"
413 "movec %0, %%cacr"
414 : /* no outputs */
415 : "r" (cacr), "r" (addr));
416 addr += 4;
417 }
418 } else {
419 /* Flush the whole cache, even if page granularity requested. */
420 unsigned long cacr;
421 __asm__ ("movec %%cacr, %0" : "=r" (cacr));
422 if (cache & FLUSH_CACHE_INSN)
423 cacr |= 8;
424 if (cache & FLUSH_CACHE_DATA)
425 cacr |= 0x800;
426 __asm__ __volatile__ ("movec %0, %%cacr" : : "r" (cacr));
427 }
428 ret = 0;
429 goto out;
430 } else {
431 /*
432 * 040 or 060: don't blindly trust 'scope', someone could
433 * try to flush a few megs of memory.
434 */
435
436 if (len>=3*PAGE_SIZE && scope<FLUSH_SCOPE_PAGE)
437 scope=FLUSH_SCOPE_PAGE;
438 if (len>=10*PAGE_SIZE && scope<FLUSH_SCOPE_ALL)
439 scope=FLUSH_SCOPE_ALL;
440 if (CPU_IS_040) {
441 ret = cache_flush_040 (addr, scope, cache, len);
442 } else if (CPU_IS_060) {
443 ret = cache_flush_060 (addr, scope, cache, len);
444 }
445 }
446out:
447 return ret;
448}
449
450asmlinkage int sys_getpagesize(void)
451{
452 return PAGE_SIZE;
453}
454
455/*
456 * Do a system call from kernel instead of calling sys_execve so we
457 * end up with proper pt_regs.
458 */
459int kernel_execve(const char *filename,
460 const char *const argv[],
461 const char *const envp[])
462{
463 register long __res asm ("%d0") = __NR_execve;
464 register long __a asm ("%d1") = (long)(filename);
465 register long __b asm ("%d2") = (long)(argv);
466 register long __c asm ("%d3") = (long)(envp);
467 asm volatile ("trap #0" : "+d" (__res)
468 : "d" (__a), "d" (__b), "d" (__c));
469 return __res;
470}
471
472asmlinkage unsigned long sys_get_thread_area(void)
473{
474 return current_thread_info()->tp_value;
475}
476
477asmlinkage int sys_set_thread_area(unsigned long tp)
478{
479 current_thread_info()->tp_value = tp;
480 return 0;
481}
482
483/* This syscall gets its arguments in A0 (mem), D2 (oldval) and
484 D1 (newval). */
485asmlinkage int
486sys_atomic_cmpxchg_32(unsigned long newval, int oldval, int d3, int d4, int d5,
487 unsigned long __user * mem)
488{
489 /* This was borrowed from ARM's implementation. */
490 for (;;) {
491 struct mm_struct *mm = current->mm;
492 pgd_t *pgd;
493 pmd_t *pmd;
494 pte_t *pte;
495 spinlock_t *ptl;
496 unsigned long mem_value;
497
498 down_read(&mm->mmap_sem);
499 pgd = pgd_offset(mm, (unsigned long)mem);
500 if (!pgd_present(*pgd))
501 goto bad_access;
502 pmd = pmd_offset(pgd, (unsigned long)mem);
503 if (!pmd_present(*pmd))
504 goto bad_access;
505 pte = pte_offset_map_lock(mm, pmd, (unsigned long)mem, &ptl);
506 if (!pte_present(*pte) || !pte_dirty(*pte)
507 || !pte_write(*pte)) {
508 pte_unmap_unlock(pte, ptl);
509 goto bad_access;
510 }
511
512 mem_value = *mem;
513 if (mem_value == oldval)
514 *mem = newval;
515
516 pte_unmap_unlock(pte, ptl);
517 up_read(&mm->mmap_sem);
518 return mem_value;
519
520 bad_access:
521 up_read(&mm->mmap_sem);
522 /* This is not necessarily a bad access, we can get here if
523 a memory we're trying to write to should be copied-on-write.
524 Make the kernel do the necessary page stuff, then re-iterate.
525 Simulate a write access fault to do that. */
526 {
527 /* The first argument of the function corresponds to
528 D1, which is the first field of struct pt_regs. */
529 struct pt_regs *fp = (struct pt_regs *)&newval;
530
531 /* '3' is an RMW flag. */
532 if (do_page_fault(fp, (unsigned long)mem, 3))
533 /* If the do_page_fault() failed, we don't
534 have anything meaningful to return.
535 There should be a SIGSEGV pending for
536 the process. */
537 return 0xdeadbeef;
538 }
539 }
540}
541
542asmlinkage int sys_atomic_barrier(void)
543{
544 /* no code needed for uniprocs */
545 return 0;
546}
diff --git a/arch/m68k/kernel/sys_m68k_mm.c b/arch/m68k/kernel/sys_m68k_mm.c
new file mode 100644
index 000000000000..3db2e7f902aa
--- /dev/null
+++ b/arch/m68k/kernel/sys_m68k_mm.c
@@ -0,0 +1,546 @@
1/*
2 * linux/arch/m68k/kernel/sys_m68k.c
3 *
4 * This file contains various random system calls that
5 * have a non-standard calling sequence on the Linux/m68k
6 * platform.
7 */
8
9#include <linux/capability.h>
10#include <linux/errno.h>
11#include <linux/sched.h>
12#include <linux/mm.h>
13#include <linux/fs.h>
14#include <linux/smp.h>
15#include <linux/sem.h>
16#include <linux/msg.h>
17#include <linux/shm.h>
18#include <linux/stat.h>
19#include <linux/syscalls.h>
20#include <linux/mman.h>
21#include <linux/file.h>
22#include <linux/ipc.h>
23
24#include <asm/setup.h>
25#include <asm/uaccess.h>
26#include <asm/cachectl.h>
27#include <asm/traps.h>
28#include <asm/page.h>
29#include <asm/unistd.h>
30#include <linux/elf.h>
31#include <asm/tlb.h>
32
33asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address,
34 unsigned long error_code);
35
36asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
37 unsigned long prot, unsigned long flags,
38 unsigned long fd, unsigned long pgoff)
39{
40 /*
41 * This is wrong for sun3 - there PAGE_SIZE is 8Kb,
42 * so we need to shift the argument down by 1; m68k mmap64(3)
43 * (in libc) expects the last argument of mmap2 in 4Kb units.
44 */
45 return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff);
46}
47
48/* Convert virtual (user) address VADDR to physical address PADDR */
49#define virt_to_phys_040(vaddr) \
50({ \
51 unsigned long _mmusr, _paddr; \
52 \
53 __asm__ __volatile__ (".chip 68040\n\t" \
54 "ptestr (%1)\n\t" \
55 "movec %%mmusr,%0\n\t" \
56 ".chip 68k" \
57 : "=r" (_mmusr) \
58 : "a" (vaddr)); \
59 _paddr = (_mmusr & MMU_R_040) ? (_mmusr & PAGE_MASK) : 0; \
60 _paddr; \
61})
62
63static inline int
64cache_flush_040 (unsigned long addr, int scope, int cache, unsigned long len)
65{
66 unsigned long paddr, i;
67
68 switch (scope)
69 {
70 case FLUSH_SCOPE_ALL:
71 switch (cache)
72 {
73 case FLUSH_CACHE_DATA:
74 /* This nop is needed for some broken versions of the 68040. */
75 __asm__ __volatile__ ("nop\n\t"
76 ".chip 68040\n\t"
77 "cpusha %dc\n\t"
78 ".chip 68k");
79 break;
80 case FLUSH_CACHE_INSN:
81 __asm__ __volatile__ ("nop\n\t"
82 ".chip 68040\n\t"
83 "cpusha %ic\n\t"
84 ".chip 68k");
85 break;
86 default:
87 case FLUSH_CACHE_BOTH:
88 __asm__ __volatile__ ("nop\n\t"
89 ".chip 68040\n\t"
90 "cpusha %bc\n\t"
91 ".chip 68k");
92 break;
93 }
94 break;
95
96 case FLUSH_SCOPE_LINE:
97 /* Find the physical address of the first mapped page in the
98 address range. */
99 if ((paddr = virt_to_phys_040(addr))) {
100 paddr += addr & ~(PAGE_MASK | 15);
101 len = (len + (addr & 15) + 15) >> 4;
102 } else {
103 unsigned long tmp = PAGE_SIZE - (addr & ~PAGE_MASK);
104
105 if (len <= tmp)
106 return 0;
107 addr += tmp;
108 len -= tmp;
109 tmp = PAGE_SIZE;
110 for (;;)
111 {
112 if ((paddr = virt_to_phys_040(addr)))
113 break;
114 if (len <= tmp)
115 return 0;
116 addr += tmp;
117 len -= tmp;
118 }
119 len = (len + 15) >> 4;
120 }
121 i = (PAGE_SIZE - (paddr & ~PAGE_MASK)) >> 4;
122 while (len--)
123 {
124 switch (cache)
125 {
126 case FLUSH_CACHE_DATA:
127 __asm__ __volatile__ ("nop\n\t"
128 ".chip 68040\n\t"
129 "cpushl %%dc,(%0)\n\t"
130 ".chip 68k"
131 : : "a" (paddr));
132 break;
133 case FLUSH_CACHE_INSN:
134 __asm__ __volatile__ ("nop\n\t"
135 ".chip 68040\n\t"
136 "cpushl %%ic,(%0)\n\t"
137 ".chip 68k"
138 : : "a" (paddr));
139 break;
140 default:
141 case FLUSH_CACHE_BOTH:
142 __asm__ __volatile__ ("nop\n\t"
143 ".chip 68040\n\t"
144 "cpushl %%bc,(%0)\n\t"
145 ".chip 68k"
146 : : "a" (paddr));
147 break;
148 }
149 if (!--i && len)
150 {
151 /*
152 * No need to page align here since it is done by
153 * virt_to_phys_040().
154 */
155 addr += PAGE_SIZE;
156 i = PAGE_SIZE / 16;
157 /* Recompute physical address when crossing a page
158 boundary. */
159 for (;;)
160 {
161 if ((paddr = virt_to_phys_040(addr)))
162 break;
163 if (len <= i)
164 return 0;
165 len -= i;
166 addr += PAGE_SIZE;
167 }
168 }
169 else
170 paddr += 16;
171 }
172 break;
173
174 default:
175 case FLUSH_SCOPE_PAGE:
176 len += (addr & ~PAGE_MASK) + (PAGE_SIZE - 1);
177 for (len >>= PAGE_SHIFT; len--; addr += PAGE_SIZE)
178 {
179 if (!(paddr = virt_to_phys_040(addr)))
180 continue;
181 switch (cache)
182 {
183 case FLUSH_CACHE_DATA:
184 __asm__ __volatile__ ("nop\n\t"
185 ".chip 68040\n\t"
186 "cpushp %%dc,(%0)\n\t"
187 ".chip 68k"
188 : : "a" (paddr));
189 break;
190 case FLUSH_CACHE_INSN:
191 __asm__ __volatile__ ("nop\n\t"
192 ".chip 68040\n\t"
193 "cpushp %%ic,(%0)\n\t"
194 ".chip 68k"
195 : : "a" (paddr));
196 break;
197 default:
198 case FLUSH_CACHE_BOTH:
199 __asm__ __volatile__ ("nop\n\t"
200 ".chip 68040\n\t"
201 "cpushp %%bc,(%0)\n\t"
202 ".chip 68k"
203 : : "a" (paddr));
204 break;
205 }
206 }
207 break;
208 }
209 return 0;
210}
211
212#define virt_to_phys_060(vaddr) \
213({ \
214 unsigned long paddr; \
215 __asm__ __volatile__ (".chip 68060\n\t" \
216 "plpar (%0)\n\t" \
217 ".chip 68k" \
218 : "=a" (paddr) \
219 : "0" (vaddr)); \
220 (paddr); /* XXX */ \
221})
222
223static inline int
224cache_flush_060 (unsigned long addr, int scope, int cache, unsigned long len)
225{
226 unsigned long paddr, i;
227
228 /*
229 * 68060 manual says:
230 * cpush %dc : flush DC, remains valid (with our %cacr setup)
231 * cpush %ic : invalidate IC
232 * cpush %bc : flush DC + invalidate IC
233 */
234 switch (scope)
235 {
236 case FLUSH_SCOPE_ALL:
237 switch (cache)
238 {
239 case FLUSH_CACHE_DATA:
240 __asm__ __volatile__ (".chip 68060\n\t"
241 "cpusha %dc\n\t"
242 ".chip 68k");
243 break;
244 case FLUSH_CACHE_INSN:
245 __asm__ __volatile__ (".chip 68060\n\t"
246 "cpusha %ic\n\t"
247 ".chip 68k");
248 break;
249 default:
250 case FLUSH_CACHE_BOTH:
251 __asm__ __volatile__ (".chip 68060\n\t"
252 "cpusha %bc\n\t"
253 ".chip 68k");
254 break;
255 }
256 break;
257
258 case FLUSH_SCOPE_LINE:
259 /* Find the physical address of the first mapped page in the
260 address range. */
261 len += addr & 15;
262 addr &= -16;
263 if (!(paddr = virt_to_phys_060(addr))) {
264 unsigned long tmp = PAGE_SIZE - (addr & ~PAGE_MASK);
265
266 if (len <= tmp)
267 return 0;
268 addr += tmp;
269 len -= tmp;
270 tmp = PAGE_SIZE;
271 for (;;)
272 {
273 if ((paddr = virt_to_phys_060(addr)))
274 break;
275 if (len <= tmp)
276 return 0;
277 addr += tmp;
278 len -= tmp;
279 }
280 }
281 len = (len + 15) >> 4;
282 i = (PAGE_SIZE - (paddr & ~PAGE_MASK)) >> 4;
283 while (len--)
284 {
285 switch (cache)
286 {
287 case FLUSH_CACHE_DATA:
288 __asm__ __volatile__ (".chip 68060\n\t"
289 "cpushl %%dc,(%0)\n\t"
290 ".chip 68k"
291 : : "a" (paddr));
292 break;
293 case FLUSH_CACHE_INSN:
294 __asm__ __volatile__ (".chip 68060\n\t"
295 "cpushl %%ic,(%0)\n\t"
296 ".chip 68k"
297 : : "a" (paddr));
298 break;
299 default:
300 case FLUSH_CACHE_BOTH:
301 __asm__ __volatile__ (".chip 68060\n\t"
302 "cpushl %%bc,(%0)\n\t"
303 ".chip 68k"
304 : : "a" (paddr));
305 break;
306 }
307 if (!--i && len)
308 {
309
310 /*
311 * We just want to jump to the first cache line
312 * in the next page.
313 */
314 addr += PAGE_SIZE;
315 addr &= PAGE_MASK;
316
317 i = PAGE_SIZE / 16;
318 /* Recompute physical address when crossing a page
319 boundary. */
320 for (;;)
321 {
322 if ((paddr = virt_to_phys_060(addr)))
323 break;
324 if (len <= i)
325 return 0;
326 len -= i;
327 addr += PAGE_SIZE;
328 }
329 }
330 else
331 paddr += 16;
332 }
333 break;
334
335 default:
336 case FLUSH_SCOPE_PAGE:
337 len += (addr & ~PAGE_MASK) + (PAGE_SIZE - 1);
338 addr &= PAGE_MASK; /* Workaround for bug in some
339 revisions of the 68060 */
340 for (len >>= PAGE_SHIFT; len--; addr += PAGE_SIZE)
341 {
342 if (!(paddr = virt_to_phys_060(addr)))
343 continue;
344 switch (cache)
345 {
346 case FLUSH_CACHE_DATA:
347 __asm__ __volatile__ (".chip 68060\n\t"
348 "cpushp %%dc,(%0)\n\t"
349 ".chip 68k"
350 : : "a" (paddr));
351 break;
352 case FLUSH_CACHE_INSN:
353 __asm__ __volatile__ (".chip 68060\n\t"
354 "cpushp %%ic,(%0)\n\t"
355 ".chip 68k"
356 : : "a" (paddr));
357 break;
358 default:
359 case FLUSH_CACHE_BOTH:
360 __asm__ __volatile__ (".chip 68060\n\t"
361 "cpushp %%bc,(%0)\n\t"
362 ".chip 68k"
363 : : "a" (paddr));
364 break;
365 }
366 }
367 break;
368 }
369 return 0;
370}
371
372/* sys_cacheflush -- flush (part of) the processor cache. */
373asmlinkage int
374sys_cacheflush (unsigned long addr, int scope, int cache, unsigned long len)
375{
376 struct vm_area_struct *vma;
377 int ret = -EINVAL;
378
379 if (scope < FLUSH_SCOPE_LINE || scope > FLUSH_SCOPE_ALL ||
380 cache & ~FLUSH_CACHE_BOTH)
381 goto out;
382
383 if (scope == FLUSH_SCOPE_ALL) {
384 /* Only the superuser may explicitly flush the whole cache. */
385 ret = -EPERM;
386 if (!capable(CAP_SYS_ADMIN))
387 goto out;
388 } else {
389 /*
390 * Verify that the specified address region actually belongs
391 * to this process.
392 */
393 vma = find_vma (current->mm, addr);
394 ret = -EINVAL;
395 /* Check for overflow. */
396 if (addr + len < addr)
397 goto out;
398 if (vma == NULL || addr < vma->vm_start || addr + len > vma->vm_end)
399 goto out;
400 }
401
402 if (CPU_IS_020_OR_030) {
403 if (scope == FLUSH_SCOPE_LINE && len < 256) {
404 unsigned long cacr;
405 __asm__ ("movec %%cacr, %0" : "=r" (cacr));
406 if (cache & FLUSH_CACHE_INSN)
407 cacr |= 4;
408 if (cache & FLUSH_CACHE_DATA)
409 cacr |= 0x400;
410 len >>= 2;
411 while (len--) {
412 __asm__ __volatile__ ("movec %1, %%caar\n\t"
413 "movec %0, %%cacr"
414 : /* no outputs */
415 : "r" (cacr), "r" (addr));
416 addr += 4;
417 }
418 } else {
419 /* Flush the whole cache, even if page granularity requested. */
420 unsigned long cacr;
421 __asm__ ("movec %%cacr, %0" : "=r" (cacr));
422 if (cache & FLUSH_CACHE_INSN)
423 cacr |= 8;
424 if (cache & FLUSH_CACHE_DATA)
425 cacr |= 0x800;
426 __asm__ __volatile__ ("movec %0, %%cacr" : : "r" (cacr));
427 }
428 ret = 0;
429 goto out;
430 } else {
431 /*
432 * 040 or 060: don't blindly trust 'scope', someone could
433 * try to flush a few megs of memory.
434 */
435
436 if (len>=3*PAGE_SIZE && scope<FLUSH_SCOPE_PAGE)
437 scope=FLUSH_SCOPE_PAGE;
438 if (len>=10*PAGE_SIZE && scope<FLUSH_SCOPE_ALL)
439 scope=FLUSH_SCOPE_ALL;
440 if (CPU_IS_040) {
441 ret = cache_flush_040 (addr, scope, cache, len);
442 } else if (CPU_IS_060) {
443 ret = cache_flush_060 (addr, scope, cache, len);
444 }
445 }
446out:
447 return ret;
448}
449
450asmlinkage int sys_getpagesize(void)
451{
452 return PAGE_SIZE;
453}
454
455/*
456 * Do a system call from kernel instead of calling sys_execve so we
457 * end up with proper pt_regs.
458 */
459int kernel_execve(const char *filename,
460 const char *const argv[],
461 const char *const envp[])
462{
463 register long __res asm ("%d0") = __NR_execve;
464 register long __a asm ("%d1") = (long)(filename);
465 register long __b asm ("%d2") = (long)(argv);
466 register long __c asm ("%d3") = (long)(envp);
467 asm volatile ("trap #0" : "+d" (__res)
468 : "d" (__a), "d" (__b), "d" (__c));
469 return __res;
470}
471
472asmlinkage unsigned long sys_get_thread_area(void)
473{
474 return current_thread_info()->tp_value;
475}
476
477asmlinkage int sys_set_thread_area(unsigned long tp)
478{
479 current_thread_info()->tp_value = tp;
480 return 0;
481}
482
483/* This syscall gets its arguments in A0 (mem), D2 (oldval) and
484 D1 (newval). */
485asmlinkage int
486sys_atomic_cmpxchg_32(unsigned long newval, int oldval, int d3, int d4, int d5,
487 unsigned long __user * mem)
488{
489 /* This was borrowed from ARM's implementation. */
490 for (;;) {
491 struct mm_struct *mm = current->mm;
492 pgd_t *pgd;
493 pmd_t *pmd;
494 pte_t *pte;
495 spinlock_t *ptl;
496 unsigned long mem_value;
497
498 down_read(&mm->mmap_sem);
499 pgd = pgd_offset(mm, (unsigned long)mem);
500 if (!pgd_present(*pgd))
501 goto bad_access;
502 pmd = pmd_offset(pgd, (unsigned long)mem);
503 if (!pmd_present(*pmd))
504 goto bad_access;
505 pte = pte_offset_map_lock(mm, pmd, (unsigned long)mem, &ptl);
506 if (!pte_present(*pte) || !pte_dirty(*pte)
507 || !pte_write(*pte)) {
508 pte_unmap_unlock(pte, ptl);
509 goto bad_access;
510 }
511
512 mem_value = *mem;
513 if (mem_value == oldval)
514 *mem = newval;
515
516 pte_unmap_unlock(pte, ptl);
517 up_read(&mm->mmap_sem);
518 return mem_value;
519
520 bad_access:
521 up_read(&mm->mmap_sem);
522 /* This is not necessarily a bad access, we can get here if
523 a memory we're trying to write to should be copied-on-write.
524 Make the kernel do the necessary page stuff, then re-iterate.
525 Simulate a write access fault to do that. */
526 {
527 /* The first argument of the function corresponds to
528 D1, which is the first field of struct pt_regs. */
529 struct pt_regs *fp = (struct pt_regs *)&newval;
530
531 /* '3' is an RMW flag. */
532 if (do_page_fault(fp, (unsigned long)mem, 3))
533 /* If the do_page_fault() failed, we don't
534 have anything meaningful to return.
535 There should be a SIGSEGV pending for
536 the process. */
537 return 0xdeadbeef;
538 }
539 }
540}
541
542asmlinkage int sys_atomic_barrier(void)
543{
544 /* no code needed for uniprocs */
545 return 0;
546}
diff --git a/arch/m68k/kernel/sys_m68k_no.c b/arch/m68k/kernel/sys_m68k_no.c
new file mode 100644
index 000000000000..68488ae47f0a
--- /dev/null
+++ b/arch/m68k/kernel/sys_m68k_no.c
@@ -0,0 +1,94 @@
1/*
2 * linux/arch/m68knommu/kernel/sys_m68k.c
3 *
4 * This file contains various random system calls that
5 * have a non-standard calling sequence on the Linux/m68k
6 * platform.
7 */
8
9#include <linux/errno.h>
10#include <linux/sched.h>
11#include <linux/mm.h>
12#include <linux/smp.h>
13#include <linux/sem.h>
14#include <linux/msg.h>
15#include <linux/shm.h>
16#include <linux/stat.h>
17#include <linux/syscalls.h>
18#include <linux/mman.h>
19#include <linux/file.h>
20#include <linux/ipc.h>
21#include <linux/fs.h>
22
23#include <asm/setup.h>
24#include <asm/uaccess.h>
25#include <asm/cachectl.h>
26#include <asm/traps.h>
27#include <asm/cacheflush.h>
28#include <asm/unistd.h>
29
30/* sys_cacheflush -- flush (part of) the processor cache. */
31asmlinkage int
32sys_cacheflush (unsigned long addr, int scope, int cache, unsigned long len)
33{
34 flush_cache_all();
35 return(0);
36}
37
38asmlinkage int sys_getpagesize(void)
39{
40 return PAGE_SIZE;
41}
42
43/*
44 * Do a system call from kernel instead of calling sys_execve so we
45 * end up with proper pt_regs.
46 */
47int kernel_execve(const char *filename,
48 const char *const argv[],
49 const char *const envp[])
50{
51 register long __res asm ("%d0") = __NR_execve;
52 register long __a asm ("%d1") = (long)(filename);
53 register long __b asm ("%d2") = (long)(argv);
54 register long __c asm ("%d3") = (long)(envp);
55 asm volatile ("trap #0" : "+d" (__res)
56 : "d" (__a), "d" (__b), "d" (__c));
57 return __res;
58}
59
60asmlinkage unsigned long sys_get_thread_area(void)
61{
62 return current_thread_info()->tp_value;
63}
64
65asmlinkage int sys_set_thread_area(unsigned long tp)
66{
67 current_thread_info()->tp_value = tp;
68 return 0;
69}
70
71/* This syscall gets its arguments in A0 (mem), D2 (oldval) and
72 D1 (newval). */
73asmlinkage int
74sys_atomic_cmpxchg_32(unsigned long newval, int oldval, int d3, int d4, int d5,
75 unsigned long __user * mem)
76{
77 struct mm_struct *mm = current->mm;
78 unsigned long mem_value;
79
80 down_read(&mm->mmap_sem);
81
82 mem_value = *mem;
83 if (mem_value == oldval)
84 *mem = newval;
85
86 up_read(&mm->mmap_sem);
87 return mem_value;
88}
89
90asmlinkage int sys_atomic_barrier(void)
91{
92 /* no code needed for uniprocs */
93 return 0;
94}
diff --git a/arch/m68k/kernel/syscalltable.S b/arch/m68k/kernel/syscalltable.S
new file mode 100644
index 000000000000..9b8393d8adb8
--- /dev/null
+++ b/arch/m68k/kernel/syscalltable.S
@@ -0,0 +1,369 @@
1/*
2 * linux/arch/m68knommu/kernel/syscalltable.S
3 *
4 * Copyright (C) 2002, Greg Ungerer (gerg@snapgear.com)
5 *
6 * Based on older entry.S files, the following copyrights apply:
7 *
8 * Copyright (C) 1998 D. Jeff Dionne <jeff@lineo.ca>,
9 * Kenneth Albanowski <kjahds@kjahds.com>,
10 * Copyright (C) 2000 Lineo Inc. (www.lineo.com)
11 * Copyright (C) 1991, 1992 Linus Torvalds
12 */
13
14#include <linux/sys.h>
15#include <linux/linkage.h>
16#include <asm/unistd.h>
17
18.text
19ALIGN
20ENTRY(sys_call_table)
21 .long sys_restart_syscall /* 0 - old "setup()" system call */
22 .long sys_exit
23 .long sys_fork
24 .long sys_read
25 .long sys_write
26 .long sys_open /* 5 */
27 .long sys_close
28 .long sys_waitpid
29 .long sys_creat
30 .long sys_link
31 .long sys_unlink /* 10 */
32 .long sys_execve
33 .long sys_chdir
34 .long sys_time
35 .long sys_mknod
36 .long sys_chmod /* 15 */
37 .long sys_chown16
38 .long sys_ni_syscall /* old break syscall holder */
39 .long sys_stat
40 .long sys_lseek
41 .long sys_getpid /* 20 */
42 .long sys_mount
43 .long sys_oldumount
44 .long sys_setuid16
45 .long sys_getuid16
46 .long sys_stime /* 25 */
47 .long sys_ptrace
48 .long sys_alarm
49 .long sys_fstat
50 .long sys_pause
51 .long sys_utime /* 30 */
52 .long sys_ni_syscall /* old stty syscall holder */
53 .long sys_ni_syscall /* old gtty syscall holder */
54 .long sys_access
55 .long sys_nice
56 .long sys_ni_syscall /* 35 */ /* old ftime syscall holder */
57 .long sys_sync
58 .long sys_kill
59 .long sys_rename
60 .long sys_mkdir
61 .long sys_rmdir /* 40 */
62 .long sys_dup
63 .long sys_pipe
64 .long sys_times
65 .long sys_ni_syscall /* old prof syscall holder */
66 .long sys_brk /* 45 */
67 .long sys_setgid16
68 .long sys_getgid16
69 .long sys_signal
70 .long sys_geteuid16
71 .long sys_getegid16 /* 50 */
72 .long sys_acct
73 .long sys_umount /* recycled never used phys() */
74 .long sys_ni_syscall /* old lock syscall holder */
75 .long sys_ioctl
76 .long sys_fcntl /* 55 */
77 .long sys_ni_syscall /* old mpx syscall holder */
78 .long sys_setpgid
79 .long sys_ni_syscall /* old ulimit syscall holder */
80 .long sys_ni_syscall
81 .long sys_umask /* 60 */
82 .long sys_chroot
83 .long sys_ustat
84 .long sys_dup2
85 .long sys_getppid
86 .long sys_getpgrp /* 65 */
87 .long sys_setsid
88 .long sys_sigaction
89 .long sys_sgetmask
90 .long sys_ssetmask
91 .long sys_setreuid16 /* 70 */
92 .long sys_setregid16
93 .long sys_sigsuspend
94 .long sys_sigpending
95 .long sys_sethostname
96 .long sys_setrlimit /* 75 */
97 .long sys_old_getrlimit
98 .long sys_getrusage
99 .long sys_gettimeofday
100 .long sys_settimeofday
101 .long sys_getgroups16 /* 80 */
102 .long sys_setgroups16
103 .long sys_old_select
104 .long sys_symlink
105 .long sys_lstat
106 .long sys_readlink /* 85 */
107 .long sys_uselib
108 .long sys_ni_syscall /* sys_swapon */
109 .long sys_reboot
110 .long sys_old_readdir
111 .long sys_old_mmap /* 90 */
112 .long sys_munmap
113 .long sys_truncate
114 .long sys_ftruncate
115 .long sys_fchmod
116 .long sys_fchown16 /* 95 */
117 .long sys_getpriority
118 .long sys_setpriority
119 .long sys_ni_syscall /* old profil syscall holder */
120 .long sys_statfs
121 .long sys_fstatfs /* 100 */
122 .long sys_ni_syscall /* ioperm for i386 */
123 .long sys_socketcall
124 .long sys_syslog
125 .long sys_setitimer
126 .long sys_getitimer /* 105 */
127 .long sys_newstat
128 .long sys_newlstat
129 .long sys_newfstat
130 .long sys_ni_syscall
131 .long sys_ni_syscall /* iopl for i386 */ /* 110 */
132 .long sys_vhangup
133 .long sys_ni_syscall /* obsolete idle() syscall */
134 .long sys_ni_syscall /* vm86old for i386 */
135 .long sys_wait4
136 .long sys_ni_syscall /* 115 */ /* sys_swapoff */
137 .long sys_sysinfo
138 .long sys_ipc
139 .long sys_fsync
140 .long sys_sigreturn
141 .long sys_clone /* 120 */
142 .long sys_setdomainname
143 .long sys_newuname
144 .long sys_cacheflush /* modify_ldt for i386 */
145 .long sys_adjtimex
146 .long sys_ni_syscall /* 125 */ /* sys_mprotect */
147 .long sys_sigprocmask
148 .long sys_ni_syscall /* old "creat_module" */
149 .long sys_init_module
150 .long sys_delete_module
151 .long sys_ni_syscall /* 130: old "get_kernel_syms" */
152 .long sys_quotactl
153 .long sys_getpgid
154 .long sys_fchdir
155 .long sys_bdflush
156 .long sys_sysfs /* 135 */
157 .long sys_personality
158 .long sys_ni_syscall /* for afs_syscall */
159 .long sys_setfsuid16
160 .long sys_setfsgid16
161 .long sys_llseek /* 140 */
162 .long sys_getdents
163 .long sys_select
164 .long sys_flock
165 .long sys_ni_syscall /* sys_msync */
166 .long sys_readv /* 145 */
167 .long sys_writev
168 .long sys_getsid
169 .long sys_fdatasync
170 .long sys_sysctl
171 .long sys_ni_syscall /* 150 */ /* sys_mlock */
172 .long sys_ni_syscall /* sys_munlock */
173 .long sys_ni_syscall /* sys_mlockall */
174 .long sys_ni_syscall /* sys_munlockall */
175 .long sys_sched_setparam
176 .long sys_sched_getparam /* 155 */
177 .long sys_sched_setscheduler
178 .long sys_sched_getscheduler
179 .long sys_sched_yield
180 .long sys_sched_get_priority_max
181 .long sys_sched_get_priority_min /* 160 */
182 .long sys_sched_rr_get_interval
183 .long sys_nanosleep
184 .long sys_ni_syscall /* sys_mremap */
185 .long sys_setresuid16
186 .long sys_getresuid16 /* 165 */
187 .long sys_getpagesize /* sys_getpagesize */
188 .long sys_ni_syscall /* old "query_module" */
189 .long sys_poll
190 .long sys_ni_syscall /* sys_nfsservctl */
191 .long sys_setresgid16 /* 170 */
192 .long sys_getresgid16
193 .long sys_prctl
194 .long sys_rt_sigreturn
195 .long sys_rt_sigaction
196 .long sys_rt_sigprocmask /* 175 */
197 .long sys_rt_sigpending
198 .long sys_rt_sigtimedwait
199 .long sys_rt_sigqueueinfo
200 .long sys_rt_sigsuspend
201 .long sys_pread64 /* 180 */
202 .long sys_pwrite64
203 .long sys_lchown16
204 .long sys_getcwd
205 .long sys_capget
206 .long sys_capset /* 185 */
207 .long sys_sigaltstack
208 .long sys_sendfile
209 .long sys_ni_syscall /* streams1 */
210 .long sys_ni_syscall /* streams2 */
211 .long sys_vfork /* 190 */
212 .long sys_getrlimit
213 .long sys_mmap_pgoff
214 .long sys_truncate64
215 .long sys_ftruncate64
216 .long sys_stat64 /* 195 */
217 .long sys_lstat64
218 .long sys_fstat64
219 .long sys_chown
220 .long sys_getuid
221 .long sys_getgid /* 200 */
222 .long sys_geteuid
223 .long sys_getegid
224 .long sys_setreuid
225 .long sys_setregid
226 .long sys_getgroups /* 205 */
227 .long sys_setgroups
228 .long sys_fchown
229 .long sys_setresuid
230 .long sys_getresuid
231 .long sys_setresgid /* 210 */
232 .long sys_getresgid
233 .long sys_lchown
234 .long sys_setuid
235 .long sys_setgid
236 .long sys_setfsuid /* 215 */
237 .long sys_setfsgid
238 .long sys_pivot_root
239 .long sys_ni_syscall
240 .long sys_ni_syscall
241 .long sys_getdents64 /* 220 */
242 .long sys_gettid
243 .long sys_tkill
244 .long sys_setxattr
245 .long sys_lsetxattr
246 .long sys_fsetxattr /* 225 */
247 .long sys_getxattr
248 .long sys_lgetxattr
249 .long sys_fgetxattr
250 .long sys_listxattr
251 .long sys_llistxattr /* 230 */
252 .long sys_flistxattr
253 .long sys_removexattr
254 .long sys_lremovexattr
255 .long sys_fremovexattr
256 .long sys_futex /* 235 */
257 .long sys_sendfile64
258 .long sys_ni_syscall /* sys_mincore */
259 .long sys_ni_syscall /* sys_madvise */
260 .long sys_fcntl64
261 .long sys_readahead /* 240 */
262 .long sys_io_setup
263 .long sys_io_destroy
264 .long sys_io_getevents
265 .long sys_io_submit
266 .long sys_io_cancel /* 245 */
267 .long sys_fadvise64
268 .long sys_exit_group
269 .long sys_lookup_dcookie
270 .long sys_epoll_create
271 .long sys_epoll_ctl /* 250 */
272 .long sys_epoll_wait
273 .long sys_ni_syscall /* sys_remap_file_pages */
274 .long sys_set_tid_address
275 .long sys_timer_create
276 .long sys_timer_settime /* 255 */
277 .long sys_timer_gettime
278 .long sys_timer_getoverrun
279 .long sys_timer_delete
280 .long sys_clock_settime
281 .long sys_clock_gettime /* 260 */
282 .long sys_clock_getres
283 .long sys_clock_nanosleep
284 .long sys_statfs64
285 .long sys_fstatfs64
286 .long sys_tgkill /* 265 */
287 .long sys_utimes
288 .long sys_fadvise64_64
289 .long sys_mbind
290 .long sys_get_mempolicy
291 .long sys_set_mempolicy /* 270 */
292 .long sys_mq_open
293 .long sys_mq_unlink
294 .long sys_mq_timedsend
295 .long sys_mq_timedreceive
296 .long sys_mq_notify /* 275 */
297 .long sys_mq_getsetattr
298 .long sys_waitid
299 .long sys_ni_syscall /* for sys_vserver */
300 .long sys_add_key
301 .long sys_request_key /* 280 */
302 .long sys_keyctl
303 .long sys_ioprio_set
304 .long sys_ioprio_get
305 .long sys_inotify_init
306 .long sys_inotify_add_watch /* 285 */
307 .long sys_inotify_rm_watch
308 .long sys_migrate_pages
309 .long sys_openat
310 .long sys_mkdirat
311 .long sys_mknodat /* 290 */
312 .long sys_fchownat
313 .long sys_futimesat
314 .long sys_fstatat64
315 .long sys_unlinkat
316 .long sys_renameat /* 295 */
317 .long sys_linkat
318 .long sys_symlinkat
319 .long sys_readlinkat
320 .long sys_fchmodat
321 .long sys_faccessat /* 300 */
322 .long sys_ni_syscall /* Reserved for pselect6 */
323 .long sys_ni_syscall /* Reserved for ppoll */
324 .long sys_unshare
325 .long sys_set_robust_list
326 .long sys_get_robust_list /* 305 */
327 .long sys_splice
328 .long sys_sync_file_range
329 .long sys_tee
330 .long sys_vmsplice
331 .long sys_move_pages /* 310 */
332 .long sys_sched_setaffinity
333 .long sys_sched_getaffinity
334 .long sys_kexec_load
335 .long sys_getcpu
336 .long sys_epoll_pwait /* 315 */
337 .long sys_utimensat
338 .long sys_signalfd
339 .long sys_timerfd_create
340 .long sys_eventfd
341 .long sys_fallocate /* 320 */
342 .long sys_timerfd_settime
343 .long sys_timerfd_gettime
344 .long sys_signalfd4
345 .long sys_eventfd2
346 .long sys_epoll_create1 /* 325 */
347 .long sys_dup3
348 .long sys_pipe2
349 .long sys_inotify_init1
350 .long sys_preadv
351 .long sys_pwritev /* 330 */
352 .long sys_rt_tgsigqueueinfo
353 .long sys_perf_event_open
354 .long sys_get_thread_area
355 .long sys_set_thread_area
356 .long sys_atomic_cmpxchg_32 /* 335 */
357 .long sys_atomic_barrier
358 .long sys_fanotify_init
359 .long sys_fanotify_mark
360 .long sys_prlimit64
361 .long sys_name_to_handle_at /* 340 */
362 .long sys_open_by_handle_at
363 .long sys_clock_adjtime
364 .long sys_syncfs
365
366 .rept NR_syscalls-(.-sys_call_table)/4
367 .long sys_ni_syscall
368 .endr
369
diff --git a/arch/m68k/kernel/time.c b/arch/m68k/kernel/time.c
index 18b34ee5db3b..a5cf40c26de5 100644
--- a/arch/m68k/kernel/time.c
+++ b/arch/m68k/kernel/time.c
@@ -1,114 +1,5 @@
1/* 1#ifdef CONFIG_MMU
2 * linux/arch/m68k/kernel/time.c 2#include "time_mm.c"
3 * 3#else
4 * Copyright (C) 1991, 1992, 1995 Linus Torvalds 4#include "time_no.c"
5 * 5#endif
6 * This file contains the m68k-specific time handling details.
7 * Most of the stuff is located in the machine specific files.
8 *
9 * 1997-09-10 Updated NTP code according to technical memorandum Jan '96
10 * "A Kernel Model for Precision Timekeeping" by Dave Mills
11 */
12
13#include <linux/errno.h>
14#include <linux/module.h>
15#include <linux/sched.h>
16#include <linux/kernel.h>
17#include <linux/param.h>
18#include <linux/string.h>
19#include <linux/mm.h>
20#include <linux/rtc.h>
21#include <linux/platform_device.h>
22
23#include <asm/machdep.h>
24#include <asm/io.h>
25#include <asm/irq_regs.h>
26
27#include <linux/time.h>
28#include <linux/timex.h>
29#include <linux/profile.h>
30
31static inline int set_rtc_mmss(unsigned long nowtime)
32{
33 if (mach_set_clock_mmss)
34 return mach_set_clock_mmss (nowtime);
35 return -1;
36}
37
38/*
39 * timer_interrupt() needs to keep up the real-time clock,
40 * as well as call the "xtime_update()" routine every clocktick
41 */
42static irqreturn_t timer_interrupt(int irq, void *dummy)
43{
44 xtime_update(1);
45 update_process_times(user_mode(get_irq_regs()));
46 profile_tick(CPU_PROFILING);
47
48#ifdef CONFIG_HEARTBEAT
49 /* use power LED as a heartbeat instead -- much more useful
50 for debugging -- based on the version for PReP by Cort */
51 /* acts like an actual heart beat -- ie thump-thump-pause... */
52 if (mach_heartbeat) {
53 static unsigned cnt = 0, period = 0, dist = 0;
54
55 if (cnt == 0 || cnt == dist)
56 mach_heartbeat( 1 );
57 else if (cnt == 7 || cnt == dist+7)
58 mach_heartbeat( 0 );
59
60 if (++cnt > period) {
61 cnt = 0;
62 /* The hyperbolic function below modifies the heartbeat period
63 * length in dependency of the current (5min) load. It goes
64 * through the points f(0)=126, f(1)=86, f(5)=51,
65 * f(inf)->30. */
66 period = ((672<<FSHIFT)/(5*avenrun[0]+(7<<FSHIFT))) + 30;
67 dist = period / 4;
68 }
69 }
70#endif /* CONFIG_HEARTBEAT */
71 return IRQ_HANDLED;
72}
73
74void read_persistent_clock(struct timespec *ts)
75{
76 struct rtc_time time;
77 ts->tv_sec = 0;
78 ts->tv_nsec = 0;
79
80 if (mach_hwclk) {
81 mach_hwclk(0, &time);
82
83 if ((time.tm_year += 1900) < 1970)
84 time.tm_year += 100;
85 ts->tv_sec = mktime(time.tm_year, time.tm_mon, time.tm_mday,
86 time.tm_hour, time.tm_min, time.tm_sec);
87 }
88}
89
90void __init time_init(void)
91{
92 mach_sched_init(timer_interrupt);
93}
94
95u32 arch_gettimeoffset(void)
96{
97 return mach_gettimeoffset() * 1000;
98}
99
100static int __init rtc_init(void)
101{
102 struct platform_device *pdev;
103
104 if (!mach_hwclk)
105 return -ENODEV;
106
107 pdev = platform_device_register_simple("rtc-generic", -1, NULL, 0);
108 if (IS_ERR(pdev))
109 return PTR_ERR(pdev);
110
111 return 0;
112}
113
114module_init(rtc_init);
diff --git a/arch/m68k/kernel/time_mm.c b/arch/m68k/kernel/time_mm.c
new file mode 100644
index 000000000000..18b34ee5db3b
--- /dev/null
+++ b/arch/m68k/kernel/time_mm.c
@@ -0,0 +1,114 @@
1/*
2 * linux/arch/m68k/kernel/time.c
3 *
4 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
5 *
6 * This file contains the m68k-specific time handling details.
7 * Most of the stuff is located in the machine specific files.
8 *
9 * 1997-09-10 Updated NTP code according to technical memorandum Jan '96
10 * "A Kernel Model for Precision Timekeeping" by Dave Mills
11 */
12
13#include <linux/errno.h>
14#include <linux/module.h>
15#include <linux/sched.h>
16#include <linux/kernel.h>
17#include <linux/param.h>
18#include <linux/string.h>
19#include <linux/mm.h>
20#include <linux/rtc.h>
21#include <linux/platform_device.h>
22
23#include <asm/machdep.h>
24#include <asm/io.h>
25#include <asm/irq_regs.h>
26
27#include <linux/time.h>
28#include <linux/timex.h>
29#include <linux/profile.h>
30
31static inline int set_rtc_mmss(unsigned long nowtime)
32{
33 if (mach_set_clock_mmss)
34 return mach_set_clock_mmss (nowtime);
35 return -1;
36}
37
38/*
39 * timer_interrupt() needs to keep up the real-time clock,
40 * as well as call the "xtime_update()" routine every clocktick
41 */
42static irqreturn_t timer_interrupt(int irq, void *dummy)
43{
44 xtime_update(1);
45 update_process_times(user_mode(get_irq_regs()));
46 profile_tick(CPU_PROFILING);
47
48#ifdef CONFIG_HEARTBEAT
49 /* use power LED as a heartbeat instead -- much more useful
50 for debugging -- based on the version for PReP by Cort */
51 /* acts like an actual heart beat -- ie thump-thump-pause... */
52 if (mach_heartbeat) {
53 static unsigned cnt = 0, period = 0, dist = 0;
54
55 if (cnt == 0 || cnt == dist)
56 mach_heartbeat( 1 );
57 else if (cnt == 7 || cnt == dist+7)
58 mach_heartbeat( 0 );
59
60 if (++cnt > period) {
61 cnt = 0;
62 /* The hyperbolic function below modifies the heartbeat period
63 * length in dependency of the current (5min) load. It goes
64 * through the points f(0)=126, f(1)=86, f(5)=51,
65 * f(inf)->30. */
66 period = ((672<<FSHIFT)/(5*avenrun[0]+(7<<FSHIFT))) + 30;
67 dist = period / 4;
68 }
69 }
70#endif /* CONFIG_HEARTBEAT */
71 return IRQ_HANDLED;
72}
73
74void read_persistent_clock(struct timespec *ts)
75{
76 struct rtc_time time;
77 ts->tv_sec = 0;
78 ts->tv_nsec = 0;
79
80 if (mach_hwclk) {
81 mach_hwclk(0, &time);
82
83 if ((time.tm_year += 1900) < 1970)
84 time.tm_year += 100;
85 ts->tv_sec = mktime(time.tm_year, time.tm_mon, time.tm_mday,
86 time.tm_hour, time.tm_min, time.tm_sec);
87 }
88}
89
90void __init time_init(void)
91{
92 mach_sched_init(timer_interrupt);
93}
94
95u32 arch_gettimeoffset(void)
96{
97 return mach_gettimeoffset() * 1000;
98}
99
100static int __init rtc_init(void)
101{
102 struct platform_device *pdev;
103
104 if (!mach_hwclk)
105 return -ENODEV;
106
107 pdev = platform_device_register_simple("rtc-generic", -1, NULL, 0);
108 if (IS_ERR(pdev))
109 return PTR_ERR(pdev);
110
111 return 0;
112}
113
114module_init(rtc_init);
diff --git a/arch/m68k/kernel/time_no.c b/arch/m68k/kernel/time_no.c
new file mode 100644
index 000000000000..6623909f70e6
--- /dev/null
+++ b/arch/m68k/kernel/time_no.c
@@ -0,0 +1,87 @@
1/*
2 * linux/arch/m68knommu/kernel/time.c
3 *
4 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
5 *
6 * This file contains the m68k-specific time handling details.
7 * Most of the stuff is located in the machine specific files.
8 *
9 * 1997-09-10 Updated NTP code according to technical memorandum Jan '96
10 * "A Kernel Model for Precision Timekeeping" by Dave Mills
11 */
12
13#include <linux/errno.h>
14#include <linux/module.h>
15#include <linux/sched.h>
16#include <linux/kernel.h>
17#include <linux/param.h>
18#include <linux/string.h>
19#include <linux/mm.h>
20#include <linux/profile.h>
21#include <linux/time.h>
22#include <linux/timex.h>
23
24#include <asm/machdep.h>
25#include <asm/irq_regs.h>
26
27#define TICK_SIZE (tick_nsec / 1000)
28
29static inline int set_rtc_mmss(unsigned long nowtime)
30{
31 if (mach_set_clock_mmss)
32 return mach_set_clock_mmss (nowtime);
33 return -1;
34}
35
36#ifndef CONFIG_GENERIC_CLOCKEVENTS
37/*
38 * timer_interrupt() needs to keep up the real-time clock,
39 * as well as call the "xtime_update()" routine every clocktick
40 */
41irqreturn_t arch_timer_interrupt(int irq, void *dummy)
42{
43
44 if (current->pid)
45 profile_tick(CPU_PROFILING);
46
47 xtime_update(1);
48
49 update_process_times(user_mode(get_irq_regs()));
50
51 return(IRQ_HANDLED);
52}
53#endif
54
55static unsigned long read_rtc_mmss(void)
56{
57 unsigned int year, mon, day, hour, min, sec;
58
59 if (mach_gettod) {
60 mach_gettod(&year, &mon, &day, &hour, &min, &sec);
61 if ((year += 1900) < 1970)
62 year += 100;
63 } else {
64 year = 1970;
65 mon = day = 1;
66 hour = min = sec = 0;
67 }
68
69
70 return mktime(year, mon, day, hour, min, sec);
71}
72
73void read_persistent_clock(struct timespec *ts)
74{
75 ts->tv_sec = read_rtc_mmss();
76 ts->tv_nsec = 0;
77}
78
79int update_persistent_clock(struct timespec now)
80{
81 return set_rtc_mmss(now.tv_sec);
82}
83
84void time_init(void)
85{
86 hw_timer_init();
87}
diff --git a/arch/m68k/kernel/traps.c b/arch/m68k/kernel/traps.c
index 4022bbc28878..c98add3f5f0f 100644
--- a/arch/m68k/kernel/traps.c
+++ b/arch/m68k/kernel/traps.c
@@ -1,1207 +1,5 @@
1/* 1#ifdef CONFIG_MMU
2 * linux/arch/m68k/kernel/traps.c 2#include "traps_mm.c"
3 *
4 * Copyright (C) 1993, 1994 by Hamish Macdonald
5 *
6 * 68040 fixes by Michael Rausch
7 * 68040 fixes by Martin Apel
8 * 68040 fixes and writeback by Richard Zidlicky
9 * 68060 fixes by Roman Hodek
10 * 68060 fixes by Jesper Skov
11 *
12 * This file is subject to the terms and conditions of the GNU General Public
13 * License. See the file COPYING in the main directory of this archive
14 * for more details.
15 */
16
17/*
18 * Sets up all exception vectors
19 */
20
21#include <linux/sched.h>
22#include <linux/signal.h>
23#include <linux/kernel.h>
24#include <linux/mm.h>
25#include <linux/module.h>
26#include <linux/user.h>
27#include <linux/string.h>
28#include <linux/linkage.h>
29#include <linux/init.h>
30#include <linux/ptrace.h>
31#include <linux/kallsyms.h>
32
33#include <asm/setup.h>
34#include <asm/fpu.h>
35#include <asm/system.h>
36#include <asm/uaccess.h>
37#include <asm/traps.h>
38#include <asm/pgalloc.h>
39#include <asm/machdep.h>
40#include <asm/siginfo.h>
41
42/* assembler routines */
43asmlinkage void system_call(void);
44asmlinkage void buserr(void);
45asmlinkage void trap(void);
46asmlinkage void nmihandler(void);
47#ifdef CONFIG_M68KFPU_EMU
48asmlinkage void fpu_emu(void);
49#endif
50
51e_vector vectors[256];
52
53/* nmi handler for the Amiga */
54asm(".text\n"
55 __ALIGN_STR "\n"
56 "nmihandler: rte");
57
58/*
59 * this must be called very early as the kernel might
60 * use some instruction that are emulated on the 060
61 * and so we're prepared for early probe attempts (e.g. nf_init).
62 */
63void __init base_trap_init(void)
64{
65 if (MACH_IS_SUN3X) {
66 extern e_vector *sun3x_prom_vbr;
67
68 __asm__ volatile ("movec %%vbr, %0" : "=r" (sun3x_prom_vbr));
69 }
70
71 /* setup the exception vector table */
72 __asm__ volatile ("movec %0,%%vbr" : : "r" ((void*)vectors));
73
74 if (CPU_IS_060) {
75 /* set up ISP entry points */
76 asmlinkage void unimp_vec(void) asm ("_060_isp_unimp");
77
78 vectors[VEC_UNIMPII] = unimp_vec;
79 }
80
81 vectors[VEC_BUSERR] = buserr;
82 vectors[VEC_ILLEGAL] = trap;
83 vectors[VEC_SYS] = system_call;
84}
85
86void __init trap_init (void)
87{
88 int i;
89
90 for (i = VEC_SPUR; i <= VEC_INT7; i++)
91 vectors[i] = bad_inthandler;
92
93 for (i = 0; i < VEC_USER; i++)
94 if (!vectors[i])
95 vectors[i] = trap;
96
97 for (i = VEC_USER; i < 256; i++)
98 vectors[i] = bad_inthandler;
99
100#ifdef CONFIG_M68KFPU_EMU
101 if (FPU_IS_EMU)
102 vectors[VEC_LINE11] = fpu_emu;
103#endif
104
105 if (CPU_IS_040 && !FPU_IS_EMU) {
106 /* set up FPSP entry points */
107 asmlinkage void dz_vec(void) asm ("dz");
108 asmlinkage void inex_vec(void) asm ("inex");
109 asmlinkage void ovfl_vec(void) asm ("ovfl");
110 asmlinkage void unfl_vec(void) asm ("unfl");
111 asmlinkage void snan_vec(void) asm ("snan");
112 asmlinkage void operr_vec(void) asm ("operr");
113 asmlinkage void bsun_vec(void) asm ("bsun");
114 asmlinkage void fline_vec(void) asm ("fline");
115 asmlinkage void unsupp_vec(void) asm ("unsupp");
116
117 vectors[VEC_FPDIVZ] = dz_vec;
118 vectors[VEC_FPIR] = inex_vec;
119 vectors[VEC_FPOVER] = ovfl_vec;
120 vectors[VEC_FPUNDER] = unfl_vec;
121 vectors[VEC_FPNAN] = snan_vec;
122 vectors[VEC_FPOE] = operr_vec;
123 vectors[VEC_FPBRUC] = bsun_vec;
124 vectors[VEC_LINE11] = fline_vec;
125 vectors[VEC_FPUNSUP] = unsupp_vec;
126 }
127
128 if (CPU_IS_060 && !FPU_IS_EMU) {
129 /* set up IFPSP entry points */
130 asmlinkage void snan_vec6(void) asm ("_060_fpsp_snan");
131 asmlinkage void operr_vec6(void) asm ("_060_fpsp_operr");
132 asmlinkage void ovfl_vec6(void) asm ("_060_fpsp_ovfl");
133 asmlinkage void unfl_vec6(void) asm ("_060_fpsp_unfl");
134 asmlinkage void dz_vec6(void) asm ("_060_fpsp_dz");
135 asmlinkage void inex_vec6(void) asm ("_060_fpsp_inex");
136 asmlinkage void fline_vec6(void) asm ("_060_fpsp_fline");
137 asmlinkage void unsupp_vec6(void) asm ("_060_fpsp_unsupp");
138 asmlinkage void effadd_vec6(void) asm ("_060_fpsp_effadd");
139
140 vectors[VEC_FPNAN] = snan_vec6;
141 vectors[VEC_FPOE] = operr_vec6;
142 vectors[VEC_FPOVER] = ovfl_vec6;
143 vectors[VEC_FPUNDER] = unfl_vec6;
144 vectors[VEC_FPDIVZ] = dz_vec6;
145 vectors[VEC_FPIR] = inex_vec6;
146 vectors[VEC_LINE11] = fline_vec6;
147 vectors[VEC_FPUNSUP] = unsupp_vec6;
148 vectors[VEC_UNIMPEA] = effadd_vec6;
149 }
150
151 /* if running on an amiga, make the NMI interrupt do nothing */
152 if (MACH_IS_AMIGA) {
153 vectors[VEC_INT7] = nmihandler;
154 }
155}
156
157
158static const char *vec_names[] = {
159 [VEC_RESETSP] = "RESET SP",
160 [VEC_RESETPC] = "RESET PC",
161 [VEC_BUSERR] = "BUS ERROR",
162 [VEC_ADDRERR] = "ADDRESS ERROR",
163 [VEC_ILLEGAL] = "ILLEGAL INSTRUCTION",
164 [VEC_ZERODIV] = "ZERO DIVIDE",
165 [VEC_CHK] = "CHK",
166 [VEC_TRAP] = "TRAPcc",
167 [VEC_PRIV] = "PRIVILEGE VIOLATION",
168 [VEC_TRACE] = "TRACE",
169 [VEC_LINE10] = "LINE 1010",
170 [VEC_LINE11] = "LINE 1111",
171 [VEC_RESV12] = "UNASSIGNED RESERVED 12",
172 [VEC_COPROC] = "COPROCESSOR PROTOCOL VIOLATION",
173 [VEC_FORMAT] = "FORMAT ERROR",
174 [VEC_UNINT] = "UNINITIALIZED INTERRUPT",
175 [VEC_RESV16] = "UNASSIGNED RESERVED 16",
176 [VEC_RESV17] = "UNASSIGNED RESERVED 17",
177 [VEC_RESV18] = "UNASSIGNED RESERVED 18",
178 [VEC_RESV19] = "UNASSIGNED RESERVED 19",
179 [VEC_RESV20] = "UNASSIGNED RESERVED 20",
180 [VEC_RESV21] = "UNASSIGNED RESERVED 21",
181 [VEC_RESV22] = "UNASSIGNED RESERVED 22",
182 [VEC_RESV23] = "UNASSIGNED RESERVED 23",
183 [VEC_SPUR] = "SPURIOUS INTERRUPT",
184 [VEC_INT1] = "LEVEL 1 INT",
185 [VEC_INT2] = "LEVEL 2 INT",
186 [VEC_INT3] = "LEVEL 3 INT",
187 [VEC_INT4] = "LEVEL 4 INT",
188 [VEC_INT5] = "LEVEL 5 INT",
189 [VEC_INT6] = "LEVEL 6 INT",
190 [VEC_INT7] = "LEVEL 7 INT",
191 [VEC_SYS] = "SYSCALL",
192 [VEC_TRAP1] = "TRAP #1",
193 [VEC_TRAP2] = "TRAP #2",
194 [VEC_TRAP3] = "TRAP #3",
195 [VEC_TRAP4] = "TRAP #4",
196 [VEC_TRAP5] = "TRAP #5",
197 [VEC_TRAP6] = "TRAP #6",
198 [VEC_TRAP7] = "TRAP #7",
199 [VEC_TRAP8] = "TRAP #8",
200 [VEC_TRAP9] = "TRAP #9",
201 [VEC_TRAP10] = "TRAP #10",
202 [VEC_TRAP11] = "TRAP #11",
203 [VEC_TRAP12] = "TRAP #12",
204 [VEC_TRAP13] = "TRAP #13",
205 [VEC_TRAP14] = "TRAP #14",
206 [VEC_TRAP15] = "TRAP #15",
207 [VEC_FPBRUC] = "FPCP BSUN",
208 [VEC_FPIR] = "FPCP INEXACT",
209 [VEC_FPDIVZ] = "FPCP DIV BY 0",
210 [VEC_FPUNDER] = "FPCP UNDERFLOW",
211 [VEC_FPOE] = "FPCP OPERAND ERROR",
212 [VEC_FPOVER] = "FPCP OVERFLOW",
213 [VEC_FPNAN] = "FPCP SNAN",
214 [VEC_FPUNSUP] = "FPCP UNSUPPORTED OPERATION",
215 [VEC_MMUCFG] = "MMU CONFIGURATION ERROR",
216 [VEC_MMUILL] = "MMU ILLEGAL OPERATION ERROR",
217 [VEC_MMUACC] = "MMU ACCESS LEVEL VIOLATION ERROR",
218 [VEC_RESV59] = "UNASSIGNED RESERVED 59",
219 [VEC_UNIMPEA] = "UNASSIGNED RESERVED 60",
220 [VEC_UNIMPII] = "UNASSIGNED RESERVED 61",
221 [VEC_RESV62] = "UNASSIGNED RESERVED 62",
222 [VEC_RESV63] = "UNASSIGNED RESERVED 63",
223};
224
225static const char *space_names[] = {
226 [0] = "Space 0",
227 [USER_DATA] = "User Data",
228 [USER_PROGRAM] = "User Program",
229#ifndef CONFIG_SUN3
230 [3] = "Space 3",
231#else 3#else
232 [FC_CONTROL] = "Control", 4#include "traps_no.c"
233#endif
234 [4] = "Space 4",
235 [SUPER_DATA] = "Super Data",
236 [SUPER_PROGRAM] = "Super Program",
237 [CPU_SPACE] = "CPU"
238};
239
240void die_if_kernel(char *,struct pt_regs *,int);
241asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address,
242 unsigned long error_code);
243int send_fault_sig(struct pt_regs *regs);
244
245asmlinkage void trap_c(struct frame *fp);
246
247#if defined (CONFIG_M68060)
248static inline void access_error060 (struct frame *fp)
249{
250 unsigned long fslw = fp->un.fmt4.pc; /* is really FSLW for access error */
251
252#ifdef DEBUG
253 printk("fslw=%#lx, fa=%#lx\n", fslw, fp->un.fmt4.effaddr);
254#endif
255
256 if (fslw & MMU060_BPE) {
257 /* branch prediction error -> clear branch cache */
258 __asm__ __volatile__ ("movec %/cacr,%/d0\n\t"
259 "orl #0x00400000,%/d0\n\t"
260 "movec %/d0,%/cacr"
261 : : : "d0" );
262 /* return if there's no other error */
263 if (!(fslw & MMU060_ERR_BITS) && !(fslw & MMU060_SEE))
264 return;
265 }
266
267 if (fslw & (MMU060_DESC_ERR | MMU060_WP | MMU060_SP)) {
268 unsigned long errorcode;
269 unsigned long addr = fp->un.fmt4.effaddr;
270
271 if (fslw & MMU060_MA)
272 addr = (addr + PAGE_SIZE - 1) & PAGE_MASK;
273
274 errorcode = 1;
275 if (fslw & MMU060_DESC_ERR) {
276 __flush_tlb040_one(addr);
277 errorcode = 0;
278 }
279 if (fslw & MMU060_W)
280 errorcode |= 2;
281#ifdef DEBUG
282 printk("errorcode = %d\n", errorcode );
283#endif
284 do_page_fault(&fp->ptregs, addr, errorcode);
285 } else if (fslw & (MMU060_SEE)){
286 /* Software Emulation Error.
287 * fault during mem_read/mem_write in ifpsp060/os.S
288 */
289 send_fault_sig(&fp->ptregs);
290 } else if (!(fslw & (MMU060_RE|MMU060_WE)) ||
291 send_fault_sig(&fp->ptregs) > 0) {
292 printk("pc=%#lx, fa=%#lx\n", fp->ptregs.pc, fp->un.fmt4.effaddr);
293 printk( "68060 access error, fslw=%lx\n", fslw );
294 trap_c( fp );
295 }
296}
297#endif /* CONFIG_M68060 */
298
299#if defined (CONFIG_M68040)
300static inline unsigned long probe040(int iswrite, unsigned long addr, int wbs)
301{
302 unsigned long mmusr;
303 mm_segment_t old_fs = get_fs();
304
305 set_fs(MAKE_MM_SEG(wbs));
306
307 if (iswrite)
308 asm volatile (".chip 68040; ptestw (%0); .chip 68k" : : "a" (addr));
309 else
310 asm volatile (".chip 68040; ptestr (%0); .chip 68k" : : "a" (addr));
311
312 asm volatile (".chip 68040; movec %%mmusr,%0; .chip 68k" : "=r" (mmusr));
313
314 set_fs(old_fs);
315
316 return mmusr;
317}
318
319static inline int do_040writeback1(unsigned short wbs, unsigned long wba,
320 unsigned long wbd)
321{
322 int res = 0;
323 mm_segment_t old_fs = get_fs();
324
325 /* set_fs can not be moved, otherwise put_user() may oops */
326 set_fs(MAKE_MM_SEG(wbs));
327
328 switch (wbs & WBSIZ_040) {
329 case BA_SIZE_BYTE:
330 res = put_user(wbd & 0xff, (char __user *)wba);
331 break;
332 case BA_SIZE_WORD:
333 res = put_user(wbd & 0xffff, (short __user *)wba);
334 break;
335 case BA_SIZE_LONG:
336 res = put_user(wbd, (int __user *)wba);
337 break;
338 }
339
340 /* set_fs can not be moved, otherwise put_user() may oops */
341 set_fs(old_fs);
342
343
344#ifdef DEBUG
345 printk("do_040writeback1, res=%d\n",res);
346#endif
347
348 return res;
349}
350
351/* after an exception in a writeback the stack frame corresponding
352 * to that exception is discarded, set a few bits in the old frame
353 * to simulate what it should look like
354 */
355static inline void fix_xframe040(struct frame *fp, unsigned long wba, unsigned short wbs)
356{
357 fp->un.fmt7.faddr = wba;
358 fp->un.fmt7.ssw = wbs & 0xff;
359 if (wba != current->thread.faddr)
360 fp->un.fmt7.ssw |= MA_040;
361}
362
363static inline void do_040writebacks(struct frame *fp)
364{
365 int res = 0;
366#if 0
367 if (fp->un.fmt7.wb1s & WBV_040)
368 printk("access_error040: cannot handle 1st writeback. oops.\n");
369#endif
370
371 if ((fp->un.fmt7.wb2s & WBV_040) &&
372 !(fp->un.fmt7.wb2s & WBTT_040)) {
373 res = do_040writeback1(fp->un.fmt7.wb2s, fp->un.fmt7.wb2a,
374 fp->un.fmt7.wb2d);
375 if (res)
376 fix_xframe040(fp, fp->un.fmt7.wb2a, fp->un.fmt7.wb2s);
377 else
378 fp->un.fmt7.wb2s = 0;
379 }
380
381 /* do the 2nd wb only if the first one was successful (except for a kernel wb) */
382 if (fp->un.fmt7.wb3s & WBV_040 && (!res || fp->un.fmt7.wb3s & 4)) {
383 res = do_040writeback1(fp->un.fmt7.wb3s, fp->un.fmt7.wb3a,
384 fp->un.fmt7.wb3d);
385 if (res)
386 {
387 fix_xframe040(fp, fp->un.fmt7.wb3a, fp->un.fmt7.wb3s);
388
389 fp->un.fmt7.wb2s = fp->un.fmt7.wb3s;
390 fp->un.fmt7.wb3s &= (~WBV_040);
391 fp->un.fmt7.wb2a = fp->un.fmt7.wb3a;
392 fp->un.fmt7.wb2d = fp->un.fmt7.wb3d;
393 }
394 else
395 fp->un.fmt7.wb3s = 0;
396 }
397
398 if (res)
399 send_fault_sig(&fp->ptregs);
400}
401
402/*
403 * called from sigreturn(), must ensure userspace code didn't
404 * manipulate exception frame to circumvent protection, then complete
405 * pending writebacks
406 * we just clear TM2 to turn it into a userspace access
407 */
408asmlinkage void berr_040cleanup(struct frame *fp)
409{
410 fp->un.fmt7.wb2s &= ~4;
411 fp->un.fmt7.wb3s &= ~4;
412
413 do_040writebacks(fp);
414}
415
416static inline void access_error040(struct frame *fp)
417{
418 unsigned short ssw = fp->un.fmt7.ssw;
419 unsigned long mmusr;
420
421#ifdef DEBUG
422 printk("ssw=%#x, fa=%#lx\n", ssw, fp->un.fmt7.faddr);
423 printk("wb1s=%#x, wb2s=%#x, wb3s=%#x\n", fp->un.fmt7.wb1s,
424 fp->un.fmt7.wb2s, fp->un.fmt7.wb3s);
425 printk ("wb2a=%lx, wb3a=%lx, wb2d=%lx, wb3d=%lx\n",
426 fp->un.fmt7.wb2a, fp->un.fmt7.wb3a,
427 fp->un.fmt7.wb2d, fp->un.fmt7.wb3d);
428#endif
429
430 if (ssw & ATC_040) {
431 unsigned long addr = fp->un.fmt7.faddr;
432 unsigned long errorcode;
433
434 /*
435 * The MMU status has to be determined AFTER the address
436 * has been corrected if there was a misaligned access (MA).
437 */
438 if (ssw & MA_040)
439 addr = (addr + 7) & -8;
440
441 /* MMU error, get the MMUSR info for this access */
442 mmusr = probe040(!(ssw & RW_040), addr, ssw);
443#ifdef DEBUG
444 printk("mmusr = %lx\n", mmusr);
445#endif
446 errorcode = 1;
447 if (!(mmusr & MMU_R_040)) {
448 /* clear the invalid atc entry */
449 __flush_tlb040_one(addr);
450 errorcode = 0;
451 }
452
453 /* despite what documentation seems to say, RMW
454 * accesses have always both the LK and RW bits set */
455 if (!(ssw & RW_040) || (ssw & LK_040))
456 errorcode |= 2;
457
458 if (do_page_fault(&fp->ptregs, addr, errorcode)) {
459#ifdef DEBUG
460 printk("do_page_fault() !=0\n");
461#endif
462 if (user_mode(&fp->ptregs)){
463 /* delay writebacks after signal delivery */
464#ifdef DEBUG
465 printk(".. was usermode - return\n");
466#endif
467 return;
468 }
469 /* disable writeback into user space from kernel
470 * (if do_page_fault didn't fix the mapping,
471 * the writeback won't do good)
472 */
473disable_wb:
474#ifdef DEBUG
475 printk(".. disabling wb2\n");
476#endif
477 if (fp->un.fmt7.wb2a == fp->un.fmt7.faddr)
478 fp->un.fmt7.wb2s &= ~WBV_040;
479 if (fp->un.fmt7.wb3a == fp->un.fmt7.faddr)
480 fp->un.fmt7.wb3s &= ~WBV_040;
481 }
482 } else {
483 /* In case of a bus error we either kill the process or expect
484 * the kernel to catch the fault, which then is also responsible
485 * for cleaning up the mess.
486 */
487 current->thread.signo = SIGBUS;
488 current->thread.faddr = fp->un.fmt7.faddr;
489 if (send_fault_sig(&fp->ptregs) >= 0)
490 printk("68040 bus error (ssw=%x, faddr=%lx)\n", ssw,
491 fp->un.fmt7.faddr);
492 goto disable_wb;
493 }
494
495 do_040writebacks(fp);
496}
497#endif /* CONFIG_M68040 */
498
499#if defined(CONFIG_SUN3)
500#include <asm/sun3mmu.h>
501
502extern int mmu_emu_handle_fault (unsigned long, int, int);
503
504/* sun3 version of bus_error030 */
505
506static inline void bus_error030 (struct frame *fp)
507{
508 unsigned char buserr_type = sun3_get_buserr ();
509 unsigned long addr, errorcode;
510 unsigned short ssw = fp->un.fmtb.ssw;
511 extern unsigned long _sun3_map_test_start, _sun3_map_test_end;
512
513#ifdef DEBUG
514 if (ssw & (FC | FB))
515 printk ("Instruction fault at %#010lx\n",
516 ssw & FC ?
517 fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2
518 :
519 fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
520 if (ssw & DF)
521 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
522 ssw & RW ? "read" : "write",
523 fp->un.fmtb.daddr,
524 space_names[ssw & DFC], fp->ptregs.pc);
525#endif
526
527 /*
528 * Check if this page should be demand-mapped. This needs to go before
529 * the testing for a bad kernel-space access (demand-mapping applies
530 * to kernel accesses too).
531 */
532
533 if ((ssw & DF)
534 && (buserr_type & (SUN3_BUSERR_PROTERR | SUN3_BUSERR_INVALID))) {
535 if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 0))
536 return;
537 }
538
539 /* Check for kernel-space pagefault (BAD). */
540 if (fp->ptregs.sr & PS_S) {
541 /* kernel fault must be a data fault to user space */
542 if (! ((ssw & DF) && ((ssw & DFC) == USER_DATA))) {
543 // try checking the kernel mappings before surrender
544 if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 1))
545 return;
546 /* instruction fault or kernel data fault! */
547 if (ssw & (FC | FB))
548 printk ("Instruction fault at %#010lx\n",
549 fp->ptregs.pc);
550 if (ssw & DF) {
551 /* was this fault incurred testing bus mappings? */
552 if((fp->ptregs.pc >= (unsigned long)&_sun3_map_test_start) &&
553 (fp->ptregs.pc <= (unsigned long)&_sun3_map_test_end)) {
554 send_fault_sig(&fp->ptregs);
555 return;
556 }
557
558 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
559 ssw & RW ? "read" : "write",
560 fp->un.fmtb.daddr,
561 space_names[ssw & DFC], fp->ptregs.pc);
562 }
563 printk ("BAD KERNEL BUSERR\n");
564
565 die_if_kernel("Oops", &fp->ptregs,0);
566 force_sig(SIGKILL, current);
567 return;
568 }
569 } else {
570 /* user fault */
571 if (!(ssw & (FC | FB)) && !(ssw & DF))
572 /* not an instruction fault or data fault! BAD */
573 panic ("USER BUSERR w/o instruction or data fault");
574 }
575
576
577 /* First handle the data fault, if any. */
578 if (ssw & DF) {
579 addr = fp->un.fmtb.daddr;
580
581// errorcode bit 0: 0 -> no page 1 -> protection fault
582// errorcode bit 1: 0 -> read fault 1 -> write fault
583
584// (buserr_type & SUN3_BUSERR_PROTERR) -> protection fault
585// (buserr_type & SUN3_BUSERR_INVALID) -> invalid page fault
586
587 if (buserr_type & SUN3_BUSERR_PROTERR)
588 errorcode = 0x01;
589 else if (buserr_type & SUN3_BUSERR_INVALID)
590 errorcode = 0x00;
591 else {
592#ifdef DEBUG
593 printk ("*** unexpected busfault type=%#04x\n", buserr_type);
594 printk ("invalid %s access at %#lx from pc %#lx\n",
595 !(ssw & RW) ? "write" : "read", addr,
596 fp->ptregs.pc);
597#endif
598 die_if_kernel ("Oops", &fp->ptregs, buserr_type);
599 force_sig (SIGBUS, current);
600 return;
601 }
602
603//todo: wtf is RM bit? --m
604 if (!(ssw & RW) || ssw & RM)
605 errorcode |= 0x02;
606
607 /* Handle page fault. */
608 do_page_fault (&fp->ptregs, addr, errorcode);
609
610 /* Retry the data fault now. */
611 return;
612 }
613
614 /* Now handle the instruction fault. */
615
616 /* Get the fault address. */
617 if (fp->ptregs.format == 0xA)
618 addr = fp->ptregs.pc + 4;
619 else
620 addr = fp->un.fmtb.baddr;
621 if (ssw & FC)
622 addr -= 2;
623
624 if (buserr_type & SUN3_BUSERR_INVALID) {
625 if (!mmu_emu_handle_fault (fp->un.fmtb.daddr, 1, 0))
626 do_page_fault (&fp->ptregs, addr, 0);
627 } else {
628#ifdef DEBUG
629 printk ("protection fault on insn access (segv).\n");
630#endif
631 force_sig (SIGSEGV, current);
632 }
633}
634#else
635#if defined(CPU_M68020_OR_M68030)
636static inline void bus_error030 (struct frame *fp)
637{
638 volatile unsigned short temp;
639 unsigned short mmusr;
640 unsigned long addr, errorcode;
641 unsigned short ssw = fp->un.fmtb.ssw;
642#ifdef DEBUG
643 unsigned long desc;
644
645 printk ("pid = %x ", current->pid);
646 printk ("SSW=%#06x ", ssw);
647
648 if (ssw & (FC | FB))
649 printk ("Instruction fault at %#010lx\n",
650 ssw & FC ?
651 fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2
652 :
653 fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
654 if (ssw & DF)
655 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
656 ssw & RW ? "read" : "write",
657 fp->un.fmtb.daddr,
658 space_names[ssw & DFC], fp->ptregs.pc);
659#endif
660
661 /* ++andreas: If a data fault and an instruction fault happen
662 at the same time map in both pages. */
663
664 /* First handle the data fault, if any. */
665 if (ssw & DF) {
666 addr = fp->un.fmtb.daddr;
667
668#ifdef DEBUG
669 asm volatile ("ptestr %3,%2@,#7,%0\n\t"
670 "pmove %%psr,%1@"
671 : "=a&" (desc)
672 : "a" (&temp), "a" (addr), "d" (ssw));
673#else
674 asm volatile ("ptestr %2,%1@,#7\n\t"
675 "pmove %%psr,%0@"
676 : : "a" (&temp), "a" (addr), "d" (ssw));
677#endif
678 mmusr = temp;
679
680#ifdef DEBUG
681 printk("mmusr is %#x for addr %#lx in task %p\n",
682 mmusr, addr, current);
683 printk("descriptor address is %#lx, contents %#lx\n",
684 __va(desc), *(unsigned long *)__va(desc));
685#endif
686
687 errorcode = (mmusr & MMU_I) ? 0 : 1;
688 if (!(ssw & RW) || (ssw & RM))
689 errorcode |= 2;
690
691 if (mmusr & (MMU_I | MMU_WP)) {
692 if (ssw & 4) {
693 printk("Data %s fault at %#010lx in %s (pc=%#lx)\n",
694 ssw & RW ? "read" : "write",
695 fp->un.fmtb.daddr,
696 space_names[ssw & DFC], fp->ptregs.pc);
697 goto buserr;
698 }
699 /* Don't try to do anything further if an exception was
700 handled. */
701 if (do_page_fault (&fp->ptregs, addr, errorcode) < 0)
702 return;
703 } else if (!(mmusr & MMU_I)) {
704 /* probably a 020 cas fault */
705 if (!(ssw & RM) && send_fault_sig(&fp->ptregs) > 0)
706 printk("unexpected bus error (%#x,%#x)\n", ssw, mmusr);
707 } else if (mmusr & (MMU_B|MMU_L|MMU_S)) {
708 printk("invalid %s access at %#lx from pc %#lx\n",
709 !(ssw & RW) ? "write" : "read", addr,
710 fp->ptregs.pc);
711 die_if_kernel("Oops",&fp->ptregs,mmusr);
712 force_sig(SIGSEGV, current);
713 return;
714 } else {
715#if 0
716 static volatile long tlong;
717#endif
718
719 printk("weird %s access at %#lx from pc %#lx (ssw is %#x)\n",
720 !(ssw & RW) ? "write" : "read", addr,
721 fp->ptregs.pc, ssw);
722 asm volatile ("ptestr #1,%1@,#0\n\t"
723 "pmove %%psr,%0@"
724 : /* no outputs */
725 : "a" (&temp), "a" (addr));
726 mmusr = temp;
727
728 printk ("level 0 mmusr is %#x\n", mmusr);
729#if 0
730 asm volatile ("pmove %%tt0,%0@"
731 : /* no outputs */
732 : "a" (&tlong));
733 printk("tt0 is %#lx, ", tlong);
734 asm volatile ("pmove %%tt1,%0@"
735 : /* no outputs */
736 : "a" (&tlong));
737 printk("tt1 is %#lx\n", tlong);
738#endif
739#ifdef DEBUG
740 printk("Unknown SIGSEGV - 1\n");
741#endif
742 die_if_kernel("Oops",&fp->ptregs,mmusr);
743 force_sig(SIGSEGV, current);
744 return;
745 }
746
747 /* setup an ATC entry for the access about to be retried */
748 if (!(ssw & RW) || (ssw & RM))
749 asm volatile ("ploadw %1,%0@" : /* no outputs */
750 : "a" (addr), "d" (ssw));
751 else
752 asm volatile ("ploadr %1,%0@" : /* no outputs */
753 : "a" (addr), "d" (ssw));
754 }
755
756 /* Now handle the instruction fault. */
757
758 if (!(ssw & (FC|FB)))
759 return;
760
761 if (fp->ptregs.sr & PS_S) {
762 printk("Instruction fault at %#010lx\n",
763 fp->ptregs.pc);
764 buserr:
765 printk ("BAD KERNEL BUSERR\n");
766 die_if_kernel("Oops",&fp->ptregs,0);
767 force_sig(SIGKILL, current);
768 return;
769 }
770
771 /* get the fault address */
772 if (fp->ptregs.format == 10)
773 addr = fp->ptregs.pc + 4;
774 else
775 addr = fp->un.fmtb.baddr;
776 if (ssw & FC)
777 addr -= 2;
778
779 if ((ssw & DF) && ((addr ^ fp->un.fmtb.daddr) & PAGE_MASK) == 0)
780 /* Insn fault on same page as data fault. But we
781 should still create the ATC entry. */
782 goto create_atc_entry;
783
784#ifdef DEBUG
785 asm volatile ("ptestr #1,%2@,#7,%0\n\t"
786 "pmove %%psr,%1@"
787 : "=a&" (desc)
788 : "a" (&temp), "a" (addr));
789#else
790 asm volatile ("ptestr #1,%1@,#7\n\t"
791 "pmove %%psr,%0@"
792 : : "a" (&temp), "a" (addr));
793#endif
794 mmusr = temp;
795
796#ifdef DEBUG
797 printk ("mmusr is %#x for addr %#lx in task %p\n",
798 mmusr, addr, current);
799 printk ("descriptor address is %#lx, contents %#lx\n",
800 __va(desc), *(unsigned long *)__va(desc));
801#endif
802
803 if (mmusr & MMU_I)
804 do_page_fault (&fp->ptregs, addr, 0);
805 else if (mmusr & (MMU_B|MMU_L|MMU_S)) {
806 printk ("invalid insn access at %#lx from pc %#lx\n",
807 addr, fp->ptregs.pc);
808#ifdef DEBUG
809 printk("Unknown SIGSEGV - 2\n");
810#endif
811 die_if_kernel("Oops",&fp->ptregs,mmusr);
812 force_sig(SIGSEGV, current);
813 return;
814 }
815
816create_atc_entry:
817 /* setup an ATC entry for the access about to be retried */
818 asm volatile ("ploadr #2,%0@" : /* no outputs */
819 : "a" (addr));
820}
821#endif /* CPU_M68020_OR_M68030 */
822#endif /* !CONFIG_SUN3 */
823
824asmlinkage void buserr_c(struct frame *fp)
825{
826 /* Only set esp0 if coming from user mode */
827 if (user_mode(&fp->ptregs))
828 current->thread.esp0 = (unsigned long) fp;
829
830#ifdef DEBUG
831 printk ("*** Bus Error *** Format is %x\n", fp->ptregs.format);
832#endif
833
834 switch (fp->ptregs.format) {
835#if defined (CONFIG_M68060)
836 case 4: /* 68060 access error */
837 access_error060 (fp);
838 break;
839#endif
840#if defined (CONFIG_M68040)
841 case 0x7: /* 68040 access error */
842 access_error040 (fp);
843 break;
844#endif
845#if defined (CPU_M68020_OR_M68030)
846 case 0xa:
847 case 0xb:
848 bus_error030 (fp);
849 break;
850#endif
851 default:
852 die_if_kernel("bad frame format",&fp->ptregs,0);
853#ifdef DEBUG
854 printk("Unknown SIGSEGV - 4\n");
855#endif
856 force_sig(SIGSEGV, current);
857 }
858}
859
860
861static int kstack_depth_to_print = 48;
862
863void show_trace(unsigned long *stack)
864{
865 unsigned long *endstack;
866 unsigned long addr;
867 int i;
868
869 printk("Call Trace:");
870 addr = (unsigned long)stack + THREAD_SIZE - 1;
871 endstack = (unsigned long *)(addr & -THREAD_SIZE);
872 i = 0;
873 while (stack + 1 <= endstack) {
874 addr = *stack++;
875 /*
876 * If the address is either in the text segment of the
877 * kernel, or in the region which contains vmalloc'ed
878 * memory, it *may* be the address of a calling
879 * routine; if so, print it so that someone tracing
880 * down the cause of the crash will be able to figure
881 * out the call path that was taken.
882 */
883 if (__kernel_text_address(addr)) {
884#ifndef CONFIG_KALLSYMS
885 if (i % 5 == 0)
886 printk("\n ");
887#endif
888 printk(" [<%08lx>] %pS\n", addr, (void *)addr);
889 i++;
890 }
891 }
892 printk("\n");
893}
894
895void show_registers(struct pt_regs *regs)
896{
897 struct frame *fp = (struct frame *)regs;
898 mm_segment_t old_fs = get_fs();
899 u16 c, *cp;
900 unsigned long addr;
901 int i;
902
903 print_modules();
904 printk("PC: [<%08lx>] %pS\n", regs->pc, (void *)regs->pc);
905 printk("SR: %04x SP: %p a2: %08lx\n", regs->sr, regs, regs->a2);
906 printk("d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n",
907 regs->d0, regs->d1, regs->d2, regs->d3);
908 printk("d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n",
909 regs->d4, regs->d5, regs->a0, regs->a1);
910
911 printk("Process %s (pid: %d, task=%p)\n",
912 current->comm, task_pid_nr(current), current);
913 addr = (unsigned long)&fp->un;
914 printk("Frame format=%X ", regs->format);
915 switch (regs->format) {
916 case 0x2:
917 printk("instr addr=%08lx\n", fp->un.fmt2.iaddr);
918 addr += sizeof(fp->un.fmt2);
919 break;
920 case 0x3:
921 printk("eff addr=%08lx\n", fp->un.fmt3.effaddr);
922 addr += sizeof(fp->un.fmt3);
923 break;
924 case 0x4:
925 printk((CPU_IS_060 ? "fault addr=%08lx fslw=%08lx\n"
926 : "eff addr=%08lx pc=%08lx\n"),
927 fp->un.fmt4.effaddr, fp->un.fmt4.pc);
928 addr += sizeof(fp->un.fmt4);
929 break;
930 case 0x7:
931 printk("eff addr=%08lx ssw=%04x faddr=%08lx\n",
932 fp->un.fmt7.effaddr, fp->un.fmt7.ssw, fp->un.fmt7.faddr);
933 printk("wb 1 stat/addr/data: %04x %08lx %08lx\n",
934 fp->un.fmt7.wb1s, fp->un.fmt7.wb1a, fp->un.fmt7.wb1dpd0);
935 printk("wb 2 stat/addr/data: %04x %08lx %08lx\n",
936 fp->un.fmt7.wb2s, fp->un.fmt7.wb2a, fp->un.fmt7.wb2d);
937 printk("wb 3 stat/addr/data: %04x %08lx %08lx\n",
938 fp->un.fmt7.wb3s, fp->un.fmt7.wb3a, fp->un.fmt7.wb3d);
939 printk("push data: %08lx %08lx %08lx %08lx\n",
940 fp->un.fmt7.wb1dpd0, fp->un.fmt7.pd1, fp->un.fmt7.pd2,
941 fp->un.fmt7.pd3);
942 addr += sizeof(fp->un.fmt7);
943 break;
944 case 0x9:
945 printk("instr addr=%08lx\n", fp->un.fmt9.iaddr);
946 addr += sizeof(fp->un.fmt9);
947 break;
948 case 0xa:
949 printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n",
950 fp->un.fmta.ssw, fp->un.fmta.isc, fp->un.fmta.isb,
951 fp->un.fmta.daddr, fp->un.fmta.dobuf);
952 addr += sizeof(fp->un.fmta);
953 break;
954 case 0xb:
955 printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n",
956 fp->un.fmtb.ssw, fp->un.fmtb.isc, fp->un.fmtb.isb,
957 fp->un.fmtb.daddr, fp->un.fmtb.dobuf);
958 printk("baddr=%08lx dibuf=%08lx ver=%x\n",
959 fp->un.fmtb.baddr, fp->un.fmtb.dibuf, fp->un.fmtb.ver);
960 addr += sizeof(fp->un.fmtb);
961 break;
962 default:
963 printk("\n");
964 }
965 show_stack(NULL, (unsigned long *)addr);
966
967 printk("Code:");
968 set_fs(KERNEL_DS);
969 cp = (u16 *)regs->pc;
970 for (i = -8; i < 16; i++) {
971 if (get_user(c, cp + i) && i >= 0) {
972 printk(" Bad PC value.");
973 break;
974 }
975 printk(i ? " %04x" : " <%04x>", c);
976 }
977 set_fs(old_fs);
978 printk ("\n");
979}
980
981void show_stack(struct task_struct *task, unsigned long *stack)
982{
983 unsigned long *p;
984 unsigned long *endstack;
985 int i;
986
987 if (!stack) {
988 if (task)
989 stack = (unsigned long *)task->thread.esp0;
990 else
991 stack = (unsigned long *)&stack;
992 }
993 endstack = (unsigned long *)(((unsigned long)stack + THREAD_SIZE - 1) & -THREAD_SIZE);
994
995 printk("Stack from %08lx:", (unsigned long)stack);
996 p = stack;
997 for (i = 0; i < kstack_depth_to_print; i++) {
998 if (p + 1 > endstack)
999 break;
1000 if (i % 8 == 0)
1001 printk("\n ");
1002 printk(" %08lx", *p++);
1003 }
1004 printk("\n");
1005 show_trace(stack);
1006}
1007
1008/*
1009 * The architecture-independent backtrace generator
1010 */
1011void dump_stack(void)
1012{
1013 unsigned long stack;
1014
1015 show_trace(&stack);
1016}
1017
1018EXPORT_SYMBOL(dump_stack);
1019
1020void bad_super_trap (struct frame *fp)
1021{
1022 console_verbose();
1023 if (fp->ptregs.vector < 4 * ARRAY_SIZE(vec_names))
1024 printk ("*** %s *** FORMAT=%X\n",
1025 vec_names[(fp->ptregs.vector) >> 2],
1026 fp->ptregs.format);
1027 else
1028 printk ("*** Exception %d *** FORMAT=%X\n",
1029 (fp->ptregs.vector) >> 2,
1030 fp->ptregs.format);
1031 if (fp->ptregs.vector >> 2 == VEC_ADDRERR && CPU_IS_020_OR_030) {
1032 unsigned short ssw = fp->un.fmtb.ssw;
1033
1034 printk ("SSW=%#06x ", ssw);
1035
1036 if (ssw & RC)
1037 printk ("Pipe stage C instruction fault at %#010lx\n",
1038 (fp->ptregs.format) == 0xA ?
1039 fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2);
1040 if (ssw & RB)
1041 printk ("Pipe stage B instruction fault at %#010lx\n",
1042 (fp->ptregs.format) == 0xA ?
1043 fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
1044 if (ssw & DF)
1045 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
1046 ssw & RW ? "read" : "write",
1047 fp->un.fmtb.daddr, space_names[ssw & DFC],
1048 fp->ptregs.pc);
1049 }
1050 printk ("Current process id is %d\n", task_pid_nr(current));
1051 die_if_kernel("BAD KERNEL TRAP", &fp->ptregs, 0);
1052}
1053
1054asmlinkage void trap_c(struct frame *fp)
1055{
1056 int sig;
1057 siginfo_t info;
1058
1059 if (fp->ptregs.sr & PS_S) {
1060 if (fp->ptregs.vector == VEC_TRACE << 2) {
1061 /* traced a trapping instruction on a 68020/30,
1062 * real exception will be executed afterwards.
1063 */
1064 } else if (!handle_kernel_fault(&fp->ptregs))
1065 bad_super_trap(fp);
1066 return;
1067 }
1068
1069 /* send the appropriate signal to the user program */
1070 switch ((fp->ptregs.vector) >> 2) {
1071 case VEC_ADDRERR:
1072 info.si_code = BUS_ADRALN;
1073 sig = SIGBUS;
1074 break;
1075 case VEC_ILLEGAL:
1076 case VEC_LINE10:
1077 case VEC_LINE11:
1078 info.si_code = ILL_ILLOPC;
1079 sig = SIGILL;
1080 break;
1081 case VEC_PRIV:
1082 info.si_code = ILL_PRVOPC;
1083 sig = SIGILL;
1084 break;
1085 case VEC_COPROC:
1086 info.si_code = ILL_COPROC;
1087 sig = SIGILL;
1088 break;
1089 case VEC_TRAP1:
1090 case VEC_TRAP2:
1091 case VEC_TRAP3:
1092 case VEC_TRAP4:
1093 case VEC_TRAP5:
1094 case VEC_TRAP6:
1095 case VEC_TRAP7:
1096 case VEC_TRAP8:
1097 case VEC_TRAP9:
1098 case VEC_TRAP10:
1099 case VEC_TRAP11:
1100 case VEC_TRAP12:
1101 case VEC_TRAP13:
1102 case VEC_TRAP14:
1103 info.si_code = ILL_ILLTRP;
1104 sig = SIGILL;
1105 break;
1106 case VEC_FPBRUC:
1107 case VEC_FPOE:
1108 case VEC_FPNAN:
1109 info.si_code = FPE_FLTINV;
1110 sig = SIGFPE;
1111 break;
1112 case VEC_FPIR:
1113 info.si_code = FPE_FLTRES;
1114 sig = SIGFPE;
1115 break;
1116 case VEC_FPDIVZ:
1117 info.si_code = FPE_FLTDIV;
1118 sig = SIGFPE;
1119 break;
1120 case VEC_FPUNDER:
1121 info.si_code = FPE_FLTUND;
1122 sig = SIGFPE;
1123 break;
1124 case VEC_FPOVER:
1125 info.si_code = FPE_FLTOVF;
1126 sig = SIGFPE;
1127 break;
1128 case VEC_ZERODIV:
1129 info.si_code = FPE_INTDIV;
1130 sig = SIGFPE;
1131 break;
1132 case VEC_CHK:
1133 case VEC_TRAP:
1134 info.si_code = FPE_INTOVF;
1135 sig = SIGFPE;
1136 break;
1137 case VEC_TRACE: /* ptrace single step */
1138 info.si_code = TRAP_TRACE;
1139 sig = SIGTRAP;
1140 break;
1141 case VEC_TRAP15: /* breakpoint */
1142 info.si_code = TRAP_BRKPT;
1143 sig = SIGTRAP;
1144 break;
1145 default:
1146 info.si_code = ILL_ILLOPC;
1147 sig = SIGILL;
1148 break;
1149 }
1150 info.si_signo = sig;
1151 info.si_errno = 0;
1152 switch (fp->ptregs.format) {
1153 default:
1154 info.si_addr = (void *) fp->ptregs.pc;
1155 break;
1156 case 2:
1157 info.si_addr = (void *) fp->un.fmt2.iaddr;
1158 break;
1159 case 7:
1160 info.si_addr = (void *) fp->un.fmt7.effaddr;
1161 break;
1162 case 9:
1163 info.si_addr = (void *) fp->un.fmt9.iaddr;
1164 break;
1165 case 10:
1166 info.si_addr = (void *) fp->un.fmta.daddr;
1167 break;
1168 case 11:
1169 info.si_addr = (void *) fp->un.fmtb.daddr;
1170 break;
1171 }
1172 force_sig_info (sig, &info, current);
1173}
1174
1175void die_if_kernel (char *str, struct pt_regs *fp, int nr)
1176{
1177 if (!(fp->sr & PS_S))
1178 return;
1179
1180 console_verbose();
1181 printk("%s: %08x\n",str,nr);
1182 show_registers(fp);
1183 add_taint(TAINT_DIE);
1184 do_exit(SIGSEGV);
1185}
1186
1187/*
1188 * This function is called if an error occur while accessing
1189 * user-space from the fpsp040 code.
1190 */
1191asmlinkage void fpsp040_die(void)
1192{
1193 do_exit(SIGSEGV);
1194}
1195
1196#ifdef CONFIG_M68KFPU_EMU
1197asmlinkage void fpemu_signal(int signal, int code, void *addr)
1198{
1199 siginfo_t info;
1200
1201 info.si_signo = signal;
1202 info.si_errno = 0;
1203 info.si_code = code;
1204 info.si_addr = addr;
1205 force_sig_info(signal, &info, current);
1206}
1207#endif 5#endif
diff --git a/arch/m68k/kernel/traps_mm.c b/arch/m68k/kernel/traps_mm.c
new file mode 100644
index 000000000000..4022bbc28878
--- /dev/null
+++ b/arch/m68k/kernel/traps_mm.c
@@ -0,0 +1,1207 @@
1/*
2 * linux/arch/m68k/kernel/traps.c
3 *
4 * Copyright (C) 1993, 1994 by Hamish Macdonald
5 *
6 * 68040 fixes by Michael Rausch
7 * 68040 fixes by Martin Apel
8 * 68040 fixes and writeback by Richard Zidlicky
9 * 68060 fixes by Roman Hodek
10 * 68060 fixes by Jesper Skov
11 *
12 * This file is subject to the terms and conditions of the GNU General Public
13 * License. See the file COPYING in the main directory of this archive
14 * for more details.
15 */
16
17/*
18 * Sets up all exception vectors
19 */
20
21#include <linux/sched.h>
22#include <linux/signal.h>
23#include <linux/kernel.h>
24#include <linux/mm.h>
25#include <linux/module.h>
26#include <linux/user.h>
27#include <linux/string.h>
28#include <linux/linkage.h>
29#include <linux/init.h>
30#include <linux/ptrace.h>
31#include <linux/kallsyms.h>
32
33#include <asm/setup.h>
34#include <asm/fpu.h>
35#include <asm/system.h>
36#include <asm/uaccess.h>
37#include <asm/traps.h>
38#include <asm/pgalloc.h>
39#include <asm/machdep.h>
40#include <asm/siginfo.h>
41
42/* assembler routines */
43asmlinkage void system_call(void);
44asmlinkage void buserr(void);
45asmlinkage void trap(void);
46asmlinkage void nmihandler(void);
47#ifdef CONFIG_M68KFPU_EMU
48asmlinkage void fpu_emu(void);
49#endif
50
51e_vector vectors[256];
52
53/* nmi handler for the Amiga */
54asm(".text\n"
55 __ALIGN_STR "\n"
56 "nmihandler: rte");
57
58/*
59 * this must be called very early as the kernel might
60 * use some instruction that are emulated on the 060
61 * and so we're prepared for early probe attempts (e.g. nf_init).
62 */
63void __init base_trap_init(void)
64{
65 if (MACH_IS_SUN3X) {
66 extern e_vector *sun3x_prom_vbr;
67
68 __asm__ volatile ("movec %%vbr, %0" : "=r" (sun3x_prom_vbr));
69 }
70
71 /* setup the exception vector table */
72 __asm__ volatile ("movec %0,%%vbr" : : "r" ((void*)vectors));
73
74 if (CPU_IS_060) {
75 /* set up ISP entry points */
76 asmlinkage void unimp_vec(void) asm ("_060_isp_unimp");
77
78 vectors[VEC_UNIMPII] = unimp_vec;
79 }
80
81 vectors[VEC_BUSERR] = buserr;
82 vectors[VEC_ILLEGAL] = trap;
83 vectors[VEC_SYS] = system_call;
84}
85
86void __init trap_init (void)
87{
88 int i;
89
90 for (i = VEC_SPUR; i <= VEC_INT7; i++)
91 vectors[i] = bad_inthandler;
92
93 for (i = 0; i < VEC_USER; i++)
94 if (!vectors[i])
95 vectors[i] = trap;
96
97 for (i = VEC_USER; i < 256; i++)
98 vectors[i] = bad_inthandler;
99
100#ifdef CONFIG_M68KFPU_EMU
101 if (FPU_IS_EMU)
102 vectors[VEC_LINE11] = fpu_emu;
103#endif
104
105 if (CPU_IS_040 && !FPU_IS_EMU) {
106 /* set up FPSP entry points */
107 asmlinkage void dz_vec(void) asm ("dz");
108 asmlinkage void inex_vec(void) asm ("inex");
109 asmlinkage void ovfl_vec(void) asm ("ovfl");
110 asmlinkage void unfl_vec(void) asm ("unfl");
111 asmlinkage void snan_vec(void) asm ("snan");
112 asmlinkage void operr_vec(void) asm ("operr");
113 asmlinkage void bsun_vec(void) asm ("bsun");
114 asmlinkage void fline_vec(void) asm ("fline");
115 asmlinkage void unsupp_vec(void) asm ("unsupp");
116
117 vectors[VEC_FPDIVZ] = dz_vec;
118 vectors[VEC_FPIR] = inex_vec;
119 vectors[VEC_FPOVER] = ovfl_vec;
120 vectors[VEC_FPUNDER] = unfl_vec;
121 vectors[VEC_FPNAN] = snan_vec;
122 vectors[VEC_FPOE] = operr_vec;
123 vectors[VEC_FPBRUC] = bsun_vec;
124 vectors[VEC_LINE11] = fline_vec;
125 vectors[VEC_FPUNSUP] = unsupp_vec;
126 }
127
128 if (CPU_IS_060 && !FPU_IS_EMU) {
129 /* set up IFPSP entry points */
130 asmlinkage void snan_vec6(void) asm ("_060_fpsp_snan");
131 asmlinkage void operr_vec6(void) asm ("_060_fpsp_operr");
132 asmlinkage void ovfl_vec6(void) asm ("_060_fpsp_ovfl");
133 asmlinkage void unfl_vec6(void) asm ("_060_fpsp_unfl");
134 asmlinkage void dz_vec6(void) asm ("_060_fpsp_dz");
135 asmlinkage void inex_vec6(void) asm ("_060_fpsp_inex");
136 asmlinkage void fline_vec6(void) asm ("_060_fpsp_fline");
137 asmlinkage void unsupp_vec6(void) asm ("_060_fpsp_unsupp");
138 asmlinkage void effadd_vec6(void) asm ("_060_fpsp_effadd");
139
140 vectors[VEC_FPNAN] = snan_vec6;
141 vectors[VEC_FPOE] = operr_vec6;
142 vectors[VEC_FPOVER] = ovfl_vec6;
143 vectors[VEC_FPUNDER] = unfl_vec6;
144 vectors[VEC_FPDIVZ] = dz_vec6;
145 vectors[VEC_FPIR] = inex_vec6;
146 vectors[VEC_LINE11] = fline_vec6;
147 vectors[VEC_FPUNSUP] = unsupp_vec6;
148 vectors[VEC_UNIMPEA] = effadd_vec6;
149 }
150
151 /* if running on an amiga, make the NMI interrupt do nothing */
152 if (MACH_IS_AMIGA) {
153 vectors[VEC_INT7] = nmihandler;
154 }
155}
156
157
158static const char *vec_names[] = {
159 [VEC_RESETSP] = "RESET SP",
160 [VEC_RESETPC] = "RESET PC",
161 [VEC_BUSERR] = "BUS ERROR",
162 [VEC_ADDRERR] = "ADDRESS ERROR",
163 [VEC_ILLEGAL] = "ILLEGAL INSTRUCTION",
164 [VEC_ZERODIV] = "ZERO DIVIDE",
165 [VEC_CHK] = "CHK",
166 [VEC_TRAP] = "TRAPcc",
167 [VEC_PRIV] = "PRIVILEGE VIOLATION",
168 [VEC_TRACE] = "TRACE",
169 [VEC_LINE10] = "LINE 1010",
170 [VEC_LINE11] = "LINE 1111",
171 [VEC_RESV12] = "UNASSIGNED RESERVED 12",
172 [VEC_COPROC] = "COPROCESSOR PROTOCOL VIOLATION",
173 [VEC_FORMAT] = "FORMAT ERROR",
174 [VEC_UNINT] = "UNINITIALIZED INTERRUPT",
175 [VEC_RESV16] = "UNASSIGNED RESERVED 16",
176 [VEC_RESV17] = "UNASSIGNED RESERVED 17",
177 [VEC_RESV18] = "UNASSIGNED RESERVED 18",
178 [VEC_RESV19] = "UNASSIGNED RESERVED 19",
179 [VEC_RESV20] = "UNASSIGNED RESERVED 20",
180 [VEC_RESV21] = "UNASSIGNED RESERVED 21",
181 [VEC_RESV22] = "UNASSIGNED RESERVED 22",
182 [VEC_RESV23] = "UNASSIGNED RESERVED 23",
183 [VEC_SPUR] = "SPURIOUS INTERRUPT",
184 [VEC_INT1] = "LEVEL 1 INT",
185 [VEC_INT2] = "LEVEL 2 INT",
186 [VEC_INT3] = "LEVEL 3 INT",
187 [VEC_INT4] = "LEVEL 4 INT",
188 [VEC_INT5] = "LEVEL 5 INT",
189 [VEC_INT6] = "LEVEL 6 INT",
190 [VEC_INT7] = "LEVEL 7 INT",
191 [VEC_SYS] = "SYSCALL",
192 [VEC_TRAP1] = "TRAP #1",
193 [VEC_TRAP2] = "TRAP #2",
194 [VEC_TRAP3] = "TRAP #3",
195 [VEC_TRAP4] = "TRAP #4",
196 [VEC_TRAP5] = "TRAP #5",
197 [VEC_TRAP6] = "TRAP #6",
198 [VEC_TRAP7] = "TRAP #7",
199 [VEC_TRAP8] = "TRAP #8",
200 [VEC_TRAP9] = "TRAP #9",
201 [VEC_TRAP10] = "TRAP #10",
202 [VEC_TRAP11] = "TRAP #11",
203 [VEC_TRAP12] = "TRAP #12",
204 [VEC_TRAP13] = "TRAP #13",
205 [VEC_TRAP14] = "TRAP #14",
206 [VEC_TRAP15] = "TRAP #15",
207 [VEC_FPBRUC] = "FPCP BSUN",
208 [VEC_FPIR] = "FPCP INEXACT",
209 [VEC_FPDIVZ] = "FPCP DIV BY 0",
210 [VEC_FPUNDER] = "FPCP UNDERFLOW",
211 [VEC_FPOE] = "FPCP OPERAND ERROR",
212 [VEC_FPOVER] = "FPCP OVERFLOW",
213 [VEC_FPNAN] = "FPCP SNAN",
214 [VEC_FPUNSUP] = "FPCP UNSUPPORTED OPERATION",
215 [VEC_MMUCFG] = "MMU CONFIGURATION ERROR",
216 [VEC_MMUILL] = "MMU ILLEGAL OPERATION ERROR",
217 [VEC_MMUACC] = "MMU ACCESS LEVEL VIOLATION ERROR",
218 [VEC_RESV59] = "UNASSIGNED RESERVED 59",
219 [VEC_UNIMPEA] = "UNASSIGNED RESERVED 60",
220 [VEC_UNIMPII] = "UNASSIGNED RESERVED 61",
221 [VEC_RESV62] = "UNASSIGNED RESERVED 62",
222 [VEC_RESV63] = "UNASSIGNED RESERVED 63",
223};
224
225static const char *space_names[] = {
226 [0] = "Space 0",
227 [USER_DATA] = "User Data",
228 [USER_PROGRAM] = "User Program",
229#ifndef CONFIG_SUN3
230 [3] = "Space 3",
231#else
232 [FC_CONTROL] = "Control",
233#endif
234 [4] = "Space 4",
235 [SUPER_DATA] = "Super Data",
236 [SUPER_PROGRAM] = "Super Program",
237 [CPU_SPACE] = "CPU"
238};
239
240void die_if_kernel(char *,struct pt_regs *,int);
241asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address,
242 unsigned long error_code);
243int send_fault_sig(struct pt_regs *regs);
244
245asmlinkage void trap_c(struct frame *fp);
246
247#if defined (CONFIG_M68060)
248static inline void access_error060 (struct frame *fp)
249{
250 unsigned long fslw = fp->un.fmt4.pc; /* is really FSLW for access error */
251
252#ifdef DEBUG
253 printk("fslw=%#lx, fa=%#lx\n", fslw, fp->un.fmt4.effaddr);
254#endif
255
256 if (fslw & MMU060_BPE) {
257 /* branch prediction error -> clear branch cache */
258 __asm__ __volatile__ ("movec %/cacr,%/d0\n\t"
259 "orl #0x00400000,%/d0\n\t"
260 "movec %/d0,%/cacr"
261 : : : "d0" );
262 /* return if there's no other error */
263 if (!(fslw & MMU060_ERR_BITS) && !(fslw & MMU060_SEE))
264 return;
265 }
266
267 if (fslw & (MMU060_DESC_ERR | MMU060_WP | MMU060_SP)) {
268 unsigned long errorcode;
269 unsigned long addr = fp->un.fmt4.effaddr;
270
271 if (fslw & MMU060_MA)
272 addr = (addr + PAGE_SIZE - 1) & PAGE_MASK;
273
274 errorcode = 1;
275 if (fslw & MMU060_DESC_ERR) {
276 __flush_tlb040_one(addr);
277 errorcode = 0;
278 }
279 if (fslw & MMU060_W)
280 errorcode |= 2;
281#ifdef DEBUG
282 printk("errorcode = %d\n", errorcode );
283#endif
284 do_page_fault(&fp->ptregs, addr, errorcode);
285 } else if (fslw & (MMU060_SEE)){
286 /* Software Emulation Error.
287 * fault during mem_read/mem_write in ifpsp060/os.S
288 */
289 send_fault_sig(&fp->ptregs);
290 } else if (!(fslw & (MMU060_RE|MMU060_WE)) ||
291 send_fault_sig(&fp->ptregs) > 0) {
292 printk("pc=%#lx, fa=%#lx\n", fp->ptregs.pc, fp->un.fmt4.effaddr);
293 printk( "68060 access error, fslw=%lx\n", fslw );
294 trap_c( fp );
295 }
296}
297#endif /* CONFIG_M68060 */
298
299#if defined (CONFIG_M68040)
300static inline unsigned long probe040(int iswrite, unsigned long addr, int wbs)
301{
302 unsigned long mmusr;
303 mm_segment_t old_fs = get_fs();
304
305 set_fs(MAKE_MM_SEG(wbs));
306
307 if (iswrite)
308 asm volatile (".chip 68040; ptestw (%0); .chip 68k" : : "a" (addr));
309 else
310 asm volatile (".chip 68040; ptestr (%0); .chip 68k" : : "a" (addr));
311
312 asm volatile (".chip 68040; movec %%mmusr,%0; .chip 68k" : "=r" (mmusr));
313
314 set_fs(old_fs);
315
316 return mmusr;
317}
318
319static inline int do_040writeback1(unsigned short wbs, unsigned long wba,
320 unsigned long wbd)
321{
322 int res = 0;
323 mm_segment_t old_fs = get_fs();
324
325 /* set_fs can not be moved, otherwise put_user() may oops */
326 set_fs(MAKE_MM_SEG(wbs));
327
328 switch (wbs & WBSIZ_040) {
329 case BA_SIZE_BYTE:
330 res = put_user(wbd & 0xff, (char __user *)wba);
331 break;
332 case BA_SIZE_WORD:
333 res = put_user(wbd & 0xffff, (short __user *)wba);
334 break;
335 case BA_SIZE_LONG:
336 res = put_user(wbd, (int __user *)wba);
337 break;
338 }
339
340 /* set_fs can not be moved, otherwise put_user() may oops */
341 set_fs(old_fs);
342
343
344#ifdef DEBUG
345 printk("do_040writeback1, res=%d\n",res);
346#endif
347
348 return res;
349}
350
351/* after an exception in a writeback the stack frame corresponding
352 * to that exception is discarded, set a few bits in the old frame
353 * to simulate what it should look like
354 */
355static inline void fix_xframe040(struct frame *fp, unsigned long wba, unsigned short wbs)
356{
357 fp->un.fmt7.faddr = wba;
358 fp->un.fmt7.ssw = wbs & 0xff;
359 if (wba != current->thread.faddr)
360 fp->un.fmt7.ssw |= MA_040;
361}
362
363static inline void do_040writebacks(struct frame *fp)
364{
365 int res = 0;
366#if 0
367 if (fp->un.fmt7.wb1s & WBV_040)
368 printk("access_error040: cannot handle 1st writeback. oops.\n");
369#endif
370
371 if ((fp->un.fmt7.wb2s & WBV_040) &&
372 !(fp->un.fmt7.wb2s & WBTT_040)) {
373 res = do_040writeback1(fp->un.fmt7.wb2s, fp->un.fmt7.wb2a,
374 fp->un.fmt7.wb2d);
375 if (res)
376 fix_xframe040(fp, fp->un.fmt7.wb2a, fp->un.fmt7.wb2s);
377 else
378 fp->un.fmt7.wb2s = 0;
379 }
380
381 /* do the 2nd wb only if the first one was successful (except for a kernel wb) */
382 if (fp->un.fmt7.wb3s & WBV_040 && (!res || fp->un.fmt7.wb3s & 4)) {
383 res = do_040writeback1(fp->un.fmt7.wb3s, fp->un.fmt7.wb3a,
384 fp->un.fmt7.wb3d);
385 if (res)
386 {
387 fix_xframe040(fp, fp->un.fmt7.wb3a, fp->un.fmt7.wb3s);
388
389 fp->un.fmt7.wb2s = fp->un.fmt7.wb3s;
390 fp->un.fmt7.wb3s &= (~WBV_040);
391 fp->un.fmt7.wb2a = fp->un.fmt7.wb3a;
392 fp->un.fmt7.wb2d = fp->un.fmt7.wb3d;
393 }
394 else
395 fp->un.fmt7.wb3s = 0;
396 }
397
398 if (res)
399 send_fault_sig(&fp->ptregs);
400}
401
402/*
403 * called from sigreturn(), must ensure userspace code didn't
404 * manipulate exception frame to circumvent protection, then complete
405 * pending writebacks
406 * we just clear TM2 to turn it into a userspace access
407 */
408asmlinkage void berr_040cleanup(struct frame *fp)
409{
410 fp->un.fmt7.wb2s &= ~4;
411 fp->un.fmt7.wb3s &= ~4;
412
413 do_040writebacks(fp);
414}
415
416static inline void access_error040(struct frame *fp)
417{
418 unsigned short ssw = fp->un.fmt7.ssw;
419 unsigned long mmusr;
420
421#ifdef DEBUG
422 printk("ssw=%#x, fa=%#lx\n", ssw, fp->un.fmt7.faddr);
423 printk("wb1s=%#x, wb2s=%#x, wb3s=%#x\n", fp->un.fmt7.wb1s,
424 fp->un.fmt7.wb2s, fp->un.fmt7.wb3s);
425 printk ("wb2a=%lx, wb3a=%lx, wb2d=%lx, wb3d=%lx\n",
426 fp->un.fmt7.wb2a, fp->un.fmt7.wb3a,
427 fp->un.fmt7.wb2d, fp->un.fmt7.wb3d);
428#endif
429
430 if (ssw & ATC_040) {
431 unsigned long addr = fp->un.fmt7.faddr;
432 unsigned long errorcode;
433
434 /*
435 * The MMU status has to be determined AFTER the address
436 * has been corrected if there was a misaligned access (MA).
437 */
438 if (ssw & MA_040)
439 addr = (addr + 7) & -8;
440
441 /* MMU error, get the MMUSR info for this access */
442 mmusr = probe040(!(ssw & RW_040), addr, ssw);
443#ifdef DEBUG
444 printk("mmusr = %lx\n", mmusr);
445#endif
446 errorcode = 1;
447 if (!(mmusr & MMU_R_040)) {
448 /* clear the invalid atc entry */
449 __flush_tlb040_one(addr);
450 errorcode = 0;
451 }
452
453 /* despite what documentation seems to say, RMW
454 * accesses have always both the LK and RW bits set */
455 if (!(ssw & RW_040) || (ssw & LK_040))
456 errorcode |= 2;
457
458 if (do_page_fault(&fp->ptregs, addr, errorcode)) {
459#ifdef DEBUG
460 printk("do_page_fault() !=0\n");
461#endif
462 if (user_mode(&fp->ptregs)){
463 /* delay writebacks after signal delivery */
464#ifdef DEBUG
465 printk(".. was usermode - return\n");
466#endif
467 return;
468 }
469 /* disable writeback into user space from kernel
470 * (if do_page_fault didn't fix the mapping,
471 * the writeback won't do good)
472 */
473disable_wb:
474#ifdef DEBUG
475 printk(".. disabling wb2\n");
476#endif
477 if (fp->un.fmt7.wb2a == fp->un.fmt7.faddr)
478 fp->un.fmt7.wb2s &= ~WBV_040;
479 if (fp->un.fmt7.wb3a == fp->un.fmt7.faddr)
480 fp->un.fmt7.wb3s &= ~WBV_040;
481 }
482 } else {
483 /* In case of a bus error we either kill the process or expect
484 * the kernel to catch the fault, which then is also responsible
485 * for cleaning up the mess.
486 */
487 current->thread.signo = SIGBUS;
488 current->thread.faddr = fp->un.fmt7.faddr;
489 if (send_fault_sig(&fp->ptregs) >= 0)
490 printk("68040 bus error (ssw=%x, faddr=%lx)\n", ssw,
491 fp->un.fmt7.faddr);
492 goto disable_wb;
493 }
494
495 do_040writebacks(fp);
496}
497#endif /* CONFIG_M68040 */
498
499#if defined(CONFIG_SUN3)
500#include <asm/sun3mmu.h>
501
502extern int mmu_emu_handle_fault (unsigned long, int, int);
503
504/* sun3 version of bus_error030 */
505
506static inline void bus_error030 (struct frame *fp)
507{
508 unsigned char buserr_type = sun3_get_buserr ();
509 unsigned long addr, errorcode;
510 unsigned short ssw = fp->un.fmtb.ssw;
511 extern unsigned long _sun3_map_test_start, _sun3_map_test_end;
512
513#ifdef DEBUG
514 if (ssw & (FC | FB))
515 printk ("Instruction fault at %#010lx\n",
516 ssw & FC ?
517 fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2
518 :
519 fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
520 if (ssw & DF)
521 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
522 ssw & RW ? "read" : "write",
523 fp->un.fmtb.daddr,
524 space_names[ssw & DFC], fp->ptregs.pc);
525#endif
526
527 /*
528 * Check if this page should be demand-mapped. This needs to go before
529 * the testing for a bad kernel-space access (demand-mapping applies
530 * to kernel accesses too).
531 */
532
533 if ((ssw & DF)
534 && (buserr_type & (SUN3_BUSERR_PROTERR | SUN3_BUSERR_INVALID))) {
535 if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 0))
536 return;
537 }
538
539 /* Check for kernel-space pagefault (BAD). */
540 if (fp->ptregs.sr & PS_S) {
541 /* kernel fault must be a data fault to user space */
542 if (! ((ssw & DF) && ((ssw & DFC) == USER_DATA))) {
543 // try checking the kernel mappings before surrender
544 if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 1))
545 return;
546 /* instruction fault or kernel data fault! */
547 if (ssw & (FC | FB))
548 printk ("Instruction fault at %#010lx\n",
549 fp->ptregs.pc);
550 if (ssw & DF) {
551 /* was this fault incurred testing bus mappings? */
552 if((fp->ptregs.pc >= (unsigned long)&_sun3_map_test_start) &&
553 (fp->ptregs.pc <= (unsigned long)&_sun3_map_test_end)) {
554 send_fault_sig(&fp->ptregs);
555 return;
556 }
557
558 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
559 ssw & RW ? "read" : "write",
560 fp->un.fmtb.daddr,
561 space_names[ssw & DFC], fp->ptregs.pc);
562 }
563 printk ("BAD KERNEL BUSERR\n");
564
565 die_if_kernel("Oops", &fp->ptregs,0);
566 force_sig(SIGKILL, current);
567 return;
568 }
569 } else {
570 /* user fault */
571 if (!(ssw & (FC | FB)) && !(ssw & DF))
572 /* not an instruction fault or data fault! BAD */
573 panic ("USER BUSERR w/o instruction or data fault");
574 }
575
576
577 /* First handle the data fault, if any. */
578 if (ssw & DF) {
579 addr = fp->un.fmtb.daddr;
580
581// errorcode bit 0: 0 -> no page 1 -> protection fault
582// errorcode bit 1: 0 -> read fault 1 -> write fault
583
584// (buserr_type & SUN3_BUSERR_PROTERR) -> protection fault
585// (buserr_type & SUN3_BUSERR_INVALID) -> invalid page fault
586
587 if (buserr_type & SUN3_BUSERR_PROTERR)
588 errorcode = 0x01;
589 else if (buserr_type & SUN3_BUSERR_INVALID)
590 errorcode = 0x00;
591 else {
592#ifdef DEBUG
593 printk ("*** unexpected busfault type=%#04x\n", buserr_type);
594 printk ("invalid %s access at %#lx from pc %#lx\n",
595 !(ssw & RW) ? "write" : "read", addr,
596 fp->ptregs.pc);
597#endif
598 die_if_kernel ("Oops", &fp->ptregs, buserr_type);
599 force_sig (SIGBUS, current);
600 return;
601 }
602
603//todo: wtf is RM bit? --m
604 if (!(ssw & RW) || ssw & RM)
605 errorcode |= 0x02;
606
607 /* Handle page fault. */
608 do_page_fault (&fp->ptregs, addr, errorcode);
609
610 /* Retry the data fault now. */
611 return;
612 }
613
614 /* Now handle the instruction fault. */
615
616 /* Get the fault address. */
617 if (fp->ptregs.format == 0xA)
618 addr = fp->ptregs.pc + 4;
619 else
620 addr = fp->un.fmtb.baddr;
621 if (ssw & FC)
622 addr -= 2;
623
624 if (buserr_type & SUN3_BUSERR_INVALID) {
625 if (!mmu_emu_handle_fault (fp->un.fmtb.daddr, 1, 0))
626 do_page_fault (&fp->ptregs, addr, 0);
627 } else {
628#ifdef DEBUG
629 printk ("protection fault on insn access (segv).\n");
630#endif
631 force_sig (SIGSEGV, current);
632 }
633}
634#else
635#if defined(CPU_M68020_OR_M68030)
636static inline void bus_error030 (struct frame *fp)
637{
638 volatile unsigned short temp;
639 unsigned short mmusr;
640 unsigned long addr, errorcode;
641 unsigned short ssw = fp->un.fmtb.ssw;
642#ifdef DEBUG
643 unsigned long desc;
644
645 printk ("pid = %x ", current->pid);
646 printk ("SSW=%#06x ", ssw);
647
648 if (ssw & (FC | FB))
649 printk ("Instruction fault at %#010lx\n",
650 ssw & FC ?
651 fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2
652 :
653 fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
654 if (ssw & DF)
655 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
656 ssw & RW ? "read" : "write",
657 fp->un.fmtb.daddr,
658 space_names[ssw & DFC], fp->ptregs.pc);
659#endif
660
661 /* ++andreas: If a data fault and an instruction fault happen
662 at the same time map in both pages. */
663
664 /* First handle the data fault, if any. */
665 if (ssw & DF) {
666 addr = fp->un.fmtb.daddr;
667
668#ifdef DEBUG
669 asm volatile ("ptestr %3,%2@,#7,%0\n\t"
670 "pmove %%psr,%1@"
671 : "=a&" (desc)
672 : "a" (&temp), "a" (addr), "d" (ssw));
673#else
674 asm volatile ("ptestr %2,%1@,#7\n\t"
675 "pmove %%psr,%0@"
676 : : "a" (&temp), "a" (addr), "d" (ssw));
677#endif
678 mmusr = temp;
679
680#ifdef DEBUG
681 printk("mmusr is %#x for addr %#lx in task %p\n",
682 mmusr, addr, current);
683 printk("descriptor address is %#lx, contents %#lx\n",
684 __va(desc), *(unsigned long *)__va(desc));
685#endif
686
687 errorcode = (mmusr & MMU_I) ? 0 : 1;
688 if (!(ssw & RW) || (ssw & RM))
689 errorcode |= 2;
690
691 if (mmusr & (MMU_I | MMU_WP)) {
692 if (ssw & 4) {
693 printk("Data %s fault at %#010lx in %s (pc=%#lx)\n",
694 ssw & RW ? "read" : "write",
695 fp->un.fmtb.daddr,
696 space_names[ssw & DFC], fp->ptregs.pc);
697 goto buserr;
698 }
699 /* Don't try to do anything further if an exception was
700 handled. */
701 if (do_page_fault (&fp->ptregs, addr, errorcode) < 0)
702 return;
703 } else if (!(mmusr & MMU_I)) {
704 /* probably a 020 cas fault */
705 if (!(ssw & RM) && send_fault_sig(&fp->ptregs) > 0)
706 printk("unexpected bus error (%#x,%#x)\n", ssw, mmusr);
707 } else if (mmusr & (MMU_B|MMU_L|MMU_S)) {
708 printk("invalid %s access at %#lx from pc %#lx\n",
709 !(ssw & RW) ? "write" : "read", addr,
710 fp->ptregs.pc);
711 die_if_kernel("Oops",&fp->ptregs,mmusr);
712 force_sig(SIGSEGV, current);
713 return;
714 } else {
715#if 0
716 static volatile long tlong;
717#endif
718
719 printk("weird %s access at %#lx from pc %#lx (ssw is %#x)\n",
720 !(ssw & RW) ? "write" : "read", addr,
721 fp->ptregs.pc, ssw);
722 asm volatile ("ptestr #1,%1@,#0\n\t"
723 "pmove %%psr,%0@"
724 : /* no outputs */
725 : "a" (&temp), "a" (addr));
726 mmusr = temp;
727
728 printk ("level 0 mmusr is %#x\n", mmusr);
729#if 0
730 asm volatile ("pmove %%tt0,%0@"
731 : /* no outputs */
732 : "a" (&tlong));
733 printk("tt0 is %#lx, ", tlong);
734 asm volatile ("pmove %%tt1,%0@"
735 : /* no outputs */
736 : "a" (&tlong));
737 printk("tt1 is %#lx\n", tlong);
738#endif
739#ifdef DEBUG
740 printk("Unknown SIGSEGV - 1\n");
741#endif
742 die_if_kernel("Oops",&fp->ptregs,mmusr);
743 force_sig(SIGSEGV, current);
744 return;
745 }
746
747 /* setup an ATC entry for the access about to be retried */
748 if (!(ssw & RW) || (ssw & RM))
749 asm volatile ("ploadw %1,%0@" : /* no outputs */
750 : "a" (addr), "d" (ssw));
751 else
752 asm volatile ("ploadr %1,%0@" : /* no outputs */
753 : "a" (addr), "d" (ssw));
754 }
755
756 /* Now handle the instruction fault. */
757
758 if (!(ssw & (FC|FB)))
759 return;
760
761 if (fp->ptregs.sr & PS_S) {
762 printk("Instruction fault at %#010lx\n",
763 fp->ptregs.pc);
764 buserr:
765 printk ("BAD KERNEL BUSERR\n");
766 die_if_kernel("Oops",&fp->ptregs,0);
767 force_sig(SIGKILL, current);
768 return;
769 }
770
771 /* get the fault address */
772 if (fp->ptregs.format == 10)
773 addr = fp->ptregs.pc + 4;
774 else
775 addr = fp->un.fmtb.baddr;
776 if (ssw & FC)
777 addr -= 2;
778
779 if ((ssw & DF) && ((addr ^ fp->un.fmtb.daddr) & PAGE_MASK) == 0)
780 /* Insn fault on same page as data fault. But we
781 should still create the ATC entry. */
782 goto create_atc_entry;
783
784#ifdef DEBUG
785 asm volatile ("ptestr #1,%2@,#7,%0\n\t"
786 "pmove %%psr,%1@"
787 : "=a&" (desc)
788 : "a" (&temp), "a" (addr));
789#else
790 asm volatile ("ptestr #1,%1@,#7\n\t"
791 "pmove %%psr,%0@"
792 : : "a" (&temp), "a" (addr));
793#endif
794 mmusr = temp;
795
796#ifdef DEBUG
797 printk ("mmusr is %#x for addr %#lx in task %p\n",
798 mmusr, addr, current);
799 printk ("descriptor address is %#lx, contents %#lx\n",
800 __va(desc), *(unsigned long *)__va(desc));
801#endif
802
803 if (mmusr & MMU_I)
804 do_page_fault (&fp->ptregs, addr, 0);
805 else if (mmusr & (MMU_B|MMU_L|MMU_S)) {
806 printk ("invalid insn access at %#lx from pc %#lx\n",
807 addr, fp->ptregs.pc);
808#ifdef DEBUG
809 printk("Unknown SIGSEGV - 2\n");
810#endif
811 die_if_kernel("Oops",&fp->ptregs,mmusr);
812 force_sig(SIGSEGV, current);
813 return;
814 }
815
816create_atc_entry:
817 /* setup an ATC entry for the access about to be retried */
818 asm volatile ("ploadr #2,%0@" : /* no outputs */
819 : "a" (addr));
820}
821#endif /* CPU_M68020_OR_M68030 */
822#endif /* !CONFIG_SUN3 */
823
824asmlinkage void buserr_c(struct frame *fp)
825{
826 /* Only set esp0 if coming from user mode */
827 if (user_mode(&fp->ptregs))
828 current->thread.esp0 = (unsigned long) fp;
829
830#ifdef DEBUG
831 printk ("*** Bus Error *** Format is %x\n", fp->ptregs.format);
832#endif
833
834 switch (fp->ptregs.format) {
835#if defined (CONFIG_M68060)
836 case 4: /* 68060 access error */
837 access_error060 (fp);
838 break;
839#endif
840#if defined (CONFIG_M68040)
841 case 0x7: /* 68040 access error */
842 access_error040 (fp);
843 break;
844#endif
845#if defined (CPU_M68020_OR_M68030)
846 case 0xa:
847 case 0xb:
848 bus_error030 (fp);
849 break;
850#endif
851 default:
852 die_if_kernel("bad frame format",&fp->ptregs,0);
853#ifdef DEBUG
854 printk("Unknown SIGSEGV - 4\n");
855#endif
856 force_sig(SIGSEGV, current);
857 }
858}
859
860
861static int kstack_depth_to_print = 48;
862
863void show_trace(unsigned long *stack)
864{
865 unsigned long *endstack;
866 unsigned long addr;
867 int i;
868
869 printk("Call Trace:");
870 addr = (unsigned long)stack + THREAD_SIZE - 1;
871 endstack = (unsigned long *)(addr & -THREAD_SIZE);
872 i = 0;
873 while (stack + 1 <= endstack) {
874 addr = *stack++;
875 /*
876 * If the address is either in the text segment of the
877 * kernel, or in the region which contains vmalloc'ed
878 * memory, it *may* be the address of a calling
879 * routine; if so, print it so that someone tracing
880 * down the cause of the crash will be able to figure
881 * out the call path that was taken.
882 */
883 if (__kernel_text_address(addr)) {
884#ifndef CONFIG_KALLSYMS
885 if (i % 5 == 0)
886 printk("\n ");
887#endif
888 printk(" [<%08lx>] %pS\n", addr, (void *)addr);
889 i++;
890 }
891 }
892 printk("\n");
893}
894
895void show_registers(struct pt_regs *regs)
896{
897 struct frame *fp = (struct frame *)regs;
898 mm_segment_t old_fs = get_fs();
899 u16 c, *cp;
900 unsigned long addr;
901 int i;
902
903 print_modules();
904 printk("PC: [<%08lx>] %pS\n", regs->pc, (void *)regs->pc);
905 printk("SR: %04x SP: %p a2: %08lx\n", regs->sr, regs, regs->a2);
906 printk("d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n",
907 regs->d0, regs->d1, regs->d2, regs->d3);
908 printk("d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n",
909 regs->d4, regs->d5, regs->a0, regs->a1);
910
911 printk("Process %s (pid: %d, task=%p)\n",
912 current->comm, task_pid_nr(current), current);
913 addr = (unsigned long)&fp->un;
914 printk("Frame format=%X ", regs->format);
915 switch (regs->format) {
916 case 0x2:
917 printk("instr addr=%08lx\n", fp->un.fmt2.iaddr);
918 addr += sizeof(fp->un.fmt2);
919 break;
920 case 0x3:
921 printk("eff addr=%08lx\n", fp->un.fmt3.effaddr);
922 addr += sizeof(fp->un.fmt3);
923 break;
924 case 0x4:
925 printk((CPU_IS_060 ? "fault addr=%08lx fslw=%08lx\n"
926 : "eff addr=%08lx pc=%08lx\n"),
927 fp->un.fmt4.effaddr, fp->un.fmt4.pc);
928 addr += sizeof(fp->un.fmt4);
929 break;
930 case 0x7:
931 printk("eff addr=%08lx ssw=%04x faddr=%08lx\n",
932 fp->un.fmt7.effaddr, fp->un.fmt7.ssw, fp->un.fmt7.faddr);
933 printk("wb 1 stat/addr/data: %04x %08lx %08lx\n",
934 fp->un.fmt7.wb1s, fp->un.fmt7.wb1a, fp->un.fmt7.wb1dpd0);
935 printk("wb 2 stat/addr/data: %04x %08lx %08lx\n",
936 fp->un.fmt7.wb2s, fp->un.fmt7.wb2a, fp->un.fmt7.wb2d);
937 printk("wb 3 stat/addr/data: %04x %08lx %08lx\n",
938 fp->un.fmt7.wb3s, fp->un.fmt7.wb3a, fp->un.fmt7.wb3d);
939 printk("push data: %08lx %08lx %08lx %08lx\n",
940 fp->un.fmt7.wb1dpd0, fp->un.fmt7.pd1, fp->un.fmt7.pd2,
941 fp->un.fmt7.pd3);
942 addr += sizeof(fp->un.fmt7);
943 break;
944 case 0x9:
945 printk("instr addr=%08lx\n", fp->un.fmt9.iaddr);
946 addr += sizeof(fp->un.fmt9);
947 break;
948 case 0xa:
949 printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n",
950 fp->un.fmta.ssw, fp->un.fmta.isc, fp->un.fmta.isb,
951 fp->un.fmta.daddr, fp->un.fmta.dobuf);
952 addr += sizeof(fp->un.fmta);
953 break;
954 case 0xb:
955 printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n",
956 fp->un.fmtb.ssw, fp->un.fmtb.isc, fp->un.fmtb.isb,
957 fp->un.fmtb.daddr, fp->un.fmtb.dobuf);
958 printk("baddr=%08lx dibuf=%08lx ver=%x\n",
959 fp->un.fmtb.baddr, fp->un.fmtb.dibuf, fp->un.fmtb.ver);
960 addr += sizeof(fp->un.fmtb);
961 break;
962 default:
963 printk("\n");
964 }
965 show_stack(NULL, (unsigned long *)addr);
966
967 printk("Code:");
968 set_fs(KERNEL_DS);
969 cp = (u16 *)regs->pc;
970 for (i = -8; i < 16; i++) {
971 if (get_user(c, cp + i) && i >= 0) {
972 printk(" Bad PC value.");
973 break;
974 }
975 printk(i ? " %04x" : " <%04x>", c);
976 }
977 set_fs(old_fs);
978 printk ("\n");
979}
980
981void show_stack(struct task_struct *task, unsigned long *stack)
982{
983 unsigned long *p;
984 unsigned long *endstack;
985 int i;
986
987 if (!stack) {
988 if (task)
989 stack = (unsigned long *)task->thread.esp0;
990 else
991 stack = (unsigned long *)&stack;
992 }
993 endstack = (unsigned long *)(((unsigned long)stack + THREAD_SIZE - 1) & -THREAD_SIZE);
994
995 printk("Stack from %08lx:", (unsigned long)stack);
996 p = stack;
997 for (i = 0; i < kstack_depth_to_print; i++) {
998 if (p + 1 > endstack)
999 break;
1000 if (i % 8 == 0)
1001 printk("\n ");
1002 printk(" %08lx", *p++);
1003 }
1004 printk("\n");
1005 show_trace(stack);
1006}
1007
1008/*
1009 * The architecture-independent backtrace generator
1010 */
1011void dump_stack(void)
1012{
1013 unsigned long stack;
1014
1015 show_trace(&stack);
1016}
1017
1018EXPORT_SYMBOL(dump_stack);
1019
1020void bad_super_trap (struct frame *fp)
1021{
1022 console_verbose();
1023 if (fp->ptregs.vector < 4 * ARRAY_SIZE(vec_names))
1024 printk ("*** %s *** FORMAT=%X\n",
1025 vec_names[(fp->ptregs.vector) >> 2],
1026 fp->ptregs.format);
1027 else
1028 printk ("*** Exception %d *** FORMAT=%X\n",
1029 (fp->ptregs.vector) >> 2,
1030 fp->ptregs.format);
1031 if (fp->ptregs.vector >> 2 == VEC_ADDRERR && CPU_IS_020_OR_030) {
1032 unsigned short ssw = fp->un.fmtb.ssw;
1033
1034 printk ("SSW=%#06x ", ssw);
1035
1036 if (ssw & RC)
1037 printk ("Pipe stage C instruction fault at %#010lx\n",
1038 (fp->ptregs.format) == 0xA ?
1039 fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2);
1040 if (ssw & RB)
1041 printk ("Pipe stage B instruction fault at %#010lx\n",
1042 (fp->ptregs.format) == 0xA ?
1043 fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
1044 if (ssw & DF)
1045 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
1046 ssw & RW ? "read" : "write",
1047 fp->un.fmtb.daddr, space_names[ssw & DFC],
1048 fp->ptregs.pc);
1049 }
1050 printk ("Current process id is %d\n", task_pid_nr(current));
1051 die_if_kernel("BAD KERNEL TRAP", &fp->ptregs, 0);
1052}
1053
1054asmlinkage void trap_c(struct frame *fp)
1055{
1056 int sig;
1057 siginfo_t info;
1058
1059 if (fp->ptregs.sr & PS_S) {
1060 if (fp->ptregs.vector == VEC_TRACE << 2) {
1061 /* traced a trapping instruction on a 68020/30,
1062 * real exception will be executed afterwards.
1063 */
1064 } else if (!handle_kernel_fault(&fp->ptregs))
1065 bad_super_trap(fp);
1066 return;
1067 }
1068
1069 /* send the appropriate signal to the user program */
1070 switch ((fp->ptregs.vector) >> 2) {
1071 case VEC_ADDRERR:
1072 info.si_code = BUS_ADRALN;
1073 sig = SIGBUS;
1074 break;
1075 case VEC_ILLEGAL:
1076 case VEC_LINE10:
1077 case VEC_LINE11:
1078 info.si_code = ILL_ILLOPC;
1079 sig = SIGILL;
1080 break;
1081 case VEC_PRIV:
1082 info.si_code = ILL_PRVOPC;
1083 sig = SIGILL;
1084 break;
1085 case VEC_COPROC:
1086 info.si_code = ILL_COPROC;
1087 sig = SIGILL;
1088 break;
1089 case VEC_TRAP1:
1090 case VEC_TRAP2:
1091 case VEC_TRAP3:
1092 case VEC_TRAP4:
1093 case VEC_TRAP5:
1094 case VEC_TRAP6:
1095 case VEC_TRAP7:
1096 case VEC_TRAP8:
1097 case VEC_TRAP9:
1098 case VEC_TRAP10:
1099 case VEC_TRAP11:
1100 case VEC_TRAP12:
1101 case VEC_TRAP13:
1102 case VEC_TRAP14:
1103 info.si_code = ILL_ILLTRP;
1104 sig = SIGILL;
1105 break;
1106 case VEC_FPBRUC:
1107 case VEC_FPOE:
1108 case VEC_FPNAN:
1109 info.si_code = FPE_FLTINV;
1110 sig = SIGFPE;
1111 break;
1112 case VEC_FPIR:
1113 info.si_code = FPE_FLTRES;
1114 sig = SIGFPE;
1115 break;
1116 case VEC_FPDIVZ:
1117 info.si_code = FPE_FLTDIV;
1118 sig = SIGFPE;
1119 break;
1120 case VEC_FPUNDER:
1121 info.si_code = FPE_FLTUND;
1122 sig = SIGFPE;
1123 break;
1124 case VEC_FPOVER:
1125 info.si_code = FPE_FLTOVF;
1126 sig = SIGFPE;
1127 break;
1128 case VEC_ZERODIV:
1129 info.si_code = FPE_INTDIV;
1130 sig = SIGFPE;
1131 break;
1132 case VEC_CHK:
1133 case VEC_TRAP:
1134 info.si_code = FPE_INTOVF;
1135 sig = SIGFPE;
1136 break;
1137 case VEC_TRACE: /* ptrace single step */
1138 info.si_code = TRAP_TRACE;
1139 sig = SIGTRAP;
1140 break;
1141 case VEC_TRAP15: /* breakpoint */
1142 info.si_code = TRAP_BRKPT;
1143 sig = SIGTRAP;
1144 break;
1145 default:
1146 info.si_code = ILL_ILLOPC;
1147 sig = SIGILL;
1148 break;
1149 }
1150 info.si_signo = sig;
1151 info.si_errno = 0;
1152 switch (fp->ptregs.format) {
1153 default:
1154 info.si_addr = (void *) fp->ptregs.pc;
1155 break;
1156 case 2:
1157 info.si_addr = (void *) fp->un.fmt2.iaddr;
1158 break;
1159 case 7:
1160 info.si_addr = (void *) fp->un.fmt7.effaddr;
1161 break;
1162 case 9:
1163 info.si_addr = (void *) fp->un.fmt9.iaddr;
1164 break;
1165 case 10:
1166 info.si_addr = (void *) fp->un.fmta.daddr;
1167 break;
1168 case 11:
1169 info.si_addr = (void *) fp->un.fmtb.daddr;
1170 break;
1171 }
1172 force_sig_info (sig, &info, current);
1173}
1174
1175void die_if_kernel (char *str, struct pt_regs *fp, int nr)
1176{
1177 if (!(fp->sr & PS_S))
1178 return;
1179
1180 console_verbose();
1181 printk("%s: %08x\n",str,nr);
1182 show_registers(fp);
1183 add_taint(TAINT_DIE);
1184 do_exit(SIGSEGV);
1185}
1186
1187/*
1188 * This function is called if an error occur while accessing
1189 * user-space from the fpsp040 code.
1190 */
1191asmlinkage void fpsp040_die(void)
1192{
1193 do_exit(SIGSEGV);
1194}
1195
1196#ifdef CONFIG_M68KFPU_EMU
1197asmlinkage void fpemu_signal(int signal, int code, void *addr)
1198{
1199 siginfo_t info;
1200
1201 info.si_signo = signal;
1202 info.si_errno = 0;
1203 info.si_code = code;
1204 info.si_addr = addr;
1205 force_sig_info(signal, &info, current);
1206}
1207#endif
diff --git a/arch/m68k/kernel/traps_no.c b/arch/m68k/kernel/traps_no.c
new file mode 100644
index 000000000000..a768008dfd06
--- /dev/null
+++ b/arch/m68k/kernel/traps_no.c
@@ -0,0 +1,365 @@
1/*
2 * linux/arch/m68knommu/kernel/traps.c
3 *
4 * Copyright (C) 1993, 1994 by Hamish Macdonald
5 *
6 * 68040 fixes by Michael Rausch
7 * 68040 fixes by Martin Apel
8 * 68060 fixes by Roman Hodek
9 * 68060 fixes by Jesper Skov
10 *
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file COPYING in the main directory of this archive
13 * for more details.
14 */
15
16/*
17 * Sets up all exception vectors
18 */
19#include <linux/sched.h>
20#include <linux/signal.h>
21#include <linux/kernel.h>
22#include <linux/mm.h>
23#include <linux/module.h>
24#include <linux/types.h>
25#include <linux/user.h>
26#include <linux/string.h>
27#include <linux/linkage.h>
28#include <linux/init.h>
29#include <linux/ptrace.h>
30#include <linux/kallsyms.h>
31
32#include <asm/setup.h>
33#include <asm/fpu.h>
34#include <asm/system.h>
35#include <asm/uaccess.h>
36#include <asm/traps.h>
37#include <asm/pgtable.h>
38#include <asm/machdep.h>
39#include <asm/siginfo.h>
40
41static char const * const vec_names[] = {
42 "RESET SP", "RESET PC", "BUS ERROR", "ADDRESS ERROR",
43 "ILLEGAL INSTRUCTION", "ZERO DIVIDE", "CHK", "TRAPcc",
44 "PRIVILEGE VIOLATION", "TRACE", "LINE 1010", "LINE 1111",
45 "UNASSIGNED RESERVED 12", "COPROCESSOR PROTOCOL VIOLATION",
46 "FORMAT ERROR", "UNINITIALIZED INTERRUPT",
47 "UNASSIGNED RESERVED 16", "UNASSIGNED RESERVED 17",
48 "UNASSIGNED RESERVED 18", "UNASSIGNED RESERVED 19",
49 "UNASSIGNED RESERVED 20", "UNASSIGNED RESERVED 21",
50 "UNASSIGNED RESERVED 22", "UNASSIGNED RESERVED 23",
51 "SPURIOUS INTERRUPT", "LEVEL 1 INT", "LEVEL 2 INT", "LEVEL 3 INT",
52 "LEVEL 4 INT", "LEVEL 5 INT", "LEVEL 6 INT", "LEVEL 7 INT",
53 "SYSCALL", "TRAP #1", "TRAP #2", "TRAP #3",
54 "TRAP #4", "TRAP #5", "TRAP #6", "TRAP #7",
55 "TRAP #8", "TRAP #9", "TRAP #10", "TRAP #11",
56 "TRAP #12", "TRAP #13", "TRAP #14", "TRAP #15",
57 "FPCP BSUN", "FPCP INEXACT", "FPCP DIV BY 0", "FPCP UNDERFLOW",
58 "FPCP OPERAND ERROR", "FPCP OVERFLOW", "FPCP SNAN",
59 "FPCP UNSUPPORTED OPERATION",
60 "MMU CONFIGURATION ERROR"
61};
62
63void __init trap_init(void)
64{
65}
66
67void die_if_kernel(char *str, struct pt_regs *fp, int nr)
68{
69 if (!(fp->sr & PS_S))
70 return;
71
72 console_verbose();
73 printk(KERN_EMERG "%s: %08x\n",str,nr);
74 printk(KERN_EMERG "PC: [<%08lx>]\nSR: %04x SP: %p a2: %08lx\n",
75 fp->pc, fp->sr, fp, fp->a2);
76 printk(KERN_EMERG "d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n",
77 fp->d0, fp->d1, fp->d2, fp->d3);
78 printk(KERN_EMERG "d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n",
79 fp->d4, fp->d5, fp->a0, fp->a1);
80
81 printk(KERN_EMERG "Process %s (pid: %d, stackpage=%08lx)\n",
82 current->comm, current->pid, PAGE_SIZE+(unsigned long)current);
83 show_stack(NULL, (unsigned long *)(fp + 1));
84 add_taint(TAINT_DIE);
85 do_exit(SIGSEGV);
86}
87
88asmlinkage void buserr_c(struct frame *fp)
89{
90 /* Only set esp0 if coming from user mode */
91 if (user_mode(&fp->ptregs))
92 current->thread.esp0 = (unsigned long) fp;
93
94#if defined(DEBUG)
95 printk (KERN_DEBUG "*** Bus Error *** Format is %x\n", fp->ptregs.format);
96#endif
97
98 die_if_kernel("bad frame format",&fp->ptregs,0);
99#if defined(DEBUG)
100 printk(KERN_DEBUG "Unknown SIGSEGV - 4\n");
101#endif
102 force_sig(SIGSEGV, current);
103}
104
105static void print_this_address(unsigned long addr, int i)
106{
107#ifdef CONFIG_KALLSYMS
108 printk(KERN_EMERG " [%08lx] ", addr);
109 print_symbol(KERN_CONT "%s\n", addr);
110#else
111 if (i % 5)
112 printk(KERN_CONT " [%08lx] ", addr);
113 else
114 printk(KERN_EMERG " [%08lx] ", addr);
115 i++;
116#endif
117}
118
119int kstack_depth_to_print = 48;
120
121static void __show_stack(struct task_struct *task, unsigned long *stack)
122{
123 unsigned long *endstack, addr;
124#ifdef CONFIG_FRAME_POINTER
125 unsigned long *last_stack;
126#endif
127 int i;
128
129 if (!stack)
130 stack = (unsigned long *)task->thread.ksp;
131
132 addr = (unsigned long) stack;
133 endstack = (unsigned long *) PAGE_ALIGN(addr);
134
135 printk(KERN_EMERG "Stack from %08lx:", (unsigned long)stack);
136 for (i = 0; i < kstack_depth_to_print; i++) {
137 if (stack + 1 + i > endstack)
138 break;
139 if (i % 8 == 0)
140 printk(KERN_EMERG " ");
141 printk(KERN_CONT " %08lx", *(stack + i));
142 }
143 printk("\n");
144 i = 0;
145
146#ifdef CONFIG_FRAME_POINTER
147 printk(KERN_EMERG "Call Trace:\n");
148
149 last_stack = stack - 1;
150 while (stack <= endstack && stack > last_stack) {
151
152 addr = *(stack + 1);
153 print_this_address(addr, i);
154 i++;
155
156 last_stack = stack;
157 stack = (unsigned long *)*stack;
158 }
159 printk("\n");
160#else
161 printk(KERN_EMERG "Call Trace with CONFIG_FRAME_POINTER disabled:\n");
162 while (stack <= endstack) {
163 addr = *stack++;
164 /*
165 * If the address is either in the text segment of the kernel,
166 * or in a region which is occupied by a module then it *may*
167 * be the address of a calling routine; if so, print it so that
168 * someone tracing down the cause of the crash will be able to
169 * figure out the call path that was taken.
170 */
171 if (__kernel_text_address(addr)) {
172 print_this_address(addr, i);
173 i++;
174 }
175 }
176 printk(KERN_CONT "\n");
177#endif
178}
179
180void bad_super_trap(struct frame *fp)
181{
182 int vector = (fp->ptregs.vector >> 2) & 0xff;
183
184 console_verbose();
185 if (vector < ARRAY_SIZE(vec_names))
186 printk (KERN_WARNING "*** %s *** FORMAT=%X\n",
187 vec_names[vector],
188 fp->ptregs.format);
189 else
190 printk (KERN_WARNING "*** Exception %d *** FORMAT=%X\n",
191 vector,
192 fp->ptregs.format);
193 printk (KERN_WARNING "Current process id is %d\n", current->pid);
194 die_if_kernel("BAD KERNEL TRAP", &fp->ptregs, 0);
195}
196
197asmlinkage void trap_c(struct frame *fp)
198{
199 int sig;
200 int vector = (fp->ptregs.vector >> 2) & 0xff;
201 siginfo_t info;
202
203 if (fp->ptregs.sr & PS_S) {
204 if (vector == VEC_TRACE) {
205 /* traced a trapping instruction */
206 } else
207 bad_super_trap(fp);
208 return;
209 }
210
211 /* send the appropriate signal to the user program */
212 switch (vector) {
213 case VEC_ADDRERR:
214 info.si_code = BUS_ADRALN;
215 sig = SIGBUS;
216 break;
217 case VEC_ILLEGAL:
218 case VEC_LINE10:
219 case VEC_LINE11:
220 info.si_code = ILL_ILLOPC;
221 sig = SIGILL;
222 break;
223 case VEC_PRIV:
224 info.si_code = ILL_PRVOPC;
225 sig = SIGILL;
226 break;
227 case VEC_COPROC:
228 info.si_code = ILL_COPROC;
229 sig = SIGILL;
230 break;
231 case VEC_TRAP1: /* gdbserver breakpoint */
232 fp->ptregs.pc -= 2;
233 info.si_code = TRAP_TRACE;
234 sig = SIGTRAP;
235 break;
236 case VEC_TRAP2:
237 case VEC_TRAP3:
238 case VEC_TRAP4:
239 case VEC_TRAP5:
240 case VEC_TRAP6:
241 case VEC_TRAP7:
242 case VEC_TRAP8:
243 case VEC_TRAP9:
244 case VEC_TRAP10:
245 case VEC_TRAP11:
246 case VEC_TRAP12:
247 case VEC_TRAP13:
248 case VEC_TRAP14:
249 info.si_code = ILL_ILLTRP;
250 sig = SIGILL;
251 break;
252 case VEC_FPBRUC:
253 case VEC_FPOE:
254 case VEC_FPNAN:
255 info.si_code = FPE_FLTINV;
256 sig = SIGFPE;
257 break;
258 case VEC_FPIR:
259 info.si_code = FPE_FLTRES;
260 sig = SIGFPE;
261 break;
262 case VEC_FPDIVZ:
263 info.si_code = FPE_FLTDIV;
264 sig = SIGFPE;
265 break;
266 case VEC_FPUNDER:
267 info.si_code = FPE_FLTUND;
268 sig = SIGFPE;
269 break;
270 case VEC_FPOVER:
271 info.si_code = FPE_FLTOVF;
272 sig = SIGFPE;
273 break;
274 case VEC_ZERODIV:
275 info.si_code = FPE_INTDIV;
276 sig = SIGFPE;
277 break;
278 case VEC_CHK:
279 case VEC_TRAP:
280 info.si_code = FPE_INTOVF;
281 sig = SIGFPE;
282 break;
283 case VEC_TRACE: /* ptrace single step */
284 info.si_code = TRAP_TRACE;
285 sig = SIGTRAP;
286 break;
287 case VEC_TRAP15: /* breakpoint */
288 info.si_code = TRAP_BRKPT;
289 sig = SIGTRAP;
290 break;
291 default:
292 info.si_code = ILL_ILLOPC;
293 sig = SIGILL;
294 break;
295 }
296 info.si_signo = sig;
297 info.si_errno = 0;
298 switch (fp->ptregs.format) {
299 default:
300 info.si_addr = (void *) fp->ptregs.pc;
301 break;
302 case 2:
303 info.si_addr = (void *) fp->un.fmt2.iaddr;
304 break;
305 case 7:
306 info.si_addr = (void *) fp->un.fmt7.effaddr;
307 break;
308 case 9:
309 info.si_addr = (void *) fp->un.fmt9.iaddr;
310 break;
311 case 10:
312 info.si_addr = (void *) fp->un.fmta.daddr;
313 break;
314 case 11:
315 info.si_addr = (void *) fp->un.fmtb.daddr;
316 break;
317 }
318 force_sig_info (sig, &info, current);
319}
320
321asmlinkage void set_esp0(unsigned long ssp)
322{
323 current->thread.esp0 = ssp;
324}
325
326/*
327 * The architecture-independent backtrace generator
328 */
329void dump_stack(void)
330{
331 /*
332 * We need frame pointers for this little trick, which works as follows:
333 *
334 * +------------+ 0x00
335 * | Next SP | -> 0x0c
336 * +------------+ 0x04
337 * | Caller |
338 * +------------+ 0x08
339 * | Local vars | -> our stack var
340 * +------------+ 0x0c
341 * | Next SP | -> 0x18, that is what we pass to show_stack()
342 * +------------+ 0x10
343 * | Caller |
344 * +------------+ 0x14
345 * | Local vars |
346 * +------------+ 0x18
347 * | ... |
348 * +------------+
349 */
350
351 unsigned long *stack;
352
353 stack = (unsigned long *)&stack;
354 stack++;
355 __show_stack(current, stack);
356}
357EXPORT_SYMBOL(dump_stack);
358
359void show_stack(struct task_struct *task, unsigned long *stack)
360{
361 if (!stack && !task)
362 dump_stack();
363 else
364 __show_stack(task, stack);
365}
diff --git a/arch/m68k/kernel/vmlinux.lds.S b/arch/m68k/kernel/vmlinux.lds.S
index 99ba315bd0a8..030dabf0bc53 100644
--- a/arch/m68k/kernel/vmlinux.lds.S
+++ b/arch/m68k/kernel/vmlinux.lds.S
@@ -1,10 +1,5 @@
1PHDRS 1#ifdef CONFIG_MMU
2{ 2#include "vmlinux.lds_mm.S"
3 text PT_LOAD FILEHDR PHDRS FLAGS (7);
4 data PT_LOAD FLAGS (7);
5}
6#ifdef CONFIG_SUN3
7#include "vmlinux-sun3.lds"
8#else 3#else
9#include "vmlinux-std.lds" 4#include "vmlinux.lds_no.S"
10#endif 5#endif
diff --git a/arch/m68k/kernel/vmlinux.lds_mm.S b/arch/m68k/kernel/vmlinux.lds_mm.S
new file mode 100644
index 000000000000..99ba315bd0a8
--- /dev/null
+++ b/arch/m68k/kernel/vmlinux.lds_mm.S
@@ -0,0 +1,10 @@
1PHDRS
2{
3 text PT_LOAD FILEHDR PHDRS FLAGS (7);
4 data PT_LOAD FLAGS (7);
5}
6#ifdef CONFIG_SUN3
7#include "vmlinux-sun3.lds"
8#else
9#include "vmlinux-std.lds"
10#endif
diff --git a/arch/m68k/kernel/vmlinux.lds_no.S b/arch/m68k/kernel/vmlinux.lds_no.S
new file mode 100644
index 000000000000..f4d715cdca0e
--- /dev/null
+++ b/arch/m68k/kernel/vmlinux.lds_no.S
@@ -0,0 +1,188 @@
1/*
2 * vmlinux.lds.S -- master linker script for m68knommu arch
3 *
4 * (C) Copyright 2002-2006, Greg Ungerer <gerg@snapgear.com>
5 *
6 * This linker script is equipped to build either ROM loaded or RAM
7 * run kernels.
8 */
9
10#include <asm-generic/vmlinux.lds.h>
11#include <asm/page.h>
12#include <asm/thread_info.h>
13
14#if defined(CONFIG_RAMKERNEL)
15#define RAM_START CONFIG_KERNELBASE
16#define RAM_LENGTH (CONFIG_RAMBASE + CONFIG_RAMSIZE - CONFIG_KERNELBASE)
17#define TEXT ram
18#define DATA ram
19#define INIT ram
20#define BSSS ram
21#endif
22#if defined(CONFIG_ROMKERNEL) || defined(CONFIG_HIMEMKERNEL)
23#define RAM_START CONFIG_RAMBASE
24#define RAM_LENGTH CONFIG_RAMSIZE
25#define ROMVEC_START CONFIG_ROMVEC
26#define ROMVEC_LENGTH CONFIG_ROMVECSIZE
27#define ROM_START CONFIG_ROMSTART
28#define ROM_LENGTH CONFIG_ROMSIZE
29#define TEXT rom
30#define DATA ram
31#define INIT ram
32#define BSSS ram
33#endif
34
35#ifndef DATA_ADDR
36#define DATA_ADDR
37#endif
38
39
40OUTPUT_ARCH(m68k)
41ENTRY(_start)
42
43MEMORY {
44 ram : ORIGIN = RAM_START, LENGTH = RAM_LENGTH
45#ifdef ROM_START
46 romvec : ORIGIN = ROMVEC_START, LENGTH = ROMVEC_LENGTH
47 rom : ORIGIN = ROM_START, LENGTH = ROM_LENGTH
48#endif
49}
50
51jiffies = jiffies_64 + 4;
52
53SECTIONS {
54
55#ifdef ROMVEC_START
56 . = ROMVEC_START ;
57 .romvec : {
58 __rom_start = . ;
59 _romvec = .;
60 *(.data..initvect)
61 } > romvec
62#endif
63
64 .text : {
65 _text = .;
66 _stext = . ;
67 HEAD_TEXT
68 TEXT_TEXT
69 SCHED_TEXT
70 LOCK_TEXT
71 *(.text..lock)
72
73 . = ALIGN(16); /* Exception table */
74 __start___ex_table = .;
75 *(__ex_table)
76 __stop___ex_table = .;
77
78 *(.rodata) *(.rodata.*)
79 *(__vermagic) /* Kernel version magic */
80 *(__markers_strings)
81 *(.rodata1)
82 *(.rodata.str1.1)
83
84 /* Kernel symbol table: Normal symbols */
85 . = ALIGN(4);
86 __start___ksymtab = .;
87 *(__ksymtab)
88 __stop___ksymtab = .;
89
90 /* Kernel symbol table: GPL-only symbols */
91 __start___ksymtab_gpl = .;
92 *(__ksymtab_gpl)
93 __stop___ksymtab_gpl = .;
94
95 /* Kernel symbol table: Normal unused symbols */
96 __start___ksymtab_unused = .;
97 *(__ksymtab_unused)
98 __stop___ksymtab_unused = .;
99
100 /* Kernel symbol table: GPL-only unused symbols */
101 __start___ksymtab_unused_gpl = .;
102 *(__ksymtab_unused_gpl)
103 __stop___ksymtab_unused_gpl = .;
104
105 /* Kernel symbol table: GPL-future symbols */
106 __start___ksymtab_gpl_future = .;
107 *(__ksymtab_gpl_future)
108 __stop___ksymtab_gpl_future = .;
109
110 /* Kernel symbol table: Normal symbols */
111 __start___kcrctab = .;
112 *(__kcrctab)
113 __stop___kcrctab = .;
114
115 /* Kernel symbol table: GPL-only symbols */
116 __start___kcrctab_gpl = .;
117 *(__kcrctab_gpl)
118 __stop___kcrctab_gpl = .;
119
120 /* Kernel symbol table: Normal unused symbols */
121 __start___kcrctab_unused = .;
122 *(__kcrctab_unused)
123 __stop___kcrctab_unused = .;
124
125 /* Kernel symbol table: GPL-only unused symbols */
126 __start___kcrctab_unused_gpl = .;
127 *(__kcrctab_unused_gpl)
128 __stop___kcrctab_unused_gpl = .;
129
130 /* Kernel symbol table: GPL-future symbols */
131 __start___kcrctab_gpl_future = .;
132 *(__kcrctab_gpl_future)
133 __stop___kcrctab_gpl_future = .;
134
135 /* Kernel symbol table: strings */
136 *(__ksymtab_strings)
137
138 /* Built-in module parameters */
139 . = ALIGN(4) ;
140 __start___param = .;
141 *(__param)
142 __stop___param = .;
143
144 /* Built-in module versions */
145 . = ALIGN(4) ;
146 __start___modver = .;
147 *(__modver)
148 __stop___modver = .;
149
150 . = ALIGN(4) ;
151 _etext = . ;
152 } > TEXT
153
154 .data DATA_ADDR : {
155 . = ALIGN(4);
156 _sdata = . ;
157 DATA_DATA
158 CACHELINE_ALIGNED_DATA(32)
159 PAGE_ALIGNED_DATA(PAGE_SIZE)
160 *(.data..shared_aligned)
161 INIT_TASK_DATA(THREAD_SIZE)
162 _edata = . ;
163 } > DATA
164
165 .init.text : {
166 . = ALIGN(PAGE_SIZE);
167 __init_begin = .;
168 } > INIT
169 INIT_TEXT_SECTION(PAGE_SIZE) > INIT
170 INIT_DATA_SECTION(16) > INIT
171 .init.data : {
172 . = ALIGN(PAGE_SIZE);
173 __init_end = .;
174 } > INIT
175
176 .bss : {
177 . = ALIGN(4);
178 _sbss = . ;
179 *(.bss)
180 *(COMMON)
181 . = ALIGN(4) ;
182 _ebss = . ;
183 _end = . ;
184 } > BSSS
185
186 DISCARDS
187}
188
diff --git a/arch/m68k/lib/Makefile b/arch/m68k/lib/Makefile
index af9abf8d9d98..1f95881d8437 100644
--- a/arch/m68k/lib/Makefile
+++ b/arch/m68k/lib/Makefile
@@ -1,6 +1,5 @@
1# 1ifdef CONFIG_MMU
2# Makefile for m68k-specific library files.. 2include arch/m68k/lib/Makefile_mm
3# 3else
4 4include arch/m68k/lib/Makefile_no
5lib-y := ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \ 5endif
6 checksum.o string.o uaccess.o
diff --git a/arch/m68k/lib/Makefile_mm b/arch/m68k/lib/Makefile_mm
new file mode 100644
index 000000000000..af9abf8d9d98
--- /dev/null
+++ b/arch/m68k/lib/Makefile_mm
@@ -0,0 +1,6 @@
1#
2# Makefile for m68k-specific library files..
3#
4
5lib-y := ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \
6 checksum.o string.o uaccess.o
diff --git a/arch/m68k/lib/Makefile_no b/arch/m68k/lib/Makefile_no
new file mode 100644
index 000000000000..32d852e586d7
--- /dev/null
+++ b/arch/m68k/lib/Makefile_no
@@ -0,0 +1,7 @@
1#
2# Makefile for m68knommu specific library files..
3#
4
5lib-y := ashldi3.o ashrdi3.o lshrdi3.o \
6 muldi3.o mulsi3.o divsi3.o udivsi3.o modsi3.o umodsi3.o \
7 checksum.o memcpy.o memmove.o memset.o delay.o
diff --git a/arch/m68k/lib/checksum.c b/arch/m68k/lib/checksum.c
index 6216f12a756b..1297536060de 100644
--- a/arch/m68k/lib/checksum.c
+++ b/arch/m68k/lib/checksum.c
@@ -1,425 +1,5 @@
1/* 1#ifdef CONFIG_MMU
2 * INET An implementation of the TCP/IP protocol suite for the LINUX 2#include "checksum_mm.c"
3 * operating system. INET is implemented using the BSD Socket 3#else
4 * interface as the means of communication with the user level. 4#include "checksum_no.c"
5 * 5#endif
6 * IP/TCP/UDP checksumming routines
7 *
8 * Authors: Jorge Cwik, <jorge@laser.satlink.net>
9 * Arnt Gulbrandsen, <agulbra@nvg.unit.no>
10 * Tom May, <ftom@netcom.com>
11 * Andreas Schwab, <schwab@issan.informatik.uni-dortmund.de>
12 * Lots of code moved from tcp.c and ip.c; see those files
13 * for more names.
14 *
15 * 03/02/96 Jes Sorensen, Andreas Schwab, Roman Hodek:
16 * Fixed some nasty bugs, causing some horrible crashes.
17 * A: At some points, the sum (%0) was used as
18 * length-counter instead of the length counter
19 * (%1). Thanks to Roman Hodek for pointing this out.
20 * B: GCC seems to mess up if one uses too many
21 * data-registers to hold input values and one tries to
22 * specify d0 and d1 as scratch registers. Letting gcc
23 * choose these registers itself solves the problem.
24 *
25 * This program is free software; you can redistribute it and/or
26 * modify it under the terms of the GNU General Public License
27 * as published by the Free Software Foundation; either version
28 * 2 of the License, or (at your option) any later version.
29 *
30 * 1998/8/31 Andreas Schwab:
31 * Zero out rest of buffer on exception in
32 * csum_partial_copy_from_user.
33 */
34
35#include <linux/module.h>
36#include <net/checksum.h>
37
38/*
39 * computes a partial checksum, e.g. for TCP/UDP fragments
40 */
41
42__wsum csum_partial(const void *buff, int len, __wsum sum)
43{
44 unsigned long tmp1, tmp2;
45 /*
46 * Experiments with ethernet and slip connections show that buff
47 * is aligned on either a 2-byte or 4-byte boundary.
48 */
49 __asm__("movel %2,%3\n\t"
50 "btst #1,%3\n\t" /* Check alignment */
51 "jeq 2f\n\t"
52 "subql #2,%1\n\t" /* buff%4==2: treat first word */
53 "jgt 1f\n\t"
54 "addql #2,%1\n\t" /* len was == 2, treat only rest */
55 "jra 4f\n"
56 "1:\t"
57 "addw %2@+,%0\n\t" /* add first word to sum */
58 "clrl %3\n\t"
59 "addxl %3,%0\n" /* add X bit */
60 "2:\t"
61 /* unrolled loop for the main part: do 8 longs at once */
62 "movel %1,%3\n\t" /* save len in tmp1 */
63 "lsrl #5,%1\n\t" /* len/32 */
64 "jeq 2f\n\t" /* not enough... */
65 "subql #1,%1\n"
66 "1:\t"
67 "movel %2@+,%4\n\t"
68 "addxl %4,%0\n\t"
69 "movel %2@+,%4\n\t"
70 "addxl %4,%0\n\t"
71 "movel %2@+,%4\n\t"
72 "addxl %4,%0\n\t"
73 "movel %2@+,%4\n\t"
74 "addxl %4,%0\n\t"
75 "movel %2@+,%4\n\t"
76 "addxl %4,%0\n\t"
77 "movel %2@+,%4\n\t"
78 "addxl %4,%0\n\t"
79 "movel %2@+,%4\n\t"
80 "addxl %4,%0\n\t"
81 "movel %2@+,%4\n\t"
82 "addxl %4,%0\n\t"
83 "dbra %1,1b\n\t"
84 "clrl %4\n\t"
85 "addxl %4,%0\n\t" /* add X bit */
86 "clrw %1\n\t"
87 "subql #1,%1\n\t"
88 "jcc 1b\n"
89 "2:\t"
90 "movel %3,%1\n\t" /* restore len from tmp1 */
91 "andw #0x1c,%3\n\t" /* number of rest longs */
92 "jeq 4f\n\t"
93 "lsrw #2,%3\n\t"
94 "subqw #1,%3\n"
95 "3:\t"
96 /* loop for rest longs */
97 "movel %2@+,%4\n\t"
98 "addxl %4,%0\n\t"
99 "dbra %3,3b\n\t"
100 "clrl %4\n\t"
101 "addxl %4,%0\n" /* add X bit */
102 "4:\t"
103 /* now check for rest bytes that do not fit into longs */
104 "andw #3,%1\n\t"
105 "jeq 7f\n\t"
106 "clrl %4\n\t" /* clear tmp2 for rest bytes */
107 "subqw #2,%1\n\t"
108 "jlt 5f\n\t"
109 "movew %2@+,%4\n\t" /* have rest >= 2: get word */
110 "swap %4\n\t" /* into bits 16..31 */
111 "tstw %1\n\t" /* another byte? */
112 "jeq 6f\n"
113 "5:\t"
114 "moveb %2@,%4\n\t" /* have odd rest: get byte */
115 "lslw #8,%4\n\t" /* into bits 8..15; 16..31 untouched */
116 "6:\t"
117 "addl %4,%0\n\t" /* now add rest long to sum */
118 "clrl %4\n\t"
119 "addxl %4,%0\n" /* add X bit */
120 "7:\t"
121 : "=d" (sum), "=d" (len), "=a" (buff),
122 "=&d" (tmp1), "=&d" (tmp2)
123 : "0" (sum), "1" (len), "2" (buff)
124 );
125 return(sum);
126}
127
128EXPORT_SYMBOL(csum_partial);
129
130
131/*
132 * copy from user space while checksumming, with exception handling.
133 */
134
135__wsum
136csum_partial_copy_from_user(const void __user *src, void *dst,
137 int len, __wsum sum, int *csum_err)
138{
139 /*
140 * GCC doesn't like more than 10 operands for the asm
141 * statements so we have to use tmp2 for the error
142 * code.
143 */
144 unsigned long tmp1, tmp2;
145
146 __asm__("movel %2,%4\n\t"
147 "btst #1,%4\n\t" /* Check alignment */
148 "jeq 2f\n\t"
149 "subql #2,%1\n\t" /* buff%4==2: treat first word */
150 "jgt 1f\n\t"
151 "addql #2,%1\n\t" /* len was == 2, treat only rest */
152 "jra 4f\n"
153 "1:\n"
154 "10:\t"
155 "movesw %2@+,%4\n\t" /* add first word to sum */
156 "addw %4,%0\n\t"
157 "movew %4,%3@+\n\t"
158 "clrl %4\n\t"
159 "addxl %4,%0\n" /* add X bit */
160 "2:\t"
161 /* unrolled loop for the main part: do 8 longs at once */
162 "movel %1,%4\n\t" /* save len in tmp1 */
163 "lsrl #5,%1\n\t" /* len/32 */
164 "jeq 2f\n\t" /* not enough... */
165 "subql #1,%1\n"
166 "1:\n"
167 "11:\t"
168 "movesl %2@+,%5\n\t"
169 "addxl %5,%0\n\t"
170 "movel %5,%3@+\n\t"
171 "12:\t"
172 "movesl %2@+,%5\n\t"
173 "addxl %5,%0\n\t"
174 "movel %5,%3@+\n\t"
175 "13:\t"
176 "movesl %2@+,%5\n\t"
177 "addxl %5,%0\n\t"
178 "movel %5,%3@+\n\t"
179 "14:\t"
180 "movesl %2@+,%5\n\t"
181 "addxl %5,%0\n\t"
182 "movel %5,%3@+\n\t"
183 "15:\t"
184 "movesl %2@+,%5\n\t"
185 "addxl %5,%0\n\t"
186 "movel %5,%3@+\n\t"
187 "16:\t"
188 "movesl %2@+,%5\n\t"
189 "addxl %5,%0\n\t"
190 "movel %5,%3@+\n\t"
191 "17:\t"
192 "movesl %2@+,%5\n\t"
193 "addxl %5,%0\n\t"
194 "movel %5,%3@+\n\t"
195 "18:\t"
196 "movesl %2@+,%5\n\t"
197 "addxl %5,%0\n\t"
198 "movel %5,%3@+\n\t"
199 "dbra %1,1b\n\t"
200 "clrl %5\n\t"
201 "addxl %5,%0\n\t" /* add X bit */
202 "clrw %1\n\t"
203 "subql #1,%1\n\t"
204 "jcc 1b\n"
205 "2:\t"
206 "movel %4,%1\n\t" /* restore len from tmp1 */
207 "andw #0x1c,%4\n\t" /* number of rest longs */
208 "jeq 4f\n\t"
209 "lsrw #2,%4\n\t"
210 "subqw #1,%4\n"
211 "3:\n"
212 /* loop for rest longs */
213 "19:\t"
214 "movesl %2@+,%5\n\t"
215 "addxl %5,%0\n\t"
216 "movel %5,%3@+\n\t"
217 "dbra %4,3b\n\t"
218 "clrl %5\n\t"
219 "addxl %5,%0\n" /* add X bit */
220 "4:\t"
221 /* now check for rest bytes that do not fit into longs */
222 "andw #3,%1\n\t"
223 "jeq 7f\n\t"
224 "clrl %5\n\t" /* clear tmp2 for rest bytes */
225 "subqw #2,%1\n\t"
226 "jlt 5f\n\t"
227 "20:\t"
228 "movesw %2@+,%5\n\t" /* have rest >= 2: get word */
229 "movew %5,%3@+\n\t"
230 "swap %5\n\t" /* into bits 16..31 */
231 "tstw %1\n\t" /* another byte? */
232 "jeq 6f\n"
233 "5:\n"
234 "21:\t"
235 "movesb %2@,%5\n\t" /* have odd rest: get byte */
236 "moveb %5,%3@+\n\t"
237 "lslw #8,%5\n\t" /* into bits 8..15; 16..31 untouched */
238 "6:\t"
239 "addl %5,%0\n\t" /* now add rest long to sum */
240 "clrl %5\n\t"
241 "addxl %5,%0\n\t" /* add X bit */
242 "7:\t"
243 "clrl %5\n" /* no error - clear return value */
244 "8:\n"
245 ".section .fixup,\"ax\"\n"
246 ".even\n"
247 /* If any exception occurs zero out the rest.
248 Similarities with the code above are intentional :-) */
249 "90:\t"
250 "clrw %3@+\n\t"
251 "movel %1,%4\n\t"
252 "lsrl #5,%1\n\t"
253 "jeq 1f\n\t"
254 "subql #1,%1\n"
255 "91:\t"
256 "clrl %3@+\n"
257 "92:\t"
258 "clrl %3@+\n"
259 "93:\t"
260 "clrl %3@+\n"
261 "94:\t"
262 "clrl %3@+\n"
263 "95:\t"
264 "clrl %3@+\n"
265 "96:\t"
266 "clrl %3@+\n"
267 "97:\t"
268 "clrl %3@+\n"
269 "98:\t"
270 "clrl %3@+\n\t"
271 "dbra %1,91b\n\t"
272 "clrw %1\n\t"
273 "subql #1,%1\n\t"
274 "jcc 91b\n"
275 "1:\t"
276 "movel %4,%1\n\t"
277 "andw #0x1c,%4\n\t"
278 "jeq 1f\n\t"
279 "lsrw #2,%4\n\t"
280 "subqw #1,%4\n"
281 "99:\t"
282 "clrl %3@+\n\t"
283 "dbra %4,99b\n\t"
284 "1:\t"
285 "andw #3,%1\n\t"
286 "jeq 9f\n"
287 "100:\t"
288 "clrw %3@+\n\t"
289 "tstw %1\n\t"
290 "jeq 9f\n"
291 "101:\t"
292 "clrb %3@+\n"
293 "9:\t"
294#define STR(X) STR1(X)
295#define STR1(X) #X
296 "moveq #-" STR(EFAULT) ",%5\n\t"
297 "jra 8b\n"
298 ".previous\n"
299 ".section __ex_table,\"a\"\n"
300 ".long 10b,90b\n"
301 ".long 11b,91b\n"
302 ".long 12b,92b\n"
303 ".long 13b,93b\n"
304 ".long 14b,94b\n"
305 ".long 15b,95b\n"
306 ".long 16b,96b\n"
307 ".long 17b,97b\n"
308 ".long 18b,98b\n"
309 ".long 19b,99b\n"
310 ".long 20b,100b\n"
311 ".long 21b,101b\n"
312 ".previous"
313 : "=d" (sum), "=d" (len), "=a" (src), "=a" (dst),
314 "=&d" (tmp1), "=d" (tmp2)
315 : "0" (sum), "1" (len), "2" (src), "3" (dst)
316 );
317
318 *csum_err = tmp2;
319
320 return(sum);
321}
322
323EXPORT_SYMBOL(csum_partial_copy_from_user);
324
325
326/*
327 * copy from kernel space while checksumming, otherwise like csum_partial
328 */
329
330__wsum
331csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum)
332{
333 unsigned long tmp1, tmp2;
334 __asm__("movel %2,%4\n\t"
335 "btst #1,%4\n\t" /* Check alignment */
336 "jeq 2f\n\t"
337 "subql #2,%1\n\t" /* buff%4==2: treat first word */
338 "jgt 1f\n\t"
339 "addql #2,%1\n\t" /* len was == 2, treat only rest */
340 "jra 4f\n"
341 "1:\t"
342 "movew %2@+,%4\n\t" /* add first word to sum */
343 "addw %4,%0\n\t"
344 "movew %4,%3@+\n\t"
345 "clrl %4\n\t"
346 "addxl %4,%0\n" /* add X bit */
347 "2:\t"
348 /* unrolled loop for the main part: do 8 longs at once */
349 "movel %1,%4\n\t" /* save len in tmp1 */
350 "lsrl #5,%1\n\t" /* len/32 */
351 "jeq 2f\n\t" /* not enough... */
352 "subql #1,%1\n"
353 "1:\t"
354 "movel %2@+,%5\n\t"
355 "addxl %5,%0\n\t"
356 "movel %5,%3@+\n\t"
357 "movel %2@+,%5\n\t"
358 "addxl %5,%0\n\t"
359 "movel %5,%3@+\n\t"
360 "movel %2@+,%5\n\t"
361 "addxl %5,%0\n\t"
362 "movel %5,%3@+\n\t"
363 "movel %2@+,%5\n\t"
364 "addxl %5,%0\n\t"
365 "movel %5,%3@+\n\t"
366 "movel %2@+,%5\n\t"
367 "addxl %5,%0\n\t"
368 "movel %5,%3@+\n\t"
369 "movel %2@+,%5\n\t"
370 "addxl %5,%0\n\t"
371 "movel %5,%3@+\n\t"
372 "movel %2@+,%5\n\t"
373 "addxl %5,%0\n\t"
374 "movel %5,%3@+\n\t"
375 "movel %2@+,%5\n\t"
376 "addxl %5,%0\n\t"
377 "movel %5,%3@+\n\t"
378 "dbra %1,1b\n\t"
379 "clrl %5\n\t"
380 "addxl %5,%0\n\t" /* add X bit */
381 "clrw %1\n\t"
382 "subql #1,%1\n\t"
383 "jcc 1b\n"
384 "2:\t"
385 "movel %4,%1\n\t" /* restore len from tmp1 */
386 "andw #0x1c,%4\n\t" /* number of rest longs */
387 "jeq 4f\n\t"
388 "lsrw #2,%4\n\t"
389 "subqw #1,%4\n"
390 "3:\t"
391 /* loop for rest longs */
392 "movel %2@+,%5\n\t"
393 "addxl %5,%0\n\t"
394 "movel %5,%3@+\n\t"
395 "dbra %4,3b\n\t"
396 "clrl %5\n\t"
397 "addxl %5,%0\n" /* add X bit */
398 "4:\t"
399 /* now check for rest bytes that do not fit into longs */
400 "andw #3,%1\n\t"
401 "jeq 7f\n\t"
402 "clrl %5\n\t" /* clear tmp2 for rest bytes */
403 "subqw #2,%1\n\t"
404 "jlt 5f\n\t"
405 "movew %2@+,%5\n\t" /* have rest >= 2: get word */
406 "movew %5,%3@+\n\t"
407 "swap %5\n\t" /* into bits 16..31 */
408 "tstw %1\n\t" /* another byte? */
409 "jeq 6f\n"
410 "5:\t"
411 "moveb %2@,%5\n\t" /* have odd rest: get byte */
412 "moveb %5,%3@+\n\t"
413 "lslw #8,%5\n" /* into bits 8..15; 16..31 untouched */
414 "6:\t"
415 "addl %5,%0\n\t" /* now add rest long to sum */
416 "clrl %5\n\t"
417 "addxl %5,%0\n" /* add X bit */
418 "7:\t"
419 : "=d" (sum), "=d" (len), "=a" (src), "=a" (dst),
420 "=&d" (tmp1), "=&d" (tmp2)
421 : "0" (sum), "1" (len), "2" (src), "3" (dst)
422 );
423 return(sum);
424}
425EXPORT_SYMBOL(csum_partial_copy_nocheck);
diff --git a/arch/m68k/lib/checksum_mm.c b/arch/m68k/lib/checksum_mm.c
new file mode 100644
index 000000000000..6216f12a756b
--- /dev/null
+++ b/arch/m68k/lib/checksum_mm.c
@@ -0,0 +1,425 @@
1/*
2 * INET An implementation of the TCP/IP protocol suite for the LINUX
3 * operating system. INET is implemented using the BSD Socket
4 * interface as the means of communication with the user level.
5 *
6 * IP/TCP/UDP checksumming routines
7 *
8 * Authors: Jorge Cwik, <jorge@laser.satlink.net>
9 * Arnt Gulbrandsen, <agulbra@nvg.unit.no>
10 * Tom May, <ftom@netcom.com>
11 * Andreas Schwab, <schwab@issan.informatik.uni-dortmund.de>
12 * Lots of code moved from tcp.c and ip.c; see those files
13 * for more names.
14 *
15 * 03/02/96 Jes Sorensen, Andreas Schwab, Roman Hodek:
16 * Fixed some nasty bugs, causing some horrible crashes.
17 * A: At some points, the sum (%0) was used as
18 * length-counter instead of the length counter
19 * (%1). Thanks to Roman Hodek for pointing this out.
20 * B: GCC seems to mess up if one uses too many
21 * data-registers to hold input values and one tries to
22 * specify d0 and d1 as scratch registers. Letting gcc
23 * choose these registers itself solves the problem.
24 *
25 * This program is free software; you can redistribute it and/or
26 * modify it under the terms of the GNU General Public License
27 * as published by the Free Software Foundation; either version
28 * 2 of the License, or (at your option) any later version.
29 *
30 * 1998/8/31 Andreas Schwab:
31 * Zero out rest of buffer on exception in
32 * csum_partial_copy_from_user.
33 */
34
35#include <linux/module.h>
36#include <net/checksum.h>
37
38/*
39 * computes a partial checksum, e.g. for TCP/UDP fragments
40 */
41
42__wsum csum_partial(const void *buff, int len, __wsum sum)
43{
44 unsigned long tmp1, tmp2;
45 /*
46 * Experiments with ethernet and slip connections show that buff
47 * is aligned on either a 2-byte or 4-byte boundary.
48 */
49 __asm__("movel %2,%3\n\t"
50 "btst #1,%3\n\t" /* Check alignment */
51 "jeq 2f\n\t"
52 "subql #2,%1\n\t" /* buff%4==2: treat first word */
53 "jgt 1f\n\t"
54 "addql #2,%1\n\t" /* len was == 2, treat only rest */
55 "jra 4f\n"
56 "1:\t"
57 "addw %2@+,%0\n\t" /* add first word to sum */
58 "clrl %3\n\t"
59 "addxl %3,%0\n" /* add X bit */
60 "2:\t"
61 /* unrolled loop for the main part: do 8 longs at once */
62 "movel %1,%3\n\t" /* save len in tmp1 */
63 "lsrl #5,%1\n\t" /* len/32 */
64 "jeq 2f\n\t" /* not enough... */
65 "subql #1,%1\n"
66 "1:\t"
67 "movel %2@+,%4\n\t"
68 "addxl %4,%0\n\t"
69 "movel %2@+,%4\n\t"
70 "addxl %4,%0\n\t"
71 "movel %2@+,%4\n\t"
72 "addxl %4,%0\n\t"
73 "movel %2@+,%4\n\t"
74 "addxl %4,%0\n\t"
75 "movel %2@+,%4\n\t"
76 "addxl %4,%0\n\t"
77 "movel %2@+,%4\n\t"
78 "addxl %4,%0\n\t"
79 "movel %2@+,%4\n\t"
80 "addxl %4,%0\n\t"
81 "movel %2@+,%4\n\t"
82 "addxl %4,%0\n\t"
83 "dbra %1,1b\n\t"
84 "clrl %4\n\t"
85 "addxl %4,%0\n\t" /* add X bit */
86 "clrw %1\n\t"
87 "subql #1,%1\n\t"
88 "jcc 1b\n"
89 "2:\t"
90 "movel %3,%1\n\t" /* restore len from tmp1 */
91 "andw #0x1c,%3\n\t" /* number of rest longs */
92 "jeq 4f\n\t"
93 "lsrw #2,%3\n\t"
94 "subqw #1,%3\n"
95 "3:\t"
96 /* loop for rest longs */
97 "movel %2@+,%4\n\t"
98 "addxl %4,%0\n\t"
99 "dbra %3,3b\n\t"
100 "clrl %4\n\t"
101 "addxl %4,%0\n" /* add X bit */
102 "4:\t"
103 /* now check for rest bytes that do not fit into longs */
104 "andw #3,%1\n\t"
105 "jeq 7f\n\t"
106 "clrl %4\n\t" /* clear tmp2 for rest bytes */
107 "subqw #2,%1\n\t"
108 "jlt 5f\n\t"
109 "movew %2@+,%4\n\t" /* have rest >= 2: get word */
110 "swap %4\n\t" /* into bits 16..31 */
111 "tstw %1\n\t" /* another byte? */
112 "jeq 6f\n"
113 "5:\t"
114 "moveb %2@,%4\n\t" /* have odd rest: get byte */
115 "lslw #8,%4\n\t" /* into bits 8..15; 16..31 untouched */
116 "6:\t"
117 "addl %4,%0\n\t" /* now add rest long to sum */
118 "clrl %4\n\t"
119 "addxl %4,%0\n" /* add X bit */
120 "7:\t"
121 : "=d" (sum), "=d" (len), "=a" (buff),
122 "=&d" (tmp1), "=&d" (tmp2)
123 : "0" (sum), "1" (len), "2" (buff)
124 );
125 return(sum);
126}
127
128EXPORT_SYMBOL(csum_partial);
129
130
131/*
132 * copy from user space while checksumming, with exception handling.
133 */
134
135__wsum
136csum_partial_copy_from_user(const void __user *src, void *dst,
137 int len, __wsum sum, int *csum_err)
138{
139 /*
140 * GCC doesn't like more than 10 operands for the asm
141 * statements so we have to use tmp2 for the error
142 * code.
143 */
144 unsigned long tmp1, tmp2;
145
146 __asm__("movel %2,%4\n\t"
147 "btst #1,%4\n\t" /* Check alignment */
148 "jeq 2f\n\t"
149 "subql #2,%1\n\t" /* buff%4==2: treat first word */
150 "jgt 1f\n\t"
151 "addql #2,%1\n\t" /* len was == 2, treat only rest */
152 "jra 4f\n"
153 "1:\n"
154 "10:\t"
155 "movesw %2@+,%4\n\t" /* add first word to sum */
156 "addw %4,%0\n\t"
157 "movew %4,%3@+\n\t"
158 "clrl %4\n\t"
159 "addxl %4,%0\n" /* add X bit */
160 "2:\t"
161 /* unrolled loop for the main part: do 8 longs at once */
162 "movel %1,%4\n\t" /* save len in tmp1 */
163 "lsrl #5,%1\n\t" /* len/32 */
164 "jeq 2f\n\t" /* not enough... */
165 "subql #1,%1\n"
166 "1:\n"
167 "11:\t"
168 "movesl %2@+,%5\n\t"
169 "addxl %5,%0\n\t"
170 "movel %5,%3@+\n\t"
171 "12:\t"
172 "movesl %2@+,%5\n\t"
173 "addxl %5,%0\n\t"
174 "movel %5,%3@+\n\t"
175 "13:\t"
176 "movesl %2@+,%5\n\t"
177 "addxl %5,%0\n\t"
178 "movel %5,%3@+\n\t"
179 "14:\t"
180 "movesl %2@+,%5\n\t"
181 "addxl %5,%0\n\t"
182 "movel %5,%3@+\n\t"
183 "15:\t"
184 "movesl %2@+,%5\n\t"
185 "addxl %5,%0\n\t"
186 "movel %5,%3@+\n\t"
187 "16:\t"
188 "movesl %2@+,%5\n\t"
189 "addxl %5,%0\n\t"
190 "movel %5,%3@+\n\t"
191 "17:\t"
192 "movesl %2@+,%5\n\t"
193 "addxl %5,%0\n\t"
194 "movel %5,%3@+\n\t"
195 "18:\t"
196 "movesl %2@+,%5\n\t"
197 "addxl %5,%0\n\t"
198 "movel %5,%3@+\n\t"
199 "dbra %1,1b\n\t"
200 "clrl %5\n\t"
201 "addxl %5,%0\n\t" /* add X bit */
202 "clrw %1\n\t"
203 "subql #1,%1\n\t"
204 "jcc 1b\n"
205 "2:\t"
206 "movel %4,%1\n\t" /* restore len from tmp1 */
207 "andw #0x1c,%4\n\t" /* number of rest longs */
208 "jeq 4f\n\t"
209 "lsrw #2,%4\n\t"
210 "subqw #1,%4\n"
211 "3:\n"
212 /* loop for rest longs */
213 "19:\t"
214 "movesl %2@+,%5\n\t"
215 "addxl %5,%0\n\t"
216 "movel %5,%3@+\n\t"
217 "dbra %4,3b\n\t"
218 "clrl %5\n\t"
219 "addxl %5,%0\n" /* add X bit */
220 "4:\t"
221 /* now check for rest bytes that do not fit into longs */
222 "andw #3,%1\n\t"
223 "jeq 7f\n\t"
224 "clrl %5\n\t" /* clear tmp2 for rest bytes */
225 "subqw #2,%1\n\t"
226 "jlt 5f\n\t"
227 "20:\t"
228 "movesw %2@+,%5\n\t" /* have rest >= 2: get word */
229 "movew %5,%3@+\n\t"
230 "swap %5\n\t" /* into bits 16..31 */
231 "tstw %1\n\t" /* another byte? */
232 "jeq 6f\n"
233 "5:\n"
234 "21:\t"
235 "movesb %2@,%5\n\t" /* have odd rest: get byte */
236 "moveb %5,%3@+\n\t"
237 "lslw #8,%5\n\t" /* into bits 8..15; 16..31 untouched */
238 "6:\t"
239 "addl %5,%0\n\t" /* now add rest long to sum */
240 "clrl %5\n\t"
241 "addxl %5,%0\n\t" /* add X bit */
242 "7:\t"
243 "clrl %5\n" /* no error - clear return value */
244 "8:\n"
245 ".section .fixup,\"ax\"\n"
246 ".even\n"
247 /* If any exception occurs zero out the rest.
248 Similarities with the code above are intentional :-) */
249 "90:\t"
250 "clrw %3@+\n\t"
251 "movel %1,%4\n\t"
252 "lsrl #5,%1\n\t"
253 "jeq 1f\n\t"
254 "subql #1,%1\n"
255 "91:\t"
256 "clrl %3@+\n"
257 "92:\t"
258 "clrl %3@+\n"
259 "93:\t"
260 "clrl %3@+\n"
261 "94:\t"
262 "clrl %3@+\n"
263 "95:\t"
264 "clrl %3@+\n"
265 "96:\t"
266 "clrl %3@+\n"
267 "97:\t"
268 "clrl %3@+\n"
269 "98:\t"
270 "clrl %3@+\n\t"
271 "dbra %1,91b\n\t"
272 "clrw %1\n\t"
273 "subql #1,%1\n\t"
274 "jcc 91b\n"
275 "1:\t"
276 "movel %4,%1\n\t"
277 "andw #0x1c,%4\n\t"
278 "jeq 1f\n\t"
279 "lsrw #2,%4\n\t"
280 "subqw #1,%4\n"
281 "99:\t"
282 "clrl %3@+\n\t"
283 "dbra %4,99b\n\t"
284 "1:\t"
285 "andw #3,%1\n\t"
286 "jeq 9f\n"
287 "100:\t"
288 "clrw %3@+\n\t"
289 "tstw %1\n\t"
290 "jeq 9f\n"
291 "101:\t"
292 "clrb %3@+\n"
293 "9:\t"
294#define STR(X) STR1(X)
295#define STR1(X) #X
296 "moveq #-" STR(EFAULT) ",%5\n\t"
297 "jra 8b\n"
298 ".previous\n"
299 ".section __ex_table,\"a\"\n"
300 ".long 10b,90b\n"
301 ".long 11b,91b\n"
302 ".long 12b,92b\n"
303 ".long 13b,93b\n"
304 ".long 14b,94b\n"
305 ".long 15b,95b\n"
306 ".long 16b,96b\n"
307 ".long 17b,97b\n"
308 ".long 18b,98b\n"
309 ".long 19b,99b\n"
310 ".long 20b,100b\n"
311 ".long 21b,101b\n"
312 ".previous"
313 : "=d" (sum), "=d" (len), "=a" (src), "=a" (dst),
314 "=&d" (tmp1), "=d" (tmp2)
315 : "0" (sum), "1" (len), "2" (src), "3" (dst)
316 );
317
318 *csum_err = tmp2;
319
320 return(sum);
321}
322
323EXPORT_SYMBOL(csum_partial_copy_from_user);
324
325
326/*
327 * copy from kernel space while checksumming, otherwise like csum_partial
328 */
329
330__wsum
331csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum)
332{
333 unsigned long tmp1, tmp2;
334 __asm__("movel %2,%4\n\t"
335 "btst #1,%4\n\t" /* Check alignment */
336 "jeq 2f\n\t"
337 "subql #2,%1\n\t" /* buff%4==2: treat first word */
338 "jgt 1f\n\t"
339 "addql #2,%1\n\t" /* len was == 2, treat only rest */
340 "jra 4f\n"
341 "1:\t"
342 "movew %2@+,%4\n\t" /* add first word to sum */
343 "addw %4,%0\n\t"
344 "movew %4,%3@+\n\t"
345 "clrl %4\n\t"
346 "addxl %4,%0\n" /* add X bit */
347 "2:\t"
348 /* unrolled loop for the main part: do 8 longs at once */
349 "movel %1,%4\n\t" /* save len in tmp1 */
350 "lsrl #5,%1\n\t" /* len/32 */
351 "jeq 2f\n\t" /* not enough... */
352 "subql #1,%1\n"
353 "1:\t"
354 "movel %2@+,%5\n\t"
355 "addxl %5,%0\n\t"
356 "movel %5,%3@+\n\t"
357 "movel %2@+,%5\n\t"
358 "addxl %5,%0\n\t"
359 "movel %5,%3@+\n\t"
360 "movel %2@+,%5\n\t"
361 "addxl %5,%0\n\t"
362 "movel %5,%3@+\n\t"
363 "movel %2@+,%5\n\t"
364 "addxl %5,%0\n\t"
365 "movel %5,%3@+\n\t"
366 "movel %2@+,%5\n\t"
367 "addxl %5,%0\n\t"
368 "movel %5,%3@+\n\t"
369 "movel %2@+,%5\n\t"
370 "addxl %5,%0\n\t"
371 "movel %5,%3@+\n\t"
372 "movel %2@+,%5\n\t"
373 "addxl %5,%0\n\t"
374 "movel %5,%3@+\n\t"
375 "movel %2@+,%5\n\t"
376 "addxl %5,%0\n\t"
377 "movel %5,%3@+\n\t"
378 "dbra %1,1b\n\t"
379 "clrl %5\n\t"
380 "addxl %5,%0\n\t" /* add X bit */
381 "clrw %1\n\t"
382 "subql #1,%1\n\t"
383 "jcc 1b\n"
384 "2:\t"
385 "movel %4,%1\n\t" /* restore len from tmp1 */
386 "andw #0x1c,%4\n\t" /* number of rest longs */
387 "jeq 4f\n\t"
388 "lsrw #2,%4\n\t"
389 "subqw #1,%4\n"
390 "3:\t"
391 /* loop for rest longs */
392 "movel %2@+,%5\n\t"
393 "addxl %5,%0\n\t"
394 "movel %5,%3@+\n\t"
395 "dbra %4,3b\n\t"
396 "clrl %5\n\t"
397 "addxl %5,%0\n" /* add X bit */
398 "4:\t"
399 /* now check for rest bytes that do not fit into longs */
400 "andw #3,%1\n\t"
401 "jeq 7f\n\t"
402 "clrl %5\n\t" /* clear tmp2 for rest bytes */
403 "subqw #2,%1\n\t"
404 "jlt 5f\n\t"
405 "movew %2@+,%5\n\t" /* have rest >= 2: get word */
406 "movew %5,%3@+\n\t"
407 "swap %5\n\t" /* into bits 16..31 */
408 "tstw %1\n\t" /* another byte? */
409 "jeq 6f\n"
410 "5:\t"
411 "moveb %2@,%5\n\t" /* have odd rest: get byte */
412 "moveb %5,%3@+\n\t"
413 "lslw #8,%5\n" /* into bits 8..15; 16..31 untouched */
414 "6:\t"
415 "addl %5,%0\n\t" /* now add rest long to sum */
416 "clrl %5\n\t"
417 "addxl %5,%0\n" /* add X bit */
418 "7:\t"
419 : "=d" (sum), "=d" (len), "=a" (src), "=a" (dst),
420 "=&d" (tmp1), "=&d" (tmp2)
421 : "0" (sum), "1" (len), "2" (src), "3" (dst)
422 );
423 return(sum);
424}
425EXPORT_SYMBOL(csum_partial_copy_nocheck);
diff --git a/arch/m68k/lib/checksum_no.c b/arch/m68k/lib/checksum_no.c
new file mode 100644
index 000000000000..eccf25d3d73e
--- /dev/null
+++ b/arch/m68k/lib/checksum_no.c
@@ -0,0 +1,153 @@
1/*
2 * INET An implementation of the TCP/IP protocol suite for the LINUX
3 * operating system. INET is implemented using the BSD Socket
4 * interface as the means of communication with the user level.
5 *
6 * IP/TCP/UDP checksumming routines
7 *
8 * Authors: Jorge Cwik, <jorge@laser.satlink.net>
9 * Arnt Gulbrandsen, <agulbra@nvg.unit.no>
10 * Tom May, <ftom@netcom.com>
11 * Andreas Schwab, <schwab@issan.informatik.uni-dortmund.de>
12 * Lots of code moved from tcp.c and ip.c; see those files
13 * for more names.
14 *
15 * 03/02/96 Jes Sorensen, Andreas Schwab, Roman Hodek:
16 * Fixed some nasty bugs, causing some horrible crashes.
17 * A: At some points, the sum (%0) was used as
18 * length-counter instead of the length counter
19 * (%1). Thanks to Roman Hodek for pointing this out.
20 * B: GCC seems to mess up if one uses too many
21 * data-registers to hold input values and one tries to
22 * specify d0 and d1 as scratch registers. Letting gcc choose these
23 * registers itself solves the problem.
24 *
25 * This program is free software; you can redistribute it and/or
26 * modify it under the terms of the GNU General Public License
27 * as published by the Free Software Foundation; either version
28 * 2 of the License, or (at your option) any later version.
29 */
30
31/* Revised by Kenneth Albanowski for m68knommu. Basic problem: unaligned access kills, so most
32 of the assembly has to go. */
33
34#include <linux/module.h>
35#include <net/checksum.h>
36
37static inline unsigned short from32to16(unsigned long x)
38{
39 /* add up 16-bit and 16-bit for 16+c bit */
40 x = (x & 0xffff) + (x >> 16);
41 /* add up carry.. */
42 x = (x & 0xffff) + (x >> 16);
43 return x;
44}
45
46static unsigned long do_csum(const unsigned char * buff, int len)
47{
48 int odd, count;
49 unsigned long result = 0;
50
51 if (len <= 0)
52 goto out;
53 odd = 1 & (unsigned long) buff;
54 if (odd) {
55 result = *buff;
56 len--;
57 buff++;
58 }
59 count = len >> 1; /* nr of 16-bit words.. */
60 if (count) {
61 if (2 & (unsigned long) buff) {
62 result += *(unsigned short *) buff;
63 count--;
64 len -= 2;
65 buff += 2;
66 }
67 count >>= 1; /* nr of 32-bit words.. */
68 if (count) {
69 unsigned long carry = 0;
70 do {
71 unsigned long w = *(unsigned long *) buff;
72 count--;
73 buff += 4;
74 result += carry;
75 result += w;
76 carry = (w > result);
77 } while (count);
78 result += carry;
79 result = (result & 0xffff) + (result >> 16);
80 }
81 if (len & 2) {
82 result += *(unsigned short *) buff;
83 buff += 2;
84 }
85 }
86 if (len & 1)
87 result += (*buff << 8);
88 result = from32to16(result);
89 if (odd)
90 result = ((result >> 8) & 0xff) | ((result & 0xff) << 8);
91out:
92 return result;
93}
94
95#ifdef CONFIG_COLDFIRE
96/*
97 * This is a version of ip_compute_csum() optimized for IP headers,
98 * which always checksum on 4 octet boundaries.
99 */
100__sum16 ip_fast_csum(const void *iph, unsigned int ihl)
101{
102 return (__force __sum16)~do_csum(iph,ihl*4);
103}
104#endif
105
106/*
107 * computes the checksum of a memory block at buff, length len,
108 * and adds in "sum" (32-bit)
109 *
110 * returns a 32-bit number suitable for feeding into itself
111 * or csum_tcpudp_magic
112 *
113 * this function must be called with even lengths, except
114 * for the last fragment, which may be odd
115 *
116 * it's best to have buff aligned on a 32-bit boundary
117 */
118__wsum csum_partial(const void *buff, int len, __wsum sum)
119{
120 unsigned int result = do_csum(buff, len);
121
122 /* add in old sum, and carry.. */
123 result += (__force u32)sum;
124 if ((__force u32)sum > result)
125 result += 1;
126 return (__force __wsum)result;
127}
128
129EXPORT_SYMBOL(csum_partial);
130
131/*
132 * copy from fs while checksumming, otherwise like csum_partial
133 */
134
135__wsum
136csum_partial_copy_from_user(const void __user *src, void *dst,
137 int len, __wsum sum, int *csum_err)
138{
139 if (csum_err) *csum_err = 0;
140 memcpy(dst, (__force const void *)src, len);
141 return csum_partial(dst, len, sum);
142}
143
144/*
145 * copy from ds while checksumming, otherwise like csum_partial
146 */
147
148__wsum
149csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum)
150{
151 memcpy(dst, src, len);
152 return csum_partial(dst, len, sum);
153}
diff --git a/arch/m68k/lib/delay.c b/arch/m68k/lib/delay.c
new file mode 100644
index 000000000000..5bd5472d38a0
--- /dev/null
+++ b/arch/m68k/lib/delay.c
@@ -0,0 +1,21 @@
1/*
2 * arch/m68knommu/lib/delay.c
3 *
4 * (C) Copyright 2004, Greg Ungerer <gerg@snapgear.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/module.h>
12#include <asm/param.h>
13#include <asm/delay.h>
14
15EXPORT_SYMBOL(udelay);
16
17void udelay(unsigned long usecs)
18{
19 _udelay(usecs);
20}
21
diff --git a/arch/m68k/lib/divsi3.S b/arch/m68k/lib/divsi3.S
new file mode 100644
index 000000000000..ec307b61991e
--- /dev/null
+++ b/arch/m68k/lib/divsi3.S
@@ -0,0 +1,125 @@
1/* libgcc1 routines for 68000 w/o floating-point hardware.
2 Copyright (C) 1994, 1996, 1997, 1998 Free Software Foundation, Inc.
3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify it
7under the terms of the GNU General Public License as published by the
8Free Software Foundation; either version 2, or (at your option) any
9later version.
10
11In addition to the permissions in the GNU General Public License, the
12Free Software Foundation gives you unlimited permission to link the
13compiled version of this file with other programs, and to distribute
14those programs without any restriction coming from the use of this
15file. (The General Public License restrictions do apply in other
16respects; for example, they cover modification of the file, and
17distribution when not linked into another program.)
18
19This file is distributed in the hope that it will be useful, but
20WITHOUT ANY WARRANTY; without even the implied warranty of
21MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22General Public License for more details.
23
24You should have received a copy of the GNU General Public License
25along with this program; see the file COPYING. If not, write to
26the Free Software Foundation, 59 Temple Place - Suite 330,
27Boston, MA 02111-1307, USA. */
28
29/* As a special exception, if you link this library with files
30 compiled with GCC to produce an executable, this does not cause
31 the resulting executable to be covered by the GNU General Public License.
32 This exception does not however invalidate any other reasons why
33 the executable file might be covered by the GNU General Public License. */
34
35/* Use this one for any 680x0; assumes no floating point hardware.
36 The trailing " '" appearing on some lines is for ANSI preprocessors. Yuk.
37 Some of this code comes from MINIX, via the folks at ericsson.
38 D. V. Henkel-Wallace (gumby@cygnus.com) Fete Bastille, 1992
39*/
40
41/* These are predefined by new versions of GNU cpp. */
42
43#ifndef __USER_LABEL_PREFIX__
44#define __USER_LABEL_PREFIX__ _
45#endif
46
47#ifndef __REGISTER_PREFIX__
48#define __REGISTER_PREFIX__
49#endif
50
51#ifndef __IMMEDIATE_PREFIX__
52#define __IMMEDIATE_PREFIX__ #
53#endif
54
55/* ANSI concatenation macros. */
56
57#define CONCAT1(a, b) CONCAT2(a, b)
58#define CONCAT2(a, b) a ## b
59
60/* Use the right prefix for global labels. */
61
62#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
63
64/* Use the right prefix for registers. */
65
66#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
67
68/* Use the right prefix for immediate values. */
69
70#define IMM(x) CONCAT1 (__IMMEDIATE_PREFIX__, x)
71
72#define d0 REG (d0)
73#define d1 REG (d1)
74#define d2 REG (d2)
75#define d3 REG (d3)
76#define d4 REG (d4)
77#define d5 REG (d5)
78#define d6 REG (d6)
79#define d7 REG (d7)
80#define a0 REG (a0)
81#define a1 REG (a1)
82#define a2 REG (a2)
83#define a3 REG (a3)
84#define a4 REG (a4)
85#define a5 REG (a5)
86#define a6 REG (a6)
87#define fp REG (fp)
88#define sp REG (sp)
89
90 .text
91 .proc
92 .globl SYM (__divsi3)
93SYM (__divsi3):
94 movel d2, sp@-
95
96 moveq IMM (1), d2 /* sign of result stored in d2 (=1 or =-1) */
97 movel sp@(12), d1 /* d1 = divisor */
98 jpl L1
99 negl d1
100#if !(defined(__mcf5200__) || defined(__mcoldfire__))
101 negb d2 /* change sign because divisor <0 */
102#else
103 negl d2 /* change sign because divisor <0 */
104#endif
105L1: movel sp@(8), d0 /* d0 = dividend */
106 jpl L2
107 negl d0
108#if !(defined(__mcf5200__) || defined(__mcoldfire__))
109 negb d2
110#else
111 negl d2
112#endif
113
114L2: movel d1, sp@-
115 movel d0, sp@-
116 jbsr SYM (__udivsi3) /* divide abs(dividend) by abs(divisor) */
117 addql IMM (8), sp
118
119 tstb d2
120 jpl L3
121 negl d0
122
123L3: movel sp@+, d2
124 rts
125
diff --git a/arch/m68k/lib/memcpy.c b/arch/m68k/lib/memcpy.c
new file mode 100644
index 000000000000..b50dbcad4746
--- /dev/null
+++ b/arch/m68k/lib/memcpy.c
@@ -0,0 +1,62 @@
1
2#include <linux/types.h>
3
4void * memcpy(void * to, const void * from, size_t n)
5{
6#ifdef CONFIG_COLDFIRE
7 void *xto = to;
8 size_t temp;
9
10 if (!n)
11 return xto;
12 if ((long) to & 1)
13 {
14 char *cto = to;
15 const char *cfrom = from;
16 *cto++ = *cfrom++;
17 to = cto;
18 from = cfrom;
19 n--;
20 }
21 if (n > 2 && (long) to & 2)
22 {
23 short *sto = to;
24 const short *sfrom = from;
25 *sto++ = *sfrom++;
26 to = sto;
27 from = sfrom;
28 n -= 2;
29 }
30 temp = n >> 2;
31 if (temp)
32 {
33 long *lto = to;
34 const long *lfrom = from;
35 for (; temp; temp--)
36 *lto++ = *lfrom++;
37 to = lto;
38 from = lfrom;
39 }
40 if (n & 2)
41 {
42 short *sto = to;
43 const short *sfrom = from;
44 *sto++ = *sfrom++;
45 to = sto;
46 from = sfrom;
47 }
48 if (n & 1)
49 {
50 char *cto = to;
51 const char *cfrom = from;
52 *cto = *cfrom;
53 }
54 return xto;
55#else
56 const char *c_from = from;
57 char *c_to = to;
58 while (n-- > 0)
59 *c_to++ = *c_from++;
60 return((void *) to);
61#endif
62}
diff --git a/arch/m68k/lib/memmove.c b/arch/m68k/lib/memmove.c
new file mode 100644
index 000000000000..b3dcfe9dab7e
--- /dev/null
+++ b/arch/m68k/lib/memmove.c
@@ -0,0 +1,105 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file COPYING in the main directory of this archive
4 * for more details.
5 */
6
7#define __IN_STRING_C
8
9#include <linux/module.h>
10#include <linux/string.h>
11
12void *memmove(void *dest, const void *src, size_t n)
13{
14 void *xdest = dest;
15 size_t temp;
16
17 if (!n)
18 return xdest;
19
20 if (dest < src) {
21 if ((long)dest & 1) {
22 char *cdest = dest;
23 const char *csrc = src;
24 *cdest++ = *csrc++;
25 dest = cdest;
26 src = csrc;
27 n--;
28 }
29 if (n > 2 && (long)dest & 2) {
30 short *sdest = dest;
31 const short *ssrc = src;
32 *sdest++ = *ssrc++;
33 dest = sdest;
34 src = ssrc;
35 n -= 2;
36 }
37 temp = n >> 2;
38 if (temp) {
39 long *ldest = dest;
40 const long *lsrc = src;
41 temp--;
42 do
43 *ldest++ = *lsrc++;
44 while (temp--);
45 dest = ldest;
46 src = lsrc;
47 }
48 if (n & 2) {
49 short *sdest = dest;
50 const short *ssrc = src;
51 *sdest++ = *ssrc++;
52 dest = sdest;
53 src = ssrc;
54 }
55 if (n & 1) {
56 char *cdest = dest;
57 const char *csrc = src;
58 *cdest = *csrc;
59 }
60 } else {
61 dest = (char *)dest + n;
62 src = (const char *)src + n;
63 if ((long)dest & 1) {
64 char *cdest = dest;
65 const char *csrc = src;
66 *--cdest = *--csrc;
67 dest = cdest;
68 src = csrc;
69 n--;
70 }
71 if (n > 2 && (long)dest & 2) {
72 short *sdest = dest;
73 const short *ssrc = src;
74 *--sdest = *--ssrc;
75 dest = sdest;
76 src = ssrc;
77 n -= 2;
78 }
79 temp = n >> 2;
80 if (temp) {
81 long *ldest = dest;
82 const long *lsrc = src;
83 temp--;
84 do
85 *--ldest = *--lsrc;
86 while (temp--);
87 dest = ldest;
88 src = lsrc;
89 }
90 if (n & 2) {
91 short *sdest = dest;
92 const short *ssrc = src;
93 *--sdest = *--ssrc;
94 dest = sdest;
95 src = ssrc;
96 }
97 if (n & 1) {
98 char *cdest = dest;
99 const char *csrc = src;
100 *--cdest = *--csrc;
101 }
102 }
103 return xdest;
104}
105EXPORT_SYMBOL(memmove);
diff --git a/arch/m68k/lib/memset.c b/arch/m68k/lib/memset.c
new file mode 100644
index 000000000000..1389bf455633
--- /dev/null
+++ b/arch/m68k/lib/memset.c
@@ -0,0 +1,47 @@
1#include <linux/types.h>
2
3void * memset(void * s, int c, size_t count)
4{
5 void *xs = s;
6 size_t temp;
7
8 if (!count)
9 return xs;
10 c &= 0xff;
11 c |= c << 8;
12 c |= c << 16;
13 if ((long) s & 1)
14 {
15 char *cs = s;
16 *cs++ = c;
17 s = cs;
18 count--;
19 }
20 if (count > 2 && (long) s & 2)
21 {
22 short *ss = s;
23 *ss++ = c;
24 s = ss;
25 count -= 2;
26 }
27 temp = count >> 2;
28 if (temp)
29 {
30 long *ls = s;
31 for (; temp; temp--)
32 *ls++ = c;
33 s = ls;
34 }
35 if (count & 2)
36 {
37 short *ss = s;
38 *ss++ = c;
39 s = ss;
40 }
41 if (count & 1)
42 {
43 char *cs = s;
44 *cs = c;
45 }
46 return xs;
47}
diff --git a/arch/m68k/lib/modsi3.S b/arch/m68k/lib/modsi3.S
new file mode 100644
index 000000000000..ef3849435768
--- /dev/null
+++ b/arch/m68k/lib/modsi3.S
@@ -0,0 +1,113 @@
1/* libgcc1 routines for 68000 w/o floating-point hardware.
2 Copyright (C) 1994, 1996, 1997, 1998 Free Software Foundation, Inc.
3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify it
7under the terms of the GNU General Public License as published by the
8Free Software Foundation; either version 2, or (at your option) any
9later version.
10
11In addition to the permissions in the GNU General Public License, the
12Free Software Foundation gives you unlimited permission to link the
13compiled version of this file with other programs, and to distribute
14those programs without any restriction coming from the use of this
15file. (The General Public License restrictions do apply in other
16respects; for example, they cover modification of the file, and
17distribution when not linked into another program.)
18
19This file is distributed in the hope that it will be useful, but
20WITHOUT ANY WARRANTY; without even the implied warranty of
21MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22General Public License for more details.
23
24You should have received a copy of the GNU General Public License
25along with this program; see the file COPYING. If not, write to
26the Free Software Foundation, 59 Temple Place - Suite 330,
27Boston, MA 02111-1307, USA. */
28
29/* As a special exception, if you link this library with files
30 compiled with GCC to produce an executable, this does not cause
31 the resulting executable to be covered by the GNU General Public License.
32 This exception does not however invalidate any other reasons why
33 the executable file might be covered by the GNU General Public License. */
34
35/* Use this one for any 680x0; assumes no floating point hardware.
36 The trailing " '" appearing on some lines is for ANSI preprocessors. Yuk.
37 Some of this code comes from MINIX, via the folks at ericsson.
38 D. V. Henkel-Wallace (gumby@cygnus.com) Fete Bastille, 1992
39*/
40
41/* These are predefined by new versions of GNU cpp. */
42
43#ifndef __USER_LABEL_PREFIX__
44#define __USER_LABEL_PREFIX__ _
45#endif
46
47#ifndef __REGISTER_PREFIX__
48#define __REGISTER_PREFIX__
49#endif
50
51#ifndef __IMMEDIATE_PREFIX__
52#define __IMMEDIATE_PREFIX__ #
53#endif
54
55/* ANSI concatenation macros. */
56
57#define CONCAT1(a, b) CONCAT2(a, b)
58#define CONCAT2(a, b) a ## b
59
60/* Use the right prefix for global labels. */
61
62#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
63
64/* Use the right prefix for registers. */
65
66#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
67
68/* Use the right prefix for immediate values. */
69
70#define IMM(x) CONCAT1 (__IMMEDIATE_PREFIX__, x)
71
72#define d0 REG (d0)
73#define d1 REG (d1)
74#define d2 REG (d2)
75#define d3 REG (d3)
76#define d4 REG (d4)
77#define d5 REG (d5)
78#define d6 REG (d6)
79#define d7 REG (d7)
80#define a0 REG (a0)
81#define a1 REG (a1)
82#define a2 REG (a2)
83#define a3 REG (a3)
84#define a4 REG (a4)
85#define a5 REG (a5)
86#define a6 REG (a6)
87#define fp REG (fp)
88#define sp REG (sp)
89
90 .text
91 .proc
92 .globl SYM (__modsi3)
93SYM (__modsi3):
94 movel sp@(8), d1 /* d1 = divisor */
95 movel sp@(4), d0 /* d0 = dividend */
96 movel d1, sp@-
97 movel d0, sp@-
98 jbsr SYM (__divsi3)
99 addql IMM (8), sp
100 movel sp@(8), d1 /* d1 = divisor */
101#if !(defined(__mcf5200__) || defined(__mcoldfire__))
102 movel d1, sp@-
103 movel d0, sp@-
104 jbsr SYM (__mulsi3) /* d0 = (a/b)*b */
105 addql IMM (8), sp
106#else
107 mulsl d1,d0
108#endif
109 movel sp@(4), d1 /* d1 = dividend */
110 subl d0, d1 /* d1 = a - (a/b)*b */
111 movel d1, d0
112 rts
113
diff --git a/arch/m68k/lib/muldi3.c b/arch/m68k/lib/muldi3.c
index be4f275649e3..16e0eb338ee0 100644
--- a/arch/m68k/lib/muldi3.c
+++ b/arch/m68k/lib/muldi3.c
@@ -1,63 +1,5 @@
1/* muldi3.c extracted from gcc-2.7.2.3/libgcc2.c and 1#ifdef CONFIG_MMU
2 gcc-2.7.2.3/longlong.h which is: */ 2#include "muldi3_mm.c"
3/* Copyright (C) 1989, 1992, 1993, 1994, 1995 Free Software Foundation, Inc. 3#else
4 4#include "muldi3_no.c"
5This file is part of GNU CC. 5#endif
6
7GNU CC is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2, or (at your option)
10any later version.
11
12GNU CC is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with GNU CC; see the file COPYING. If not, write to
19the Free Software Foundation, 59 Temple Place - Suite 330,
20Boston, MA 02111-1307, USA. */
21
22#define BITS_PER_UNIT 8
23
24#define umul_ppmm(w1, w0, u, v) \
25 __asm__ ("mulu%.l %3,%1:%0" \
26 : "=d" ((USItype)(w0)), \
27 "=d" ((USItype)(w1)) \
28 : "%0" ((USItype)(u)), \
29 "dmi" ((USItype)(v)))
30
31#define __umulsidi3(u, v) \
32 ({DIunion __w; \
33 umul_ppmm (__w.s.high, __w.s.low, u, v); \
34 __w.ll; })
35
36typedef int SItype __attribute__ ((mode (SI)));
37typedef unsigned int USItype __attribute__ ((mode (SI)));
38typedef int DItype __attribute__ ((mode (DI)));
39typedef int word_type __attribute__ ((mode (__word__)));
40
41struct DIstruct {SItype high, low;};
42
43typedef union
44{
45 struct DIstruct s;
46 DItype ll;
47} DIunion;
48
49DItype
50__muldi3 (DItype u, DItype v)
51{
52 DIunion w;
53 DIunion uu, vv;
54
55 uu.ll = u,
56 vv.ll = v;
57
58 w.ll = __umulsidi3 (uu.s.low, vv.s.low);
59 w.s.high += ((USItype) uu.s.low * (USItype) vv.s.high
60 + (USItype) uu.s.high * (USItype) vv.s.low);
61
62 return w.ll;
63}
diff --git a/arch/m68k/lib/muldi3_mm.c b/arch/m68k/lib/muldi3_mm.c
new file mode 100644
index 000000000000..be4f275649e3
--- /dev/null
+++ b/arch/m68k/lib/muldi3_mm.c
@@ -0,0 +1,63 @@
1/* muldi3.c extracted from gcc-2.7.2.3/libgcc2.c and
2 gcc-2.7.2.3/longlong.h which is: */
3/* Copyright (C) 1989, 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
4
5This file is part of GNU CC.
6
7GNU CC is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2, or (at your option)
10any later version.
11
12GNU CC is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with GNU CC; see the file COPYING. If not, write to
19the Free Software Foundation, 59 Temple Place - Suite 330,
20Boston, MA 02111-1307, USA. */
21
22#define BITS_PER_UNIT 8
23
24#define umul_ppmm(w1, w0, u, v) \
25 __asm__ ("mulu%.l %3,%1:%0" \
26 : "=d" ((USItype)(w0)), \
27 "=d" ((USItype)(w1)) \
28 : "%0" ((USItype)(u)), \
29 "dmi" ((USItype)(v)))
30
31#define __umulsidi3(u, v) \
32 ({DIunion __w; \
33 umul_ppmm (__w.s.high, __w.s.low, u, v); \
34 __w.ll; })
35
36typedef int SItype __attribute__ ((mode (SI)));
37typedef unsigned int USItype __attribute__ ((mode (SI)));
38typedef int DItype __attribute__ ((mode (DI)));
39typedef int word_type __attribute__ ((mode (__word__)));
40
41struct DIstruct {SItype high, low;};
42
43typedef union
44{
45 struct DIstruct s;
46 DItype ll;
47} DIunion;
48
49DItype
50__muldi3 (DItype u, DItype v)
51{
52 DIunion w;
53 DIunion uu, vv;
54
55 uu.ll = u,
56 vv.ll = v;
57
58 w.ll = __umulsidi3 (uu.s.low, vv.s.low);
59 w.s.high += ((USItype) uu.s.low * (USItype) vv.s.high
60 + (USItype) uu.s.high * (USItype) vv.s.low);
61
62 return w.ll;
63}
diff --git a/arch/m68k/lib/muldi3_no.c b/arch/m68k/lib/muldi3_no.c
new file mode 100644
index 000000000000..34af72c30303
--- /dev/null
+++ b/arch/m68k/lib/muldi3_no.c
@@ -0,0 +1,86 @@
1/* muldi3.c extracted from gcc-2.7.2.3/libgcc2.c and
2 gcc-2.7.2.3/longlong.h which is: */
3/* Copyright (C) 1989, 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
4
5This file is part of GNU CC.
6
7GNU CC is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2, or (at your option)
10any later version.
11
12GNU CC is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with GNU CC; see the file COPYING. If not, write to
19the Free Software Foundation, 59 Temple Place - Suite 330,
20Boston, MA 02111-1307, USA. */
21
22#define BITS_PER_UNIT 8
23#define SI_TYPE_SIZE 32
24
25#define __BITS4 (SI_TYPE_SIZE / 4)
26#define __ll_B (1L << (SI_TYPE_SIZE / 2))
27#define __ll_lowpart(t) ((USItype) (t) % __ll_B)
28#define __ll_highpart(t) ((USItype) (t) / __ll_B)
29
30#define umul_ppmm(w1, w0, u, v) \
31 do { \
32 USItype __x0, __x1, __x2, __x3; \
33 USItype __ul, __vl, __uh, __vh; \
34 \
35 __ul = __ll_lowpart (u); \
36 __uh = __ll_highpart (u); \
37 __vl = __ll_lowpart (v); \
38 __vh = __ll_highpart (v); \
39 \
40 __x0 = (USItype) __ul * __vl; \
41 __x1 = (USItype) __ul * __vh; \
42 __x2 = (USItype) __uh * __vl; \
43 __x3 = (USItype) __uh * __vh; \
44 \
45 __x1 += __ll_highpart (__x0);/* this can't give carry */ \
46 __x1 += __x2; /* but this indeed can */ \
47 if (__x1 < __x2) /* did we get it? */ \
48 __x3 += __ll_B; /* yes, add it in the proper pos. */ \
49 \
50 (w1) = __x3 + __ll_highpart (__x1); \
51 (w0) = __ll_lowpart (__x1) * __ll_B + __ll_lowpart (__x0); \
52 } while (0)
53
54#define __umulsidi3(u, v) \
55 ({DIunion __w; \
56 umul_ppmm (__w.s.high, __w.s.low, u, v); \
57 __w.ll; })
58
59typedef int SItype __attribute__ ((mode (SI)));
60typedef unsigned int USItype __attribute__ ((mode (SI)));
61typedef int DItype __attribute__ ((mode (DI)));
62typedef int word_type __attribute__ ((mode (__word__)));
63
64struct DIstruct {SItype high, low;};
65
66typedef union
67{
68 struct DIstruct s;
69 DItype ll;
70} DIunion;
71
72DItype
73__muldi3 (DItype u, DItype v)
74{
75 DIunion w;
76 DIunion uu, vv;
77
78 uu.ll = u,
79 vv.ll = v;
80
81 w.ll = __umulsidi3 (uu.s.low, vv.s.low);
82 w.s.high += ((USItype) uu.s.low * (USItype) vv.s.high
83 + (USItype) uu.s.high * (USItype) vv.s.low);
84
85 return w.ll;
86}
diff --git a/arch/m68k/lib/mulsi3.S b/arch/m68k/lib/mulsi3.S
new file mode 100644
index 000000000000..ce29ea37b45f
--- /dev/null
+++ b/arch/m68k/lib/mulsi3.S
@@ -0,0 +1,110 @@
1/* libgcc1 routines for 68000 w/o floating-point hardware.
2 Copyright (C) 1994, 1996, 1997, 1998 Free Software Foundation, Inc.
3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify it
7under the terms of the GNU General Public License as published by the
8Free Software Foundation; either version 2, or (at your option) any
9later version.
10
11In addition to the permissions in the GNU General Public License, the
12Free Software Foundation gives you unlimited permission to link the
13compiled version of this file with other programs, and to distribute
14those programs without any restriction coming from the use of this
15file. (The General Public License restrictions do apply in other
16respects; for example, they cover modification of the file, and
17distribution when not linked into another program.)
18
19This file is distributed in the hope that it will be useful, but
20WITHOUT ANY WARRANTY; without even the implied warranty of
21MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22General Public License for more details.
23
24You should have received a copy of the GNU General Public License
25along with this program; see the file COPYING. If not, write to
26the Free Software Foundation, 59 Temple Place - Suite 330,
27Boston, MA 02111-1307, USA. */
28
29/* As a special exception, if you link this library with files
30 compiled with GCC to produce an executable, this does not cause
31 the resulting executable to be covered by the GNU General Public License.
32 This exception does not however invalidate any other reasons why
33 the executable file might be covered by the GNU General Public License. */
34
35/* Use this one for any 680x0; assumes no floating point hardware.
36 The trailing " '" appearing on some lines is for ANSI preprocessors. Yuk.
37 Some of this code comes from MINIX, via the folks at ericsson.
38 D. V. Henkel-Wallace (gumby@cygnus.com) Fete Bastille, 1992
39*/
40
41/* These are predefined by new versions of GNU cpp. */
42
43#ifndef __USER_LABEL_PREFIX__
44#define __USER_LABEL_PREFIX__ _
45#endif
46
47#ifndef __REGISTER_PREFIX__
48#define __REGISTER_PREFIX__
49#endif
50
51#ifndef __IMMEDIATE_PREFIX__
52#define __IMMEDIATE_PREFIX__ #
53#endif
54
55/* ANSI concatenation macros. */
56
57#define CONCAT1(a, b) CONCAT2(a, b)
58#define CONCAT2(a, b) a ## b
59
60/* Use the right prefix for global labels. */
61
62#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
63
64/* Use the right prefix for registers. */
65
66#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
67
68/* Use the right prefix for immediate values. */
69
70#define IMM(x) CONCAT1 (__IMMEDIATE_PREFIX__, x)
71
72#define d0 REG (d0)
73#define d1 REG (d1)
74#define d2 REG (d2)
75#define d3 REG (d3)
76#define d4 REG (d4)
77#define d5 REG (d5)
78#define d6 REG (d6)
79#define d7 REG (d7)
80#define a0 REG (a0)
81#define a1 REG (a1)
82#define a2 REG (a2)
83#define a3 REG (a3)
84#define a4 REG (a4)
85#define a5 REG (a5)
86#define a6 REG (a6)
87#define fp REG (fp)
88#define sp REG (sp)
89
90 .text
91 .proc
92 .globl SYM (__mulsi3)
93SYM (__mulsi3):
94 movew sp@(4), d0 /* x0 -> d0 */
95 muluw sp@(10), d0 /* x0*y1 */
96 movew sp@(6), d1 /* x1 -> d1 */
97 muluw sp@(8), d1 /* x1*y0 */
98#if !(defined(__mcf5200__) || defined(__mcoldfire__))
99 addw d1, d0
100#else
101 addl d1, d0
102#endif
103 swap d0
104 clrw d0
105 movew sp@(6), d1 /* x1 -> d1 */
106 muluw sp@(10), d1 /* x1*y1 */
107 addl d1, d0
108
109 rts
110
diff --git a/arch/m68k/lib/udivsi3.S b/arch/m68k/lib/udivsi3.S
new file mode 100644
index 000000000000..c424c4a1f0a3
--- /dev/null
+++ b/arch/m68k/lib/udivsi3.S
@@ -0,0 +1,162 @@
1/* libgcc1 routines for 68000 w/o floating-point hardware.
2 Copyright (C) 1994, 1996, 1997, 1998 Free Software Foundation, Inc.
3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify it
7under the terms of the GNU General Public License as published by the
8Free Software Foundation; either version 2, or (at your option) any
9later version.
10
11In addition to the permissions in the GNU General Public License, the
12Free Software Foundation gives you unlimited permission to link the
13compiled version of this file with other programs, and to distribute
14those programs without any restriction coming from the use of this
15file. (The General Public License restrictions do apply in other
16respects; for example, they cover modification of the file, and
17distribution when not linked into another program.)
18
19This file is distributed in the hope that it will be useful, but
20WITHOUT ANY WARRANTY; without even the implied warranty of
21MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22General Public License for more details.
23
24You should have received a copy of the GNU General Public License
25along with this program; see the file COPYING. If not, write to
26the Free Software Foundation, 59 Temple Place - Suite 330,
27Boston, MA 02111-1307, USA. */
28
29/* As a special exception, if you link this library with files
30 compiled with GCC to produce an executable, this does not cause
31 the resulting executable to be covered by the GNU General Public License.
32 This exception does not however invalidate any other reasons why
33 the executable file might be covered by the GNU General Public License. */
34
35/* Use this one for any 680x0; assumes no floating point hardware.
36 The trailing " '" appearing on some lines is for ANSI preprocessors. Yuk.
37 Some of this code comes from MINIX, via the folks at ericsson.
38 D. V. Henkel-Wallace (gumby@cygnus.com) Fete Bastille, 1992
39*/
40
41/* These are predefined by new versions of GNU cpp. */
42
43#ifndef __USER_LABEL_PREFIX__
44#define __USER_LABEL_PREFIX__ _
45#endif
46
47#ifndef __REGISTER_PREFIX__
48#define __REGISTER_PREFIX__
49#endif
50
51#ifndef __IMMEDIATE_PREFIX__
52#define __IMMEDIATE_PREFIX__ #
53#endif
54
55/* ANSI concatenation macros. */
56
57#define CONCAT1(a, b) CONCAT2(a, b)
58#define CONCAT2(a, b) a ## b
59
60/* Use the right prefix for global labels. */
61
62#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
63
64/* Use the right prefix for registers. */
65
66#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
67
68/* Use the right prefix for immediate values. */
69
70#define IMM(x) CONCAT1 (__IMMEDIATE_PREFIX__, x)
71
72#define d0 REG (d0)
73#define d1 REG (d1)
74#define d2 REG (d2)
75#define d3 REG (d3)
76#define d4 REG (d4)
77#define d5 REG (d5)
78#define d6 REG (d6)
79#define d7 REG (d7)
80#define a0 REG (a0)
81#define a1 REG (a1)
82#define a2 REG (a2)
83#define a3 REG (a3)
84#define a4 REG (a4)
85#define a5 REG (a5)
86#define a6 REG (a6)
87#define fp REG (fp)
88#define sp REG (sp)
89
90 .text
91 .proc
92 .globl SYM (__udivsi3)
93SYM (__udivsi3):
94#if !(defined(__mcf5200__) || defined(__mcoldfire__))
95 movel d2, sp@-
96 movel sp@(12), d1 /* d1 = divisor */
97 movel sp@(8), d0 /* d0 = dividend */
98
99 cmpl IMM (0x10000), d1 /* divisor >= 2 ^ 16 ? */
100 jcc L3 /* then try next algorithm */
101 movel d0, d2
102 clrw d2
103 swap d2
104 divu d1, d2 /* high quotient in lower word */
105 movew d2, d0 /* save high quotient */
106 swap d0
107 movew sp@(10), d2 /* get low dividend + high rest */
108 divu d1, d2 /* low quotient */
109 movew d2, d0
110 jra L6
111
112L3: movel d1, d2 /* use d2 as divisor backup */
113L4: lsrl IMM (1), d1 /* shift divisor */
114 lsrl IMM (1), d0 /* shift dividend */
115 cmpl IMM (0x10000), d1 /* still divisor >= 2 ^ 16 ? */
116 jcc L4
117 divu d1, d0 /* now we have 16 bit divisor */
118 andl IMM (0xffff), d0 /* mask out divisor, ignore remainder */
119
120/* Multiply the 16 bit tentative quotient with the 32 bit divisor. Because of
121 the operand ranges, this might give a 33 bit product. If this product is
122 greater than the dividend, the tentative quotient was too large. */
123 movel d2, d1
124 mulu d0, d1 /* low part, 32 bits */
125 swap d2
126 mulu d0, d2 /* high part, at most 17 bits */
127 swap d2 /* align high part with low part */
128 tstw d2 /* high part 17 bits? */
129 jne L5 /* if 17 bits, quotient was too large */
130 addl d2, d1 /* add parts */
131 jcs L5 /* if sum is 33 bits, quotient was too large */
132 cmpl sp@(8), d1 /* compare the sum with the dividend */
133 jls L6 /* if sum > dividend, quotient was too large */
134L5: subql IMM (1), d0 /* adjust quotient */
135
136L6: movel sp@+, d2
137 rts
138
139#else /* __mcf5200__ || __mcoldfire__ */
140
141/* Coldfire implementation of non-restoring division algorithm from
142 Hennessy & Patterson, Appendix A. */
143 link a6,IMM (-12)
144 moveml d2-d4,sp@
145 movel a6@(8),d0
146 movel a6@(12),d1
147 clrl d2 | clear p
148 moveq IMM (31),d4
149L1: addl d0,d0 | shift reg pair (p,a) one bit left
150 addxl d2,d2
151 movl d2,d3 | subtract b from p, store in tmp.
152 subl d1,d3
153 jcs L2 | if no carry,
154 bset IMM (0),d0 | set the low order bit of a to 1,
155 movl d3,d2 | and store tmp in p.
156L2: subql IMM (1),d4
157 jcc L1
158 moveml sp@,d2-d4 | restore data registers
159 unlk a6 | and return
160 rts
161#endif /* __mcf5200__ || __mcoldfire__ */
162
diff --git a/arch/m68k/lib/umodsi3.S b/arch/m68k/lib/umodsi3.S
new file mode 100644
index 000000000000..5def5f626478
--- /dev/null
+++ b/arch/m68k/lib/umodsi3.S
@@ -0,0 +1,113 @@
1/* libgcc1 routines for 68000 w/o floating-point hardware.
2 Copyright (C) 1994, 1996, 1997, 1998 Free Software Foundation, Inc.
3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify it
7under the terms of the GNU General Public License as published by the
8Free Software Foundation; either version 2, or (at your option) any
9later version.
10
11In addition to the permissions in the GNU General Public License, the
12Free Software Foundation gives you unlimited permission to link the
13compiled version of this file with other programs, and to distribute
14those programs without any restriction coming from the use of this
15file. (The General Public License restrictions do apply in other
16respects; for example, they cover modification of the file, and
17distribution when not linked into another program.)
18
19This file is distributed in the hope that it will be useful, but
20WITHOUT ANY WARRANTY; without even the implied warranty of
21MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22General Public License for more details.
23
24You should have received a copy of the GNU General Public License
25along with this program; see the file COPYING. If not, write to
26the Free Software Foundation, 59 Temple Place - Suite 330,
27Boston, MA 02111-1307, USA. */
28
29/* As a special exception, if you link this library with files
30 compiled with GCC to produce an executable, this does not cause
31 the resulting executable to be covered by the GNU General Public License.
32 This exception does not however invalidate any other reasons why
33 the executable file might be covered by the GNU General Public License. */
34
35/* Use this one for any 680x0; assumes no floating point hardware.
36 The trailing " '" appearing on some lines is for ANSI preprocessors. Yuk.
37 Some of this code comes from MINIX, via the folks at ericsson.
38 D. V. Henkel-Wallace (gumby@cygnus.com) Fete Bastille, 1992
39*/
40
41/* These are predefined by new versions of GNU cpp. */
42
43#ifndef __USER_LABEL_PREFIX__
44#define __USER_LABEL_PREFIX__ _
45#endif
46
47#ifndef __REGISTER_PREFIX__
48#define __REGISTER_PREFIX__
49#endif
50
51#ifndef __IMMEDIATE_PREFIX__
52#define __IMMEDIATE_PREFIX__ #
53#endif
54
55/* ANSI concatenation macros. */
56
57#define CONCAT1(a, b) CONCAT2(a, b)
58#define CONCAT2(a, b) a ## b
59
60/* Use the right prefix for global labels. */
61
62#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
63
64/* Use the right prefix for registers. */
65
66#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
67
68/* Use the right prefix for immediate values. */
69
70#define IMM(x) CONCAT1 (__IMMEDIATE_PREFIX__, x)
71
72#define d0 REG (d0)
73#define d1 REG (d1)
74#define d2 REG (d2)
75#define d3 REG (d3)
76#define d4 REG (d4)
77#define d5 REG (d5)
78#define d6 REG (d6)
79#define d7 REG (d7)
80#define a0 REG (a0)
81#define a1 REG (a1)
82#define a2 REG (a2)
83#define a3 REG (a3)
84#define a4 REG (a4)
85#define a5 REG (a5)
86#define a6 REG (a6)
87#define fp REG (fp)
88#define sp REG (sp)
89
90 .text
91 .proc
92 .globl SYM (__umodsi3)
93SYM (__umodsi3):
94 movel sp@(8), d1 /* d1 = divisor */
95 movel sp@(4), d0 /* d0 = dividend */
96 movel d1, sp@-
97 movel d0, sp@-
98 jbsr SYM (__udivsi3)
99 addql IMM (8), sp
100 movel sp@(8), d1 /* d1 = divisor */
101#if !(defined(__mcf5200__) || defined(__mcoldfire__))
102 movel d1, sp@-
103 movel d0, sp@-
104 jbsr SYM (__mulsi3) /* d0 = (a/b)*b */
105 addql IMM (8), sp
106#else
107 mulsl d1,d0
108#endif
109 movel sp@(4), d1 /* d1 = dividend */
110 subl d0, d1 /* d1 = a - (a/b)*b */
111 movel d1, d0
112 rts
113
diff --git a/arch/m68k/mm/Makefile b/arch/m68k/mm/Makefile
index 5eaa43c4cb3c..b60270e4954b 100644
--- a/arch/m68k/mm/Makefile
+++ b/arch/m68k/mm/Makefile
@@ -1,8 +1,5 @@
1# 1ifdef CONFIG_MMU
2# Makefile for the linux m68k-specific parts of the memory manager. 2include arch/m68k/mm/Makefile_mm
3# 3else
4 4include arch/m68k/mm/Makefile_no
5obj-y := cache.o init.o fault.o hwtest.o 5endif
6
7obj-$(CONFIG_MMU_MOTOROLA) += kmap.o memory.o motorola.o
8obj-$(CONFIG_MMU_SUN3) += sun3kmap.o sun3mmu.o
diff --git a/arch/m68k/mm/Makefile_mm b/arch/m68k/mm/Makefile_mm
new file mode 100644
index 000000000000..5eaa43c4cb3c
--- /dev/null
+++ b/arch/m68k/mm/Makefile_mm
@@ -0,0 +1,8 @@
1#
2# Makefile for the linux m68k-specific parts of the memory manager.
3#
4
5obj-y := cache.o init.o fault.o hwtest.o
6
7obj-$(CONFIG_MMU_MOTOROLA) += kmap.o memory.o motorola.o
8obj-$(CONFIG_MMU_SUN3) += sun3kmap.o sun3mmu.o
diff --git a/arch/m68k/mm/Makefile_no b/arch/m68k/mm/Makefile_no
new file mode 100644
index 000000000000..b54ab6b4b523
--- /dev/null
+++ b/arch/m68k/mm/Makefile_no
@@ -0,0 +1,5 @@
1#
2# Makefile for the linux m68knommu specific parts of the memory manager.
3#
4
5obj-y += init.o kmap.o
diff --git a/arch/m68k/mm/init.c b/arch/m68k/mm/init.c
index 8bc842554e5b..27b5ce089a34 100644
--- a/arch/m68k/mm/init.c
+++ b/arch/m68k/mm/init.c
@@ -1,150 +1,5 @@
1/* 1#ifdef CONFIG_MMU
2 * linux/arch/m68k/mm/init.c 2#include "init_mm.c"
3 * 3#else
4 * Copyright (C) 1995 Hamish Macdonald 4#include "init_no.c"
5 *
6 * Contains common initialization routines, specific init code moved
7 * to motorola.c and sun3mmu.c
8 */
9
10#include <linux/module.h>
11#include <linux/signal.h>
12#include <linux/sched.h>
13#include <linux/mm.h>
14#include <linux/swap.h>
15#include <linux/kernel.h>
16#include <linux/string.h>
17#include <linux/types.h>
18#include <linux/init.h>
19#include <linux/bootmem.h>
20#include <linux/gfp.h>
21
22#include <asm/setup.h>
23#include <asm/uaccess.h>
24#include <asm/page.h>
25#include <asm/pgalloc.h>
26#include <asm/system.h>
27#include <asm/machdep.h>
28#include <asm/io.h>
29#ifdef CONFIG_ATARI
30#include <asm/atari_stram.h>
31#endif
32#include <asm/sections.h>
33#include <asm/tlb.h>
34
35DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
36
37pg_data_t pg_data_map[MAX_NUMNODES];
38EXPORT_SYMBOL(pg_data_map);
39
40int m68k_virt_to_node_shift;
41
42#ifndef CONFIG_SINGLE_MEMORY_CHUNK
43pg_data_t *pg_data_table[65];
44EXPORT_SYMBOL(pg_data_table);
45#endif
46
47void __init m68k_setup_node(int node)
48{
49#ifndef CONFIG_SINGLE_MEMORY_CHUNK
50 struct mem_info *info = m68k_memory + node;
51 int i, end;
52
53 i = (unsigned long)phys_to_virt(info->addr) >> __virt_to_node_shift();
54 end = (unsigned long)phys_to_virt(info->addr + info->size - 1) >> __virt_to_node_shift();
55 for (; i <= end; i++) {
56 if (pg_data_table[i])
57 printk("overlap at %u for chunk %u\n", i, node);
58 pg_data_table[i] = pg_data_map + node;
59 }
60#endif
61 pg_data_map[node].bdata = bootmem_node_data + node;
62 node_set_online(node);
63}
64
65
66/*
67 * ZERO_PAGE is a special page that is used for zero-initialized
68 * data and COW.
69 */
70
71void *empty_zero_page;
72EXPORT_SYMBOL(empty_zero_page);
73
74extern void init_pointer_table(unsigned long ptable);
75
76/* References to section boundaries */
77
78extern pmd_t *zero_pgtable;
79
80void __init mem_init(void)
81{
82 pg_data_t *pgdat;
83 int codepages = 0;
84 int datapages = 0;
85 int initpages = 0;
86 int i;
87
88#ifdef CONFIG_ATARI
89 if (MACH_IS_ATARI)
90 atari_stram_mem_init_hook();
91#endif
92
93 /* this will put all memory onto the freelists */
94 totalram_pages = num_physpages = 0;
95 for_each_online_pgdat(pgdat) {
96 num_physpages += pgdat->node_present_pages;
97
98 totalram_pages += free_all_bootmem_node(pgdat);
99 for (i = 0; i < pgdat->node_spanned_pages; i++) {
100 struct page *page = pgdat->node_mem_map + i;
101 char *addr = page_to_virt(page);
102
103 if (!PageReserved(page))
104 continue;
105 if (addr >= _text &&
106 addr < _etext)
107 codepages++;
108 else if (addr >= __init_begin &&
109 addr < __init_end)
110 initpages++;
111 else
112 datapages++;
113 }
114 }
115
116#ifndef CONFIG_SUN3
117 /* insert pointer tables allocated so far into the tablelist */
118 init_pointer_table((unsigned long)kernel_pg_dir);
119 for (i = 0; i < PTRS_PER_PGD; i++) {
120 if (pgd_present(kernel_pg_dir[i]))
121 init_pointer_table(__pgd_page(kernel_pg_dir[i]));
122 }
123
124 /* insert also pointer table that we used to unmap the zero page */
125 if (zero_pgtable)
126 init_pointer_table((unsigned long)zero_pgtable);
127#endif
128
129 printk("Memory: %luk/%luk available (%dk kernel code, %dk data, %dk init)\n",
130 nr_free_pages() << (PAGE_SHIFT-10),
131 totalram_pages << (PAGE_SHIFT-10),
132 codepages << (PAGE_SHIFT-10),
133 datapages << (PAGE_SHIFT-10),
134 initpages << (PAGE_SHIFT-10));
135}
136
137#ifdef CONFIG_BLK_DEV_INITRD
138void free_initrd_mem(unsigned long start, unsigned long end)
139{
140 int pages = 0;
141 for (; start < end; start += PAGE_SIZE) {
142 ClearPageReserved(virt_to_page(start));
143 init_page_count(virt_to_page(start));
144 free_page(start);
145 totalram_pages++;
146 pages++;
147 }
148 printk ("Freeing initrd memory: %dk freed\n", pages);
149}
150#endif 5#endif
diff --git a/arch/m68k/mm/init_mm.c b/arch/m68k/mm/init_mm.c
new file mode 100644
index 000000000000..8bc842554e5b
--- /dev/null
+++ b/arch/m68k/mm/init_mm.c
@@ -0,0 +1,150 @@
1/*
2 * linux/arch/m68k/mm/init.c
3 *
4 * Copyright (C) 1995 Hamish Macdonald
5 *
6 * Contains common initialization routines, specific init code moved
7 * to motorola.c and sun3mmu.c
8 */
9
10#include <linux/module.h>
11#include <linux/signal.h>
12#include <linux/sched.h>
13#include <linux/mm.h>
14#include <linux/swap.h>
15#include <linux/kernel.h>
16#include <linux/string.h>
17#include <linux/types.h>
18#include <linux/init.h>
19#include <linux/bootmem.h>
20#include <linux/gfp.h>
21
22#include <asm/setup.h>
23#include <asm/uaccess.h>
24#include <asm/page.h>
25#include <asm/pgalloc.h>
26#include <asm/system.h>
27#include <asm/machdep.h>
28#include <asm/io.h>
29#ifdef CONFIG_ATARI
30#include <asm/atari_stram.h>
31#endif
32#include <asm/sections.h>
33#include <asm/tlb.h>
34
35DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
36
37pg_data_t pg_data_map[MAX_NUMNODES];
38EXPORT_SYMBOL(pg_data_map);
39
40int m68k_virt_to_node_shift;
41
42#ifndef CONFIG_SINGLE_MEMORY_CHUNK
43pg_data_t *pg_data_table[65];
44EXPORT_SYMBOL(pg_data_table);
45#endif
46
47void __init m68k_setup_node(int node)
48{
49#ifndef CONFIG_SINGLE_MEMORY_CHUNK
50 struct mem_info *info = m68k_memory + node;
51 int i, end;
52
53 i = (unsigned long)phys_to_virt(info->addr) >> __virt_to_node_shift();
54 end = (unsigned long)phys_to_virt(info->addr + info->size - 1) >> __virt_to_node_shift();
55 for (; i <= end; i++) {
56 if (pg_data_table[i])
57 printk("overlap at %u for chunk %u\n", i, node);
58 pg_data_table[i] = pg_data_map + node;
59 }
60#endif
61 pg_data_map[node].bdata = bootmem_node_data + node;
62 node_set_online(node);
63}
64
65
66/*
67 * ZERO_PAGE is a special page that is used for zero-initialized
68 * data and COW.
69 */
70
71void *empty_zero_page;
72EXPORT_SYMBOL(empty_zero_page);
73
74extern void init_pointer_table(unsigned long ptable);
75
76/* References to section boundaries */
77
78extern pmd_t *zero_pgtable;
79
80void __init mem_init(void)
81{
82 pg_data_t *pgdat;
83 int codepages = 0;
84 int datapages = 0;
85 int initpages = 0;
86 int i;
87
88#ifdef CONFIG_ATARI
89 if (MACH_IS_ATARI)
90 atari_stram_mem_init_hook();
91#endif
92
93 /* this will put all memory onto the freelists */
94 totalram_pages = num_physpages = 0;
95 for_each_online_pgdat(pgdat) {
96 num_physpages += pgdat->node_present_pages;
97
98 totalram_pages += free_all_bootmem_node(pgdat);
99 for (i = 0; i < pgdat->node_spanned_pages; i++) {
100 struct page *page = pgdat->node_mem_map + i;
101 char *addr = page_to_virt(page);
102
103 if (!PageReserved(page))
104 continue;
105 if (addr >= _text &&
106 addr < _etext)
107 codepages++;
108 else if (addr >= __init_begin &&
109 addr < __init_end)
110 initpages++;
111 else
112 datapages++;
113 }
114 }
115
116#ifndef CONFIG_SUN3
117 /* insert pointer tables allocated so far into the tablelist */
118 init_pointer_table((unsigned long)kernel_pg_dir);
119 for (i = 0; i < PTRS_PER_PGD; i++) {
120 if (pgd_present(kernel_pg_dir[i]))
121 init_pointer_table(__pgd_page(kernel_pg_dir[i]));
122 }
123
124 /* insert also pointer table that we used to unmap the zero page */
125 if (zero_pgtable)
126 init_pointer_table((unsigned long)zero_pgtable);
127#endif
128
129 printk("Memory: %luk/%luk available (%dk kernel code, %dk data, %dk init)\n",
130 nr_free_pages() << (PAGE_SHIFT-10),
131 totalram_pages << (PAGE_SHIFT-10),
132 codepages << (PAGE_SHIFT-10),
133 datapages << (PAGE_SHIFT-10),
134 initpages << (PAGE_SHIFT-10));
135}
136
137#ifdef CONFIG_BLK_DEV_INITRD
138void free_initrd_mem(unsigned long start, unsigned long end)
139{
140 int pages = 0;
141 for (; start < end; start += PAGE_SIZE) {
142 ClearPageReserved(virt_to_page(start));
143 init_page_count(virt_to_page(start));
144 free_page(start);
145 totalram_pages++;
146 pages++;
147 }
148 printk ("Freeing initrd memory: %dk freed\n", pages);
149}
150#endif
diff --git a/arch/m68k/mm/init_no.c b/arch/m68k/mm/init_no.c
new file mode 100644
index 000000000000..8a6653f56bd8
--- /dev/null
+++ b/arch/m68k/mm/init_no.c
@@ -0,0 +1,193 @@
1/*
2 * linux/arch/m68knommu/mm/init.c
3 *
4 * Copyright (C) 1998 D. Jeff Dionne <jeff@lineo.ca>,
5 * Kenneth Albanowski <kjahds@kjahds.com>,
6 * Copyright (C) 2000 Lineo, Inc. (www.lineo.com)
7 *
8 * Based on:
9 *
10 * linux/arch/m68k/mm/init.c
11 *
12 * Copyright (C) 1995 Hamish Macdonald
13 *
14 * JAN/1999 -- hacked to support ColdFire (gerg@snapgear.com)
15 * DEC/2000 -- linux 2.4 support <davidm@snapgear.com>
16 */
17
18#include <linux/signal.h>
19#include <linux/sched.h>
20#include <linux/kernel.h>
21#include <linux/errno.h>
22#include <linux/string.h>
23#include <linux/types.h>
24#include <linux/ptrace.h>
25#include <linux/mman.h>
26#include <linux/mm.h>
27#include <linux/swap.h>
28#include <linux/init.h>
29#include <linux/highmem.h>
30#include <linux/pagemap.h>
31#include <linux/bootmem.h>
32#include <linux/gfp.h>
33
34#include <asm/setup.h>
35#include <asm/segment.h>
36#include <asm/page.h>
37#include <asm/pgtable.h>
38#include <asm/system.h>
39#include <asm/machdep.h>
40
41#undef DEBUG
42
43extern void die_if_kernel(char *,struct pt_regs *,long);
44extern void free_initmem(void);
45
46/*
47 * BAD_PAGE is the page that is used for page faults when linux
48 * is out-of-memory. Older versions of linux just did a
49 * do_exit(), but using this instead means there is less risk
50 * for a process dying in kernel mode, possibly leaving a inode
51 * unused etc..
52 *
53 * BAD_PAGETABLE is the accompanying page-table: it is initialized
54 * to point to BAD_PAGE entries.
55 *
56 * ZERO_PAGE is a special page that is used for zero-initialized
57 * data and COW.
58 */
59static unsigned long empty_bad_page_table;
60
61static unsigned long empty_bad_page;
62
63unsigned long empty_zero_page;
64
65extern unsigned long memory_start;
66extern unsigned long memory_end;
67
68/*
69 * paging_init() continues the virtual memory environment setup which
70 * was begun by the code in arch/head.S.
71 * The parameters are pointers to where to stick the starting and ending
72 * addresses of available kernel virtual memory.
73 */
74void __init paging_init(void)
75{
76 /*
77 * Make sure start_mem is page aligned, otherwise bootmem and
78 * page_alloc get different views of the world.
79 */
80#ifdef DEBUG
81 unsigned long start_mem = PAGE_ALIGN(memory_start);
82#endif
83 unsigned long end_mem = memory_end & PAGE_MASK;
84
85#ifdef DEBUG
86 printk (KERN_DEBUG "start_mem is %#lx\nvirtual_end is %#lx\n",
87 start_mem, end_mem);
88#endif
89
90 /*
91 * Initialize the bad page table and bad page to point
92 * to a couple of allocated pages.
93 */
94 empty_bad_page_table = (unsigned long)alloc_bootmem_pages(PAGE_SIZE);
95 empty_bad_page = (unsigned long)alloc_bootmem_pages(PAGE_SIZE);
96 empty_zero_page = (unsigned long)alloc_bootmem_pages(PAGE_SIZE);
97 memset((void *)empty_zero_page, 0, PAGE_SIZE);
98
99 /*
100 * Set up SFC/DFC registers (user data space).
101 */
102 set_fs (USER_DS);
103
104#ifdef DEBUG
105 printk (KERN_DEBUG "before free_area_init\n");
106
107 printk (KERN_DEBUG "free_area_init -> start_mem is %#lx\nvirtual_end is %#lx\n",
108 start_mem, end_mem);
109#endif
110
111 {
112 unsigned long zones_size[MAX_NR_ZONES] = {0, };
113
114 zones_size[ZONE_DMA] = (end_mem - PAGE_OFFSET) >> PAGE_SHIFT;
115 free_area_init(zones_size);
116 }
117}
118
119void __init mem_init(void)
120{
121 int codek = 0, datak = 0, initk = 0;
122 unsigned long tmp;
123 extern char _etext, _stext, _sdata, _ebss, __init_begin, __init_end;
124 extern unsigned int _ramend, _rambase;
125 unsigned long len = _ramend - _rambase;
126 unsigned long start_mem = memory_start; /* DAVIDM - these must start at end of kernel */
127 unsigned long end_mem = memory_end; /* DAVIDM - this must not include kernel stack at top */
128
129 pr_debug("Mem_init: start=%lx, end=%lx\n", start_mem, end_mem);
130
131 end_mem &= PAGE_MASK;
132 high_memory = (void *) end_mem;
133
134 start_mem = PAGE_ALIGN(start_mem);
135 max_mapnr = num_physpages = (((unsigned long) high_memory) - PAGE_OFFSET) >> PAGE_SHIFT;
136
137 /* this will put all memory onto the freelists */
138 totalram_pages = free_all_bootmem();
139
140 codek = (&_etext - &_stext) >> 10;
141 datak = (&_ebss - &_sdata) >> 10;
142 initk = (&__init_begin - &__init_end) >> 10;
143
144 tmp = nr_free_pages() << PAGE_SHIFT;
145 printk(KERN_INFO "Memory available: %luk/%luk RAM, (%dk kernel code, %dk data)\n",
146 tmp >> 10,
147 len >> 10,
148 codek,
149 datak
150 );
151}
152
153
154#ifdef CONFIG_BLK_DEV_INITRD
155void free_initrd_mem(unsigned long start, unsigned long end)
156{
157 int pages = 0;
158 for (; start < end; start += PAGE_SIZE) {
159 ClearPageReserved(virt_to_page(start));
160 init_page_count(virt_to_page(start));
161 free_page(start);
162 totalram_pages++;
163 pages++;
164 }
165 printk (KERN_NOTICE "Freeing initrd memory: %dk freed\n", pages * (PAGE_SIZE / 1024));
166}
167#endif
168
169void
170free_initmem()
171{
172#ifdef CONFIG_RAMKERNEL
173 unsigned long addr;
174 extern char __init_begin, __init_end;
175 /*
176 * The following code should be cool even if these sections
177 * are not page aligned.
178 */
179 addr = PAGE_ALIGN((unsigned long)(&__init_begin));
180 /* next to check that the page we free is not a partial page */
181 for (; addr + PAGE_SIZE < (unsigned long)(&__init_end); addr +=PAGE_SIZE) {
182 ClearPageReserved(virt_to_page(addr));
183 init_page_count(virt_to_page(addr));
184 free_page(addr);
185 totalram_pages++;
186 }
187 printk(KERN_NOTICE "Freeing unused kernel memory: %ldk freed (0x%x - 0x%x)\n",
188 (addr - PAGE_ALIGN((long) &__init_begin)) >> 10,
189 (int)(PAGE_ALIGN((unsigned long)(&__init_begin))),
190 (int)(addr - PAGE_SIZE));
191#endif
192}
193
diff --git a/arch/m68k/mm/kmap.c b/arch/m68k/mm/kmap.c
index 69345849454b..a373d136b2b2 100644
--- a/arch/m68k/mm/kmap.c
+++ b/arch/m68k/mm/kmap.c
@@ -1,367 +1,5 @@
1/* 1#ifdef CONFIG_MMU
2 * linux/arch/m68k/mm/kmap.c 2#include "kmap_mm.c"
3 *
4 * Copyright (C) 1997 Roman Hodek
5 *
6 * 10/01/99 cleaned up the code and changing to the same interface
7 * used by other architectures /Roman Zippel
8 */
9
10#include <linux/module.h>
11#include <linux/mm.h>
12#include <linux/kernel.h>
13#include <linux/string.h>
14#include <linux/types.h>
15#include <linux/slab.h>
16#include <linux/vmalloc.h>
17
18#include <asm/setup.h>
19#include <asm/segment.h>
20#include <asm/page.h>
21#include <asm/pgalloc.h>
22#include <asm/io.h>
23#include <asm/system.h>
24
25#undef DEBUG
26
27#define PTRTREESIZE (256*1024)
28
29/*
30 * For 040/060 we can use the virtual memory area like other architectures,
31 * but for 020/030 we want to use early termination page descriptor and we
32 * can't mix this with normal page descriptors, so we have to copy that code
33 * (mm/vmalloc.c) and return appriorate aligned addresses.
34 */
35
36#ifdef CPU_M68040_OR_M68060_ONLY
37
38#define IO_SIZE PAGE_SIZE
39
40static inline struct vm_struct *get_io_area(unsigned long size)
41{
42 return get_vm_area(size, VM_IOREMAP);
43}
44
45
46static inline void free_io_area(void *addr)
47{
48 vfree((void *)(PAGE_MASK & (unsigned long)addr));
49}
50
51#else 3#else
52 4#include "kmap_no.c"
53#define IO_SIZE (256*1024)
54
55static struct vm_struct *iolist;
56
57static struct vm_struct *get_io_area(unsigned long size)
58{
59 unsigned long addr;
60 struct vm_struct **p, *tmp, *area;
61
62 area = kmalloc(sizeof(*area), GFP_KERNEL);
63 if (!area)
64 return NULL;
65 addr = KMAP_START;
66 for (p = &iolist; (tmp = *p) ; p = &tmp->next) {
67 if (size + addr < (unsigned long)tmp->addr)
68 break;
69 if (addr > KMAP_END-size) {
70 kfree(area);
71 return NULL;
72 }
73 addr = tmp->size + (unsigned long)tmp->addr;
74 }
75 area->addr = (void *)addr;
76 area->size = size + IO_SIZE;
77 area->next = *p;
78 *p = area;
79 return area;
80}
81
82static inline void free_io_area(void *addr)
83{
84 struct vm_struct **p, *tmp;
85
86 if (!addr)
87 return;
88 addr = (void *)((unsigned long)addr & -IO_SIZE);
89 for (p = &iolist ; (tmp = *p) ; p = &tmp->next) {
90 if (tmp->addr == addr) {
91 *p = tmp->next;
92 __iounmap(tmp->addr, tmp->size);
93 kfree(tmp);
94 return;
95 }
96 }
97}
98
99#endif 5#endif
100
101/*
102 * Map some physical address range into the kernel address space.
103 */
104/* Rewritten by Andreas Schwab to remove all races. */
105
106void __iomem *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag)
107{
108 struct vm_struct *area;
109 unsigned long virtaddr, retaddr;
110 long offset;
111 pgd_t *pgd_dir;
112 pmd_t *pmd_dir;
113 pte_t *pte_dir;
114
115 /*
116 * Don't allow mappings that wrap..
117 */
118 if (!size || physaddr > (unsigned long)(-size))
119 return NULL;
120
121#ifdef CONFIG_AMIGA
122 if (MACH_IS_AMIGA) {
123 if ((physaddr >= 0x40000000) && (physaddr + size < 0x60000000)
124 && (cacheflag == IOMAP_NOCACHE_SER))
125 return (void __iomem *)physaddr;
126 }
127#endif
128
129#ifdef DEBUG
130 printk("ioremap: 0x%lx,0x%lx(%d) - ", physaddr, size, cacheflag);
131#endif
132 /*
133 * Mappings have to be aligned
134 */
135 offset = physaddr & (IO_SIZE - 1);
136 physaddr &= -IO_SIZE;
137 size = (size + offset + IO_SIZE - 1) & -IO_SIZE;
138
139 /*
140 * Ok, go for it..
141 */
142 area = get_io_area(size);
143 if (!area)
144 return NULL;
145
146 virtaddr = (unsigned long)area->addr;
147 retaddr = virtaddr + offset;
148#ifdef DEBUG
149 printk("0x%lx,0x%lx,0x%lx", physaddr, virtaddr, retaddr);
150#endif
151
152 /*
153 * add cache and table flags to physical address
154 */
155 if (CPU_IS_040_OR_060) {
156 physaddr |= (_PAGE_PRESENT | _PAGE_GLOBAL040 |
157 _PAGE_ACCESSED | _PAGE_DIRTY);
158 switch (cacheflag) {
159 case IOMAP_FULL_CACHING:
160 physaddr |= _PAGE_CACHE040;
161 break;
162 case IOMAP_NOCACHE_SER:
163 default:
164 physaddr |= _PAGE_NOCACHE_S;
165 break;
166 case IOMAP_NOCACHE_NONSER:
167 physaddr |= _PAGE_NOCACHE;
168 break;
169 case IOMAP_WRITETHROUGH:
170 physaddr |= _PAGE_CACHE040W;
171 break;
172 }
173 } else {
174 physaddr |= (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_DIRTY);
175 switch (cacheflag) {
176 case IOMAP_NOCACHE_SER:
177 case IOMAP_NOCACHE_NONSER:
178 default:
179 physaddr |= _PAGE_NOCACHE030;
180 break;
181 case IOMAP_FULL_CACHING:
182 case IOMAP_WRITETHROUGH:
183 break;
184 }
185 }
186
187 while ((long)size > 0) {
188#ifdef DEBUG
189 if (!(virtaddr & (PTRTREESIZE-1)))
190 printk ("\npa=%#lx va=%#lx ", physaddr, virtaddr);
191#endif
192 pgd_dir = pgd_offset_k(virtaddr);
193 pmd_dir = pmd_alloc(&init_mm, pgd_dir, virtaddr);
194 if (!pmd_dir) {
195 printk("ioremap: no mem for pmd_dir\n");
196 return NULL;
197 }
198
199 if (CPU_IS_020_OR_030) {
200 pmd_dir->pmd[(virtaddr/PTRTREESIZE) & 15] = physaddr;
201 physaddr += PTRTREESIZE;
202 virtaddr += PTRTREESIZE;
203 size -= PTRTREESIZE;
204 } else {
205 pte_dir = pte_alloc_kernel(pmd_dir, virtaddr);
206 if (!pte_dir) {
207 printk("ioremap: no mem for pte_dir\n");
208 return NULL;
209 }
210
211 pte_val(*pte_dir) = physaddr;
212 virtaddr += PAGE_SIZE;
213 physaddr += PAGE_SIZE;
214 size -= PAGE_SIZE;
215 }
216 }
217#ifdef DEBUG
218 printk("\n");
219#endif
220 flush_tlb_all();
221
222 return (void __iomem *)retaddr;
223}
224EXPORT_SYMBOL(__ioremap);
225
226/*
227 * Unmap a ioremap()ed region again
228 */
229void iounmap(void __iomem *addr)
230{
231#ifdef CONFIG_AMIGA
232 if ((!MACH_IS_AMIGA) ||
233 (((unsigned long)addr < 0x40000000) ||
234 ((unsigned long)addr > 0x60000000)))
235 free_io_area((__force void *)addr);
236#else
237 free_io_area((__force void *)addr);
238#endif
239}
240EXPORT_SYMBOL(iounmap);
241
242/*
243 * __iounmap unmaps nearly everything, so be careful
244 * it doesn't free currently pointer/page tables anymore but it
245 * wans't used anyway and might be added later.
246 */
247void __iounmap(void *addr, unsigned long size)
248{
249 unsigned long virtaddr = (unsigned long)addr;
250 pgd_t *pgd_dir;
251 pmd_t *pmd_dir;
252 pte_t *pte_dir;
253
254 while ((long)size > 0) {
255 pgd_dir = pgd_offset_k(virtaddr);
256 if (pgd_bad(*pgd_dir)) {
257 printk("iounmap: bad pgd(%08lx)\n", pgd_val(*pgd_dir));
258 pgd_clear(pgd_dir);
259 return;
260 }
261 pmd_dir = pmd_offset(pgd_dir, virtaddr);
262
263 if (CPU_IS_020_OR_030) {
264 int pmd_off = (virtaddr/PTRTREESIZE) & 15;
265 int pmd_type = pmd_dir->pmd[pmd_off] & _DESCTYPE_MASK;
266
267 if (pmd_type == _PAGE_PRESENT) {
268 pmd_dir->pmd[pmd_off] = 0;
269 virtaddr += PTRTREESIZE;
270 size -= PTRTREESIZE;
271 continue;
272 } else if (pmd_type == 0)
273 continue;
274 }
275
276 if (pmd_bad(*pmd_dir)) {
277 printk("iounmap: bad pmd (%08lx)\n", pmd_val(*pmd_dir));
278 pmd_clear(pmd_dir);
279 return;
280 }
281 pte_dir = pte_offset_kernel(pmd_dir, virtaddr);
282
283 pte_val(*pte_dir) = 0;
284 virtaddr += PAGE_SIZE;
285 size -= PAGE_SIZE;
286 }
287
288 flush_tlb_all();
289}
290
291/*
292 * Set new cache mode for some kernel address space.
293 * The caller must push data for that range itself, if such data may already
294 * be in the cache.
295 */
296void kernel_set_cachemode(void *addr, unsigned long size, int cmode)
297{
298 unsigned long virtaddr = (unsigned long)addr;
299 pgd_t *pgd_dir;
300 pmd_t *pmd_dir;
301 pte_t *pte_dir;
302
303 if (CPU_IS_040_OR_060) {
304 switch (cmode) {
305 case IOMAP_FULL_CACHING:
306 cmode = _PAGE_CACHE040;
307 break;
308 case IOMAP_NOCACHE_SER:
309 default:
310 cmode = _PAGE_NOCACHE_S;
311 break;
312 case IOMAP_NOCACHE_NONSER:
313 cmode = _PAGE_NOCACHE;
314 break;
315 case IOMAP_WRITETHROUGH:
316 cmode = _PAGE_CACHE040W;
317 break;
318 }
319 } else {
320 switch (cmode) {
321 case IOMAP_NOCACHE_SER:
322 case IOMAP_NOCACHE_NONSER:
323 default:
324 cmode = _PAGE_NOCACHE030;
325 break;
326 case IOMAP_FULL_CACHING:
327 case IOMAP_WRITETHROUGH:
328 cmode = 0;
329 }
330 }
331
332 while ((long)size > 0) {
333 pgd_dir = pgd_offset_k(virtaddr);
334 if (pgd_bad(*pgd_dir)) {
335 printk("iocachemode: bad pgd(%08lx)\n", pgd_val(*pgd_dir));
336 pgd_clear(pgd_dir);
337 return;
338 }
339 pmd_dir = pmd_offset(pgd_dir, virtaddr);
340
341 if (CPU_IS_020_OR_030) {
342 int pmd_off = (virtaddr/PTRTREESIZE) & 15;
343
344 if ((pmd_dir->pmd[pmd_off] & _DESCTYPE_MASK) == _PAGE_PRESENT) {
345 pmd_dir->pmd[pmd_off] = (pmd_dir->pmd[pmd_off] &
346 _CACHEMASK040) | cmode;
347 virtaddr += PTRTREESIZE;
348 size -= PTRTREESIZE;
349 continue;
350 }
351 }
352
353 if (pmd_bad(*pmd_dir)) {
354 printk("iocachemode: bad pmd (%08lx)\n", pmd_val(*pmd_dir));
355 pmd_clear(pmd_dir);
356 return;
357 }
358 pte_dir = pte_offset_kernel(pmd_dir, virtaddr);
359
360 pte_val(*pte_dir) = (pte_val(*pte_dir) & _CACHEMASK040) | cmode;
361 virtaddr += PAGE_SIZE;
362 size -= PAGE_SIZE;
363 }
364
365 flush_tlb_all();
366}
367EXPORT_SYMBOL(kernel_set_cachemode);
diff --git a/arch/m68k/mm/kmap_mm.c b/arch/m68k/mm/kmap_mm.c
new file mode 100644
index 000000000000..69345849454b
--- /dev/null
+++ b/arch/m68k/mm/kmap_mm.c
@@ -0,0 +1,367 @@
1/*
2 * linux/arch/m68k/mm/kmap.c
3 *
4 * Copyright (C) 1997 Roman Hodek
5 *
6 * 10/01/99 cleaned up the code and changing to the same interface
7 * used by other architectures /Roman Zippel
8 */
9
10#include <linux/module.h>
11#include <linux/mm.h>
12#include <linux/kernel.h>
13#include <linux/string.h>
14#include <linux/types.h>
15#include <linux/slab.h>
16#include <linux/vmalloc.h>
17
18#include <asm/setup.h>
19#include <asm/segment.h>
20#include <asm/page.h>
21#include <asm/pgalloc.h>
22#include <asm/io.h>
23#include <asm/system.h>
24
25#undef DEBUG
26
27#define PTRTREESIZE (256*1024)
28
29/*
30 * For 040/060 we can use the virtual memory area like other architectures,
31 * but for 020/030 we want to use early termination page descriptor and we
32 * can't mix this with normal page descriptors, so we have to copy that code
33 * (mm/vmalloc.c) and return appriorate aligned addresses.
34 */
35
36#ifdef CPU_M68040_OR_M68060_ONLY
37
38#define IO_SIZE PAGE_SIZE
39
40static inline struct vm_struct *get_io_area(unsigned long size)
41{
42 return get_vm_area(size, VM_IOREMAP);
43}
44
45
46static inline void free_io_area(void *addr)
47{
48 vfree((void *)(PAGE_MASK & (unsigned long)addr));
49}
50
51#else
52
53#define IO_SIZE (256*1024)
54
55static struct vm_struct *iolist;
56
57static struct vm_struct *get_io_area(unsigned long size)
58{
59 unsigned long addr;
60 struct vm_struct **p, *tmp, *area;
61
62 area = kmalloc(sizeof(*area), GFP_KERNEL);
63 if (!area)
64 return NULL;
65 addr = KMAP_START;
66 for (p = &iolist; (tmp = *p) ; p = &tmp->next) {
67 if (size + addr < (unsigned long)tmp->addr)
68 break;
69 if (addr > KMAP_END-size) {
70 kfree(area);
71 return NULL;
72 }
73 addr = tmp->size + (unsigned long)tmp->addr;
74 }
75 area->addr = (void *)addr;
76 area->size = size + IO_SIZE;
77 area->next = *p;
78 *p = area;
79 return area;
80}
81
82static inline void free_io_area(void *addr)
83{
84 struct vm_struct **p, *tmp;
85
86 if (!addr)
87 return;
88 addr = (void *)((unsigned long)addr & -IO_SIZE);
89 for (p = &iolist ; (tmp = *p) ; p = &tmp->next) {
90 if (tmp->addr == addr) {
91 *p = tmp->next;
92 __iounmap(tmp->addr, tmp->size);
93 kfree(tmp);
94 return;
95 }
96 }
97}
98
99#endif
100
101/*
102 * Map some physical address range into the kernel address space.
103 */
104/* Rewritten by Andreas Schwab to remove all races. */
105
106void __iomem *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag)
107{
108 struct vm_struct *area;
109 unsigned long virtaddr, retaddr;
110 long offset;
111 pgd_t *pgd_dir;
112 pmd_t *pmd_dir;
113 pte_t *pte_dir;
114
115 /*
116 * Don't allow mappings that wrap..
117 */
118 if (!size || physaddr > (unsigned long)(-size))
119 return NULL;
120
121#ifdef CONFIG_AMIGA
122 if (MACH_IS_AMIGA) {
123 if ((physaddr >= 0x40000000) && (physaddr + size < 0x60000000)
124 && (cacheflag == IOMAP_NOCACHE_SER))
125 return (void __iomem *)physaddr;
126 }
127#endif
128
129#ifdef DEBUG
130 printk("ioremap: 0x%lx,0x%lx(%d) - ", physaddr, size, cacheflag);
131#endif
132 /*
133 * Mappings have to be aligned
134 */
135 offset = physaddr & (IO_SIZE - 1);
136 physaddr &= -IO_SIZE;
137 size = (size + offset + IO_SIZE - 1) & -IO_SIZE;
138
139 /*
140 * Ok, go for it..
141 */
142 area = get_io_area(size);
143 if (!area)
144 return NULL;
145
146 virtaddr = (unsigned long)area->addr;
147 retaddr = virtaddr + offset;
148#ifdef DEBUG
149 printk("0x%lx,0x%lx,0x%lx", physaddr, virtaddr, retaddr);
150#endif
151
152 /*
153 * add cache and table flags to physical address
154 */
155 if (CPU_IS_040_OR_060) {
156 physaddr |= (_PAGE_PRESENT | _PAGE_GLOBAL040 |
157 _PAGE_ACCESSED | _PAGE_DIRTY);
158 switch (cacheflag) {
159 case IOMAP_FULL_CACHING:
160 physaddr |= _PAGE_CACHE040;
161 break;
162 case IOMAP_NOCACHE_SER:
163 default:
164 physaddr |= _PAGE_NOCACHE_S;
165 break;
166 case IOMAP_NOCACHE_NONSER:
167 physaddr |= _PAGE_NOCACHE;
168 break;
169 case IOMAP_WRITETHROUGH:
170 physaddr |= _PAGE_CACHE040W;
171 break;
172 }
173 } else {
174 physaddr |= (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_DIRTY);
175 switch (cacheflag) {
176 case IOMAP_NOCACHE_SER:
177 case IOMAP_NOCACHE_NONSER:
178 default:
179 physaddr |= _PAGE_NOCACHE030;
180 break;
181 case IOMAP_FULL_CACHING:
182 case IOMAP_WRITETHROUGH:
183 break;
184 }
185 }
186
187 while ((long)size > 0) {
188#ifdef DEBUG
189 if (!(virtaddr & (PTRTREESIZE-1)))
190 printk ("\npa=%#lx va=%#lx ", physaddr, virtaddr);
191#endif
192 pgd_dir = pgd_offset_k(virtaddr);
193 pmd_dir = pmd_alloc(&init_mm, pgd_dir, virtaddr);
194 if (!pmd_dir) {
195 printk("ioremap: no mem for pmd_dir\n");
196 return NULL;
197 }
198
199 if (CPU_IS_020_OR_030) {
200 pmd_dir->pmd[(virtaddr/PTRTREESIZE) & 15] = physaddr;
201 physaddr += PTRTREESIZE;
202 virtaddr += PTRTREESIZE;
203 size -= PTRTREESIZE;
204 } else {
205 pte_dir = pte_alloc_kernel(pmd_dir, virtaddr);
206 if (!pte_dir) {
207 printk("ioremap: no mem for pte_dir\n");
208 return NULL;
209 }
210
211 pte_val(*pte_dir) = physaddr;
212 virtaddr += PAGE_SIZE;
213 physaddr += PAGE_SIZE;
214 size -= PAGE_SIZE;
215 }
216 }
217#ifdef DEBUG
218 printk("\n");
219#endif
220 flush_tlb_all();
221
222 return (void __iomem *)retaddr;
223}
224EXPORT_SYMBOL(__ioremap);
225
226/*
227 * Unmap a ioremap()ed region again
228 */
229void iounmap(void __iomem *addr)
230{
231#ifdef CONFIG_AMIGA
232 if ((!MACH_IS_AMIGA) ||
233 (((unsigned long)addr < 0x40000000) ||
234 ((unsigned long)addr > 0x60000000)))
235 free_io_area((__force void *)addr);
236#else
237 free_io_area((__force void *)addr);
238#endif
239}
240EXPORT_SYMBOL(iounmap);
241
242/*
243 * __iounmap unmaps nearly everything, so be careful
244 * it doesn't free currently pointer/page tables anymore but it
245 * wans't used anyway and might be added later.
246 */
247void __iounmap(void *addr, unsigned long size)
248{
249 unsigned long virtaddr = (unsigned long)addr;
250 pgd_t *pgd_dir;
251 pmd_t *pmd_dir;
252 pte_t *pte_dir;
253
254 while ((long)size > 0) {
255 pgd_dir = pgd_offset_k(virtaddr);
256 if (pgd_bad(*pgd_dir)) {
257 printk("iounmap: bad pgd(%08lx)\n", pgd_val(*pgd_dir));
258 pgd_clear(pgd_dir);
259 return;
260 }
261 pmd_dir = pmd_offset(pgd_dir, virtaddr);
262
263 if (CPU_IS_020_OR_030) {
264 int pmd_off = (virtaddr/PTRTREESIZE) & 15;
265 int pmd_type = pmd_dir->pmd[pmd_off] & _DESCTYPE_MASK;
266
267 if (pmd_type == _PAGE_PRESENT) {
268 pmd_dir->pmd[pmd_off] = 0;
269 virtaddr += PTRTREESIZE;
270 size -= PTRTREESIZE;
271 continue;
272 } else if (pmd_type == 0)
273 continue;
274 }
275
276 if (pmd_bad(*pmd_dir)) {
277 printk("iounmap: bad pmd (%08lx)\n", pmd_val(*pmd_dir));
278 pmd_clear(pmd_dir);
279 return;
280 }
281 pte_dir = pte_offset_kernel(pmd_dir, virtaddr);
282
283 pte_val(*pte_dir) = 0;
284 virtaddr += PAGE_SIZE;
285 size -= PAGE_SIZE;
286 }
287
288 flush_tlb_all();
289}
290
291/*
292 * Set new cache mode for some kernel address space.
293 * The caller must push data for that range itself, if such data may already
294 * be in the cache.
295 */
296void kernel_set_cachemode(void *addr, unsigned long size, int cmode)
297{
298 unsigned long virtaddr = (unsigned long)addr;
299 pgd_t *pgd_dir;
300 pmd_t *pmd_dir;
301 pte_t *pte_dir;
302
303 if (CPU_IS_040_OR_060) {
304 switch (cmode) {
305 case IOMAP_FULL_CACHING:
306 cmode = _PAGE_CACHE040;
307 break;
308 case IOMAP_NOCACHE_SER:
309 default:
310 cmode = _PAGE_NOCACHE_S;
311 break;
312 case IOMAP_NOCACHE_NONSER:
313 cmode = _PAGE_NOCACHE;
314 break;
315 case IOMAP_WRITETHROUGH:
316 cmode = _PAGE_CACHE040W;
317 break;
318 }
319 } else {
320 switch (cmode) {
321 case IOMAP_NOCACHE_SER:
322 case IOMAP_NOCACHE_NONSER:
323 default:
324 cmode = _PAGE_NOCACHE030;
325 break;
326 case IOMAP_FULL_CACHING:
327 case IOMAP_WRITETHROUGH:
328 cmode = 0;
329 }
330 }
331
332 while ((long)size > 0) {
333 pgd_dir = pgd_offset_k(virtaddr);
334 if (pgd_bad(*pgd_dir)) {
335 printk("iocachemode: bad pgd(%08lx)\n", pgd_val(*pgd_dir));
336 pgd_clear(pgd_dir);
337 return;
338 }
339 pmd_dir = pmd_offset(pgd_dir, virtaddr);
340
341 if (CPU_IS_020_OR_030) {
342 int pmd_off = (virtaddr/PTRTREESIZE) & 15;
343
344 if ((pmd_dir->pmd[pmd_off] & _DESCTYPE_MASK) == _PAGE_PRESENT) {
345 pmd_dir->pmd[pmd_off] = (pmd_dir->pmd[pmd_off] &
346 _CACHEMASK040) | cmode;
347 virtaddr += PTRTREESIZE;
348 size -= PTRTREESIZE;
349 continue;
350 }
351 }
352
353 if (pmd_bad(*pmd_dir)) {
354 printk("iocachemode: bad pmd (%08lx)\n", pmd_val(*pmd_dir));
355 pmd_clear(pmd_dir);
356 return;
357 }
358 pte_dir = pte_offset_kernel(pmd_dir, virtaddr);
359
360 pte_val(*pte_dir) = (pte_val(*pte_dir) & _CACHEMASK040) | cmode;
361 virtaddr += PAGE_SIZE;
362 size -= PAGE_SIZE;
363 }
364
365 flush_tlb_all();
366}
367EXPORT_SYMBOL(kernel_set_cachemode);
diff --git a/arch/m68k/mm/kmap_no.c b/arch/m68k/mm/kmap_no.c
new file mode 100644
index 000000000000..ece8d5ad4e6c
--- /dev/null
+++ b/arch/m68k/mm/kmap_no.c
@@ -0,0 +1,45 @@
1/*
2 * linux/arch/m68knommu/mm/kmap.c
3 *
4 * Copyright (C) 2000 Lineo, <davidm@snapgear.com>
5 * Copyright (C) 2000-2002 David McCullough <davidm@snapgear.com>
6 */
7
8#include <linux/mm.h>
9#include <linux/kernel.h>
10#include <linux/string.h>
11#include <linux/types.h>
12#include <linux/vmalloc.h>
13
14#include <asm/setup.h>
15#include <asm/segment.h>
16#include <asm/page.h>
17#include <asm/pgalloc.h>
18#include <asm/io.h>
19#include <asm/system.h>
20
21#undef DEBUG
22
23/*
24 * Map some physical address range into the kernel address space.
25 */
26void *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag)
27{
28 return (void *)physaddr;
29}
30
31/*
32 * Unmap a ioremap()ed region again.
33 */
34void iounmap(void *addr)
35{
36}
37
38/*
39 * Set new cache mode for some kernel address space.
40 * The caller must push data for that range itself, if such data may already
41 * be in the cache.
42 */
43void kernel_set_cachemode(void *addr, unsigned long size, int cmode)
44{
45}
diff --git a/arch/m68k/platform/5206/Makefile b/arch/m68k/platform/5206/Makefile
new file mode 100644
index 000000000000..b5db05625cfa
--- /dev/null
+++ b/arch/m68k/platform/5206/Makefile
@@ -0,0 +1,18 @@
1#
2# Makefile for the m68knommu linux kernel.
3#
4
5#
6# If you want to play with the HW breakpoints then you will
7# need to add define this, which will give you a stack backtrace
8# on the console port whenever a DBG interrupt occurs. You have to
9# set up you HW breakpoints to trigger a DBG interrupt:
10#
11# ccflags-y := -DTRAP_DBG_INTERRUPT
12# asflags-y := -DTRAP_DBG_INTERRUPT
13#
14
15asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
16
17obj-y := config.o gpio.o
18
diff --git a/arch/m68k/platform/5206/config.c b/arch/m68k/platform/5206/config.c
new file mode 100644
index 000000000000..9c335465e66d
--- /dev/null
+++ b/arch/m68k/platform/5206/config.c
@@ -0,0 +1,121 @@
1/***************************************************************************/
2
3/*
4 * linux/arch/m68knommu/platform/5206/config.c
5 *
6 * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
7 * Copyright (C) 2000-2001, Lineo Inc. (www.lineo.com)
8 */
9
10/***************************************************************************/
11
12#include <linux/kernel.h>
13#include <linux/param.h>
14#include <linux/init.h>
15#include <linux/io.h>
16#include <asm/machdep.h>
17#include <asm/coldfire.h>
18#include <asm/mcfsim.h>
19#include <asm/mcfuart.h>
20
21/***************************************************************************/
22
23static struct mcf_platform_uart m5206_uart_platform[] = {
24 {
25 .mapbase = MCF_MBAR + MCFUART_BASE1,
26 .irq = 73,
27 },
28 {
29 .mapbase = MCF_MBAR + MCFUART_BASE2,
30 .irq = 74,
31 },
32 { },
33};
34
35static struct platform_device m5206_uart = {
36 .name = "mcfuart",
37 .id = 0,
38 .dev.platform_data = m5206_uart_platform,
39};
40
41static struct platform_device *m5206_devices[] __initdata = {
42 &m5206_uart,
43};
44
45/***************************************************************************/
46
47static void __init m5206_uart_init_line(int line, int irq)
48{
49 if (line == 0) {
50 writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
51 writeb(irq, MCFUART_BASE1 + MCFUART_UIVR);
52 mcf_mapirq2imr(irq, MCFINTC_UART0);
53 } else if (line == 1) {
54 writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
55 writeb(irq, MCFUART_BASE2 + MCFUART_UIVR);
56 mcf_mapirq2imr(irq, MCFINTC_UART1);
57 }
58}
59
60static void __init m5206_uarts_init(void)
61{
62 const int nrlines = ARRAY_SIZE(m5206_uart_platform);
63 int line;
64
65 for (line = 0; (line < nrlines); line++)
66 m5206_uart_init_line(line, m5206_uart_platform[line].irq);
67}
68
69/***************************************************************************/
70
71static void __init m5206_timers_init(void)
72{
73 /* Timer1 is always used as system timer */
74 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
75 MCF_MBAR + MCFSIM_TIMER1ICR);
76 mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);
77
78#ifdef CONFIG_HIGHPROFILE
79 /* Timer2 is to be used as a high speed profile timer */
80 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
81 MCF_MBAR + MCFSIM_TIMER2ICR);
82 mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);
83#endif
84}
85
86/***************************************************************************/
87
88void m5206_cpu_reset(void)
89{
90 local_irq_disable();
91 /* Set watchdog to soft reset, and enabled */
92 __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
93 for (;;)
94 /* wait for watchdog to timeout */;
95}
96
97/***************************************************************************/
98
99void __init config_BSP(char *commandp, int size)
100{
101 mach_reset = m5206_cpu_reset;
102 m5206_timers_init();
103 m5206_uarts_init();
104
105 /* Only support the external interrupts on their primary level */
106 mcf_mapirq2imr(25, MCFINTC_EINT1);
107 mcf_mapirq2imr(28, MCFINTC_EINT4);
108 mcf_mapirq2imr(31, MCFINTC_EINT7);
109}
110
111/***************************************************************************/
112
113static int __init init_BSP(void)
114{
115 platform_add_devices(m5206_devices, ARRAY_SIZE(m5206_devices));
116 return 0;
117}
118
119arch_initcall(init_BSP);
120
121/***************************************************************************/
diff --git a/arch/m68k/platform/5206/gpio.c b/arch/m68k/platform/5206/gpio.c
new file mode 100644
index 000000000000..b9ab4a120f28
--- /dev/null
+++ b/arch/m68k/platform/5206/gpio.c
@@ -0,0 +1,49 @@
1/*
2 * Coldfire generic GPIO support
3 *
4 * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14*/
15
16#include <linux/kernel.h>
17#include <linux/init.h>
18
19#include <asm/coldfire.h>
20#include <asm/mcfsim.h>
21#include <asm/mcfgpio.h>
22
23static struct mcf_gpio_chip mcf_gpio_chips[] = {
24 {
25 .gpio_chip = {
26 .label = "PP",
27 .request = mcf_gpio_request,
28 .free = mcf_gpio_free,
29 .direction_input = mcf_gpio_direction_input,
30 .direction_output = mcf_gpio_direction_output,
31 .get = mcf_gpio_get_value,
32 .set = mcf_gpio_set_value,
33 .ngpio = 8,
34 },
35 .pddr = (void __iomem *) MCFSIM_PADDR,
36 .podr = (void __iomem *) MCFSIM_PADAT,
37 .ppdr = (void __iomem *) MCFSIM_PADAT,
38 },
39};
40
41static int __init mcf_gpio_init(void)
42{
43 unsigned i = 0;
44 while (i < ARRAY_SIZE(mcf_gpio_chips))
45 (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
46 return 0;
47}
48
49core_initcall(mcf_gpio_init);
diff --git a/arch/m68k/platform/5206e/Makefile b/arch/m68k/platform/5206e/Makefile
new file mode 100644
index 000000000000..b5db05625cfa
--- /dev/null
+++ b/arch/m68k/platform/5206e/Makefile
@@ -0,0 +1,18 @@
1#
2# Makefile for the m68knommu linux kernel.
3#
4
5#
6# If you want to play with the HW breakpoints then you will
7# need to add define this, which will give you a stack backtrace
8# on the console port whenever a DBG interrupt occurs. You have to
9# set up you HW breakpoints to trigger a DBG interrupt:
10#
11# ccflags-y := -DTRAP_DBG_INTERRUPT
12# asflags-y := -DTRAP_DBG_INTERRUPT
13#
14
15asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
16
17obj-y := config.o gpio.o
18
diff --git a/arch/m68k/platform/5206e/config.c b/arch/m68k/platform/5206e/config.c
new file mode 100644
index 000000000000..942397984c66
--- /dev/null
+++ b/arch/m68k/platform/5206e/config.c
@@ -0,0 +1,127 @@
1/***************************************************************************/
2
3/*
4 * linux/arch/m68knommu/platform/5206e/config.c
5 *
6 * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
7 */
8
9/***************************************************************************/
10
11#include <linux/kernel.h>
12#include <linux/param.h>
13#include <linux/init.h>
14#include <linux/io.h>
15#include <asm/machdep.h>
16#include <asm/coldfire.h>
17#include <asm/mcfsim.h>
18#include <asm/mcfuart.h>
19#include <asm/mcfdma.h>
20
21/***************************************************************************/
22
23static struct mcf_platform_uart m5206e_uart_platform[] = {
24 {
25 .mapbase = MCF_MBAR + MCFUART_BASE1,
26 .irq = 73,
27 },
28 {
29 .mapbase = MCF_MBAR + MCFUART_BASE2,
30 .irq = 74,
31 },
32 { },
33};
34
35static struct platform_device m5206e_uart = {
36 .name = "mcfuart",
37 .id = 0,
38 .dev.platform_data = m5206e_uart_platform,
39};
40
41static struct platform_device *m5206e_devices[] __initdata = {
42 &m5206e_uart,
43};
44
45/***************************************************************************/
46
47static void __init m5206e_uart_init_line(int line, int irq)
48{
49 if (line == 0) {
50 writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
51 writeb(irq, MCFUART_BASE1 + MCFUART_UIVR);
52 mcf_mapirq2imr(irq, MCFINTC_UART0);
53 } else if (line == 1) {
54 writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
55 writeb(irq, MCFUART_BASE2 + MCFUART_UIVR);
56 mcf_mapirq2imr(irq, MCFINTC_UART1);
57 }
58}
59
60static void __init m5206e_uarts_init(void)
61{
62 const int nrlines = ARRAY_SIZE(m5206e_uart_platform);
63 int line;
64
65 for (line = 0; (line < nrlines); line++)
66 m5206e_uart_init_line(line, m5206e_uart_platform[line].irq);
67}
68
69/***************************************************************************/
70
71static void __init m5206e_timers_init(void)
72{
73 /* Timer1 is always used as system timer */
74 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
75 MCF_MBAR + MCFSIM_TIMER1ICR);
76 mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);
77
78#ifdef CONFIG_HIGHPROFILE
79 /* Timer2 is to be used as a high speed profile timer */
80 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
81 MCF_MBAR + MCFSIM_TIMER2ICR);
82 mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);
83#endif
84}
85
86/***************************************************************************/
87
88void m5206e_cpu_reset(void)
89{
90 local_irq_disable();
91 /* Set watchdog to soft reset, and enabled */
92 __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
93 for (;;)
94 /* wait for watchdog to timeout */;
95}
96
97/***************************************************************************/
98
99void __init config_BSP(char *commandp, int size)
100{
101#if defined(CONFIG_NETtel)
102 /* Copy command line from FLASH to local buffer... */
103 memcpy(commandp, (char *) 0xf0004000, size);
104 commandp[size-1] = 0;
105#endif /* CONFIG_NETtel */
106
107 mach_reset = m5206e_cpu_reset;
108 m5206e_timers_init();
109 m5206e_uarts_init();
110
111 /* Only support the external interrupts on their primary level */
112 mcf_mapirq2imr(25, MCFINTC_EINT1);
113 mcf_mapirq2imr(28, MCFINTC_EINT4);
114 mcf_mapirq2imr(31, MCFINTC_EINT7);
115}
116
117/***************************************************************************/
118
119static int __init init_BSP(void)
120{
121 platform_add_devices(m5206e_devices, ARRAY_SIZE(m5206e_devices));
122 return 0;
123}
124
125arch_initcall(init_BSP);
126
127/***************************************************************************/
diff --git a/arch/m68k/platform/5206e/gpio.c b/arch/m68k/platform/5206e/gpio.c
new file mode 100644
index 000000000000..b9ab4a120f28
--- /dev/null
+++ b/arch/m68k/platform/5206e/gpio.c
@@ -0,0 +1,49 @@
1/*
2 * Coldfire generic GPIO support
3 *
4 * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14*/
15
16#include <linux/kernel.h>
17#include <linux/init.h>
18
19#include <asm/coldfire.h>
20#include <asm/mcfsim.h>
21#include <asm/mcfgpio.h>
22
23static struct mcf_gpio_chip mcf_gpio_chips[] = {
24 {
25 .gpio_chip = {
26 .label = "PP",
27 .request = mcf_gpio_request,
28 .free = mcf_gpio_free,
29 .direction_input = mcf_gpio_direction_input,
30 .direction_output = mcf_gpio_direction_output,
31 .get = mcf_gpio_get_value,
32 .set = mcf_gpio_set_value,
33 .ngpio = 8,
34 },
35 .pddr = (void __iomem *) MCFSIM_PADDR,
36 .podr = (void __iomem *) MCFSIM_PADAT,
37 .ppdr = (void __iomem *) MCFSIM_PADAT,
38 },
39};
40
41static int __init mcf_gpio_init(void)
42{
43 unsigned i = 0;
44 while (i < ARRAY_SIZE(mcf_gpio_chips))
45 (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
46 return 0;
47}
48
49core_initcall(mcf_gpio_init);
diff --git a/arch/m68k/platform/520x/Makefile b/arch/m68k/platform/520x/Makefile
new file mode 100644
index 000000000000..ad3f4e5a57ce
--- /dev/null
+++ b/arch/m68k/platform/520x/Makefile
@@ -0,0 +1,17 @@
1#
2# Makefile for the M5208 specific file.
3#
4
5#
6# If you want to play with the HW breakpoints then you will
7# need to add define this, which will give you a stack backtrace
8# on the console port whenever a DBG interrupt occurs. You have to
9# set up you HW breakpoints to trigger a DBG interrupt:
10#
11# ccflags-y := -DTRAP_DBG_INTERRUPT
12# asflags-y := -DTRAP_DBG_INTERRUPT
13#
14
15asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
16
17obj-y := config.o gpio.o
diff --git a/arch/m68k/platform/520x/config.c b/arch/m68k/platform/520x/config.c
new file mode 100644
index 000000000000..621238f1a219
--- /dev/null
+++ b/arch/m68k/platform/520x/config.c
@@ -0,0 +1,311 @@
1/***************************************************************************/
2
3/*
4 * linux/arch/m68knommu/platform/520x/config.c
5 *
6 * Copyright (C) 2005, Freescale (www.freescale.com)
7 * Copyright (C) 2005, Intec Automation (mike@steroidmicros.com)
8 * Copyright (C) 1999-2007, Greg Ungerer (gerg@snapgear.com)
9 * Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
10 */
11
12/***************************************************************************/
13
14#include <linux/kernel.h>
15#include <linux/param.h>
16#include <linux/init.h>
17#include <linux/io.h>
18#include <linux/spi/spi.h>
19#include <linux/gpio.h>
20#include <asm/machdep.h>
21#include <asm/coldfire.h>
22#include <asm/mcfsim.h>
23#include <asm/mcfuart.h>
24#include <asm/mcfqspi.h>
25
26/***************************************************************************/
27
28static struct mcf_platform_uart m520x_uart_platform[] = {
29 {
30 .mapbase = MCFUART_BASE1,
31 .irq = MCFINT_VECBASE + MCFINT_UART0,
32 },
33 {
34 .mapbase = MCFUART_BASE2,
35 .irq = MCFINT_VECBASE + MCFINT_UART1,
36 },
37 {
38 .mapbase = MCFUART_BASE3,
39 .irq = MCFINT_VECBASE + MCFINT_UART2,
40 },
41 { },
42};
43
44static struct platform_device m520x_uart = {
45 .name = "mcfuart",
46 .id = 0,
47 .dev.platform_data = m520x_uart_platform,
48};
49
50static struct resource m520x_fec_resources[] = {
51 {
52 .start = MCFFEC_BASE,
53 .end = MCFFEC_BASE + MCFFEC_SIZE - 1,
54 .flags = IORESOURCE_MEM,
55 },
56 {
57 .start = 64 + 36,
58 .end = 64 + 36,
59 .flags = IORESOURCE_IRQ,
60 },
61 {
62 .start = 64 + 40,
63 .end = 64 + 40,
64 .flags = IORESOURCE_IRQ,
65 },
66 {
67 .start = 64 + 42,
68 .end = 64 + 42,
69 .flags = IORESOURCE_IRQ,
70 },
71};
72
73static struct platform_device m520x_fec = {
74 .name = "fec",
75 .id = 0,
76 .num_resources = ARRAY_SIZE(m520x_fec_resources),
77 .resource = m520x_fec_resources,
78};
79
80#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
81static struct resource m520x_qspi_resources[] = {
82 {
83 .start = MCFQSPI_IOBASE,
84 .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1,
85 .flags = IORESOURCE_MEM,
86 },
87 {
88 .start = MCFINT_VECBASE + MCFINT_QSPI,
89 .end = MCFINT_VECBASE + MCFINT_QSPI,
90 .flags = IORESOURCE_IRQ,
91 },
92};
93
94#define MCFQSPI_CS0 62
95#define MCFQSPI_CS1 63
96#define MCFQSPI_CS2 44
97
98static int m520x_cs_setup(struct mcfqspi_cs_control *cs_control)
99{
100 int status;
101
102 status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0");
103 if (status) {
104 pr_debug("gpio_request for MCFQSPI_CS0 failed\n");
105 goto fail0;
106 }
107 status = gpio_direction_output(MCFQSPI_CS0, 1);
108 if (status) {
109 pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n");
110 goto fail1;
111 }
112
113 status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1");
114 if (status) {
115 pr_debug("gpio_request for MCFQSPI_CS1 failed\n");
116 goto fail1;
117 }
118 status = gpio_direction_output(MCFQSPI_CS1, 1);
119 if (status) {
120 pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n");
121 goto fail2;
122 }
123
124 status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2");
125 if (status) {
126 pr_debug("gpio_request for MCFQSPI_CS2 failed\n");
127 goto fail2;
128 }
129 status = gpio_direction_output(MCFQSPI_CS2, 1);
130 if (status) {
131 pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n");
132 goto fail3;
133 }
134
135 return 0;
136
137fail3:
138 gpio_free(MCFQSPI_CS2);
139fail2:
140 gpio_free(MCFQSPI_CS1);
141fail1:
142 gpio_free(MCFQSPI_CS0);
143fail0:
144 return status;
145}
146
147static void m520x_cs_teardown(struct mcfqspi_cs_control *cs_control)
148{
149 gpio_free(MCFQSPI_CS2);
150 gpio_free(MCFQSPI_CS1);
151 gpio_free(MCFQSPI_CS0);
152}
153
154static void m520x_cs_select(struct mcfqspi_cs_control *cs_control,
155 u8 chip_select, bool cs_high)
156{
157 switch (chip_select) {
158 case 0:
159 gpio_set_value(MCFQSPI_CS0, cs_high);
160 break;
161 case 1:
162 gpio_set_value(MCFQSPI_CS1, cs_high);
163 break;
164 case 2:
165 gpio_set_value(MCFQSPI_CS2, cs_high);
166 break;
167 }
168}
169
170static void m520x_cs_deselect(struct mcfqspi_cs_control *cs_control,
171 u8 chip_select, bool cs_high)
172{
173 switch (chip_select) {
174 case 0:
175 gpio_set_value(MCFQSPI_CS0, !cs_high);
176 break;
177 case 1:
178 gpio_set_value(MCFQSPI_CS1, !cs_high);
179 break;
180 case 2:
181 gpio_set_value(MCFQSPI_CS2, !cs_high);
182 break;
183 }
184}
185
186static struct mcfqspi_cs_control m520x_cs_control = {
187 .setup = m520x_cs_setup,
188 .teardown = m520x_cs_teardown,
189 .select = m520x_cs_select,
190 .deselect = m520x_cs_deselect,
191};
192
193static struct mcfqspi_platform_data m520x_qspi_data = {
194 .bus_num = 0,
195 .num_chipselect = 3,
196 .cs_control = &m520x_cs_control,
197};
198
199static struct platform_device m520x_qspi = {
200 .name = "mcfqspi",
201 .id = 0,
202 .num_resources = ARRAY_SIZE(m520x_qspi_resources),
203 .resource = m520x_qspi_resources,
204 .dev.platform_data = &m520x_qspi_data,
205};
206
207static void __init m520x_qspi_init(void)
208{
209 u16 par;
210 /* setup Port QS for QSPI with gpio CS control */
211 writeb(0x3f, MCF_GPIO_PAR_QSPI);
212 /* make U1CTS and U2RTS gpio for cs_control */
213 par = readw(MCF_GPIO_PAR_UART);
214 par &= 0x00ff;
215 writew(par, MCF_GPIO_PAR_UART);
216}
217#endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */
218
219
220static struct platform_device *m520x_devices[] __initdata = {
221 &m520x_uart,
222 &m520x_fec,
223#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
224 &m520x_qspi,
225#endif
226};
227
228/***************************************************************************/
229
230static void __init m520x_uart_init_line(int line, int irq)
231{
232 u16 par;
233 u8 par2;
234
235 switch (line) {
236 case 0:
237 par = readw(MCF_GPIO_PAR_UART);
238 par |= MCF_GPIO_PAR_UART_PAR_UTXD0 |
239 MCF_GPIO_PAR_UART_PAR_URXD0;
240 writew(par, MCF_GPIO_PAR_UART);
241 break;
242 case 1:
243 par = readw(MCF_GPIO_PAR_UART);
244 par |= MCF_GPIO_PAR_UART_PAR_UTXD1 |
245 MCF_GPIO_PAR_UART_PAR_URXD1;
246 writew(par, MCF_GPIO_PAR_UART);
247 break;
248 case 2:
249 par2 = readb(MCF_GPIO_PAR_FECI2C);
250 par2 &= ~0x0F;
251 par2 |= MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2 |
252 MCF_GPIO_PAR_FECI2C_PAR_SDA_URXD2;
253 writeb(par2, MCF_GPIO_PAR_FECI2C);
254 break;
255 }
256}
257
258static void __init m520x_uarts_init(void)
259{
260 const int nrlines = ARRAY_SIZE(m520x_uart_platform);
261 int line;
262
263 for (line = 0; (line < nrlines); line++)
264 m520x_uart_init_line(line, m520x_uart_platform[line].irq);
265}
266
267/***************************************************************************/
268
269static void __init m520x_fec_init(void)
270{
271 u8 v;
272
273 /* Set multi-function pins to ethernet mode */
274 v = readb(MCF_GPIO_PAR_FEC);
275 writeb(v | 0xf0, MCF_GPIO_PAR_FEC);
276
277 v = readb(MCF_GPIO_PAR_FECI2C);
278 writeb(v | 0x0f, MCF_GPIO_PAR_FECI2C);
279}
280
281/***************************************************************************/
282
283static void m520x_cpu_reset(void)
284{
285 local_irq_disable();
286 __raw_writeb(MCF_RCR_SWRESET, MCF_RCR);
287}
288
289/***************************************************************************/
290
291void __init config_BSP(char *commandp, int size)
292{
293 mach_reset = m520x_cpu_reset;
294 m520x_uarts_init();
295 m520x_fec_init();
296#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
297 m520x_qspi_init();
298#endif
299}
300
301/***************************************************************************/
302
303static int __init init_BSP(void)
304{
305 platform_add_devices(m520x_devices, ARRAY_SIZE(m520x_devices));
306 return 0;
307}
308
309arch_initcall(init_BSP);
310
311/***************************************************************************/
diff --git a/arch/m68k/platform/520x/gpio.c b/arch/m68k/platform/520x/gpio.c
new file mode 100644
index 000000000000..d757328563d1
--- /dev/null
+++ b/arch/m68k/platform/520x/gpio.c
@@ -0,0 +1,211 @@
1/*
2 * Coldfire generic GPIO support
3 *
4 * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14*/
15
16#include <linux/kernel.h>
17#include <linux/init.h>
18
19#include <asm/coldfire.h>
20#include <asm/mcfsim.h>
21#include <asm/mcfgpio.h>
22
23static struct mcf_gpio_chip mcf_gpio_chips[] = {
24 {
25 .gpio_chip = {
26 .label = "PIRQ",
27 .request = mcf_gpio_request,
28 .free = mcf_gpio_free,
29 .direction_input = mcf_gpio_direction_input,
30 .direction_output = mcf_gpio_direction_output,
31 .get = mcf_gpio_get_value,
32 .set = mcf_gpio_set_value,
33 .ngpio = 8,
34 },
35 .pddr = (void __iomem *) MCFEPORT_EPDDR,
36 .podr = (void __iomem *) MCFEPORT_EPDR,
37 .ppdr = (void __iomem *) MCFEPORT_EPPDR,
38 },
39 {
40 .gpio_chip = {
41 .label = "BUSCTL",
42 .request = mcf_gpio_request,
43 .free = mcf_gpio_free,
44 .direction_input = mcf_gpio_direction_input,
45 .direction_output = mcf_gpio_direction_output,
46 .get = mcf_gpio_get_value,
47 .set = mcf_gpio_set_value_fast,
48 .base = 8,
49 .ngpio = 4,
50 },
51 .pddr = (void __iomem *) MCFGPIO_PDDR_BUSCTL,
52 .podr = (void __iomem *) MCFGPIO_PODR_BUSCTL,
53 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
54 .setr = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
55 .clrr = (void __iomem *) MCFGPIO_PCLRR_BUSCTL,
56 },
57 {
58 .gpio_chip = {
59 .label = "BE",
60 .request = mcf_gpio_request,
61 .free = mcf_gpio_free,
62 .direction_input = mcf_gpio_direction_input,
63 .direction_output = mcf_gpio_direction_output,
64 .get = mcf_gpio_get_value,
65 .set = mcf_gpio_set_value_fast,
66 .base = 16,
67 .ngpio = 4,
68 },
69 .pddr = (void __iomem *) MCFGPIO_PDDR_BE,
70 .podr = (void __iomem *) MCFGPIO_PODR_BE,
71 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_BE,
72 .setr = (void __iomem *) MCFGPIO_PPDSDR_BE,
73 .clrr = (void __iomem *) MCFGPIO_PCLRR_BE,
74 },
75 {
76 .gpio_chip = {
77 .label = "CS",
78 .request = mcf_gpio_request,
79 .free = mcf_gpio_free,
80 .direction_input = mcf_gpio_direction_input,
81 .direction_output = mcf_gpio_direction_output,
82 .get = mcf_gpio_get_value,
83 .set = mcf_gpio_set_value_fast,
84 .base = 25,
85 .ngpio = 3,
86 },
87 .pddr = (void __iomem *) MCFGPIO_PDDR_CS,
88 .podr = (void __iomem *) MCFGPIO_PODR_CS,
89 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_CS,
90 .setr = (void __iomem *) MCFGPIO_PPDSDR_CS,
91 .clrr = (void __iomem *) MCFGPIO_PCLRR_CS,
92 },
93 {
94 .gpio_chip = {
95 .label = "FECI2C",
96 .request = mcf_gpio_request,
97 .free = mcf_gpio_free,
98 .direction_input = mcf_gpio_direction_input,
99 .direction_output = mcf_gpio_direction_output,
100 .get = mcf_gpio_get_value,
101 .set = mcf_gpio_set_value_fast,
102 .base = 32,
103 .ngpio = 4,
104 },
105 .pddr = (void __iomem *) MCFGPIO_PDDR_FECI2C,
106 .podr = (void __iomem *) MCFGPIO_PODR_FECI2C,
107 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
108 .setr = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
109 .clrr = (void __iomem *) MCFGPIO_PCLRR_FECI2C,
110 },
111 {
112 .gpio_chip = {
113 .label = "QSPI",
114 .request = mcf_gpio_request,
115 .free = mcf_gpio_free,
116 .direction_input = mcf_gpio_direction_input,
117 .direction_output = mcf_gpio_direction_output,
118 .get = mcf_gpio_get_value,
119 .set = mcf_gpio_set_value_fast,
120 .base = 40,
121 .ngpio = 4,
122 },
123 .pddr = (void __iomem *) MCFGPIO_PDDR_QSPI,
124 .podr = (void __iomem *) MCFGPIO_PODR_QSPI,
125 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
126 .setr = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
127 .clrr = (void __iomem *) MCFGPIO_PCLRR_QSPI,
128 },
129 {
130 .gpio_chip = {
131 .label = "TIMER",
132 .request = mcf_gpio_request,
133 .free = mcf_gpio_free,
134 .direction_input = mcf_gpio_direction_input,
135 .direction_output = mcf_gpio_direction_output,
136 .get = mcf_gpio_get_value,
137 .set = mcf_gpio_set_value_fast,
138 .base = 48,
139 .ngpio = 4,
140 },
141 .pddr = (void __iomem *) MCFGPIO_PDDR_TIMER,
142 .podr = (void __iomem *) MCFGPIO_PODR_TIMER,
143 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_TIMER,
144 .setr = (void __iomem *) MCFGPIO_PPDSDR_TIMER,
145 .clrr = (void __iomem *) MCFGPIO_PCLRR_TIMER,
146 },
147 {
148 .gpio_chip = {
149 .label = "UART",
150 .request = mcf_gpio_request,
151 .free = mcf_gpio_free,
152 .direction_input = mcf_gpio_direction_input,
153 .direction_output = mcf_gpio_direction_output,
154 .get = mcf_gpio_get_value,
155 .set = mcf_gpio_set_value_fast,
156 .base = 56,
157 .ngpio = 8,
158 },
159 .pddr = (void __iomem *) MCFGPIO_PDDR_UART,
160 .podr = (void __iomem *) MCFGPIO_PODR_UART,
161 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_UART,
162 .setr = (void __iomem *) MCFGPIO_PPDSDR_UART,
163 .clrr = (void __iomem *) MCFGPIO_PCLRR_UART,
164 },
165 {
166 .gpio_chip = {
167 .label = "FECH",
168 .request = mcf_gpio_request,
169 .free = mcf_gpio_free,
170 .direction_input = mcf_gpio_direction_input,
171 .direction_output = mcf_gpio_direction_output,
172 .get = mcf_gpio_get_value,
173 .set = mcf_gpio_set_value_fast,
174 .base = 64,
175 .ngpio = 8,
176 },
177 .pddr = (void __iomem *) MCFGPIO_PDDR_FECH,
178 .podr = (void __iomem *) MCFGPIO_PODR_FECH,
179 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FECH,
180 .setr = (void __iomem *) MCFGPIO_PPDSDR_FECH,
181 .clrr = (void __iomem *) MCFGPIO_PCLRR_FECH,
182 },
183 {
184 .gpio_chip = {
185 .label = "FECL",
186 .request = mcf_gpio_request,
187 .free = mcf_gpio_free,
188 .direction_input = mcf_gpio_direction_input,
189 .direction_output = mcf_gpio_direction_output,
190 .get = mcf_gpio_get_value,
191 .set = mcf_gpio_set_value_fast,
192 .base = 72,
193 .ngpio = 8,
194 },
195 .pddr = (void __iomem *) MCFGPIO_PDDR_FECL,
196 .podr = (void __iomem *) MCFGPIO_PODR_FECL,
197 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FECL,
198 .setr = (void __iomem *) MCFGPIO_PPDSDR_FECL,
199 .clrr = (void __iomem *) MCFGPIO_PCLRR_FECL,
200 },
201};
202
203static int __init mcf_gpio_init(void)
204{
205 unsigned i = 0;
206 while (i < ARRAY_SIZE(mcf_gpio_chips))
207 (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
208 return 0;
209}
210
211core_initcall(mcf_gpio_init);
diff --git a/arch/m68k/platform/523x/Makefile b/arch/m68k/platform/523x/Makefile
new file mode 100644
index 000000000000..c04b8f71c88c
--- /dev/null
+++ b/arch/m68k/platform/523x/Makefile
@@ -0,0 +1,17 @@
1#
2# Makefile for the m68knommu linux kernel.
3#
4
5#
6# If you want to play with the HW breakpoints then you will
7# need to add define this, which will give you a stack backtrace
8# on the console port whenever a DBG interrupt occurs. You have to
9# set up you HW breakpoints to trigger a DBG interrupt:
10#
11# ccflags-y := -DTRAP_DBG_INTERRUPT
12# asflags-y := -DTRAP_DBG_INTERRUPT
13#
14
15asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
16
17obj-y := config.o gpio.o
diff --git a/arch/m68k/platform/523x/config.c b/arch/m68k/platform/523x/config.c
new file mode 100644
index 000000000000..71f4436ec809
--- /dev/null
+++ b/arch/m68k/platform/523x/config.c
@@ -0,0 +1,293 @@
1/***************************************************************************/
2
3/*
4 * linux/arch/m68knommu/platform/523x/config.c
5 *
6 * Sub-architcture dependent initialization code for the Freescale
7 * 523x CPUs.
8 *
9 * Copyright (C) 1999-2005, Greg Ungerer (gerg@snapgear.com)
10 * Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
11 */
12
13/***************************************************************************/
14
15#include <linux/kernel.h>
16#include <linux/param.h>
17#include <linux/init.h>
18#include <linux/io.h>
19#include <linux/spi/spi.h>
20#include <linux/gpio.h>
21#include <asm/machdep.h>
22#include <asm/coldfire.h>
23#include <asm/mcfsim.h>
24#include <asm/mcfuart.h>
25#include <asm/mcfqspi.h>
26
27/***************************************************************************/
28
29static struct mcf_platform_uart m523x_uart_platform[] = {
30 {
31 .mapbase = MCFUART_BASE1,
32 .irq = MCFINT_VECBASE + MCFINT_UART0,
33 },
34 {
35 .mapbase = MCFUART_BASE2,
36 .irq = MCFINT_VECBASE + MCFINT_UART0 + 1,
37 },
38 {
39 .mapbase = MCFUART_BASE3,
40 .irq = MCFINT_VECBASE + MCFINT_UART0 + 2,
41 },
42 { },
43};
44
45static struct platform_device m523x_uart = {
46 .name = "mcfuart",
47 .id = 0,
48 .dev.platform_data = m523x_uart_platform,
49};
50
51static struct resource m523x_fec_resources[] = {
52 {
53 .start = MCFFEC_BASE,
54 .end = MCFFEC_BASE + MCFFEC_SIZE - 1,
55 .flags = IORESOURCE_MEM,
56 },
57 {
58 .start = 64 + 23,
59 .end = 64 + 23,
60 .flags = IORESOURCE_IRQ,
61 },
62 {
63 .start = 64 + 27,
64 .end = 64 + 27,
65 .flags = IORESOURCE_IRQ,
66 },
67 {
68 .start = 64 + 29,
69 .end = 64 + 29,
70 .flags = IORESOURCE_IRQ,
71 },
72};
73
74static struct platform_device m523x_fec = {
75 .name = "fec",
76 .id = 0,
77 .num_resources = ARRAY_SIZE(m523x_fec_resources),
78 .resource = m523x_fec_resources,
79};
80
81#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
82static struct resource m523x_qspi_resources[] = {
83 {
84 .start = MCFQSPI_IOBASE,
85 .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1,
86 .flags = IORESOURCE_MEM,
87 },
88 {
89 .start = MCFINT_VECBASE + MCFINT_QSPI,
90 .end = MCFINT_VECBASE + MCFINT_QSPI,
91 .flags = IORESOURCE_IRQ,
92 },
93};
94
95#define MCFQSPI_CS0 91
96#define MCFQSPI_CS1 92
97#define MCFQSPI_CS2 103
98#define MCFQSPI_CS3 99
99
100static int m523x_cs_setup(struct mcfqspi_cs_control *cs_control)
101{
102 int status;
103
104 status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0");
105 if (status) {
106 pr_debug("gpio_request for MCFQSPI_CS0 failed\n");
107 goto fail0;
108 }
109 status = gpio_direction_output(MCFQSPI_CS0, 1);
110 if (status) {
111 pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n");
112 goto fail1;
113 }
114
115 status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1");
116 if (status) {
117 pr_debug("gpio_request for MCFQSPI_CS1 failed\n");
118 goto fail1;
119 }
120 status = gpio_direction_output(MCFQSPI_CS1, 1);
121 if (status) {
122 pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n");
123 goto fail2;
124 }
125
126 status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2");
127 if (status) {
128 pr_debug("gpio_request for MCFQSPI_CS2 failed\n");
129 goto fail2;
130 }
131 status = gpio_direction_output(MCFQSPI_CS2, 1);
132 if (status) {
133 pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n");
134 goto fail3;
135 }
136
137 status = gpio_request(MCFQSPI_CS3, "MCFQSPI_CS3");
138 if (status) {
139 pr_debug("gpio_request for MCFQSPI_CS3 failed\n");
140 goto fail3;
141 }
142 status = gpio_direction_output(MCFQSPI_CS3, 1);
143 if (status) {
144 pr_debug("gpio_direction_output for MCFQSPI_CS3 failed\n");
145 goto fail4;
146 }
147
148 return 0;
149
150fail4:
151 gpio_free(MCFQSPI_CS3);
152fail3:
153 gpio_free(MCFQSPI_CS2);
154fail2:
155 gpio_free(MCFQSPI_CS1);
156fail1:
157 gpio_free(MCFQSPI_CS0);
158fail0:
159 return status;
160}
161
162static void m523x_cs_teardown(struct mcfqspi_cs_control *cs_control)
163{
164 gpio_free(MCFQSPI_CS3);
165 gpio_free(MCFQSPI_CS2);
166 gpio_free(MCFQSPI_CS1);
167 gpio_free(MCFQSPI_CS0);
168}
169
170static void m523x_cs_select(struct mcfqspi_cs_control *cs_control,
171 u8 chip_select, bool cs_high)
172{
173 switch (chip_select) {
174 case 0:
175 gpio_set_value(MCFQSPI_CS0, cs_high);
176 break;
177 case 1:
178 gpio_set_value(MCFQSPI_CS1, cs_high);
179 break;
180 case 2:
181 gpio_set_value(MCFQSPI_CS2, cs_high);
182 break;
183 case 3:
184 gpio_set_value(MCFQSPI_CS3, cs_high);
185 break;
186 }
187}
188
189static void m523x_cs_deselect(struct mcfqspi_cs_control *cs_control,
190 u8 chip_select, bool cs_high)
191{
192 switch (chip_select) {
193 case 0:
194 gpio_set_value(MCFQSPI_CS0, !cs_high);
195 break;
196 case 1:
197 gpio_set_value(MCFQSPI_CS1, !cs_high);
198 break;
199 case 2:
200 gpio_set_value(MCFQSPI_CS2, !cs_high);
201 break;
202 case 3:
203 gpio_set_value(MCFQSPI_CS3, !cs_high);
204 break;
205 }
206}
207
208static struct mcfqspi_cs_control m523x_cs_control = {
209 .setup = m523x_cs_setup,
210 .teardown = m523x_cs_teardown,
211 .select = m523x_cs_select,
212 .deselect = m523x_cs_deselect,
213};
214
215static struct mcfqspi_platform_data m523x_qspi_data = {
216 .bus_num = 0,
217 .num_chipselect = 4,
218 .cs_control = &m523x_cs_control,
219};
220
221static struct platform_device m523x_qspi = {
222 .name = "mcfqspi",
223 .id = 0,
224 .num_resources = ARRAY_SIZE(m523x_qspi_resources),
225 .resource = m523x_qspi_resources,
226 .dev.platform_data = &m523x_qspi_data,
227};
228
229static void __init m523x_qspi_init(void)
230{
231 u16 par;
232
233 /* setup QSPS pins for QSPI with gpio CS control */
234 writeb(0x1f, MCFGPIO_PAR_QSPI);
235 /* and CS2 & CS3 as gpio */
236 par = readw(MCFGPIO_PAR_TIMER);
237 par &= 0x3f3f;
238 writew(par, MCFGPIO_PAR_TIMER);
239}
240#endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */
241
242static struct platform_device *m523x_devices[] __initdata = {
243 &m523x_uart,
244 &m523x_fec,
245#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
246 &m523x_qspi,
247#endif
248};
249
250/***************************************************************************/
251
252static void __init m523x_fec_init(void)
253{
254 u16 par;
255 u8 v;
256
257 /* Set multi-function pins to ethernet use */
258 par = readw(MCF_IPSBAR + 0x100082);
259 writew(par | 0xf00, MCF_IPSBAR + 0x100082);
260 v = readb(MCF_IPSBAR + 0x100078);
261 writeb(v | 0xc0, MCF_IPSBAR + 0x100078);
262}
263
264/***************************************************************************/
265
266static void m523x_cpu_reset(void)
267{
268 local_irq_disable();
269 __raw_writeb(MCF_RCR_SWRESET, MCF_IPSBAR + MCF_RCR);
270}
271
272/***************************************************************************/
273
274void __init config_BSP(char *commandp, int size)
275{
276 mach_reset = m523x_cpu_reset;
277}
278
279/***************************************************************************/
280
281static int __init init_BSP(void)
282{
283 m523x_fec_init();
284#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
285 m523x_qspi_init();
286#endif
287 platform_add_devices(m523x_devices, ARRAY_SIZE(m523x_devices));
288 return 0;
289}
290
291arch_initcall(init_BSP);
292
293/***************************************************************************/
diff --git a/arch/m68k/platform/523x/gpio.c b/arch/m68k/platform/523x/gpio.c
new file mode 100644
index 000000000000..327ebf142c8e
--- /dev/null
+++ b/arch/m68k/platform/523x/gpio.c
@@ -0,0 +1,284 @@
1/*
2 * Coldfire generic GPIO support
3 *
4 * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14*/
15
16#include <linux/kernel.h>
17#include <linux/init.h>
18
19#include <asm/coldfire.h>
20#include <asm/mcfsim.h>
21#include <asm/mcfgpio.h>
22
23static struct mcf_gpio_chip mcf_gpio_chips[] = {
24 {
25 .gpio_chip = {
26 .label = "PIRQ",
27 .request = mcf_gpio_request,
28 .free = mcf_gpio_free,
29 .direction_input = mcf_gpio_direction_input,
30 .direction_output = mcf_gpio_direction_output,
31 .get = mcf_gpio_get_value,
32 .set = mcf_gpio_set_value,
33 .base = 1,
34 .ngpio = 7,
35 },
36 .pddr = (void __iomem *) MCFEPORT_EPDDR,
37 .podr = (void __iomem *) MCFEPORT_EPDR,
38 .ppdr = (void __iomem *) MCFEPORT_EPPDR,
39 },
40 {
41 .gpio_chip = {
42 .label = "ADDR",
43 .request = mcf_gpio_request,
44 .free = mcf_gpio_free,
45 .direction_input = mcf_gpio_direction_input,
46 .direction_output = mcf_gpio_direction_output,
47 .get = mcf_gpio_get_value,
48 .set = mcf_gpio_set_value_fast,
49 .base = 13,
50 .ngpio = 3,
51 },
52 .pddr = (void __iomem *) MCFGPIO_PDDR_ADDR,
53 .podr = (void __iomem *) MCFGPIO_PODR_ADDR,
54 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_ADDR,
55 .setr = (void __iomem *) MCFGPIO_PPDSDR_ADDR,
56 .clrr = (void __iomem *) MCFGPIO_PCLRR_ADDR,
57 },
58 {
59 .gpio_chip = {
60 .label = "DATAH",
61 .request = mcf_gpio_request,
62 .free = mcf_gpio_free,
63 .direction_input = mcf_gpio_direction_input,
64 .direction_output = mcf_gpio_direction_output,
65 .get = mcf_gpio_get_value,
66 .set = mcf_gpio_set_value_fast,
67 .base = 16,
68 .ngpio = 8,
69 },
70 .pddr = (void __iomem *) MCFGPIO_PDDR_DATAH,
71 .podr = (void __iomem *) MCFGPIO_PODR_DATAH,
72 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_DATAH,
73 .setr = (void __iomem *) MCFGPIO_PPDSDR_DATAH,
74 .clrr = (void __iomem *) MCFGPIO_PCLRR_DATAH,
75 },
76 {
77 .gpio_chip = {
78 .label = "DATAL",
79 .request = mcf_gpio_request,
80 .free = mcf_gpio_free,
81 .direction_input = mcf_gpio_direction_input,
82 .direction_output = mcf_gpio_direction_output,
83 .get = mcf_gpio_get_value,
84 .set = mcf_gpio_set_value_fast,
85 .base = 24,
86 .ngpio = 8,
87 },
88 .pddr = (void __iomem *) MCFGPIO_PDDR_DATAL,
89 .podr = (void __iomem *) MCFGPIO_PODR_DATAL,
90 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_DATAL,
91 .setr = (void __iomem *) MCFGPIO_PPDSDR_DATAL,
92 .clrr = (void __iomem *) MCFGPIO_PCLRR_DATAL,
93 },
94 {
95 .gpio_chip = {
96 .label = "BUSCTL",
97 .request = mcf_gpio_request,
98 .free = mcf_gpio_free,
99 .direction_input = mcf_gpio_direction_input,
100 .direction_output = mcf_gpio_direction_output,
101 .get = mcf_gpio_get_value,
102 .set = mcf_gpio_set_value_fast,
103 .base = 32,
104 .ngpio = 8,
105 },
106 .pddr = (void __iomem *) MCFGPIO_PDDR_BUSCTL,
107 .podr = (void __iomem *) MCFGPIO_PODR_BUSCTL,
108 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
109 .setr = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
110 .clrr = (void __iomem *) MCFGPIO_PCLRR_BUSCTL,
111 },
112 {
113 .gpio_chip = {
114 .label = "BS",
115 .request = mcf_gpio_request,
116 .free = mcf_gpio_free,
117 .direction_input = mcf_gpio_direction_input,
118 .direction_output = mcf_gpio_direction_output,
119 .get = mcf_gpio_get_value,
120 .set = mcf_gpio_set_value_fast,
121 .base = 40,
122 .ngpio = 4,
123 },
124 .pddr = (void __iomem *) MCFGPIO_PDDR_BS,
125 .podr = (void __iomem *) MCFGPIO_PODR_BS,
126 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_BS,
127 .setr = (void __iomem *) MCFGPIO_PPDSDR_BS,
128 .clrr = (void __iomem *) MCFGPIO_PCLRR_BS,
129 },
130 {
131 .gpio_chip = {
132 .label = "CS",
133 .request = mcf_gpio_request,
134 .free = mcf_gpio_free,
135 .direction_input = mcf_gpio_direction_input,
136 .direction_output = mcf_gpio_direction_output,
137 .get = mcf_gpio_get_value,
138 .set = mcf_gpio_set_value_fast,
139 .base = 49,
140 .ngpio = 7,
141 },
142 .pddr = (void __iomem *) MCFGPIO_PDDR_CS,
143 .podr = (void __iomem *) MCFGPIO_PODR_CS,
144 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_CS,
145 .setr = (void __iomem *) MCFGPIO_PPDSDR_CS,
146 .clrr = (void __iomem *) MCFGPIO_PCLRR_CS,
147 },
148 {
149 .gpio_chip = {
150 .label = "SDRAM",
151 .request = mcf_gpio_request,
152 .free = mcf_gpio_free,
153 .direction_input = mcf_gpio_direction_input,
154 .direction_output = mcf_gpio_direction_output,
155 .get = mcf_gpio_get_value,
156 .set = mcf_gpio_set_value_fast,
157 .base = 56,
158 .ngpio = 6,
159 },
160 .pddr = (void __iomem *) MCFGPIO_PDDR_SDRAM,
161 .podr = (void __iomem *) MCFGPIO_PODR_SDRAM,
162 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_SDRAM,
163 .setr = (void __iomem *) MCFGPIO_PPDSDR_SDRAM,
164 .clrr = (void __iomem *) MCFGPIO_PCLRR_SDRAM,
165 },
166 {
167 .gpio_chip = {
168 .label = "FECI2C",
169 .request = mcf_gpio_request,
170 .free = mcf_gpio_free,
171 .direction_input = mcf_gpio_direction_input,
172 .direction_output = mcf_gpio_direction_output,
173 .get = mcf_gpio_get_value,
174 .set = mcf_gpio_set_value_fast,
175 .base = 64,
176 .ngpio = 4,
177 },
178 .pddr = (void __iomem *) MCFGPIO_PDDR_FECI2C,
179 .podr = (void __iomem *) MCFGPIO_PODR_FECI2C,
180 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
181 .setr = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
182 .clrr = (void __iomem *) MCFGPIO_PCLRR_FECI2C,
183 },
184 {
185 .gpio_chip = {
186 .label = "UARTH",
187 .request = mcf_gpio_request,
188 .free = mcf_gpio_free,
189 .direction_input = mcf_gpio_direction_input,
190 .direction_output = mcf_gpio_direction_output,
191 .get = mcf_gpio_get_value,
192 .set = mcf_gpio_set_value_fast,
193 .base = 72,
194 .ngpio = 2,
195 },
196 .pddr = (void __iomem *) MCFGPIO_PDDR_UARTH,
197 .podr = (void __iomem *) MCFGPIO_PODR_UARTH,
198 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_UARTH,
199 .setr = (void __iomem *) MCFGPIO_PPDSDR_UARTH,
200 .clrr = (void __iomem *) MCFGPIO_PCLRR_UARTH,
201 },
202 {
203 .gpio_chip = {
204 .label = "UARTL",
205 .request = mcf_gpio_request,
206 .free = mcf_gpio_free,
207 .direction_input = mcf_gpio_direction_input,
208 .direction_output = mcf_gpio_direction_output,
209 .get = mcf_gpio_get_value,
210 .set = mcf_gpio_set_value_fast,
211 .base = 80,
212 .ngpio = 8,
213 },
214 .pddr = (void __iomem *) MCFGPIO_PDDR_UARTL,
215 .podr = (void __iomem *) MCFGPIO_PODR_UARTL,
216 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_UARTL,
217 .setr = (void __iomem *) MCFGPIO_PPDSDR_UARTL,
218 .clrr = (void __iomem *) MCFGPIO_PCLRR_UARTL,
219 },
220 {
221 .gpio_chip = {
222 .label = "QSPI",
223 .request = mcf_gpio_request,
224 .free = mcf_gpio_free,
225 .direction_input = mcf_gpio_direction_input,
226 .direction_output = mcf_gpio_direction_output,
227 .get = mcf_gpio_get_value,
228 .set = mcf_gpio_set_value_fast,
229 .base = 88,
230 .ngpio = 5,
231 },
232 .pddr = (void __iomem *) MCFGPIO_PDDR_QSPI,
233 .podr = (void __iomem *) MCFGPIO_PODR_QSPI,
234 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
235 .setr = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
236 .clrr = (void __iomem *) MCFGPIO_PCLRR_QSPI,
237 },
238 {
239 .gpio_chip = {
240 .label = "TIMER",
241 .request = mcf_gpio_request,
242 .free = mcf_gpio_free,
243 .direction_input = mcf_gpio_direction_input,
244 .direction_output = mcf_gpio_direction_output,
245 .get = mcf_gpio_get_value,
246 .set = mcf_gpio_set_value_fast,
247 .base = 96,
248 .ngpio = 8,
249 },
250 .pddr = (void __iomem *) MCFGPIO_PDDR_TIMER,
251 .podr = (void __iomem *) MCFGPIO_PODR_TIMER,
252 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_TIMER,
253 .setr = (void __iomem *) MCFGPIO_PPDSDR_TIMER,
254 .clrr = (void __iomem *) MCFGPIO_PCLRR_TIMER,
255 },
256 {
257 .gpio_chip = {
258 .label = "ETPU",
259 .request = mcf_gpio_request,
260 .free = mcf_gpio_free,
261 .direction_input = mcf_gpio_direction_input,
262 .direction_output = mcf_gpio_direction_output,
263 .get = mcf_gpio_get_value,
264 .set = mcf_gpio_set_value_fast,
265 .base = 104,
266 .ngpio = 3,
267 },
268 .pddr = (void __iomem *) MCFGPIO_PDDR_ETPU,
269 .podr = (void __iomem *) MCFGPIO_PODR_ETPU,
270 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_ETPU,
271 .setr = (void __iomem *) MCFGPIO_PPDSDR_ETPU,
272 .clrr = (void __iomem *) MCFGPIO_PCLRR_ETPU,
273 },
274};
275
276static int __init mcf_gpio_init(void)
277{
278 unsigned i = 0;
279 while (i < ARRAY_SIZE(mcf_gpio_chips))
280 (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
281 return 0;
282}
283
284core_initcall(mcf_gpio_init);
diff --git a/arch/m68k/platform/5249/Makefile b/arch/m68k/platform/5249/Makefile
new file mode 100644
index 000000000000..4bed30fd0073
--- /dev/null
+++ b/arch/m68k/platform/5249/Makefile
@@ -0,0 +1,18 @@
1#
2# Makefile for the m68knommu linux kernel.
3#
4
5#
6# If you want to play with the HW breakpoints then you will
7# need to add define this, which will give you a stack backtrace
8# on the console port whenever a DBG interrupt occurs. You have to
9# set up you HW breakpoints to trigger a DBG interrupt:
10#
11# ccflags-y := -DTRAP_DBG_INTERRUPT
12# asflags-y := -DTRAP_DBG_INTERRUPT
13#
14
15asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
16
17obj-y := config.o gpio.o intc2.o
18
diff --git a/arch/m68k/platform/5249/config.c b/arch/m68k/platform/5249/config.c
new file mode 100644
index 000000000000..ceb31e5744a6
--- /dev/null
+++ b/arch/m68k/platform/5249/config.c
@@ -0,0 +1,330 @@
1/***************************************************************************/
2
3/*
4 * linux/arch/m68knommu/platform/5249/config.c
5 *
6 * Copyright (C) 2002, Greg Ungerer (gerg@snapgear.com)
7 */
8
9/***************************************************************************/
10
11#include <linux/kernel.h>
12#include <linux/param.h>
13#include <linux/init.h>
14#include <linux/io.h>
15#include <linux/spi/spi.h>
16#include <linux/gpio.h>
17#include <asm/machdep.h>
18#include <asm/coldfire.h>
19#include <asm/mcfsim.h>
20#include <asm/mcfuart.h>
21#include <asm/mcfqspi.h>
22
23/***************************************************************************/
24
25static struct mcf_platform_uart m5249_uart_platform[] = {
26 {
27 .mapbase = MCF_MBAR + MCFUART_BASE1,
28 .irq = 73,
29 },
30 {
31 .mapbase = MCF_MBAR + MCFUART_BASE2,
32 .irq = 74,
33 },
34 { },
35};
36
37static struct platform_device m5249_uart = {
38 .name = "mcfuart",
39 .id = 0,
40 .dev.platform_data = m5249_uart_platform,
41};
42
43#ifdef CONFIG_M5249C3
44
45static struct resource m5249_smc91x_resources[] = {
46 {
47 .start = 0xe0000300,
48 .end = 0xe0000300 + 0x100,
49 .flags = IORESOURCE_MEM,
50 },
51 {
52 .start = MCFINTC2_GPIOIRQ6,
53 .end = MCFINTC2_GPIOIRQ6,
54 .flags = IORESOURCE_IRQ,
55 },
56};
57
58static struct platform_device m5249_smc91x = {
59 .name = "smc91x",
60 .id = 0,
61 .num_resources = ARRAY_SIZE(m5249_smc91x_resources),
62 .resource = m5249_smc91x_resources,
63};
64
65#endif /* CONFIG_M5249C3 */
66
67#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
68static struct resource m5249_qspi_resources[] = {
69 {
70 .start = MCFQSPI_IOBASE,
71 .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1,
72 .flags = IORESOURCE_MEM,
73 },
74 {
75 .start = MCF_IRQ_QSPI,
76 .end = MCF_IRQ_QSPI,
77 .flags = IORESOURCE_IRQ,
78 },
79};
80
81#define MCFQSPI_CS0 29
82#define MCFQSPI_CS1 24
83#define MCFQSPI_CS2 21
84#define MCFQSPI_CS3 22
85
86static int m5249_cs_setup(struct mcfqspi_cs_control *cs_control)
87{
88 int status;
89
90 status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0");
91 if (status) {
92 pr_debug("gpio_request for MCFQSPI_CS0 failed\n");
93 goto fail0;
94 }
95 status = gpio_direction_output(MCFQSPI_CS0, 1);
96 if (status) {
97 pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n");
98 goto fail1;
99 }
100
101 status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1");
102 if (status) {
103 pr_debug("gpio_request for MCFQSPI_CS1 failed\n");
104 goto fail1;
105 }
106 status = gpio_direction_output(MCFQSPI_CS1, 1);
107 if (status) {
108 pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n");
109 goto fail2;
110 }
111
112 status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2");
113 if (status) {
114 pr_debug("gpio_request for MCFQSPI_CS2 failed\n");
115 goto fail2;
116 }
117 status = gpio_direction_output(MCFQSPI_CS2, 1);
118 if (status) {
119 pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n");
120 goto fail3;
121 }
122
123 status = gpio_request(MCFQSPI_CS3, "MCFQSPI_CS3");
124 if (status) {
125 pr_debug("gpio_request for MCFQSPI_CS3 failed\n");
126 goto fail3;
127 }
128 status = gpio_direction_output(MCFQSPI_CS3, 1);
129 if (status) {
130 pr_debug("gpio_direction_output for MCFQSPI_CS3 failed\n");
131 goto fail4;
132 }
133
134 return 0;
135
136fail4:
137 gpio_free(MCFQSPI_CS3);
138fail3:
139 gpio_free(MCFQSPI_CS2);
140fail2:
141 gpio_free(MCFQSPI_CS1);
142fail1:
143 gpio_free(MCFQSPI_CS0);
144fail0:
145 return status;
146}
147
148static void m5249_cs_teardown(struct mcfqspi_cs_control *cs_control)
149{
150 gpio_free(MCFQSPI_CS3);
151 gpio_free(MCFQSPI_CS2);
152 gpio_free(MCFQSPI_CS1);
153 gpio_free(MCFQSPI_CS0);
154}
155
156static void m5249_cs_select(struct mcfqspi_cs_control *cs_control,
157 u8 chip_select, bool cs_high)
158{
159 switch (chip_select) {
160 case 0:
161 gpio_set_value(MCFQSPI_CS0, cs_high);
162 break;
163 case 1:
164 gpio_set_value(MCFQSPI_CS1, cs_high);
165 break;
166 case 2:
167 gpio_set_value(MCFQSPI_CS2, cs_high);
168 break;
169 case 3:
170 gpio_set_value(MCFQSPI_CS3, cs_high);
171 break;
172 }
173}
174
175static void m5249_cs_deselect(struct mcfqspi_cs_control *cs_control,
176 u8 chip_select, bool cs_high)
177{
178 switch (chip_select) {
179 case 0:
180 gpio_set_value(MCFQSPI_CS0, !cs_high);
181 break;
182 case 1:
183 gpio_set_value(MCFQSPI_CS1, !cs_high);
184 break;
185 case 2:
186 gpio_set_value(MCFQSPI_CS2, !cs_high);
187 break;
188 case 3:
189 gpio_set_value(MCFQSPI_CS3, !cs_high);
190 break;
191 }
192}
193
194static struct mcfqspi_cs_control m5249_cs_control = {
195 .setup = m5249_cs_setup,
196 .teardown = m5249_cs_teardown,
197 .select = m5249_cs_select,
198 .deselect = m5249_cs_deselect,
199};
200
201static struct mcfqspi_platform_data m5249_qspi_data = {
202 .bus_num = 0,
203 .num_chipselect = 4,
204 .cs_control = &m5249_cs_control,
205};
206
207static struct platform_device m5249_qspi = {
208 .name = "mcfqspi",
209 .id = 0,
210 .num_resources = ARRAY_SIZE(m5249_qspi_resources),
211 .resource = m5249_qspi_resources,
212 .dev.platform_data = &m5249_qspi_data,
213};
214
215static void __init m5249_qspi_init(void)
216{
217 /* QSPI irq setup */
218 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI0,
219 MCF_MBAR + MCFSIM_QSPIICR);
220 mcf_mapirq2imr(MCF_IRQ_QSPI, MCFINTC_QSPI);
221}
222#endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */
223
224
225static struct platform_device *m5249_devices[] __initdata = {
226 &m5249_uart,
227#ifdef CONFIG_M5249C3
228 &m5249_smc91x,
229#endif
230#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
231 &m5249_qspi,
232#endif
233};
234
235/***************************************************************************/
236
237static void __init m5249_uart_init_line(int line, int irq)
238{
239 if (line == 0) {
240 writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
241 writeb(irq, MCF_MBAR + MCFUART_BASE1 + MCFUART_UIVR);
242 mcf_mapirq2imr(irq, MCFINTC_UART0);
243 } else if (line == 1) {
244 writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
245 writeb(irq, MCF_MBAR + MCFUART_BASE2 + MCFUART_UIVR);
246 mcf_mapirq2imr(irq, MCFINTC_UART1);
247 }
248}
249
250static void __init m5249_uarts_init(void)
251{
252 const int nrlines = ARRAY_SIZE(m5249_uart_platform);
253 int line;
254
255 for (line = 0; (line < nrlines); line++)
256 m5249_uart_init_line(line, m5249_uart_platform[line].irq);
257}
258
259/***************************************************************************/
260
261#ifdef CONFIG_M5249C3
262
263static void __init m5249_smc91x_init(void)
264{
265 u32 gpio;
266
267 /* Set the GPIO line as interrupt source for smc91x device */
268 gpio = readl(MCF_MBAR2 + MCFSIM2_GPIOINTENABLE);
269 writel(gpio | 0x40, MCF_MBAR2 + MCFSIM2_GPIOINTENABLE);
270
271 gpio = readl(MCF_MBAR2 + MCFSIM2_INTLEVEL5);
272 writel(gpio | 0x04000000, MCF_MBAR2 + MCFSIM2_INTLEVEL5);
273}
274
275#endif /* CONFIG_M5249C3 */
276
277/***************************************************************************/
278
279static void __init m5249_timers_init(void)
280{
281 /* Timer1 is always used as system timer */
282 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
283 MCF_MBAR + MCFSIM_TIMER1ICR);
284 mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);
285
286#ifdef CONFIG_HIGHPROFILE
287 /* Timer2 is to be used as a high speed profile timer */
288 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
289 MCF_MBAR + MCFSIM_TIMER2ICR);
290 mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);
291#endif
292}
293
294/***************************************************************************/
295
296void m5249_cpu_reset(void)
297{
298 local_irq_disable();
299 /* Set watchdog to soft reset, and enabled */
300 __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
301 for (;;)
302 /* wait for watchdog to timeout */;
303}
304
305/***************************************************************************/
306
307void __init config_BSP(char *commandp, int size)
308{
309 mach_reset = m5249_cpu_reset;
310 m5249_timers_init();
311 m5249_uarts_init();
312#ifdef CONFIG_M5249C3
313 m5249_smc91x_init();
314#endif
315#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
316 m5249_qspi_init();
317#endif
318}
319
320/***************************************************************************/
321
322static int __init init_BSP(void)
323{
324 platform_add_devices(m5249_devices, ARRAY_SIZE(m5249_devices));
325 return 0;
326}
327
328arch_initcall(init_BSP);
329
330/***************************************************************************/
diff --git a/arch/m68k/platform/5249/gpio.c b/arch/m68k/platform/5249/gpio.c
new file mode 100644
index 000000000000..2b56c6ef65bf
--- /dev/null
+++ b/arch/m68k/platform/5249/gpio.c
@@ -0,0 +1,65 @@
1/*
2 * Coldfire generic GPIO support
3 *
4 * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14*/
15
16#include <linux/kernel.h>
17#include <linux/init.h>
18
19#include <asm/coldfire.h>
20#include <asm/mcfsim.h>
21#include <asm/mcfgpio.h>
22
23static struct mcf_gpio_chip mcf_gpio_chips[] = {
24 {
25 .gpio_chip = {
26 .label = "GPIO0",
27 .request = mcf_gpio_request,
28 .free = mcf_gpio_free,
29 .direction_input = mcf_gpio_direction_input,
30 .direction_output = mcf_gpio_direction_output,
31 .get = mcf_gpio_get_value,
32 .set = mcf_gpio_set_value,
33 .ngpio = 32,
34 },
35 .pddr = (void __iomem *) MCFSIM2_GPIOENABLE,
36 .podr = (void __iomem *) MCFSIM2_GPIOWRITE,
37 .ppdr = (void __iomem *) MCFSIM2_GPIOREAD,
38 },
39 {
40 .gpio_chip = {
41 .label = "GPIO1",
42 .request = mcf_gpio_request,
43 .free = mcf_gpio_free,
44 .direction_input = mcf_gpio_direction_input,
45 .direction_output = mcf_gpio_direction_output,
46 .get = mcf_gpio_get_value,
47 .set = mcf_gpio_set_value,
48 .base = 32,
49 .ngpio = 32,
50 },
51 .pddr = (void __iomem *) MCFSIM2_GPIO1ENABLE,
52 .podr = (void __iomem *) MCFSIM2_GPIO1WRITE,
53 .ppdr = (void __iomem *) MCFSIM2_GPIO1READ,
54 },
55};
56
57static int __init mcf_gpio_init(void)
58{
59 unsigned i = 0;
60 while (i < ARRAY_SIZE(mcf_gpio_chips))
61 (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
62 return 0;
63}
64
65core_initcall(mcf_gpio_init);
diff --git a/arch/m68k/platform/5249/intc2.c b/arch/m68k/platform/5249/intc2.c
new file mode 100644
index 000000000000..f343bf7bf5b0
--- /dev/null
+++ b/arch/m68k/platform/5249/intc2.c
@@ -0,0 +1,61 @@
1/*
2 * intc2.c -- support for the 2nd INTC controller of the 5249
3 *
4 * (C) Copyright 2009, Greg Ungerer <gerg@snapgear.com>
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/types.h>
12#include <linux/init.h>
13#include <linux/kernel.h>
14#include <linux/interrupt.h>
15#include <linux/irq.h>
16#include <linux/io.h>
17#include <asm/coldfire.h>
18#include <asm/mcfsim.h>
19
20static void intc2_irq_gpio_mask(struct irq_data *d)
21{
22 u32 imr;
23 imr = readl(MCF_MBAR2 + MCFSIM2_GPIOINTENABLE);
24 imr &= ~(0x1 << (d->irq - MCFINTC2_GPIOIRQ0));
25 writel(imr, MCF_MBAR2 + MCFSIM2_GPIOINTENABLE);
26}
27
28static void intc2_irq_gpio_unmask(struct irq_data *d)
29{
30 u32 imr;
31 imr = readl(MCF_MBAR2 + MCFSIM2_GPIOINTENABLE);
32 imr |= (0x1 << (d->irq - MCFINTC2_GPIOIRQ0));
33 writel(imr, MCF_MBAR2 + MCFSIM2_GPIOINTENABLE);
34}
35
36static void intc2_irq_gpio_ack(struct irq_data *d)
37{
38 writel(0x1 << (d->irq - MCFINTC2_GPIOIRQ0), MCF_MBAR2 + MCFSIM2_GPIOINTCLEAR);
39}
40
41static struct irq_chip intc2_irq_gpio_chip = {
42 .name = "CF-INTC2",
43 .irq_mask = intc2_irq_gpio_mask,
44 .irq_unmask = intc2_irq_gpio_unmask,
45 .irq_ack = intc2_irq_gpio_ack,
46};
47
48static int __init mcf_intc2_init(void)
49{
50 int irq;
51
52 /* GPIO interrupt sources */
53 for (irq = MCFINTC2_GPIOIRQ0; (irq <= MCFINTC2_GPIOIRQ7); irq++) {
54 irq_set_chip(irq, &intc2_irq_gpio_chip);
55 irq_set_handler(irq, handle_edge_irq);
56 }
57
58 return 0;
59}
60
61arch_initcall(mcf_intc2_init);
diff --git a/arch/m68k/platform/5272/Makefile b/arch/m68k/platform/5272/Makefile
new file mode 100644
index 000000000000..34110fc14301
--- /dev/null
+++ b/arch/m68k/platform/5272/Makefile
@@ -0,0 +1,18 @@
1#
2# Makefile for the linux kernel.
3#
4
5#
6# If you want to play with the HW breakpoints then you will
7# need to add define this, which will give you a stack backtrace
8# on the console port whenever a DBG interrupt occurs. You have to
9# set up you HW breakpoints to trigger a DBG interrupt:
10#
11# ccflags-y := -DTRAP_DBG_INTERRUPT
12# asflags-y := -DTRAP_DBG_INTERRUPT
13#
14
15asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
16
17obj-y := config.o gpio.o intc.o
18
diff --git a/arch/m68k/platform/5272/config.c b/arch/m68k/platform/5272/config.c
new file mode 100644
index 000000000000..65bb582734e1
--- /dev/null
+++ b/arch/m68k/platform/5272/config.c
@@ -0,0 +1,176 @@
1/***************************************************************************/
2
3/*
4 * linux/arch/m68knommu/platform/5272/config.c
5 *
6 * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
7 * Copyright (C) 2001-2002, SnapGear Inc. (www.snapgear.com)
8 */
9
10/***************************************************************************/
11
12#include <linux/kernel.h>
13#include <linux/param.h>
14#include <linux/init.h>
15#include <linux/io.h>
16#include <linux/phy.h>
17#include <linux/phy_fixed.h>
18#include <asm/machdep.h>
19#include <asm/coldfire.h>
20#include <asm/mcfsim.h>
21#include <asm/mcfuart.h>
22
23/***************************************************************************/
24
25/*
26 * Some platforms need software versions of the GPIO data registers.
27 */
28unsigned short ppdata;
29unsigned char ledbank = 0xff;
30
31/***************************************************************************/
32
33static struct mcf_platform_uart m5272_uart_platform[] = {
34 {
35 .mapbase = MCF_MBAR + MCFUART_BASE1,
36 .irq = MCF_IRQ_UART1,
37 },
38 {
39 .mapbase = MCF_MBAR + MCFUART_BASE2,
40 .irq = MCF_IRQ_UART2,
41 },
42 { },
43};
44
45static struct platform_device m5272_uart = {
46 .name = "mcfuart",
47 .id = 0,
48 .dev.platform_data = m5272_uart_platform,
49};
50
51static struct resource m5272_fec_resources[] = {
52 {
53 .start = MCF_MBAR + 0x840,
54 .end = MCF_MBAR + 0x840 + 0x1cf,
55 .flags = IORESOURCE_MEM,
56 },
57 {
58 .start = MCF_IRQ_ERX,
59 .end = MCF_IRQ_ERX,
60 .flags = IORESOURCE_IRQ,
61 },
62 {
63 .start = MCF_IRQ_ETX,
64 .end = MCF_IRQ_ETX,
65 .flags = IORESOURCE_IRQ,
66 },
67 {
68 .start = MCF_IRQ_ENTC,
69 .end = MCF_IRQ_ENTC,
70 .flags = IORESOURCE_IRQ,
71 },
72};
73
74static struct platform_device m5272_fec = {
75 .name = "fec",
76 .id = 0,
77 .num_resources = ARRAY_SIZE(m5272_fec_resources),
78 .resource = m5272_fec_resources,
79};
80
81static struct platform_device *m5272_devices[] __initdata = {
82 &m5272_uart,
83 &m5272_fec,
84};
85
86/***************************************************************************/
87
88static void __init m5272_uart_init_line(int line, int irq)
89{
90 u32 v;
91
92 if ((line >= 0) && (line < 2)) {
93 /* Enable the output lines for the serial ports */
94 v = readl(MCF_MBAR + MCFSIM_PBCNT);
95 v = (v & ~0x000000ff) | 0x00000055;
96 writel(v, MCF_MBAR + MCFSIM_PBCNT);
97
98 v = readl(MCF_MBAR + MCFSIM_PDCNT);
99 v = (v & ~0x000003fc) | 0x000002a8;
100 writel(v, MCF_MBAR + MCFSIM_PDCNT);
101 }
102}
103
104static void __init m5272_uarts_init(void)
105{
106 const int nrlines = ARRAY_SIZE(m5272_uart_platform);
107 int line;
108
109 for (line = 0; (line < nrlines); line++)
110 m5272_uart_init_line(line, m5272_uart_platform[line].irq);
111}
112
113/***************************************************************************/
114
115static void m5272_cpu_reset(void)
116{
117 local_irq_disable();
118 /* Set watchdog to reset, and enabled */
119 __raw_writew(0, MCF_MBAR + MCFSIM_WIRR);
120 __raw_writew(1, MCF_MBAR + MCFSIM_WRRR);
121 __raw_writew(0, MCF_MBAR + MCFSIM_WCR);
122 for (;;)
123 /* wait for watchdog to timeout */;
124}
125
126/***************************************************************************/
127
128void __init config_BSP(char *commandp, int size)
129{
130#if defined (CONFIG_MOD5272)
131 volatile unsigned char *pivrp;
132
133 /* Set base of device vectors to be 64 */
134 pivrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_PIVR);
135 *pivrp = 0x40;
136#endif
137
138#if defined(CONFIG_NETtel) || defined(CONFIG_SCALES)
139 /* Copy command line from FLASH to local buffer... */
140 memcpy(commandp, (char *) 0xf0004000, size);
141 commandp[size-1] = 0;
142#elif defined(CONFIG_CANCam)
143 /* Copy command line from FLASH to local buffer... */
144 memcpy(commandp, (char *) 0xf0010000, size);
145 commandp[size-1] = 0;
146#endif
147
148 mach_reset = m5272_cpu_reset;
149}
150
151/***************************************************************************/
152
153/*
154 * Some 5272 based boards have the FEC ethernet diectly connected to
155 * an ethernet switch. In this case we need to use the fixed phy type,
156 * and we need to declare it early in boot.
157 */
158static struct fixed_phy_status nettel_fixed_phy_status __initdata = {
159 .link = 1,
160 .speed = 100,
161 .duplex = 0,
162};
163
164/***************************************************************************/
165
166static int __init init_BSP(void)
167{
168 m5272_uarts_init();
169 fixed_phy_add(PHY_POLL, 0, &nettel_fixed_phy_status);
170 platform_add_devices(m5272_devices, ARRAY_SIZE(m5272_devices));
171 return 0;
172}
173
174arch_initcall(init_BSP);
175
176/***************************************************************************/
diff --git a/arch/m68k/platform/5272/gpio.c b/arch/m68k/platform/5272/gpio.c
new file mode 100644
index 000000000000..57ac10a5d7f7
--- /dev/null
+++ b/arch/m68k/platform/5272/gpio.c
@@ -0,0 +1,81 @@
1/*
2 * Coldfire generic GPIO support
3 *
4 * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14*/
15
16#include <linux/kernel.h>
17#include <linux/init.h>
18
19#include <asm/coldfire.h>
20#include <asm/mcfsim.h>
21#include <asm/mcfgpio.h>
22
23static struct mcf_gpio_chip mcf_gpio_chips[] = {
24 {
25 .gpio_chip = {
26 .label = "PA",
27 .request = mcf_gpio_request,
28 .free = mcf_gpio_free,
29 .direction_input = mcf_gpio_direction_input,
30 .direction_output = mcf_gpio_direction_output,
31 .get = mcf_gpio_get_value,
32 .set = mcf_gpio_set_value,
33 .ngpio = 16,
34 },
35 .pddr = (void __iomem *) MCFSIM_PADDR,
36 .podr = (void __iomem *) MCFSIM_PADAT,
37 .ppdr = (void __iomem *) MCFSIM_PADAT,
38 },
39 {
40 .gpio_chip = {
41 .label = "PB",
42 .request = mcf_gpio_request,
43 .free = mcf_gpio_free,
44 .direction_input = mcf_gpio_direction_input,
45 .direction_output = mcf_gpio_direction_output,
46 .get = mcf_gpio_get_value,
47 .set = mcf_gpio_set_value,
48 .base = 16,
49 .ngpio = 16,
50 },
51 .pddr = (void __iomem *) MCFSIM_PBDDR,
52 .podr = (void __iomem *) MCFSIM_PBDAT,
53 .ppdr = (void __iomem *) MCFSIM_PBDAT,
54 },
55 {
56 .gpio_chip = {
57 .label = "PC",
58 .request = mcf_gpio_request,
59 .free = mcf_gpio_free,
60 .direction_input = mcf_gpio_direction_input,
61 .direction_output = mcf_gpio_direction_output,
62 .get = mcf_gpio_get_value,
63 .set = mcf_gpio_set_value,
64 .base = 32,
65 .ngpio = 16,
66 },
67 .pddr = (void __iomem *) MCFSIM_PCDDR,
68 .podr = (void __iomem *) MCFSIM_PCDAT,
69 .ppdr = (void __iomem *) MCFSIM_PCDAT,
70 },
71};
72
73static int __init mcf_gpio_init(void)
74{
75 unsigned i = 0;
76 while (i < ARRAY_SIZE(mcf_gpio_chips))
77 (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
78 return 0;
79}
80
81core_initcall(mcf_gpio_init);
diff --git a/arch/m68k/platform/5272/intc.c b/arch/m68k/platform/5272/intc.c
new file mode 100644
index 000000000000..7e715dfe2819
--- /dev/null
+++ b/arch/m68k/platform/5272/intc.c
@@ -0,0 +1,187 @@
1/*
2 * intc.c -- interrupt controller or ColdFire 5272 SoC
3 *
4 * (C) Copyright 2009, Greg Ungerer <gerg@snapgear.com>
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/types.h>
12#include <linux/init.h>
13#include <linux/kernel.h>
14#include <linux/interrupt.h>
15#include <linux/kernel_stat.h>
16#include <linux/irq.h>
17#include <linux/io.h>
18#include <asm/coldfire.h>
19#include <asm/mcfsim.h>
20#include <asm/traps.h>
21
22/*
23 * The 5272 ColdFire interrupt controller is nothing like any other
24 * ColdFire interrupt controller - it truly is completely different.
25 * Given its age it is unlikely to be used on any other ColdFire CPU.
26 */
27
28/*
29 * The masking and priproty setting of interrupts on the 5272 is done
30 * via a set of 4 "Interrupt Controller Registers" (ICR). There is a
31 * loose mapping of vector number to register and internal bits, but
32 * a table is the easiest and quickest way to map them.
33 *
34 * Note that the external interrupts are edge triggered (unlike the
35 * internal interrupt sources which are level triggered). Which means
36 * they also need acknowledging via acknowledge bits.
37 */
38struct irqmap {
39 unsigned char icr;
40 unsigned char index;
41 unsigned char ack;
42};
43
44static struct irqmap intc_irqmap[MCFINT_VECMAX - MCFINT_VECBASE] = {
45 /*MCF_IRQ_SPURIOUS*/ { .icr = 0, .index = 0, .ack = 0, },
46 /*MCF_IRQ_EINT1*/ { .icr = MCFSIM_ICR1, .index = 28, .ack = 1, },
47 /*MCF_IRQ_EINT2*/ { .icr = MCFSIM_ICR1, .index = 24, .ack = 1, },
48 /*MCF_IRQ_EINT3*/ { .icr = MCFSIM_ICR1, .index = 20, .ack = 1, },
49 /*MCF_IRQ_EINT4*/ { .icr = MCFSIM_ICR1, .index = 16, .ack = 1, },
50 /*MCF_IRQ_TIMER1*/ { .icr = MCFSIM_ICR1, .index = 12, .ack = 0, },
51 /*MCF_IRQ_TIMER2*/ { .icr = MCFSIM_ICR1, .index = 8, .ack = 0, },
52 /*MCF_IRQ_TIMER3*/ { .icr = MCFSIM_ICR1, .index = 4, .ack = 0, },
53 /*MCF_IRQ_TIMER4*/ { .icr = MCFSIM_ICR1, .index = 0, .ack = 0, },
54 /*MCF_IRQ_UART1*/ { .icr = MCFSIM_ICR2, .index = 28, .ack = 0, },
55 /*MCF_IRQ_UART2*/ { .icr = MCFSIM_ICR2, .index = 24, .ack = 0, },
56 /*MCF_IRQ_PLIP*/ { .icr = MCFSIM_ICR2, .index = 20, .ack = 0, },
57 /*MCF_IRQ_PLIA*/ { .icr = MCFSIM_ICR2, .index = 16, .ack = 0, },
58 /*MCF_IRQ_USB0*/ { .icr = MCFSIM_ICR2, .index = 12, .ack = 0, },
59 /*MCF_IRQ_USB1*/ { .icr = MCFSIM_ICR2, .index = 8, .ack = 0, },
60 /*MCF_IRQ_USB2*/ { .icr = MCFSIM_ICR2, .index = 4, .ack = 0, },
61 /*MCF_IRQ_USB3*/ { .icr = MCFSIM_ICR2, .index = 0, .ack = 0, },
62 /*MCF_IRQ_USB4*/ { .icr = MCFSIM_ICR3, .index = 28, .ack = 0, },
63 /*MCF_IRQ_USB5*/ { .icr = MCFSIM_ICR3, .index = 24, .ack = 0, },
64 /*MCF_IRQ_USB6*/ { .icr = MCFSIM_ICR3, .index = 20, .ack = 0, },
65 /*MCF_IRQ_USB7*/ { .icr = MCFSIM_ICR3, .index = 16, .ack = 0, },
66 /*MCF_IRQ_DMA*/ { .icr = MCFSIM_ICR3, .index = 12, .ack = 0, },
67 /*MCF_IRQ_ERX*/ { .icr = MCFSIM_ICR3, .index = 8, .ack = 0, },
68 /*MCF_IRQ_ETX*/ { .icr = MCFSIM_ICR3, .index = 4, .ack = 0, },
69 /*MCF_IRQ_ENTC*/ { .icr = MCFSIM_ICR3, .index = 0, .ack = 0, },
70 /*MCF_IRQ_QSPI*/ { .icr = MCFSIM_ICR4, .index = 28, .ack = 0, },
71 /*MCF_IRQ_EINT5*/ { .icr = MCFSIM_ICR4, .index = 24, .ack = 1, },
72 /*MCF_IRQ_EINT6*/ { .icr = MCFSIM_ICR4, .index = 20, .ack = 1, },
73 /*MCF_IRQ_SWTO*/ { .icr = MCFSIM_ICR4, .index = 16, .ack = 0, },
74};
75
76/*
77 * The act of masking the interrupt also has a side effect of 'ack'ing
78 * an interrupt on this irq (for the external irqs). So this mask function
79 * is also an ack_mask function.
80 */
81static void intc_irq_mask(struct irq_data *d)
82{
83 unsigned int irq = d->irq;
84
85 if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECMAX)) {
86 u32 v;
87 irq -= MCFINT_VECBASE;
88 v = 0x8 << intc_irqmap[irq].index;
89 writel(v, MCF_MBAR + intc_irqmap[irq].icr);
90 }
91}
92
93static void intc_irq_unmask(struct irq_data *d)
94{
95 unsigned int irq = d->irq;
96
97 if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECMAX)) {
98 u32 v;
99 irq -= MCFINT_VECBASE;
100 v = 0xd << intc_irqmap[irq].index;
101 writel(v, MCF_MBAR + intc_irqmap[irq].icr);
102 }
103}
104
105static void intc_irq_ack(struct irq_data *d)
106{
107 unsigned int irq = d->irq;
108
109 /* Only external interrupts are acked */
110 if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECMAX)) {
111 irq -= MCFINT_VECBASE;
112 if (intc_irqmap[irq].ack) {
113 u32 v;
114 v = readl(MCF_MBAR + intc_irqmap[irq].icr);
115 v &= (0x7 << intc_irqmap[irq].index);
116 v |= (0x8 << intc_irqmap[irq].index);
117 writel(v, MCF_MBAR + intc_irqmap[irq].icr);
118 }
119 }
120}
121
122static int intc_irq_set_type(struct irq_data *d, unsigned int type)
123{
124 unsigned int irq = d->irq;
125
126 if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECMAX)) {
127 irq -= MCFINT_VECBASE;
128 if (intc_irqmap[irq].ack) {
129 u32 v;
130 v = readl(MCF_MBAR + MCFSIM_PITR);
131 if (type == IRQ_TYPE_EDGE_FALLING)
132 v &= ~(0x1 << (32 - irq));
133 else
134 v |= (0x1 << (32 - irq));
135 writel(v, MCF_MBAR + MCFSIM_PITR);
136 }
137 }
138 return 0;
139}
140
141/*
142 * Simple flow handler to deal with the external edge triggered interrupts.
143 * We need to be careful with the masking/acking due to the side effects
144 * of masking an interrupt.
145 */
146static void intc_external_irq(unsigned int irq, struct irq_desc *desc)
147{
148 irq_desc_get_chip(desc)->irq_ack(&desc->irq_data);
149 handle_simple_irq(irq, desc);
150}
151
152static struct irq_chip intc_irq_chip = {
153 .name = "CF-INTC",
154 .irq_mask = intc_irq_mask,
155 .irq_unmask = intc_irq_unmask,
156 .irq_mask_ack = intc_irq_mask,
157 .irq_ack = intc_irq_ack,
158 .irq_set_type = intc_irq_set_type,
159};
160
161void __init init_IRQ(void)
162{
163 int irq, edge;
164
165 init_vectors();
166
167 /* Mask all interrupt sources */
168 writel(0x88888888, MCF_MBAR + MCFSIM_ICR1);
169 writel(0x88888888, MCF_MBAR + MCFSIM_ICR2);
170 writel(0x88888888, MCF_MBAR + MCFSIM_ICR3);
171 writel(0x88888888, MCF_MBAR + MCFSIM_ICR4);
172
173 for (irq = 0; (irq < NR_IRQS); irq++) {
174 irq_set_chip(irq, &intc_irq_chip);
175 edge = 0;
176 if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECMAX))
177 edge = intc_irqmap[irq - MCFINT_VECBASE].ack;
178 if (edge) {
179 irq_set_irq_type(irq, IRQ_TYPE_EDGE_RISING);
180 irq_set_handler(irq, intc_external_irq);
181 } else {
182 irq_set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH);
183 irq_set_handler(irq, handle_level_irq);
184 }
185 }
186}
187
diff --git a/arch/m68k/platform/527x/Makefile b/arch/m68k/platform/527x/Makefile
new file mode 100644
index 000000000000..6ac4b57370ea
--- /dev/null
+++ b/arch/m68k/platform/527x/Makefile
@@ -0,0 +1,18 @@
1#
2# Makefile for the linux kernel.
3#
4
5#
6# If you want to play with the HW breakpoints then you will
7# need to add define this, which will give you a stack backtrace
8# on the console port whenever a DBG interrupt occurs. You have to
9# set up you HW breakpoints to trigger a DBG interrupt:
10#
11# ccflags-y := -DTRAP_DBG_INTERRUPT
12# asflags-y := -DTRAP_DBG_INTERRUPT
13#
14
15asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
16
17obj-y := config.o gpio.o
18
diff --git a/arch/m68k/platform/527x/config.c b/arch/m68k/platform/527x/config.c
new file mode 100644
index 000000000000..3ebc769cefda
--- /dev/null
+++ b/arch/m68k/platform/527x/config.c
@@ -0,0 +1,384 @@
1/***************************************************************************/
2
3/*
4 * linux/arch/m68knommu/platform/527x/config.c
5 *
6 * Sub-architcture dependent initialization code for the Freescale
7 * 5270/5271 CPUs.
8 *
9 * Copyright (C) 1999-2004, Greg Ungerer (gerg@snapgear.com)
10 * Copyright (C) 2001-2004, SnapGear Inc. (www.snapgear.com)
11 */
12
13/***************************************************************************/
14
15#include <linux/kernel.h>
16#include <linux/param.h>
17#include <linux/init.h>
18#include <linux/io.h>
19#include <linux/spi/spi.h>
20#include <linux/gpio.h>
21#include <asm/machdep.h>
22#include <asm/coldfire.h>
23#include <asm/mcfsim.h>
24#include <asm/mcfuart.h>
25#include <asm/mcfqspi.h>
26
27/***************************************************************************/
28
29static struct mcf_platform_uart m527x_uart_platform[] = {
30 {
31 .mapbase = MCFUART_BASE1,
32 .irq = MCFINT_VECBASE + MCFINT_UART0,
33 },
34 {
35 .mapbase = MCFUART_BASE2,
36 .irq = MCFINT_VECBASE + MCFINT_UART1,
37 },
38 {
39 .mapbase = MCFUART_BASE3,
40 .irq = MCFINT_VECBASE + MCFINT_UART2,
41 },
42 { },
43};
44
45static struct platform_device m527x_uart = {
46 .name = "mcfuart",
47 .id = 0,
48 .dev.platform_data = m527x_uart_platform,
49};
50
51static struct resource m527x_fec0_resources[] = {
52 {
53 .start = MCFFEC_BASE0,
54 .end = MCFFEC_BASE0 + MCFFEC_SIZE0 - 1,
55 .flags = IORESOURCE_MEM,
56 },
57 {
58 .start = 64 + 23,
59 .end = 64 + 23,
60 .flags = IORESOURCE_IRQ,
61 },
62 {
63 .start = 64 + 27,
64 .end = 64 + 27,
65 .flags = IORESOURCE_IRQ,
66 },
67 {
68 .start = 64 + 29,
69 .end = 64 + 29,
70 .flags = IORESOURCE_IRQ,
71 },
72};
73
74static struct resource m527x_fec1_resources[] = {
75 {
76 .start = MCFFEC_BASE1,
77 .end = MCFFEC_BASE1 + MCFFEC_SIZE1 - 1,
78 .flags = IORESOURCE_MEM,
79 },
80 {
81 .start = 128 + 23,
82 .end = 128 + 23,
83 .flags = IORESOURCE_IRQ,
84 },
85 {
86 .start = 128 + 27,
87 .end = 128 + 27,
88 .flags = IORESOURCE_IRQ,
89 },
90 {
91 .start = 128 + 29,
92 .end = 128 + 29,
93 .flags = IORESOURCE_IRQ,
94 },
95};
96
97static struct platform_device m527x_fec[] = {
98 {
99 .name = "fec",
100 .id = 0,
101 .num_resources = ARRAY_SIZE(m527x_fec0_resources),
102 .resource = m527x_fec0_resources,
103 },
104 {
105 .name = "fec",
106 .id = 1,
107 .num_resources = ARRAY_SIZE(m527x_fec1_resources),
108 .resource = m527x_fec1_resources,
109 },
110};
111
112#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
113static struct resource m527x_qspi_resources[] = {
114 {
115 .start = MCFQSPI_IOBASE,
116 .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1,
117 .flags = IORESOURCE_MEM,
118 },
119 {
120 .start = MCFINT_VECBASE + MCFINT_QSPI,
121 .end = MCFINT_VECBASE + MCFINT_QSPI,
122 .flags = IORESOURCE_IRQ,
123 },
124};
125
126#if defined(CONFIG_M5271)
127#define MCFQSPI_CS0 91
128#define MCFQSPI_CS1 92
129#define MCFQSPI_CS2 99
130#define MCFQSPI_CS3 103
131#elif defined(CONFIG_M5275)
132#define MCFQSPI_CS0 59
133#define MCFQSPI_CS1 60
134#define MCFQSPI_CS2 61
135#define MCFQSPI_CS3 62
136#endif
137
138static int m527x_cs_setup(struct mcfqspi_cs_control *cs_control)
139{
140 int status;
141
142 status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0");
143 if (status) {
144 pr_debug("gpio_request for MCFQSPI_CS0 failed\n");
145 goto fail0;
146 }
147 status = gpio_direction_output(MCFQSPI_CS0, 1);
148 if (status) {
149 pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n");
150 goto fail1;
151 }
152
153 status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1");
154 if (status) {
155 pr_debug("gpio_request for MCFQSPI_CS1 failed\n");
156 goto fail1;
157 }
158 status = gpio_direction_output(MCFQSPI_CS1, 1);
159 if (status) {
160 pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n");
161 goto fail2;
162 }
163
164 status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2");
165 if (status) {
166 pr_debug("gpio_request for MCFQSPI_CS2 failed\n");
167 goto fail2;
168 }
169 status = gpio_direction_output(MCFQSPI_CS2, 1);
170 if (status) {
171 pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n");
172 goto fail3;
173 }
174
175 status = gpio_request(MCFQSPI_CS3, "MCFQSPI_CS3");
176 if (status) {
177 pr_debug("gpio_request for MCFQSPI_CS3 failed\n");
178 goto fail3;
179 }
180 status = gpio_direction_output(MCFQSPI_CS3, 1);
181 if (status) {
182 pr_debug("gpio_direction_output for MCFQSPI_CS3 failed\n");
183 goto fail4;
184 }
185
186 return 0;
187
188fail4:
189 gpio_free(MCFQSPI_CS3);
190fail3:
191 gpio_free(MCFQSPI_CS2);
192fail2:
193 gpio_free(MCFQSPI_CS1);
194fail1:
195 gpio_free(MCFQSPI_CS0);
196fail0:
197 return status;
198}
199
200static void m527x_cs_teardown(struct mcfqspi_cs_control *cs_control)
201{
202 gpio_free(MCFQSPI_CS3);
203 gpio_free(MCFQSPI_CS2);
204 gpio_free(MCFQSPI_CS1);
205 gpio_free(MCFQSPI_CS0);
206}
207
208static void m527x_cs_select(struct mcfqspi_cs_control *cs_control,
209 u8 chip_select, bool cs_high)
210{
211 switch (chip_select) {
212 case 0:
213 gpio_set_value(MCFQSPI_CS0, cs_high);
214 break;
215 case 1:
216 gpio_set_value(MCFQSPI_CS1, cs_high);
217 break;
218 case 2:
219 gpio_set_value(MCFQSPI_CS2, cs_high);
220 break;
221 case 3:
222 gpio_set_value(MCFQSPI_CS3, cs_high);
223 break;
224 }
225}
226
227static void m527x_cs_deselect(struct mcfqspi_cs_control *cs_control,
228 u8 chip_select, bool cs_high)
229{
230 switch (chip_select) {
231 case 0:
232 gpio_set_value(MCFQSPI_CS0, !cs_high);
233 break;
234 case 1:
235 gpio_set_value(MCFQSPI_CS1, !cs_high);
236 break;
237 case 2:
238 gpio_set_value(MCFQSPI_CS2, !cs_high);
239 break;
240 case 3:
241 gpio_set_value(MCFQSPI_CS3, !cs_high);
242 break;
243 }
244}
245
246static struct mcfqspi_cs_control m527x_cs_control = {
247 .setup = m527x_cs_setup,
248 .teardown = m527x_cs_teardown,
249 .select = m527x_cs_select,
250 .deselect = m527x_cs_deselect,
251};
252
253static struct mcfqspi_platform_data m527x_qspi_data = {
254 .bus_num = 0,
255 .num_chipselect = 4,
256 .cs_control = &m527x_cs_control,
257};
258
259static struct platform_device m527x_qspi = {
260 .name = "mcfqspi",
261 .id = 0,
262 .num_resources = ARRAY_SIZE(m527x_qspi_resources),
263 .resource = m527x_qspi_resources,
264 .dev.platform_data = &m527x_qspi_data,
265};
266
267static void __init m527x_qspi_init(void)
268{
269#if defined(CONFIG_M5271)
270 u16 par;
271
272 /* setup QSPS pins for QSPI with gpio CS control */
273 writeb(0x1f, MCFGPIO_PAR_QSPI);
274 /* and CS2 & CS3 as gpio */
275 par = readw(MCFGPIO_PAR_TIMER);
276 par &= 0x3f3f;
277 writew(par, MCFGPIO_PAR_TIMER);
278#elif defined(CONFIG_M5275)
279 /* setup QSPS pins for QSPI with gpio CS control */
280 writew(0x003e, MCFGPIO_PAR_QSPI);
281#endif
282}
283#endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */
284
285static struct platform_device *m527x_devices[] __initdata = {
286 &m527x_uart,
287 &m527x_fec[0],
288#ifdef CONFIG_FEC2
289 &m527x_fec[1],
290#endif
291#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
292 &m527x_qspi,
293#endif
294};
295
296/***************************************************************************/
297
298static void __init m527x_uart_init_line(int line, int irq)
299{
300 u16 sepmask;
301
302 if ((line < 0) || (line > 2))
303 return;
304
305 /*
306 * External Pin Mask Setting & Enable External Pin for Interface
307 */
308 sepmask = readw(MCF_IPSBAR + MCF_GPIO_PAR_UART);
309 if (line == 0)
310 sepmask |= UART0_ENABLE_MASK;
311 else if (line == 1)
312 sepmask |= UART1_ENABLE_MASK;
313 else if (line == 2)
314 sepmask |= UART2_ENABLE_MASK;
315 writew(sepmask, MCF_IPSBAR + MCF_GPIO_PAR_UART);
316}
317
318static void __init m527x_uarts_init(void)
319{
320 const int nrlines = ARRAY_SIZE(m527x_uart_platform);
321 int line;
322
323 for (line = 0; (line < nrlines); line++)
324 m527x_uart_init_line(line, m527x_uart_platform[line].irq);
325}
326
327/***************************************************************************/
328
329static void __init m527x_fec_init(void)
330{
331 u16 par;
332 u8 v;
333
334 /* Set multi-function pins to ethernet mode for fec0 */
335#if defined(CONFIG_M5271)
336 v = readb(MCF_IPSBAR + 0x100047);
337 writeb(v | 0xf0, MCF_IPSBAR + 0x100047);
338#else
339 par = readw(MCF_IPSBAR + 0x100082);
340 writew(par | 0xf00, MCF_IPSBAR + 0x100082);
341 v = readb(MCF_IPSBAR + 0x100078);
342 writeb(v | 0xc0, MCF_IPSBAR + 0x100078);
343#endif
344
345#ifdef CONFIG_FEC2
346 /* Set multi-function pins to ethernet mode for fec1 */
347 par = readw(MCF_IPSBAR + 0x100082);
348 writew(par | 0xa0, MCF_IPSBAR + 0x100082);
349 v = readb(MCF_IPSBAR + 0x100079);
350 writeb(v | 0xc0, MCF_IPSBAR + 0x100079);
351#endif
352}
353
354/***************************************************************************/
355
356static void m527x_cpu_reset(void)
357{
358 local_irq_disable();
359 __raw_writeb(MCF_RCR_SWRESET, MCF_IPSBAR + MCF_RCR);
360}
361
362/***************************************************************************/
363
364void __init config_BSP(char *commandp, int size)
365{
366 mach_reset = m527x_cpu_reset;
367 m527x_uarts_init();
368 m527x_fec_init();
369#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
370 m527x_qspi_init();
371#endif
372}
373
374/***************************************************************************/
375
376static int __init init_BSP(void)
377{
378 platform_add_devices(m527x_devices, ARRAY_SIZE(m527x_devices));
379 return 0;
380}
381
382arch_initcall(init_BSP);
383
384/***************************************************************************/
diff --git a/arch/m68k/platform/527x/gpio.c b/arch/m68k/platform/527x/gpio.c
new file mode 100644
index 000000000000..205da0aa0f2d
--- /dev/null
+++ b/arch/m68k/platform/527x/gpio.c
@@ -0,0 +1,609 @@
1/*
2 * Coldfire generic GPIO support
3 *
4 * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14*/
15
16#include <linux/kernel.h>
17#include <linux/init.h>
18
19#include <asm/coldfire.h>
20#include <asm/mcfsim.h>
21#include <asm/mcfgpio.h>
22
23static struct mcf_gpio_chip mcf_gpio_chips[] = {
24#if defined(CONFIG_M5271)
25 {
26 .gpio_chip = {
27 .label = "PIRQ",
28 .request = mcf_gpio_request,
29 .free = mcf_gpio_free,
30 .direction_input = mcf_gpio_direction_input,
31 .direction_output = mcf_gpio_direction_output,
32 .get = mcf_gpio_get_value,
33 .set = mcf_gpio_set_value,
34 .base = 1,
35 .ngpio = 7,
36 },
37 .pddr = (void __iomem *) MCFEPORT_EPDDR,
38 .podr = (void __iomem *) MCFEPORT_EPDR,
39 .ppdr = (void __iomem *) MCFEPORT_EPPDR,
40 },
41 {
42 .gpio_chip = {
43 .label = "ADDR",
44 .request = mcf_gpio_request,
45 .free = mcf_gpio_free,
46 .direction_input = mcf_gpio_direction_input,
47 .direction_output = mcf_gpio_direction_output,
48 .get = mcf_gpio_get_value,
49 .set = mcf_gpio_set_value_fast,
50 .base = 13,
51 .ngpio = 3,
52 },
53 .pddr = (void __iomem *) MCFGPIO_PDDR_ADDR,
54 .podr = (void __iomem *) MCFGPIO_PODR_ADDR,
55 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_ADDR,
56 .setr = (void __iomem *) MCFGPIO_PPDSDR_ADDR,
57 .clrr = (void __iomem *) MCFGPIO_PCLRR_ADDR,
58 },
59 {
60 .gpio_chip = {
61 .label = "DATAH",
62 .request = mcf_gpio_request,
63 .free = mcf_gpio_free,
64 .direction_input = mcf_gpio_direction_input,
65 .direction_output = mcf_gpio_direction_output,
66 .get = mcf_gpio_get_value,
67 .set = mcf_gpio_set_value_fast,
68 .base = 16,
69 .ngpio = 8,
70 },
71 .pddr = (void __iomem *) MCFGPIO_PDDR_DATAH,
72 .podr = (void __iomem *) MCFGPIO_PODR_DATAH,
73 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_DATAH,
74 .setr = (void __iomem *) MCFGPIO_PPDSDR_DATAH,
75 .clrr = (void __iomem *) MCFGPIO_PCLRR_DATAH,
76 },
77 {
78 .gpio_chip = {
79 .label = "DATAL",
80 .request = mcf_gpio_request,
81 .free = mcf_gpio_free,
82 .direction_input = mcf_gpio_direction_input,
83 .direction_output = mcf_gpio_direction_output,
84 .get = mcf_gpio_get_value,
85 .set = mcf_gpio_set_value_fast,
86 .base = 24,
87 .ngpio = 8,
88 },
89 .pddr = (void __iomem *) MCFGPIO_PDDR_DATAL,
90 .podr = (void __iomem *) MCFGPIO_PODR_DATAL,
91 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_DATAL,
92 .setr = (void __iomem *) MCFGPIO_PPDSDR_DATAL,
93 .clrr = (void __iomem *) MCFGPIO_PCLRR_DATAL,
94 },
95 {
96 .gpio_chip = {
97 .label = "BUSCTL",
98 .request = mcf_gpio_request,
99 .free = mcf_gpio_free,
100 .direction_input = mcf_gpio_direction_input,
101 .direction_output = mcf_gpio_direction_output,
102 .get = mcf_gpio_get_value,
103 .set = mcf_gpio_set_value_fast,
104 .base = 32,
105 .ngpio = 8,
106 },
107 .pddr = (void __iomem *) MCFGPIO_PDDR_BUSCTL,
108 .podr = (void __iomem *) MCFGPIO_PODR_BUSCTL,
109 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
110 .setr = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
111 .clrr = (void __iomem *) MCFGPIO_PCLRR_BUSCTL,
112 },
113 {
114 .gpio_chip = {
115 .label = "BS",
116 .request = mcf_gpio_request,
117 .free = mcf_gpio_free,
118 .direction_input = mcf_gpio_direction_input,
119 .direction_output = mcf_gpio_direction_output,
120 .get = mcf_gpio_get_value,
121 .set = mcf_gpio_set_value_fast,
122 .base = 40,
123 .ngpio = 4,
124 },
125 .pddr = (void __iomem *) MCFGPIO_PDDR_BS,
126 .podr = (void __iomem *) MCFGPIO_PODR_BS,
127 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_BS,
128 .setr = (void __iomem *) MCFGPIO_PPDSDR_BS,
129 .clrr = (void __iomem *) MCFGPIO_PCLRR_BS,
130 },
131 {
132 .gpio_chip = {
133 .label = "CS",
134 .request = mcf_gpio_request,
135 .free = mcf_gpio_free,
136 .direction_input = mcf_gpio_direction_input,
137 .direction_output = mcf_gpio_direction_output,
138 .get = mcf_gpio_get_value,
139 .set = mcf_gpio_set_value_fast,
140 .base = 49,
141 .ngpio = 7,
142 },
143 .pddr = (void __iomem *) MCFGPIO_PDDR_CS,
144 .podr = (void __iomem *) MCFGPIO_PODR_CS,
145 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_CS,
146 .setr = (void __iomem *) MCFGPIO_PPDSDR_CS,
147 .clrr = (void __iomem *) MCFGPIO_PCLRR_CS,
148 },
149 {
150 .gpio_chip = {
151 .label = "SDRAM",
152 .request = mcf_gpio_request,
153 .free = mcf_gpio_free,
154 .direction_input = mcf_gpio_direction_input,
155 .direction_output = mcf_gpio_direction_output,
156 .get = mcf_gpio_get_value,
157 .set = mcf_gpio_set_value_fast,
158 .base = 56,
159 .ngpio = 6,
160 },
161 .pddr = (void __iomem *) MCFGPIO_PDDR_SDRAM,
162 .podr = (void __iomem *) MCFGPIO_PODR_SDRAM,
163 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_SDRAM,
164 .setr = (void __iomem *) MCFGPIO_PPDSDR_SDRAM,
165 .clrr = (void __iomem *) MCFGPIO_PCLRR_SDRAM,
166 },
167 {
168 .gpio_chip = {
169 .label = "FECI2C",
170 .request = mcf_gpio_request,
171 .free = mcf_gpio_free,
172 .direction_input = mcf_gpio_direction_input,
173 .direction_output = mcf_gpio_direction_output,
174 .get = mcf_gpio_get_value,
175 .set = mcf_gpio_set_value_fast,
176 .base = 64,
177 .ngpio = 4,
178 },
179 .pddr = (void __iomem *) MCFGPIO_PDDR_FECI2C,
180 .podr = (void __iomem *) MCFGPIO_PODR_FECI2C,
181 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
182 .setr = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
183 .clrr = (void __iomem *) MCFGPIO_PCLRR_FECI2C,
184 },
185 {
186 .gpio_chip = {
187 .label = "UARTH",
188 .request = mcf_gpio_request,
189 .free = mcf_gpio_free,
190 .direction_input = mcf_gpio_direction_input,
191 .direction_output = mcf_gpio_direction_output,
192 .get = mcf_gpio_get_value,
193 .set = mcf_gpio_set_value_fast,
194 .base = 72,
195 .ngpio = 2,
196 },
197 .pddr = (void __iomem *) MCFGPIO_PDDR_UARTH,
198 .podr = (void __iomem *) MCFGPIO_PODR_UARTH,
199 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_UARTH,
200 .setr = (void __iomem *) MCFGPIO_PPDSDR_UARTH,
201 .clrr = (void __iomem *) MCFGPIO_PCLRR_UARTH,
202 },
203 {
204 .gpio_chip = {
205 .label = "UARTL",
206 .request = mcf_gpio_request,
207 .free = mcf_gpio_free,
208 .direction_input = mcf_gpio_direction_input,
209 .direction_output = mcf_gpio_direction_output,
210 .get = mcf_gpio_get_value,
211 .set = mcf_gpio_set_value_fast,
212 .base = 80,
213 .ngpio = 8,
214 },
215 .pddr = (void __iomem *) MCFGPIO_PDDR_UARTL,
216 .podr = (void __iomem *) MCFGPIO_PODR_UARTL,
217 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_UARTL,
218 .setr = (void __iomem *) MCFGPIO_PPDSDR_UARTL,
219 .clrr = (void __iomem *) MCFGPIO_PCLRR_UARTL,
220 },
221 {
222 .gpio_chip = {
223 .label = "QSPI",
224 .request = mcf_gpio_request,
225 .free = mcf_gpio_free,
226 .direction_input = mcf_gpio_direction_input,
227 .direction_output = mcf_gpio_direction_output,
228 .get = mcf_gpio_get_value,
229 .set = mcf_gpio_set_value_fast,
230 .base = 88,
231 .ngpio = 5,
232 },
233 .pddr = (void __iomem *) MCFGPIO_PDDR_QSPI,
234 .podr = (void __iomem *) MCFGPIO_PODR_QSPI,
235 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
236 .setr = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
237 .clrr = (void __iomem *) MCFGPIO_PCLRR_QSPI,
238 },
239 {
240 .gpio_chip = {
241 .label = "TIMER",
242 .request = mcf_gpio_request,
243 .free = mcf_gpio_free,
244 .direction_input = mcf_gpio_direction_input,
245 .direction_output = mcf_gpio_direction_output,
246 .get = mcf_gpio_get_value,
247 .set = mcf_gpio_set_value_fast,
248 .base = 96,
249 .ngpio = 8,
250 },
251 .pddr = (void __iomem *) MCFGPIO_PDDR_TIMER,
252 .podr = (void __iomem *) MCFGPIO_PODR_TIMER,
253 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_TIMER,
254 .setr = (void __iomem *) MCFGPIO_PPDSDR_TIMER,
255 .clrr = (void __iomem *) MCFGPIO_PCLRR_TIMER,
256 },
257#elif defined(CONFIG_M5275)
258 {
259 .gpio_chip = {
260 .label = "PIRQ",
261 .request = mcf_gpio_request,
262 .free = mcf_gpio_free,
263 .direction_input = mcf_gpio_direction_input,
264 .direction_output = mcf_gpio_direction_output,
265 .get = mcf_gpio_get_value,
266 .set = mcf_gpio_set_value,
267 .base = 1,
268 .ngpio = 7,
269 },
270 .pddr = (void __iomem *) MCFEPORT_EPDDR,
271 .podr = (void __iomem *) MCFEPORT_EPDR,
272 .ppdr = (void __iomem *) MCFEPORT_EPPDR,
273 },
274 {
275 .gpio_chip = {
276 .label = "BUSCTL",
277 .request = mcf_gpio_request,
278 .free = mcf_gpio_free,
279 .direction_input = mcf_gpio_direction_input,
280 .direction_output = mcf_gpio_direction_output,
281 .get = mcf_gpio_get_value,
282 .set = mcf_gpio_set_value_fast,
283 .base = 8,
284 .ngpio = 8,
285 },
286 .pddr = (void __iomem *) MCFGPIO_PDDR_BUSCTL,
287 .podr = (void __iomem *) MCFGPIO_PODR_BUSCTL,
288 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
289 .setr = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
290 .clrr = (void __iomem *) MCFGPIO_PCLRR_BUSCTL,
291 },
292 {
293 .gpio_chip = {
294 .label = "ADDR",
295 .request = mcf_gpio_request,
296 .free = mcf_gpio_free,
297 .direction_input = mcf_gpio_direction_input,
298 .direction_output = mcf_gpio_direction_output,
299 .get = mcf_gpio_get_value,
300 .set = mcf_gpio_set_value_fast,
301 .base = 21,
302 .ngpio = 3,
303 },
304 .pddr = (void __iomem *) MCFGPIO_PDDR_ADDR,
305 .podr = (void __iomem *) MCFGPIO_PODR_ADDR,
306 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_ADDR,
307 .setr = (void __iomem *) MCFGPIO_PPDSDR_ADDR,
308 .clrr = (void __iomem *) MCFGPIO_PCLRR_ADDR,
309 },
310 {
311 .gpio_chip = {
312 .label = "CS",
313 .request = mcf_gpio_request,
314 .free = mcf_gpio_free,
315 .direction_input = mcf_gpio_direction_input,
316 .direction_output = mcf_gpio_direction_output,
317 .get = mcf_gpio_get_value,
318 .set = mcf_gpio_set_value_fast,
319 .base = 25,
320 .ngpio = 7,
321 },
322 .pddr = (void __iomem *) MCFGPIO_PDDR_CS,
323 .podr = (void __iomem *) MCFGPIO_PODR_CS,
324 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_CS,
325 .setr = (void __iomem *) MCFGPIO_PPDSDR_CS,
326 .clrr = (void __iomem *) MCFGPIO_PCLRR_CS,
327 },
328 {
329 .gpio_chip = {
330 .label = "FEC0H",
331 .request = mcf_gpio_request,
332 .free = mcf_gpio_free,
333 .direction_input = mcf_gpio_direction_input,
334 .direction_output = mcf_gpio_direction_output,
335 .get = mcf_gpio_get_value,
336 .set = mcf_gpio_set_value_fast,
337 .base = 32,
338 .ngpio = 8,
339 },
340 .pddr = (void __iomem *) MCFGPIO_PDDR_FEC0H,
341 .podr = (void __iomem *) MCFGPIO_PODR_FEC0H,
342 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FEC0H,
343 .setr = (void __iomem *) MCFGPIO_PPDSDR_FEC0H,
344 .clrr = (void __iomem *) MCFGPIO_PCLRR_FEC0H,
345 },
346 {
347 .gpio_chip = {
348 .label = "FEC0L",
349 .request = mcf_gpio_request,
350 .free = mcf_gpio_free,
351 .direction_input = mcf_gpio_direction_input,
352 .direction_output = mcf_gpio_direction_output,
353 .get = mcf_gpio_get_value,
354 .set = mcf_gpio_set_value_fast,
355 .base = 40,
356 .ngpio = 8,
357 },
358 .pddr = (void __iomem *) MCFGPIO_PDDR_FEC0L,
359 .podr = (void __iomem *) MCFGPIO_PODR_FEC0L,
360 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FEC0L,
361 .setr = (void __iomem *) MCFGPIO_PPDSDR_FEC0L,
362 .clrr = (void __iomem *) MCFGPIO_PCLRR_FEC0L,
363 },
364 {
365 .gpio_chip = {
366 .label = "FECI2C",
367 .request = mcf_gpio_request,
368 .free = mcf_gpio_free,
369 .direction_input = mcf_gpio_direction_input,
370 .direction_output = mcf_gpio_direction_output,
371 .get = mcf_gpio_get_value,
372 .set = mcf_gpio_set_value_fast,
373 .base = 48,
374 .ngpio = 6,
375 },
376 .pddr = (void __iomem *) MCFGPIO_PDDR_FECI2C,
377 .podr = (void __iomem *) MCFGPIO_PODR_FECI2C,
378 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
379 .setr = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
380 .clrr = (void __iomem *) MCFGPIO_PCLRR_FECI2C,
381 },
382 {
383 .gpio_chip = {
384 .label = "QSPI",
385 .request = mcf_gpio_request,
386 .free = mcf_gpio_free,
387 .direction_input = mcf_gpio_direction_input,
388 .direction_output = mcf_gpio_direction_output,
389 .get = mcf_gpio_get_value,
390 .set = mcf_gpio_set_value_fast,
391 .base = 56,
392 .ngpio = 7,
393 },
394 .pddr = (void __iomem *) MCFGPIO_PDDR_QSPI,
395 .podr = (void __iomem *) MCFGPIO_PODR_QSPI,
396 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
397 .setr = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
398 .clrr = (void __iomem *) MCFGPIO_PCLRR_QSPI,
399 },
400 {
401 .gpio_chip = {
402 .label = "SDRAM",
403 .request = mcf_gpio_request,
404 .free = mcf_gpio_free,
405 .direction_input = mcf_gpio_direction_input,
406 .direction_output = mcf_gpio_direction_output,
407 .get = mcf_gpio_get_value,
408 .set = mcf_gpio_set_value_fast,
409 .base = 64,
410 .ngpio = 8,
411 },
412 .pddr = (void __iomem *) MCFGPIO_PDDR_SDRAM,
413 .podr = (void __iomem *) MCFGPIO_PODR_SDRAM,
414 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_SDRAM,
415 .setr = (void __iomem *) MCFGPIO_PPDSDR_SDRAM,
416 .clrr = (void __iomem *) MCFGPIO_PCLRR_SDRAM,
417 },
418 {
419 .gpio_chip = {
420 .label = "TIMERH",
421 .request = mcf_gpio_request,
422 .free = mcf_gpio_free,
423 .direction_input = mcf_gpio_direction_input,
424 .direction_output = mcf_gpio_direction_output,
425 .get = mcf_gpio_get_value,
426 .set = mcf_gpio_set_value_fast,
427 .base = 72,
428 .ngpio = 4,
429 },
430 .pddr = (void __iomem *) MCFGPIO_PDDR_TIMERH,
431 .podr = (void __iomem *) MCFGPIO_PODR_TIMERH,
432 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_TIMERH,
433 .setr = (void __iomem *) MCFGPIO_PPDSDR_TIMERH,
434 .clrr = (void __iomem *) MCFGPIO_PCLRR_TIMERH,
435 },
436 {
437 .gpio_chip = {
438 .label = "TIMERL",
439 .request = mcf_gpio_request,
440 .free = mcf_gpio_free,
441 .direction_input = mcf_gpio_direction_input,
442 .direction_output = mcf_gpio_direction_output,
443 .get = mcf_gpio_get_value,
444 .set = mcf_gpio_set_value_fast,
445 .base = 80,
446 .ngpio = 4,
447 },
448 .pddr = (void __iomem *) MCFGPIO_PDDR_TIMERL,
449 .podr = (void __iomem *) MCFGPIO_PODR_TIMERL,
450 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_TIMERL,
451 .setr = (void __iomem *) MCFGPIO_PPDSDR_TIMERL,
452 .clrr = (void __iomem *) MCFGPIO_PCLRR_TIMERL,
453 },
454 {
455 .gpio_chip = {
456 .label = "UARTL",
457 .request = mcf_gpio_request,
458 .free = mcf_gpio_free,
459 .direction_input = mcf_gpio_direction_input,
460 .direction_output = mcf_gpio_direction_output,
461 .get = mcf_gpio_get_value,
462 .set = mcf_gpio_set_value_fast,
463 .base = 88,
464 .ngpio = 8,
465 },
466 .pddr = (void __iomem *) MCFGPIO_PDDR_UARTL,
467 .podr = (void __iomem *) MCFGPIO_PODR_UARTL,
468 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_UARTL,
469 .setr = (void __iomem *) MCFGPIO_PPDSDR_UARTL,
470 .clrr = (void __iomem *) MCFGPIO_PCLRR_UARTL,
471 },
472 {
473 .gpio_chip = {
474 .label = "FEC1H",
475 .request = mcf_gpio_request,
476 .free = mcf_gpio_free,
477 .direction_input = mcf_gpio_direction_input,
478 .direction_output = mcf_gpio_direction_output,
479 .get = mcf_gpio_get_value,
480 .set = mcf_gpio_set_value_fast,
481 .base = 96,
482 .ngpio = 8,
483 },
484 .pddr = (void __iomem *) MCFGPIO_PDDR_FEC1H,
485 .podr = (void __iomem *) MCFGPIO_PODR_FEC1H,
486 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FEC1H,
487 .setr = (void __iomem *) MCFGPIO_PPDSDR_FEC1H,
488 .clrr = (void __iomem *) MCFGPIO_PCLRR_FEC1H,
489 },
490 {
491 .gpio_chip = {
492 .label = "FEC1L",
493 .request = mcf_gpio_request,
494 .free = mcf_gpio_free,
495 .direction_input = mcf_gpio_direction_input,
496 .direction_output = mcf_gpio_direction_output,
497 .get = mcf_gpio_get_value,
498 .set = mcf_gpio_set_value_fast,
499 .base = 104,
500 .ngpio = 8,
501 },
502 .pddr = (void __iomem *) MCFGPIO_PDDR_FEC1L,
503 .podr = (void __iomem *) MCFGPIO_PODR_FEC1L,
504 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FEC1L,
505 .setr = (void __iomem *) MCFGPIO_PPDSDR_FEC1L,
506 .clrr = (void __iomem *) MCFGPIO_PCLRR_FEC1L,
507 },
508 {
509 .gpio_chip = {
510 .label = "BS",
511 .request = mcf_gpio_request,
512 .free = mcf_gpio_free,
513 .direction_input = mcf_gpio_direction_input,
514 .direction_output = mcf_gpio_direction_output,
515 .get = mcf_gpio_get_value,
516 .set = mcf_gpio_set_value_fast,
517 .base = 114,
518 .ngpio = 2,
519 },
520 .pddr = (void __iomem *) MCFGPIO_PDDR_BS,
521 .podr = (void __iomem *) MCFGPIO_PODR_BS,
522 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_BS,
523 .setr = (void __iomem *) MCFGPIO_PPDSDR_BS,
524 .clrr = (void __iomem *) MCFGPIO_PCLRR_BS,
525 },
526 {
527 .gpio_chip = {
528 .label = "IRQ",
529 .request = mcf_gpio_request,
530 .free = mcf_gpio_free,
531 .direction_input = mcf_gpio_direction_input,
532 .direction_output = mcf_gpio_direction_output,
533 .get = mcf_gpio_get_value,
534 .set = mcf_gpio_set_value_fast,
535 .base = 121,
536 .ngpio = 7,
537 },
538 .pddr = (void __iomem *) MCFGPIO_PDDR_IRQ,
539 .podr = (void __iomem *) MCFGPIO_PODR_IRQ,
540 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_IRQ,
541 .setr = (void __iomem *) MCFGPIO_PPDSDR_IRQ,
542 .clrr = (void __iomem *) MCFGPIO_PCLRR_IRQ,
543 },
544 {
545 .gpio_chip = {
546 .label = "USBH",
547 .request = mcf_gpio_request,
548 .free = mcf_gpio_free,
549 .direction_input = mcf_gpio_direction_input,
550 .direction_output = mcf_gpio_direction_output,
551 .get = mcf_gpio_get_value,
552 .set = mcf_gpio_set_value_fast,
553 .base = 128,
554 .ngpio = 1,
555 },
556 .pddr = (void __iomem *) MCFGPIO_PDDR_USBH,
557 .podr = (void __iomem *) MCFGPIO_PODR_USBH,
558 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_USBH,
559 .setr = (void __iomem *) MCFGPIO_PPDSDR_USBH,
560 .clrr = (void __iomem *) MCFGPIO_PCLRR_USBH,
561 },
562 {
563 .gpio_chip = {
564 .label = "USBL",
565 .request = mcf_gpio_request,
566 .free = mcf_gpio_free,
567 .direction_input = mcf_gpio_direction_input,
568 .direction_output = mcf_gpio_direction_output,
569 .get = mcf_gpio_get_value,
570 .set = mcf_gpio_set_value_fast,
571 .base = 136,
572 .ngpio = 8,
573 },
574 .pddr = (void __iomem *) MCFGPIO_PDDR_USBL,
575 .podr = (void __iomem *) MCFGPIO_PODR_USBL,
576 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_USBL,
577 .setr = (void __iomem *) MCFGPIO_PPDSDR_USBL,
578 .clrr = (void __iomem *) MCFGPIO_PCLRR_USBL,
579 },
580 {
581 .gpio_chip = {
582 .label = "UARTH",
583 .request = mcf_gpio_request,
584 .free = mcf_gpio_free,
585 .direction_input = mcf_gpio_direction_input,
586 .direction_output = mcf_gpio_direction_output,
587 .get = mcf_gpio_get_value,
588 .set = mcf_gpio_set_value_fast,
589 .base = 144,
590 .ngpio = 4,
591 },
592 .pddr = (void __iomem *) MCFGPIO_PDDR_UARTH,
593 .podr = (void __iomem *) MCFGPIO_PODR_UARTH,
594 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_UARTH,
595 .setr = (void __iomem *) MCFGPIO_PPDSDR_UARTH,
596 .clrr = (void __iomem *) MCFGPIO_PCLRR_UARTH,
597 },
598#endif
599};
600
601static int __init mcf_gpio_init(void)
602{
603 unsigned i = 0;
604 while (i < ARRAY_SIZE(mcf_gpio_chips))
605 (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
606 return 0;
607}
608
609core_initcall(mcf_gpio_init);
diff --git a/arch/m68k/platform/528x/Makefile b/arch/m68k/platform/528x/Makefile
new file mode 100644
index 000000000000..6ac4b57370ea
--- /dev/null
+++ b/arch/m68k/platform/528x/Makefile
@@ -0,0 +1,18 @@
1#
2# Makefile for the linux kernel.
3#
4
5#
6# If you want to play with the HW breakpoints then you will
7# need to add define this, which will give you a stack backtrace
8# on the console port whenever a DBG interrupt occurs. You have to
9# set up you HW breakpoints to trigger a DBG interrupt:
10#
11# ccflags-y := -DTRAP_DBG_INTERRUPT
12# asflags-y := -DTRAP_DBG_INTERRUPT
13#
14
15asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
16
17obj-y := config.o gpio.o
18
diff --git a/arch/m68k/platform/528x/config.c b/arch/m68k/platform/528x/config.c
new file mode 100644
index 000000000000..7abe77a2f3e3
--- /dev/null
+++ b/arch/m68k/platform/528x/config.c
@@ -0,0 +1,320 @@
1/***************************************************************************/
2
3/*
4 * linux/arch/m68knommu/platform/528x/config.c
5 *
6 * Sub-architcture dependent initialization code for the Freescale
7 * 5280, 5281 and 5282 CPUs.
8 *
9 * Copyright (C) 1999-2003, Greg Ungerer (gerg@snapgear.com)
10 * Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
11 */
12
13/***************************************************************************/
14
15#include <linux/kernel.h>
16#include <linux/param.h>
17#include <linux/init.h>
18#include <linux/platform_device.h>
19#include <linux/io.h>
20#include <linux/spi/spi.h>
21#include <linux/gpio.h>
22#include <asm/machdep.h>
23#include <asm/coldfire.h>
24#include <asm/mcfsim.h>
25#include <asm/mcfuart.h>
26#include <asm/mcfqspi.h>
27
28/***************************************************************************/
29
30static struct mcf_platform_uart m528x_uart_platform[] = {
31 {
32 .mapbase = MCFUART_BASE1,
33 .irq = MCFINT_VECBASE + MCFINT_UART0,
34 },
35 {
36 .mapbase = MCFUART_BASE2,
37 .irq = MCFINT_VECBASE + MCFINT_UART0 + 1,
38 },
39 {
40 .mapbase = MCFUART_BASE3,
41 .irq = MCFINT_VECBASE + MCFINT_UART0 + 2,
42 },
43 { },
44};
45
46static struct platform_device m528x_uart = {
47 .name = "mcfuart",
48 .id = 0,
49 .dev.platform_data = m528x_uart_platform,
50};
51
52static struct resource m528x_fec_resources[] = {
53 {
54 .start = MCFFEC_BASE,
55 .end = MCFFEC_BASE + MCFFEC_SIZE - 1,
56 .flags = IORESOURCE_MEM,
57 },
58 {
59 .start = 64 + 23,
60 .end = 64 + 23,
61 .flags = IORESOURCE_IRQ,
62 },
63 {
64 .start = 64 + 27,
65 .end = 64 + 27,
66 .flags = IORESOURCE_IRQ,
67 },
68 {
69 .start = 64 + 29,
70 .end = 64 + 29,
71 .flags = IORESOURCE_IRQ,
72 },
73};
74
75static struct platform_device m528x_fec = {
76 .name = "fec",
77 .id = 0,
78 .num_resources = ARRAY_SIZE(m528x_fec_resources),
79 .resource = m528x_fec_resources,
80};
81
82#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
83static struct resource m528x_qspi_resources[] = {
84 {
85 .start = MCFQSPI_IOBASE,
86 .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1,
87 .flags = IORESOURCE_MEM,
88 },
89 {
90 .start = MCFINT_VECBASE + MCFINT_QSPI,
91 .end = MCFINT_VECBASE + MCFINT_QSPI,
92 .flags = IORESOURCE_IRQ,
93 },
94};
95
96#define MCFQSPI_CS0 147
97#define MCFQSPI_CS1 148
98#define MCFQSPI_CS2 149
99#define MCFQSPI_CS3 150
100
101static int m528x_cs_setup(struct mcfqspi_cs_control *cs_control)
102{
103 int status;
104
105 status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0");
106 if (status) {
107 pr_debug("gpio_request for MCFQSPI_CS0 failed\n");
108 goto fail0;
109 }
110 status = gpio_direction_output(MCFQSPI_CS0, 1);
111 if (status) {
112 pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n");
113 goto fail1;
114 }
115
116 status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1");
117 if (status) {
118 pr_debug("gpio_request for MCFQSPI_CS1 failed\n");
119 goto fail1;
120 }
121 status = gpio_direction_output(MCFQSPI_CS1, 1);
122 if (status) {
123 pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n");
124 goto fail2;
125 }
126
127 status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2");
128 if (status) {
129 pr_debug("gpio_request for MCFQSPI_CS2 failed\n");
130 goto fail2;
131 }
132 status = gpio_direction_output(MCFQSPI_CS2, 1);
133 if (status) {
134 pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n");
135 goto fail3;
136 }
137
138 status = gpio_request(MCFQSPI_CS3, "MCFQSPI_CS3");
139 if (status) {
140 pr_debug("gpio_request for MCFQSPI_CS3 failed\n");
141 goto fail3;
142 }
143 status = gpio_direction_output(MCFQSPI_CS3, 1);
144 if (status) {
145 pr_debug("gpio_direction_output for MCFQSPI_CS3 failed\n");
146 goto fail4;
147 }
148
149 return 0;
150
151fail4:
152 gpio_free(MCFQSPI_CS3);
153fail3:
154 gpio_free(MCFQSPI_CS2);
155fail2:
156 gpio_free(MCFQSPI_CS1);
157fail1:
158 gpio_free(MCFQSPI_CS0);
159fail0:
160 return status;
161}
162
163static void m528x_cs_teardown(struct mcfqspi_cs_control *cs_control)
164{
165 gpio_free(MCFQSPI_CS3);
166 gpio_free(MCFQSPI_CS2);
167 gpio_free(MCFQSPI_CS1);
168 gpio_free(MCFQSPI_CS0);
169}
170
171static void m528x_cs_select(struct mcfqspi_cs_control *cs_control,
172 u8 chip_select, bool cs_high)
173{
174 gpio_set_value(MCFQSPI_CS0 + chip_select, cs_high);
175}
176
177static void m528x_cs_deselect(struct mcfqspi_cs_control *cs_control,
178 u8 chip_select, bool cs_high)
179{
180 gpio_set_value(MCFQSPI_CS0 + chip_select, !cs_high);
181}
182
183static struct mcfqspi_cs_control m528x_cs_control = {
184 .setup = m528x_cs_setup,
185 .teardown = m528x_cs_teardown,
186 .select = m528x_cs_select,
187 .deselect = m528x_cs_deselect,
188};
189
190static struct mcfqspi_platform_data m528x_qspi_data = {
191 .bus_num = 0,
192 .num_chipselect = 4,
193 .cs_control = &m528x_cs_control,
194};
195
196static struct platform_device m528x_qspi = {
197 .name = "mcfqspi",
198 .id = 0,
199 .num_resources = ARRAY_SIZE(m528x_qspi_resources),
200 .resource = m528x_qspi_resources,
201 .dev.platform_data = &m528x_qspi_data,
202};
203
204static void __init m528x_qspi_init(void)
205{
206 /* setup Port QS for QSPI with gpio CS control */
207 __raw_writeb(0x07, MCFGPIO_PQSPAR);
208}
209#endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */
210
211static struct platform_device *m528x_devices[] __initdata = {
212 &m528x_uart,
213 &m528x_fec,
214#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
215 &m528x_qspi,
216#endif
217};
218
219/***************************************************************************/
220
221static void __init m528x_uart_init_line(int line, int irq)
222{
223 u8 port;
224
225 if ((line < 0) || (line > 2))
226 return;
227
228 /* make sure PUAPAR is set for UART0 and UART1 */
229 if (line < 2) {
230 port = readb(MCF5282_GPIO_PUAPAR);
231 port |= (0x03 << (line * 2));
232 writeb(port, MCF5282_GPIO_PUAPAR);
233 }
234}
235
236static void __init m528x_uarts_init(void)
237{
238 const int nrlines = ARRAY_SIZE(m528x_uart_platform);
239 int line;
240
241 for (line = 0; (line < nrlines); line++)
242 m528x_uart_init_line(line, m528x_uart_platform[line].irq);
243}
244
245/***************************************************************************/
246
247static void __init m528x_fec_init(void)
248{
249 u16 v16;
250
251 /* Set multi-function pins to ethernet mode for fec0 */
252 v16 = readw(MCF_IPSBAR + 0x100056);
253 writew(v16 | 0xf00, MCF_IPSBAR + 0x100056);
254 writeb(0xc0, MCF_IPSBAR + 0x100058);
255}
256
257/***************************************************************************/
258
259static void m528x_cpu_reset(void)
260{
261 local_irq_disable();
262 __raw_writeb(MCF_RCR_SWRESET, MCF_IPSBAR + MCF_RCR);
263}
264
265/***************************************************************************/
266
267#ifdef CONFIG_WILDFIRE
268void wildfire_halt(void)
269{
270 writeb(0, 0x30000007);
271 writeb(0x2, 0x30000007);
272}
273#endif
274
275#ifdef CONFIG_WILDFIREMOD
276void wildfiremod_halt(void)
277{
278 printk(KERN_INFO "WildFireMod hibernating...\n");
279
280 /* Set portE.5 to Digital IO */
281 MCF5282_GPIO_PEPAR &= ~(1 << (5 * 2));
282
283 /* Make portE.5 an output */
284 MCF5282_GPIO_DDRE |= (1 << 5);
285
286 /* Now toggle portE.5 from low to high */
287 MCF5282_GPIO_PORTE &= ~(1 << 5);
288 MCF5282_GPIO_PORTE |= (1 << 5);
289
290 printk(KERN_EMERG "Failed to hibernate. Halting!\n");
291}
292#endif
293
294void __init config_BSP(char *commandp, int size)
295{
296#ifdef CONFIG_WILDFIRE
297 mach_halt = wildfire_halt;
298#endif
299#ifdef CONFIG_WILDFIREMOD
300 mach_halt = wildfiremod_halt;
301#endif
302}
303
304/***************************************************************************/
305
306static int __init init_BSP(void)
307{
308 mach_reset = m528x_cpu_reset;
309 m528x_uarts_init();
310 m528x_fec_init();
311#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
312 m528x_qspi_init();
313#endif
314 platform_add_devices(m528x_devices, ARRAY_SIZE(m528x_devices));
315 return 0;
316}
317
318arch_initcall(init_BSP);
319
320/***************************************************************************/
diff --git a/arch/m68k/platform/528x/gpio.c b/arch/m68k/platform/528x/gpio.c
new file mode 100644
index 000000000000..526db665d87e
--- /dev/null
+++ b/arch/m68k/platform/528x/gpio.c
@@ -0,0 +1,438 @@
1/*
2 * Coldfire generic GPIO support
3 *
4 * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14*/
15
16#include <linux/kernel.h>
17#include <linux/init.h>
18
19#include <asm/coldfire.h>
20#include <asm/mcfsim.h>
21#include <asm/mcfgpio.h>
22
23static struct mcf_gpio_chip mcf_gpio_chips[] = {
24 {
25 .gpio_chip = {
26 .label = "NQ",
27 .request = mcf_gpio_request,
28 .free = mcf_gpio_free,
29 .direction_input = mcf_gpio_direction_input,
30 .direction_output = mcf_gpio_direction_output,
31 .get = mcf_gpio_get_value,
32 .set = mcf_gpio_set_value,
33 .base = 1,
34 .ngpio = 7,
35 },
36 .pddr = (void __iomem *)MCFEPORT_EPDDR,
37 .podr = (void __iomem *)MCFEPORT_EPDR,
38 .ppdr = (void __iomem *)MCFEPORT_EPPDR,
39 },
40 {
41 .gpio_chip = {
42 .label = "TA",
43 .request = mcf_gpio_request,
44 .free = mcf_gpio_free,
45 .direction_input = mcf_gpio_direction_input,
46 .direction_output = mcf_gpio_direction_output,
47 .get = mcf_gpio_get_value,
48 .set = mcf_gpio_set_value_fast,
49 .base = 8,
50 .ngpio = 4,
51 },
52 .pddr = (void __iomem *)MCFGPTA_GPTDDR,
53 .podr = (void __iomem *)MCFGPTA_GPTPORT,
54 .ppdr = (void __iomem *)MCFGPTB_GPTPORT,
55 },
56 {
57 .gpio_chip = {
58 .label = "TB",
59 .request = mcf_gpio_request,
60 .free = mcf_gpio_free,
61 .direction_input = mcf_gpio_direction_input,
62 .direction_output = mcf_gpio_direction_output,
63 .get = mcf_gpio_get_value,
64 .set = mcf_gpio_set_value_fast,
65 .base = 16,
66 .ngpio = 4,
67 },
68 .pddr = (void __iomem *)MCFGPTB_GPTDDR,
69 .podr = (void __iomem *)MCFGPTB_GPTPORT,
70 .ppdr = (void __iomem *)MCFGPTB_GPTPORT,
71 },
72 {
73 .gpio_chip = {
74 .label = "QA",
75 .request = mcf_gpio_request,
76 .free = mcf_gpio_free,
77 .direction_input = mcf_gpio_direction_input,
78 .direction_output = mcf_gpio_direction_output,
79 .get = mcf_gpio_get_value,
80 .set = mcf_gpio_set_value_fast,
81 .base = 24,
82 .ngpio = 4,
83 },
84 .pddr = (void __iomem *)MCFQADC_DDRQA,
85 .podr = (void __iomem *)MCFQADC_PORTQA,
86 .ppdr = (void __iomem *)MCFQADC_PORTQA,
87 },
88 {
89 .gpio_chip = {
90 .label = "QB",
91 .request = mcf_gpio_request,
92 .free = mcf_gpio_free,
93 .direction_input = mcf_gpio_direction_input,
94 .direction_output = mcf_gpio_direction_output,
95 .get = mcf_gpio_get_value,
96 .set = mcf_gpio_set_value_fast,
97 .base = 32,
98 .ngpio = 4,
99 },
100 .pddr = (void __iomem *)MCFQADC_DDRQB,
101 .podr = (void __iomem *)MCFQADC_PORTQB,
102 .ppdr = (void __iomem *)MCFQADC_PORTQB,
103 },
104 {
105 .gpio_chip = {
106 .label = "A",
107 .request = mcf_gpio_request,
108 .free = mcf_gpio_free,
109 .direction_input = mcf_gpio_direction_input,
110 .direction_output = mcf_gpio_direction_output,
111 .get = mcf_gpio_get_value,
112 .set = mcf_gpio_set_value_fast,
113 .base = 40,
114 .ngpio = 8,
115 },
116 .pddr = (void __iomem *)MCFGPIO_DDRA,
117 .podr = (void __iomem *)MCFGPIO_PORTA,
118 .ppdr = (void __iomem *)MCFGPIO_PORTAP,
119 .setr = (void __iomem *)MCFGPIO_SETA,
120 .clrr = (void __iomem *)MCFGPIO_CLRA,
121 },
122 {
123 .gpio_chip = {
124 .label = "B",
125 .request = mcf_gpio_request,
126 .free = mcf_gpio_free,
127 .direction_input = mcf_gpio_direction_input,
128 .direction_output = mcf_gpio_direction_output,
129 .get = mcf_gpio_get_value,
130 .set = mcf_gpio_set_value_fast,
131 .base = 48,
132 .ngpio = 8,
133 },
134 .pddr = (void __iomem *)MCFGPIO_DDRB,
135 .podr = (void __iomem *)MCFGPIO_PORTB,
136 .ppdr = (void __iomem *)MCFGPIO_PORTBP,
137 .setr = (void __iomem *)MCFGPIO_SETB,
138 .clrr = (void __iomem *)MCFGPIO_CLRB,
139 },
140 {
141 .gpio_chip = {
142 .label = "C",
143 .request = mcf_gpio_request,
144 .free = mcf_gpio_free,
145 .direction_input = mcf_gpio_direction_input,
146 .direction_output = mcf_gpio_direction_output,
147 .get = mcf_gpio_get_value,
148 .set = mcf_gpio_set_value_fast,
149 .base = 56,
150 .ngpio = 8,
151 },
152 .pddr = (void __iomem *)MCFGPIO_DDRC,
153 .podr = (void __iomem *)MCFGPIO_PORTC,
154 .ppdr = (void __iomem *)MCFGPIO_PORTCP,
155 .setr = (void __iomem *)MCFGPIO_SETC,
156 .clrr = (void __iomem *)MCFGPIO_CLRC,
157 },
158 {
159 .gpio_chip = {
160 .label = "D",
161 .request = mcf_gpio_request,
162 .free = mcf_gpio_free,
163 .direction_input = mcf_gpio_direction_input,
164 .direction_output = mcf_gpio_direction_output,
165 .get = mcf_gpio_get_value,
166 .set = mcf_gpio_set_value_fast,
167 .base = 64,
168 .ngpio = 8,
169 },
170 .pddr = (void __iomem *)MCFGPIO_DDRD,
171 .podr = (void __iomem *)MCFGPIO_PORTD,
172 .ppdr = (void __iomem *)MCFGPIO_PORTDP,
173 .setr = (void __iomem *)MCFGPIO_SETD,
174 .clrr = (void __iomem *)MCFGPIO_CLRD,
175 },
176 {
177 .gpio_chip = {
178 .label = "E",
179 .request = mcf_gpio_request,
180 .free = mcf_gpio_free,
181 .direction_input = mcf_gpio_direction_input,
182 .direction_output = mcf_gpio_direction_output,
183 .get = mcf_gpio_get_value,
184 .set = mcf_gpio_set_value_fast,
185 .base = 72,
186 .ngpio = 8,
187 },
188 .pddr = (void __iomem *)MCFGPIO_DDRE,
189 .podr = (void __iomem *)MCFGPIO_PORTE,
190 .ppdr = (void __iomem *)MCFGPIO_PORTEP,
191 .setr = (void __iomem *)MCFGPIO_SETE,
192 .clrr = (void __iomem *)MCFGPIO_CLRE,
193 },
194 {
195 .gpio_chip = {
196 .label = "F",
197 .request = mcf_gpio_request,
198 .free = mcf_gpio_free,
199 .direction_input = mcf_gpio_direction_input,
200 .direction_output = mcf_gpio_direction_output,
201 .get = mcf_gpio_get_value,
202 .set = mcf_gpio_set_value_fast,
203 .base = 80,
204 .ngpio = 8,
205 },
206 .pddr = (void __iomem *)MCFGPIO_DDRF,
207 .podr = (void __iomem *)MCFGPIO_PORTF,
208 .ppdr = (void __iomem *)MCFGPIO_PORTFP,
209 .setr = (void __iomem *)MCFGPIO_SETF,
210 .clrr = (void __iomem *)MCFGPIO_CLRF,
211 },
212 {
213 .gpio_chip = {
214 .label = "G",
215 .request = mcf_gpio_request,
216 .free = mcf_gpio_free,
217 .direction_input = mcf_gpio_direction_input,
218 .direction_output = mcf_gpio_direction_output,
219 .get = mcf_gpio_get_value,
220 .set = mcf_gpio_set_value_fast,
221 .base = 88,
222 .ngpio = 8,
223 },
224 .pddr = (void __iomem *)MCFGPIO_DDRG,
225 .podr = (void __iomem *)MCFGPIO_PORTG,
226 .ppdr = (void __iomem *)MCFGPIO_PORTGP,
227 .setr = (void __iomem *)MCFGPIO_SETG,
228 .clrr = (void __iomem *)MCFGPIO_CLRG,
229 },
230 {
231 .gpio_chip = {
232 .label = "H",
233 .request = mcf_gpio_request,
234 .free = mcf_gpio_free,
235 .direction_input = mcf_gpio_direction_input,
236 .direction_output = mcf_gpio_direction_output,
237 .get = mcf_gpio_get_value,
238 .set = mcf_gpio_set_value_fast,
239 .base = 96,
240 .ngpio = 8,
241 },
242 .pddr = (void __iomem *)MCFGPIO_DDRH,
243 .podr = (void __iomem *)MCFGPIO_PORTH,
244 .ppdr = (void __iomem *)MCFGPIO_PORTHP,
245 .setr = (void __iomem *)MCFGPIO_SETH,
246 .clrr = (void __iomem *)MCFGPIO_CLRH,
247 },
248 {
249 .gpio_chip = {
250 .label = "J",
251 .request = mcf_gpio_request,
252 .free = mcf_gpio_free,
253 .direction_input = mcf_gpio_direction_input,
254 .direction_output = mcf_gpio_direction_output,
255 .get = mcf_gpio_get_value,
256 .set = mcf_gpio_set_value_fast,
257 .base = 104,
258 .ngpio = 8,
259 },
260 .pddr = (void __iomem *)MCFGPIO_DDRJ,
261 .podr = (void __iomem *)MCFGPIO_PORTJ,
262 .ppdr = (void __iomem *)MCFGPIO_PORTJP,
263 .setr = (void __iomem *)MCFGPIO_SETJ,
264 .clrr = (void __iomem *)MCFGPIO_CLRJ,
265 },
266 {
267 .gpio_chip = {
268 .label = "DD",
269 .request = mcf_gpio_request,
270 .free = mcf_gpio_free,
271 .direction_input = mcf_gpio_direction_input,
272 .direction_output = mcf_gpio_direction_output,
273 .get = mcf_gpio_get_value,
274 .set = mcf_gpio_set_value_fast,
275 .base = 112,
276 .ngpio = 8,
277 },
278 .pddr = (void __iomem *)MCFGPIO_DDRDD,
279 .podr = (void __iomem *)MCFGPIO_PORTDD,
280 .ppdr = (void __iomem *)MCFGPIO_PORTDDP,
281 .setr = (void __iomem *)MCFGPIO_SETDD,
282 .clrr = (void __iomem *)MCFGPIO_CLRDD,
283 },
284 {
285 .gpio_chip = {
286 .label = "EH",
287 .request = mcf_gpio_request,
288 .free = mcf_gpio_free,
289 .direction_input = mcf_gpio_direction_input,
290 .direction_output = mcf_gpio_direction_output,
291 .get = mcf_gpio_get_value,
292 .set = mcf_gpio_set_value_fast,
293 .base = 120,
294 .ngpio = 8,
295 },
296 .pddr = (void __iomem *)MCFGPIO_DDREH,
297 .podr = (void __iomem *)MCFGPIO_PORTEH,
298 .ppdr = (void __iomem *)MCFGPIO_PORTEHP,
299 .setr = (void __iomem *)MCFGPIO_SETEH,
300 .clrr = (void __iomem *)MCFGPIO_CLREH,
301 },
302 {
303 .gpio_chip = {
304 .label = "EL",
305 .request = mcf_gpio_request,
306 .free = mcf_gpio_free,
307 .direction_input = mcf_gpio_direction_input,
308 .direction_output = mcf_gpio_direction_output,
309 .get = mcf_gpio_get_value,
310 .set = mcf_gpio_set_value_fast,
311 .base = 128,
312 .ngpio = 8,
313 },
314 .pddr = (void __iomem *)MCFGPIO_DDREL,
315 .podr = (void __iomem *)MCFGPIO_PORTEL,
316 .ppdr = (void __iomem *)MCFGPIO_PORTELP,
317 .setr = (void __iomem *)MCFGPIO_SETEL,
318 .clrr = (void __iomem *)MCFGPIO_CLREL,
319 },
320 {
321 .gpio_chip = {
322 .label = "AS",
323 .request = mcf_gpio_request,
324 .free = mcf_gpio_free,
325 .direction_input = mcf_gpio_direction_input,
326 .direction_output = mcf_gpio_direction_output,
327 .get = mcf_gpio_get_value,
328 .set = mcf_gpio_set_value_fast,
329 .base = 136,
330 .ngpio = 6,
331 },
332 .pddr = (void __iomem *)MCFGPIO_DDRAS,
333 .podr = (void __iomem *)MCFGPIO_PORTAS,
334 .ppdr = (void __iomem *)MCFGPIO_PORTASP,
335 .setr = (void __iomem *)MCFGPIO_SETAS,
336 .clrr = (void __iomem *)MCFGPIO_CLRAS,
337 },
338 {
339 .gpio_chip = {
340 .label = "QS",
341 .request = mcf_gpio_request,
342 .free = mcf_gpio_free,
343 .direction_input = mcf_gpio_direction_input,
344 .direction_output = mcf_gpio_direction_output,
345 .get = mcf_gpio_get_value,
346 .set = mcf_gpio_set_value_fast,
347 .base = 144,
348 .ngpio = 7,
349 },
350 .pddr = (void __iomem *)MCFGPIO_DDRQS,
351 .podr = (void __iomem *)MCFGPIO_PORTQS,
352 .ppdr = (void __iomem *)MCFGPIO_PORTQSP,
353 .setr = (void __iomem *)MCFGPIO_SETQS,
354 .clrr = (void __iomem *)MCFGPIO_CLRQS,
355 },
356 {
357 .gpio_chip = {
358 .label = "SD",
359 .request = mcf_gpio_request,
360 .free = mcf_gpio_free,
361 .direction_input = mcf_gpio_direction_input,
362 .direction_output = mcf_gpio_direction_output,
363 .get = mcf_gpio_get_value,
364 .set = mcf_gpio_set_value_fast,
365 .base = 152,
366 .ngpio = 6,
367 },
368 .pddr = (void __iomem *)MCFGPIO_DDRSD,
369 .podr = (void __iomem *)MCFGPIO_PORTSD,
370 .ppdr = (void __iomem *)MCFGPIO_PORTSDP,
371 .setr = (void __iomem *)MCFGPIO_SETSD,
372 .clrr = (void __iomem *)MCFGPIO_CLRSD,
373 },
374 {
375 .gpio_chip = {
376 .label = "TC",
377 .request = mcf_gpio_request,
378 .free = mcf_gpio_free,
379 .direction_input = mcf_gpio_direction_input,
380 .direction_output = mcf_gpio_direction_output,
381 .get = mcf_gpio_get_value,
382 .set = mcf_gpio_set_value_fast,
383 .base = 160,
384 .ngpio = 4,
385 },
386 .pddr = (void __iomem *)MCFGPIO_DDRTC,
387 .podr = (void __iomem *)MCFGPIO_PORTTC,
388 .ppdr = (void __iomem *)MCFGPIO_PORTTCP,
389 .setr = (void __iomem *)MCFGPIO_SETTC,
390 .clrr = (void __iomem *)MCFGPIO_CLRTC,
391 },
392 {
393 .gpio_chip = {
394 .label = "TD",
395 .request = mcf_gpio_request,
396 .free = mcf_gpio_free,
397 .direction_input = mcf_gpio_direction_input,
398 .direction_output = mcf_gpio_direction_output,
399 .get = mcf_gpio_get_value,
400 .set = mcf_gpio_set_value_fast,
401 .base = 168,
402 .ngpio = 4,
403 },
404 .pddr = (void __iomem *)MCFGPIO_DDRTD,
405 .podr = (void __iomem *)MCFGPIO_PORTTD,
406 .ppdr = (void __iomem *)MCFGPIO_PORTTDP,
407 .setr = (void __iomem *)MCFGPIO_SETTD,
408 .clrr = (void __iomem *)MCFGPIO_CLRTD,
409 },
410 {
411 .gpio_chip = {
412 .label = "UA",
413 .request = mcf_gpio_request,
414 .free = mcf_gpio_free,
415 .direction_input = mcf_gpio_direction_input,
416 .direction_output = mcf_gpio_direction_output,
417 .get = mcf_gpio_get_value,
418 .set = mcf_gpio_set_value_fast,
419 .base = 176,
420 .ngpio = 4,
421 },
422 .pddr = (void __iomem *)MCFGPIO_DDRUA,
423 .podr = (void __iomem *)MCFGPIO_PORTUA,
424 .ppdr = (void __iomem *)MCFGPIO_PORTUAP,
425 .setr = (void __iomem *)MCFGPIO_SETUA,
426 .clrr = (void __iomem *)MCFGPIO_CLRUA,
427 },
428};
429
430static int __init mcf_gpio_init(void)
431{
432 unsigned i = 0;
433 while (i < ARRAY_SIZE(mcf_gpio_chips))
434 (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
435 return 0;
436}
437
438core_initcall(mcf_gpio_init);
diff --git a/arch/m68k/platform/5307/Makefile b/arch/m68k/platform/5307/Makefile
new file mode 100644
index 000000000000..d4293b791f2e
--- /dev/null
+++ b/arch/m68k/platform/5307/Makefile
@@ -0,0 +1,20 @@
1#
2# Makefile for the m68knommu kernel.
3#
4
5#
6# If you want to play with the HW breakpoints then you will
7# need to add define this, which will give you a stack backtrace
8# on the console port whenever a DBG interrupt occurs. You have to
9# set up you HW breakpoints to trigger a DBG interrupt:
10#
11# ccflags-y := -DTRAP_DBG_INTERRUPT
12# asflags-y := -DTRAP_DBG_INTERRUPT
13#
14
15asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
16
17obj-y += config.o gpio.o
18obj-$(CONFIG_NETtel) += nettel.o
19obj-$(CONFIG_CLEOPATRA) += nettel.o
20
diff --git a/arch/m68k/platform/5307/config.c b/arch/m68k/platform/5307/config.c
new file mode 100644
index 000000000000..00900ac06a9c
--- /dev/null
+++ b/arch/m68k/platform/5307/config.c
@@ -0,0 +1,147 @@
1/***************************************************************************/
2
3/*
4 * linux/arch/m68knommu/platform/5307/config.c
5 *
6 * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
7 * Copyright (C) 2000, Lineo (www.lineo.com)
8 */
9
10/***************************************************************************/
11
12#include <linux/kernel.h>
13#include <linux/param.h>
14#include <linux/init.h>
15#include <linux/io.h>
16#include <asm/machdep.h>
17#include <asm/coldfire.h>
18#include <asm/mcfsim.h>
19#include <asm/mcfuart.h>
20#include <asm/mcfwdebug.h>
21
22/***************************************************************************/
23
24/*
25 * Some platforms need software versions of the GPIO data registers.
26 */
27unsigned short ppdata;
28unsigned char ledbank = 0xff;
29
30/***************************************************************************/
31
32static struct mcf_platform_uart m5307_uart_platform[] = {
33 {
34 .mapbase = MCF_MBAR + MCFUART_BASE1,
35 .irq = 73,
36 },
37 {
38 .mapbase = MCF_MBAR + MCFUART_BASE2,
39 .irq = 74,
40 },
41 { },
42};
43
44static struct platform_device m5307_uart = {
45 .name = "mcfuart",
46 .id = 0,
47 .dev.platform_data = m5307_uart_platform,
48};
49
50static struct platform_device *m5307_devices[] __initdata = {
51 &m5307_uart,
52};
53
54/***************************************************************************/
55
56static void __init m5307_uart_init_line(int line, int irq)
57{
58 if (line == 0) {
59 writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
60 writeb(irq, MCF_MBAR + MCFUART_BASE1 + MCFUART_UIVR);
61 mcf_mapirq2imr(irq, MCFINTC_UART0);
62 } else if (line == 1) {
63 writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
64 writeb(irq, MCF_MBAR + MCFUART_BASE2 + MCFUART_UIVR);
65 mcf_mapirq2imr(irq, MCFINTC_UART1);
66 }
67}
68
69static void __init m5307_uarts_init(void)
70{
71 const int nrlines = ARRAY_SIZE(m5307_uart_platform);
72 int line;
73
74 for (line = 0; (line < nrlines); line++)
75 m5307_uart_init_line(line, m5307_uart_platform[line].irq);
76}
77
78/***************************************************************************/
79
80static void __init m5307_timers_init(void)
81{
82 /* Timer1 is always used as system timer */
83 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
84 MCF_MBAR + MCFSIM_TIMER1ICR);
85 mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);
86
87#ifdef CONFIG_HIGHPROFILE
88 /* Timer2 is to be used as a high speed profile timer */
89 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
90 MCF_MBAR + MCFSIM_TIMER2ICR);
91 mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);
92#endif
93}
94
95/***************************************************************************/
96
97void m5307_cpu_reset(void)
98{
99 local_irq_disable();
100 /* Set watchdog to soft reset, and enabled */
101 __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
102 for (;;)
103 /* wait for watchdog to timeout */;
104}
105
106/***************************************************************************/
107
108void __init config_BSP(char *commandp, int size)
109{
110#if defined(CONFIG_NETtel) || \
111 defined(CONFIG_SECUREEDGEMP3) || defined(CONFIG_CLEOPATRA)
112 /* Copy command line from FLASH to local buffer... */
113 memcpy(commandp, (char *) 0xf0004000, size);
114 commandp[size-1] = 0;
115#endif
116
117 mach_reset = m5307_cpu_reset;
118 m5307_timers_init();
119 m5307_uarts_init();
120
121 /* Only support the external interrupts on their primary level */
122 mcf_mapirq2imr(25, MCFINTC_EINT1);
123 mcf_mapirq2imr(27, MCFINTC_EINT3);
124 mcf_mapirq2imr(29, MCFINTC_EINT5);
125 mcf_mapirq2imr(31, MCFINTC_EINT7);
126
127#ifdef CONFIG_BDM_DISABLE
128 /*
129 * Disable the BDM clocking. This also turns off most of the rest of
130 * the BDM device. This is good for EMC reasons. This option is not
131 * incompatible with the memory protection option.
132 */
133 wdebug(MCFDEBUG_CSR, MCFDEBUG_CSR_PSTCLK);
134#endif
135}
136
137/***************************************************************************/
138
139static int __init init_BSP(void)
140{
141 platform_add_devices(m5307_devices, ARRAY_SIZE(m5307_devices));
142 return 0;
143}
144
145arch_initcall(init_BSP);
146
147/***************************************************************************/
diff --git a/arch/m68k/platform/5307/gpio.c b/arch/m68k/platform/5307/gpio.c
new file mode 100644
index 000000000000..5850612b4a38
--- /dev/null
+++ b/arch/m68k/platform/5307/gpio.c
@@ -0,0 +1,49 @@
1/*
2 * Coldfire generic GPIO support
3 *
4 * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14*/
15
16#include <linux/kernel.h>
17#include <linux/init.h>
18
19#include <asm/coldfire.h>
20#include <asm/mcfsim.h>
21#include <asm/mcfgpio.h>
22
23static struct mcf_gpio_chip mcf_gpio_chips[] = {
24 {
25 .gpio_chip = {
26 .label = "PP",
27 .request = mcf_gpio_request,
28 .free = mcf_gpio_free,
29 .direction_input = mcf_gpio_direction_input,
30 .direction_output = mcf_gpio_direction_output,
31 .get = mcf_gpio_get_value,
32 .set = mcf_gpio_set_value,
33 .ngpio = 16,
34 },
35 .pddr = (void __iomem *) MCFSIM_PADDR,
36 .podr = (void __iomem *) MCFSIM_PADAT,
37 .ppdr = (void __iomem *) MCFSIM_PADAT,
38 },
39};
40
41static int __init mcf_gpio_init(void)
42{
43 unsigned i = 0;
44 while (i < ARRAY_SIZE(mcf_gpio_chips))
45 (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
46 return 0;
47}
48
49core_initcall(mcf_gpio_init);
diff --git a/arch/m68k/platform/5307/nettel.c b/arch/m68k/platform/5307/nettel.c
new file mode 100644
index 000000000000..e925ea4602f8
--- /dev/null
+++ b/arch/m68k/platform/5307/nettel.c
@@ -0,0 +1,153 @@
1/***************************************************************************/
2
3/*
4 * nettel.c -- startup code support for the NETtel boards
5 *
6 * Copyright (C) 2009, Greg Ungerer (gerg@snapgear.com)
7 */
8
9/***************************************************************************/
10
11#include <linux/kernel.h>
12#include <linux/param.h>
13#include <linux/init.h>
14#include <linux/io.h>
15#include <linux/platform_device.h>
16#include <asm/coldfire.h>
17#include <asm/mcfsim.h>
18#include <asm/nettel.h>
19
20/***************************************************************************/
21
22/*
23 * Define the IO and interrupt resources of the 2 SMC9196 interfaces.
24 */
25#define NETTEL_SMC0_ADDR 0x30600300
26#define NETTEL_SMC0_IRQ 29
27
28#define NETTEL_SMC1_ADDR 0x30600000
29#define NETTEL_SMC1_IRQ 27
30
31/*
32 * We need some access into the SMC9196 registers. Define those registers
33 * we will need here (including the smc91x.h doesn't seem to give us these
34 * in a simple form).
35 */
36#define SMC91xx_BANKSELECT 14
37#define SMC91xx_BASEADDR 2
38#define SMC91xx_BASEMAC 4
39
40/***************************************************************************/
41
42static struct resource nettel_smc91x_0_resources[] = {
43 {
44 .start = NETTEL_SMC0_ADDR,
45 .end = NETTEL_SMC0_ADDR + 0x20,
46 .flags = IORESOURCE_MEM,
47 },
48 {
49 .start = NETTEL_SMC0_IRQ,
50 .end = NETTEL_SMC0_IRQ,
51 .flags = IORESOURCE_IRQ,
52 },
53};
54
55static struct resource nettel_smc91x_1_resources[] = {
56 {
57 .start = NETTEL_SMC1_ADDR,
58 .end = NETTEL_SMC1_ADDR + 0x20,
59 .flags = IORESOURCE_MEM,
60 },
61 {
62 .start = NETTEL_SMC1_IRQ,
63 .end = NETTEL_SMC1_IRQ,
64 .flags = IORESOURCE_IRQ,
65 },
66};
67
68static struct platform_device nettel_smc91x[] = {
69 {
70 .name = "smc91x",
71 .id = 0,
72 .num_resources = ARRAY_SIZE(nettel_smc91x_0_resources),
73 .resource = nettel_smc91x_0_resources,
74 },
75 {
76 .name = "smc91x",
77 .id = 1,
78 .num_resources = ARRAY_SIZE(nettel_smc91x_1_resources),
79 .resource = nettel_smc91x_1_resources,
80 },
81};
82
83static struct platform_device *nettel_devices[] __initdata = {
84 &nettel_smc91x[0],
85 &nettel_smc91x[1],
86};
87
88/***************************************************************************/
89
90static u8 nettel_macdefault[] __initdata = {
91 0x00, 0xd0, 0xcf, 0x00, 0x00, 0x01,
92};
93
94/*
95 * Set flash contained MAC address into SMC9196 core. Make sure the flash
96 * MAC address is sane, and not an empty flash. If no good use the Moreton
97 * Bay default MAC address instead.
98 */
99
100static void __init nettel_smc91x_setmac(unsigned int ioaddr, unsigned int flashaddr)
101{
102 u16 *macp;
103
104 macp = (u16 *) flashaddr;
105 if ((macp[0] == 0xffff) && (macp[1] == 0xffff) && (macp[2] == 0xffff))
106 macp = (u16 *) &nettel_macdefault[0];
107
108 writew(1, NETTEL_SMC0_ADDR + SMC91xx_BANKSELECT);
109 writew(macp[0], ioaddr + SMC91xx_BASEMAC);
110 writew(macp[1], ioaddr + SMC91xx_BASEMAC + 2);
111 writew(macp[2], ioaddr + SMC91xx_BASEMAC + 4);
112}
113
114/***************************************************************************/
115
116/*
117 * Re-map the address space of at least one of the SMC ethernet
118 * parts. Both parts power up decoding the same address, so we
119 * need to move one of them first, before doing anything else.
120 */
121
122static void __init nettel_smc91x_init(void)
123{
124 writew(0x00ec, MCF_MBAR + MCFSIM_PADDR);
125 mcf_setppdata(0, 0x0080);
126 writew(1, NETTEL_SMC0_ADDR + SMC91xx_BANKSELECT);
127 writew(0x0067, NETTEL_SMC0_ADDR + SMC91xx_BASEADDR);
128 mcf_setppdata(0x0080, 0);
129
130 /* Set correct chip select timing for SMC9196 accesses */
131 writew(0x1180, MCF_MBAR + MCFSIM_CSCR3);
132
133 /* Set the SMC interrupts to be auto-vectored */
134 mcf_autovector(NETTEL_SMC0_IRQ);
135 mcf_autovector(NETTEL_SMC1_IRQ);
136
137 /* Set MAC addresses from flash for both interfaces */
138 nettel_smc91x_setmac(NETTEL_SMC0_ADDR, 0xf0006000);
139 nettel_smc91x_setmac(NETTEL_SMC1_ADDR, 0xf0006006);
140}
141
142/***************************************************************************/
143
144static int __init init_nettel(void)
145{
146 nettel_smc91x_init();
147 platform_add_devices(nettel_devices, ARRAY_SIZE(nettel_devices));
148 return 0;
149}
150
151arch_initcall(init_nettel);
152
153/***************************************************************************/
diff --git a/arch/m68k/platform/532x/Makefile b/arch/m68k/platform/532x/Makefile
new file mode 100644
index 000000000000..ce01669399c6
--- /dev/null
+++ b/arch/m68k/platform/532x/Makefile
@@ -0,0 +1,18 @@
1#
2# Makefile for the m68knommu linux kernel.
3#
4
5#
6# If you want to play with the HW breakpoints then you will
7# need to add define this, which will give you a stack backtrace
8# on the console port whenever a DBG interrupt occurs. You have to
9# set up you HW breakpoints to trigger a DBG interrupt:
10#
11# ccflags-y := -DTRAP_DBG_INTERRUPT
12# asflags-y := -DTRAP_DBG_INTERRUPT
13#
14
15asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
16
17#obj-y := config.o usb-mcf532x.o spi-mcf532x.o
18obj-y := config.o gpio.o
diff --git a/arch/m68k/platform/532x/config.c b/arch/m68k/platform/532x/config.c
new file mode 100644
index 000000000000..ca51323f957b
--- /dev/null
+++ b/arch/m68k/platform/532x/config.c
@@ -0,0 +1,648 @@
1/***************************************************************************/
2
3/*
4 * linux/arch/m68knommu/platform/532x/config.c
5 *
6 * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
7 * Copyright (C) 2000, Lineo (www.lineo.com)
8 * Yaroslav Vinogradov yaroslav.vinogradov@freescale.com
9 * Copyright Freescale Semiconductor, Inc 2006
10 * Copyright (c) 2006, emlix, Sebastian Hess <sh@emlix.com>
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 */
17
18/***************************************************************************/
19
20#include <linux/kernel.h>
21#include <linux/param.h>
22#include <linux/init.h>
23#include <linux/io.h>
24#include <linux/spi/spi.h>
25#include <linux/gpio.h>
26#include <asm/machdep.h>
27#include <asm/coldfire.h>
28#include <asm/mcfsim.h>
29#include <asm/mcfuart.h>
30#include <asm/mcfdma.h>
31#include <asm/mcfwdebug.h>
32#include <asm/mcfqspi.h>
33
34/***************************************************************************/
35
36static struct mcf_platform_uart m532x_uart_platform[] = {
37 {
38 .mapbase = MCFUART_BASE1,
39 .irq = MCFINT_VECBASE + MCFINT_UART0,
40 },
41 {
42 .mapbase = MCFUART_BASE2,
43 .irq = MCFINT_VECBASE + MCFINT_UART1,
44 },
45 {
46 .mapbase = MCFUART_BASE3,
47 .irq = MCFINT_VECBASE + MCFINT_UART2,
48 },
49 { },
50};
51
52static struct platform_device m532x_uart = {
53 .name = "mcfuart",
54 .id = 0,
55 .dev.platform_data = m532x_uart_platform,
56};
57
58static struct resource m532x_fec_resources[] = {
59 {
60 .start = 0xfc030000,
61 .end = 0xfc0307ff,
62 .flags = IORESOURCE_MEM,
63 },
64 {
65 .start = 64 + 36,
66 .end = 64 + 36,
67 .flags = IORESOURCE_IRQ,
68 },
69 {
70 .start = 64 + 40,
71 .end = 64 + 40,
72 .flags = IORESOURCE_IRQ,
73 },
74 {
75 .start = 64 + 42,
76 .end = 64 + 42,
77 .flags = IORESOURCE_IRQ,
78 },
79};
80
81static struct platform_device m532x_fec = {
82 .name = "fec",
83 .id = 0,
84 .num_resources = ARRAY_SIZE(m532x_fec_resources),
85 .resource = m532x_fec_resources,
86};
87
88#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
89static struct resource m532x_qspi_resources[] = {
90 {
91 .start = MCFQSPI_IOBASE,
92 .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1,
93 .flags = IORESOURCE_MEM,
94 },
95 {
96 .start = MCFINT_VECBASE + MCFINT_QSPI,
97 .end = MCFINT_VECBASE + MCFINT_QSPI,
98 .flags = IORESOURCE_IRQ,
99 },
100};
101
102#define MCFQSPI_CS0 84
103#define MCFQSPI_CS1 85
104#define MCFQSPI_CS2 86
105
106static int m532x_cs_setup(struct mcfqspi_cs_control *cs_control)
107{
108 int status;
109
110 status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0");
111 if (status) {
112 pr_debug("gpio_request for MCFQSPI_CS0 failed\n");
113 goto fail0;
114 }
115 status = gpio_direction_output(MCFQSPI_CS0, 1);
116 if (status) {
117 pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n");
118 goto fail1;
119 }
120
121 status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1");
122 if (status) {
123 pr_debug("gpio_request for MCFQSPI_CS1 failed\n");
124 goto fail1;
125 }
126 status = gpio_direction_output(MCFQSPI_CS1, 1);
127 if (status) {
128 pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n");
129 goto fail2;
130 }
131
132 status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2");
133 if (status) {
134 pr_debug("gpio_request for MCFQSPI_CS2 failed\n");
135 goto fail2;
136 }
137 status = gpio_direction_output(MCFQSPI_CS2, 1);
138 if (status) {
139 pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n");
140 goto fail3;
141 }
142
143 return 0;
144
145fail3:
146 gpio_free(MCFQSPI_CS2);
147fail2:
148 gpio_free(MCFQSPI_CS1);
149fail1:
150 gpio_free(MCFQSPI_CS0);
151fail0:
152 return status;
153}
154
155static void m532x_cs_teardown(struct mcfqspi_cs_control *cs_control)
156{
157 gpio_free(MCFQSPI_CS2);
158 gpio_free(MCFQSPI_CS1);
159 gpio_free(MCFQSPI_CS0);
160}
161
162static void m532x_cs_select(struct mcfqspi_cs_control *cs_control,
163 u8 chip_select, bool cs_high)
164{
165 gpio_set_value(MCFQSPI_CS0 + chip_select, cs_high);
166}
167
168static void m532x_cs_deselect(struct mcfqspi_cs_control *cs_control,
169 u8 chip_select, bool cs_high)
170{
171 gpio_set_value(MCFQSPI_CS0 + chip_select, !cs_high);
172}
173
174static struct mcfqspi_cs_control m532x_cs_control = {
175 .setup = m532x_cs_setup,
176 .teardown = m532x_cs_teardown,
177 .select = m532x_cs_select,
178 .deselect = m532x_cs_deselect,
179};
180
181static struct mcfqspi_platform_data m532x_qspi_data = {
182 .bus_num = 0,
183 .num_chipselect = 3,
184 .cs_control = &m532x_cs_control,
185};
186
187static struct platform_device m532x_qspi = {
188 .name = "mcfqspi",
189 .id = 0,
190 .num_resources = ARRAY_SIZE(m532x_qspi_resources),
191 .resource = m532x_qspi_resources,
192 .dev.platform_data = &m532x_qspi_data,
193};
194
195static void __init m532x_qspi_init(void)
196{
197 /* setup QSPS pins for QSPI with gpio CS control */
198 writew(0x01f0, MCF_GPIO_PAR_QSPI);
199}
200#endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */
201
202
203static struct platform_device *m532x_devices[] __initdata = {
204 &m532x_uart,
205 &m532x_fec,
206#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
207 &m532x_qspi,
208#endif
209};
210
211/***************************************************************************/
212
213static void __init m532x_uart_init_line(int line, int irq)
214{
215 if (line == 0) {
216 /* GPIO initialization */
217 MCF_GPIO_PAR_UART |= 0x000F;
218 } else if (line == 1) {
219 /* GPIO initialization */
220 MCF_GPIO_PAR_UART |= 0x0FF0;
221 }
222}
223
224static void __init m532x_uarts_init(void)
225{
226 const int nrlines = ARRAY_SIZE(m532x_uart_platform);
227 int line;
228
229 for (line = 0; (line < nrlines); line++)
230 m532x_uart_init_line(line, m532x_uart_platform[line].irq);
231}
232/***************************************************************************/
233
234static void __init m532x_fec_init(void)
235{
236 /* Set multi-function pins to ethernet mode for fec0 */
237 MCF_GPIO_PAR_FECI2C |= (MCF_GPIO_PAR_FECI2C_PAR_MDC_EMDC |
238 MCF_GPIO_PAR_FECI2C_PAR_MDIO_EMDIO);
239 MCF_GPIO_PAR_FEC = (MCF_GPIO_PAR_FEC_PAR_FEC_7W_FEC |
240 MCF_GPIO_PAR_FEC_PAR_FEC_MII_FEC);
241}
242
243/***************************************************************************/
244
245static void m532x_cpu_reset(void)
246{
247 local_irq_disable();
248 __raw_writeb(MCF_RCR_SWRESET, MCF_RCR);
249}
250
251/***************************************************************************/
252
253void __init config_BSP(char *commandp, int size)
254{
255#if !defined(CONFIG_BOOTPARAM)
256 /* Copy command line from FLASH to local buffer... */
257 memcpy(commandp, (char *) 0x4000, 4);
258 if(strncmp(commandp, "kcl ", 4) == 0){
259 memcpy(commandp, (char *) 0x4004, size);
260 commandp[size-1] = 0;
261 } else {
262 memset(commandp, 0, size);
263 }
264#endif
265
266#ifdef CONFIG_BDM_DISABLE
267 /*
268 * Disable the BDM clocking. This also turns off most of the rest of
269 * the BDM device. This is good for EMC reasons. This option is not
270 * incompatible with the memory protection option.
271 */
272 wdebug(MCFDEBUG_CSR, MCFDEBUG_CSR_PSTCLK);
273#endif
274}
275
276/***************************************************************************/
277
278static int __init init_BSP(void)
279{
280 m532x_uarts_init();
281 m532x_fec_init();
282#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
283 m532x_qspi_init();
284#endif
285 platform_add_devices(m532x_devices, ARRAY_SIZE(m532x_devices));
286 return 0;
287}
288
289arch_initcall(init_BSP);
290
291/***************************************************************************/
292/* Board initialization */
293/***************************************************************************/
294/*
295 * PLL min/max specifications
296 */
297#define MAX_FVCO 500000 /* KHz */
298#define MAX_FSYS 80000 /* KHz */
299#define MIN_FSYS 58333 /* KHz */
300#define FREF 16000 /* KHz */
301
302
303#define MAX_MFD 135 /* Multiplier */
304#define MIN_MFD 88 /* Multiplier */
305#define BUSDIV 6 /* Divider */
306
307/*
308 * Low Power Divider specifications
309 */
310#define MIN_LPD (1 << 0) /* Divider (not encoded) */
311#define MAX_LPD (1 << 15) /* Divider (not encoded) */
312#define DEFAULT_LPD (1 << 1) /* Divider (not encoded) */
313
314#define SYS_CLK_KHZ 80000
315#define SYSTEM_PERIOD 12.5
316/*
317 * SDRAM Timing Parameters
318 */
319#define SDRAM_BL 8 /* # of beats in a burst */
320#define SDRAM_TWR 2 /* in clocks */
321#define SDRAM_CASL 2.5 /* CASL in clocks */
322#define SDRAM_TRCD 2 /* in clocks */
323#define SDRAM_TRP 2 /* in clocks */
324#define SDRAM_TRFC 7 /* in clocks */
325#define SDRAM_TREFI 7800 /* in ns */
326
327#define EXT_SRAM_ADDRESS (0xC0000000)
328#define FLASH_ADDRESS (0x00000000)
329#define SDRAM_ADDRESS (0x40000000)
330
331#define NAND_FLASH_ADDRESS (0xD0000000)
332
333int sys_clk_khz = 0;
334int sys_clk_mhz = 0;
335
336void wtm_init(void);
337void scm_init(void);
338void gpio_init(void);
339void fbcs_init(void);
340void sdramc_init(void);
341int clock_pll (int fsys, int flags);
342int clock_limp (int);
343int clock_exit_limp (void);
344int get_sys_clock (void);
345
346asmlinkage void __init sysinit(void)
347{
348 sys_clk_khz = clock_pll(0, 0);
349 sys_clk_mhz = sys_clk_khz/1000;
350
351 wtm_init();
352 scm_init();
353 gpio_init();
354 fbcs_init();
355 sdramc_init();
356}
357
358void wtm_init(void)
359{
360 /* Disable watchdog timer */
361 MCF_WTM_WCR = 0;
362}
363
364#define MCF_SCM_BCR_GBW (0x00000100)
365#define MCF_SCM_BCR_GBR (0x00000200)
366
367void scm_init(void)
368{
369 /* All masters are trusted */
370 MCF_SCM_MPR = 0x77777777;
371
372 /* Allow supervisor/user, read/write, and trusted/untrusted
373 access to all slaves */
374 MCF_SCM_PACRA = 0;
375 MCF_SCM_PACRB = 0;
376 MCF_SCM_PACRC = 0;
377 MCF_SCM_PACRD = 0;
378 MCF_SCM_PACRE = 0;
379 MCF_SCM_PACRF = 0;
380
381 /* Enable bursts */
382 MCF_SCM_BCR = (MCF_SCM_BCR_GBR | MCF_SCM_BCR_GBW);
383}
384
385
386void fbcs_init(void)
387{
388 MCF_GPIO_PAR_CS = 0x0000003E;
389
390 /* Latch chip select */
391 MCF_FBCS1_CSAR = 0x10080000;
392
393 MCF_FBCS1_CSCR = 0x002A3780;
394 MCF_FBCS1_CSMR = (MCF_FBCS_CSMR_BAM_2M | MCF_FBCS_CSMR_V);
395
396 /* Initialize latch to drive signals to inactive states */
397 *((u16 *)(0x10080000)) = 0xFFFF;
398
399 /* External SRAM */
400 MCF_FBCS1_CSAR = EXT_SRAM_ADDRESS;
401 MCF_FBCS1_CSCR = (MCF_FBCS_CSCR_PS_16
402 | MCF_FBCS_CSCR_AA
403 | MCF_FBCS_CSCR_SBM
404 | MCF_FBCS_CSCR_WS(1));
405 MCF_FBCS1_CSMR = (MCF_FBCS_CSMR_BAM_512K
406 | MCF_FBCS_CSMR_V);
407
408 /* Boot Flash connected to FBCS0 */
409 MCF_FBCS0_CSAR = FLASH_ADDRESS;
410 MCF_FBCS0_CSCR = (MCF_FBCS_CSCR_PS_16
411 | MCF_FBCS_CSCR_BEM
412 | MCF_FBCS_CSCR_AA
413 | MCF_FBCS_CSCR_SBM
414 | MCF_FBCS_CSCR_WS(7));
415 MCF_FBCS0_CSMR = (MCF_FBCS_CSMR_BAM_32M
416 | MCF_FBCS_CSMR_V);
417}
418
419void sdramc_init(void)
420{
421 /*
422 * Check to see if the SDRAM has already been initialized
423 * by a run control tool
424 */
425 if (!(MCF_SDRAMC_SDCR & MCF_SDRAMC_SDCR_REF)) {
426 /* SDRAM chip select initialization */
427
428 /* Initialize SDRAM chip select */
429 MCF_SDRAMC_SDCS0 = (0
430 | MCF_SDRAMC_SDCS_BA(SDRAM_ADDRESS)
431 | MCF_SDRAMC_SDCS_CSSZ(MCF_SDRAMC_SDCS_CSSZ_32MBYTE));
432
433 /*
434 * Basic configuration and initialization
435 */
436 MCF_SDRAMC_SDCFG1 = (0
437 | MCF_SDRAMC_SDCFG1_SRD2RW((int)((SDRAM_CASL + 2) + 0.5 ))
438 | MCF_SDRAMC_SDCFG1_SWT2RD(SDRAM_TWR + 1)
439 | MCF_SDRAMC_SDCFG1_RDLAT((int)((SDRAM_CASL*2) + 2))
440 | MCF_SDRAMC_SDCFG1_ACT2RW((int)((SDRAM_TRCD ) + 0.5))
441 | MCF_SDRAMC_SDCFG1_PRE2ACT((int)((SDRAM_TRP ) + 0.5))
442 | MCF_SDRAMC_SDCFG1_REF2ACT((int)(((SDRAM_TRFC) ) + 0.5))
443 | MCF_SDRAMC_SDCFG1_WTLAT(3));
444 MCF_SDRAMC_SDCFG2 = (0
445 | MCF_SDRAMC_SDCFG2_BRD2PRE(SDRAM_BL/2 + 1)
446 | MCF_SDRAMC_SDCFG2_BWT2RW(SDRAM_BL/2 + SDRAM_TWR)
447 | MCF_SDRAMC_SDCFG2_BRD2WT((int)((SDRAM_CASL+SDRAM_BL/2-1.0)+0.5))
448 | MCF_SDRAMC_SDCFG2_BL(SDRAM_BL-1));
449
450
451 /*
452 * Precharge and enable write to SDMR
453 */
454 MCF_SDRAMC_SDCR = (0
455 | MCF_SDRAMC_SDCR_MODE_EN
456 | MCF_SDRAMC_SDCR_CKE
457 | MCF_SDRAMC_SDCR_DDR
458 | MCF_SDRAMC_SDCR_MUX(1)
459 | MCF_SDRAMC_SDCR_RCNT((int)(((SDRAM_TREFI/(SYSTEM_PERIOD*64)) - 1) + 0.5))
460 | MCF_SDRAMC_SDCR_PS_16
461 | MCF_SDRAMC_SDCR_IPALL);
462
463 /*
464 * Write extended mode register
465 */
466 MCF_SDRAMC_SDMR = (0
467 | MCF_SDRAMC_SDMR_BNKAD_LEMR
468 | MCF_SDRAMC_SDMR_AD(0x0)
469 | MCF_SDRAMC_SDMR_CMD);
470
471 /*
472 * Write mode register and reset DLL
473 */
474 MCF_SDRAMC_SDMR = (0
475 | MCF_SDRAMC_SDMR_BNKAD_LMR
476 | MCF_SDRAMC_SDMR_AD(0x163)
477 | MCF_SDRAMC_SDMR_CMD);
478
479 /*
480 * Execute a PALL command
481 */
482 MCF_SDRAMC_SDCR |= MCF_SDRAMC_SDCR_IPALL;
483
484 /*
485 * Perform two REF cycles
486 */
487 MCF_SDRAMC_SDCR |= MCF_SDRAMC_SDCR_IREF;
488 MCF_SDRAMC_SDCR |= MCF_SDRAMC_SDCR_IREF;
489
490 /*
491 * Write mode register and clear reset DLL
492 */
493 MCF_SDRAMC_SDMR = (0
494 | MCF_SDRAMC_SDMR_BNKAD_LMR
495 | MCF_SDRAMC_SDMR_AD(0x063)
496 | MCF_SDRAMC_SDMR_CMD);
497
498 /*
499 * Enable auto refresh and lock SDMR
500 */
501 MCF_SDRAMC_SDCR &= ~MCF_SDRAMC_SDCR_MODE_EN;
502 MCF_SDRAMC_SDCR |= (0
503 | MCF_SDRAMC_SDCR_REF
504 | MCF_SDRAMC_SDCR_DQS_OE(0xC));
505 }
506}
507
508void gpio_init(void)
509{
510 /* Enable UART0 pins */
511 MCF_GPIO_PAR_UART = ( 0
512 | MCF_GPIO_PAR_UART_PAR_URXD0
513 | MCF_GPIO_PAR_UART_PAR_UTXD0);
514
515 /* Initialize TIN3 as a GPIO output to enable the write
516 half of the latch */
517 MCF_GPIO_PAR_TIMER = 0x00;
518 __raw_writeb(0x08, MCFGPIO_PDDR_TIMER);
519 __raw_writeb(0x00, MCFGPIO_PCLRR_TIMER);
520
521}
522
523int clock_pll(int fsys, int flags)
524{
525 int fref, temp, fout, mfd;
526 u32 i;
527
528 fref = FREF;
529
530 if (fsys == 0) {
531 /* Return current PLL output */
532 mfd = MCF_PLL_PFDR;
533
534 return (fref * mfd / (BUSDIV * 4));
535 }
536
537 /* Check bounds of requested system clock */
538 if (fsys > MAX_FSYS)
539 fsys = MAX_FSYS;
540 if (fsys < MIN_FSYS)
541 fsys = MIN_FSYS;
542
543 /* Multiplying by 100 when calculating the temp value,
544 and then dividing by 100 to calculate the mfd allows
545 for exact values without needing to include floating
546 point libraries. */
547 temp = 100 * fsys / fref;
548 mfd = 4 * BUSDIV * temp / 100;
549
550 /* Determine the output frequency for selected values */
551 fout = (fref * mfd / (BUSDIV * 4));
552
553 /*
554 * Check to see if the SDRAM has already been initialized.
555 * If it has then the SDRAM needs to be put into self refresh
556 * mode before reprogramming the PLL.
557 */
558 if (MCF_SDRAMC_SDCR & MCF_SDRAMC_SDCR_REF)
559 /* Put SDRAM into self refresh mode */
560 MCF_SDRAMC_SDCR &= ~MCF_SDRAMC_SDCR_CKE;
561
562 /*
563 * Initialize the PLL to generate the new system clock frequency.
564 * The device must be put into LIMP mode to reprogram the PLL.
565 */
566
567 /* Enter LIMP mode */
568 clock_limp(DEFAULT_LPD);
569
570 /* Reprogram PLL for desired fsys */
571 MCF_PLL_PODR = (0
572 | MCF_PLL_PODR_CPUDIV(BUSDIV/3)
573 | MCF_PLL_PODR_BUSDIV(BUSDIV));
574
575 MCF_PLL_PFDR = mfd;
576
577 /* Exit LIMP mode */
578 clock_exit_limp();
579
580 /*
581 * Return the SDRAM to normal operation if it is in use.
582 */
583 if (MCF_SDRAMC_SDCR & MCF_SDRAMC_SDCR_REF)
584 /* Exit self refresh mode */
585 MCF_SDRAMC_SDCR |= MCF_SDRAMC_SDCR_CKE;
586
587 /* Errata - workaround for SDRAM opeartion after exiting LIMP mode */
588 MCF_SDRAMC_LIMP_FIX = MCF_SDRAMC_REFRESH;
589
590 /* wait for DQS logic to relock */
591 for (i = 0; i < 0x200; i++)
592 ;
593
594 return fout;
595}
596
597int clock_limp(int div)
598{
599 u32 temp;
600
601 /* Check bounds of divider */
602 if (div < MIN_LPD)
603 div = MIN_LPD;
604 if (div > MAX_LPD)
605 div = MAX_LPD;
606
607 /* Save of the current value of the SSIDIV so we don't
608 overwrite the value*/
609 temp = (MCF_CCM_CDR & MCF_CCM_CDR_SSIDIV(0xF));
610
611 /* Apply the divider to the system clock */
612 MCF_CCM_CDR = ( 0
613 | MCF_CCM_CDR_LPDIV(div)
614 | MCF_CCM_CDR_SSIDIV(temp));
615
616 MCF_CCM_MISCCR |= MCF_CCM_MISCCR_LIMP;
617
618 return (FREF/(3*(1 << div)));
619}
620
621int clock_exit_limp(void)
622{
623 int fout;
624
625 /* Exit LIMP mode */
626 MCF_CCM_MISCCR = (MCF_CCM_MISCCR & ~ MCF_CCM_MISCCR_LIMP);
627
628 /* Wait for PLL to lock */
629 while (!(MCF_CCM_MISCCR & MCF_CCM_MISCCR_PLL_LOCK))
630 ;
631
632 fout = get_sys_clock();
633
634 return fout;
635}
636
637int get_sys_clock(void)
638{
639 int divider;
640
641 /* Test to see if device is in LIMP mode */
642 if (MCF_CCM_MISCCR & MCF_CCM_MISCCR_LIMP) {
643 divider = MCF_CCM_CDR & MCF_CCM_CDR_LPDIV(0xF);
644 return (FREF/(2 << divider));
645 }
646 else
647 return ((FREF * MCF_PLL_PFDR) / (BUSDIV * 4));
648}
diff --git a/arch/m68k/platform/532x/gpio.c b/arch/m68k/platform/532x/gpio.c
new file mode 100644
index 000000000000..212a85deac90
--- /dev/null
+++ b/arch/m68k/platform/532x/gpio.c
@@ -0,0 +1,337 @@
1/*
2 * Coldfire generic GPIO support
3 *
4 * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14*/
15
16#include <linux/kernel.h>
17#include <linux/init.h>
18
19#include <asm/coldfire.h>
20#include <asm/mcfsim.h>
21#include <asm/mcfgpio.h>
22
23static struct mcf_gpio_chip mcf_gpio_chips[] = {
24 {
25 .gpio_chip = {
26 .label = "PIRQ",
27 .request = mcf_gpio_request,
28 .free = mcf_gpio_free,
29 .direction_input = mcf_gpio_direction_input,
30 .direction_output = mcf_gpio_direction_output,
31 .get = mcf_gpio_get_value,
32 .set = mcf_gpio_set_value,
33 .ngpio = 8,
34 },
35 .pddr = (void __iomem *) MCFEPORT_EPDDR,
36 .podr = (void __iomem *) MCFEPORT_EPDR,
37 .ppdr = (void __iomem *) MCFEPORT_EPPDR,
38 },
39 {
40 .gpio_chip = {
41 .label = "FECH",
42 .request = mcf_gpio_request,
43 .free = mcf_gpio_free,
44 .direction_input = mcf_gpio_direction_input,
45 .direction_output = mcf_gpio_direction_output,
46 .get = mcf_gpio_get_value,
47 .set = mcf_gpio_set_value_fast,
48 .base = 8,
49 .ngpio = 8,
50 },
51 .pddr = (void __iomem *) MCFGPIO_PDDR_FECH,
52 .podr = (void __iomem *) MCFGPIO_PODR_FECH,
53 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FECH,
54 .setr = (void __iomem *) MCFGPIO_PPDSDR_FECH,
55 .clrr = (void __iomem *) MCFGPIO_PCLRR_FECH,
56 },
57 {
58 .gpio_chip = {
59 .label = "FECL",
60 .request = mcf_gpio_request,
61 .free = mcf_gpio_free,
62 .direction_input = mcf_gpio_direction_input,
63 .direction_output = mcf_gpio_direction_output,
64 .get = mcf_gpio_get_value,
65 .set = mcf_gpio_set_value_fast,
66 .base = 16,
67 .ngpio = 8,
68 },
69 .pddr = (void __iomem *) MCFGPIO_PDDR_FECL,
70 .podr = (void __iomem *) MCFGPIO_PODR_FECL,
71 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FECL,
72 .setr = (void __iomem *) MCFGPIO_PPDSDR_FECL,
73 .clrr = (void __iomem *) MCFGPIO_PCLRR_FECL,
74 },
75 {
76 .gpio_chip = {
77 .label = "SSI",
78 .request = mcf_gpio_request,
79 .free = mcf_gpio_free,
80 .direction_input = mcf_gpio_direction_input,
81 .direction_output = mcf_gpio_direction_output,
82 .get = mcf_gpio_get_value,
83 .set = mcf_gpio_set_value_fast,
84 .base = 24,
85 .ngpio = 5,
86 },
87 .pddr = (void __iomem *) MCFGPIO_PDDR_SSI,
88 .podr = (void __iomem *) MCFGPIO_PODR_SSI,
89 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_SSI,
90 .setr = (void __iomem *) MCFGPIO_PPDSDR_SSI,
91 .clrr = (void __iomem *) MCFGPIO_PCLRR_SSI,
92 },
93 {
94 .gpio_chip = {
95 .label = "BUSCTL",
96 .request = mcf_gpio_request,
97 .free = mcf_gpio_free,
98 .direction_input = mcf_gpio_direction_input,
99 .direction_output = mcf_gpio_direction_output,
100 .get = mcf_gpio_get_value,
101 .set = mcf_gpio_set_value_fast,
102 .base = 32,
103 .ngpio = 4,
104 },
105 .pddr = (void __iomem *) MCFGPIO_PDDR_BUSCTL,
106 .podr = (void __iomem *) MCFGPIO_PODR_BUSCTL,
107 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
108 .setr = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
109 .clrr = (void __iomem *) MCFGPIO_PCLRR_BUSCTL,
110 },
111 {
112 .gpio_chip = {
113 .label = "BE",
114 .request = mcf_gpio_request,
115 .free = mcf_gpio_free,
116 .direction_input = mcf_gpio_direction_input,
117 .direction_output = mcf_gpio_direction_output,
118 .get = mcf_gpio_get_value,
119 .set = mcf_gpio_set_value_fast,
120 .base = 40,
121 .ngpio = 4,
122 },
123 .pddr = (void __iomem *) MCFGPIO_PDDR_BE,
124 .podr = (void __iomem *) MCFGPIO_PODR_BE,
125 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_BE,
126 .setr = (void __iomem *) MCFGPIO_PPDSDR_BE,
127 .clrr = (void __iomem *) MCFGPIO_PCLRR_BE,
128 },
129 {
130 .gpio_chip = {
131 .label = "CS",
132 .request = mcf_gpio_request,
133 .free = mcf_gpio_free,
134 .direction_input = mcf_gpio_direction_input,
135 .direction_output = mcf_gpio_direction_output,
136 .get = mcf_gpio_get_value,
137 .set = mcf_gpio_set_value_fast,
138 .base = 49,
139 .ngpio = 5,
140 },
141 .pddr = (void __iomem *) MCFGPIO_PDDR_CS,
142 .podr = (void __iomem *) MCFGPIO_PODR_CS,
143 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_CS,
144 .setr = (void __iomem *) MCFGPIO_PPDSDR_CS,
145 .clrr = (void __iomem *) MCFGPIO_PCLRR_CS,
146 },
147 {
148 .gpio_chip = {
149 .label = "PWM",
150 .request = mcf_gpio_request,
151 .free = mcf_gpio_free,
152 .direction_input = mcf_gpio_direction_input,
153 .direction_output = mcf_gpio_direction_output,
154 .get = mcf_gpio_get_value,
155 .set = mcf_gpio_set_value_fast,
156 .base = 58,
157 .ngpio = 4,
158 },
159 .pddr = (void __iomem *) MCFGPIO_PDDR_PWM,
160 .podr = (void __iomem *) MCFGPIO_PODR_PWM,
161 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_PWM,
162 .setr = (void __iomem *) MCFGPIO_PPDSDR_PWM,
163 .clrr = (void __iomem *) MCFGPIO_PCLRR_PWM,
164 },
165 {
166 .gpio_chip = {
167 .label = "FECI2C",
168 .request = mcf_gpio_request,
169 .free = mcf_gpio_free,
170 .direction_input = mcf_gpio_direction_input,
171 .direction_output = mcf_gpio_direction_output,
172 .get = mcf_gpio_get_value,
173 .set = mcf_gpio_set_value_fast,
174 .base = 64,
175 .ngpio = 4,
176 },
177 .pddr = (void __iomem *) MCFGPIO_PDDR_FECI2C,
178 .podr = (void __iomem *) MCFGPIO_PODR_FECI2C,
179 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
180 .setr = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
181 .clrr = (void __iomem *) MCFGPIO_PCLRR_FECI2C,
182 },
183 {
184 .gpio_chip = {
185 .label = "UART",
186 .request = mcf_gpio_request,
187 .free = mcf_gpio_free,
188 .direction_input = mcf_gpio_direction_input,
189 .direction_output = mcf_gpio_direction_output,
190 .get = mcf_gpio_get_value,
191 .set = mcf_gpio_set_value_fast,
192 .base = 72,
193 .ngpio = 8,
194 },
195 .pddr = (void __iomem *) MCFGPIO_PDDR_UART,
196 .podr = (void __iomem *) MCFGPIO_PODR_UART,
197 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_UART,
198 .setr = (void __iomem *) MCFGPIO_PPDSDR_UART,
199 .clrr = (void __iomem *) MCFGPIO_PCLRR_UART,
200 },
201 {
202 .gpio_chip = {
203 .label = "QSPI",
204 .request = mcf_gpio_request,
205 .free = mcf_gpio_free,
206 .direction_input = mcf_gpio_direction_input,
207 .direction_output = mcf_gpio_direction_output,
208 .get = mcf_gpio_get_value,
209 .set = mcf_gpio_set_value_fast,
210 .base = 80,
211 .ngpio = 6,
212 },
213 .pddr = (void __iomem *) MCFGPIO_PDDR_QSPI,
214 .podr = (void __iomem *) MCFGPIO_PODR_QSPI,
215 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
216 .setr = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
217 .clrr = (void __iomem *) MCFGPIO_PCLRR_QSPI,
218 },
219 {
220 .gpio_chip = {
221 .label = "TIMER",
222 .request = mcf_gpio_request,
223 .free = mcf_gpio_free,
224 .direction_input = mcf_gpio_direction_input,
225 .direction_output = mcf_gpio_direction_output,
226 .get = mcf_gpio_get_value,
227 .set = mcf_gpio_set_value_fast,
228 .base = 88,
229 .ngpio = 4,
230 },
231 .pddr = (void __iomem *) MCFGPIO_PDDR_TIMER,
232 .podr = (void __iomem *) MCFGPIO_PODR_TIMER,
233 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_TIMER,
234 .setr = (void __iomem *) MCFGPIO_PPDSDR_TIMER,
235 .clrr = (void __iomem *) MCFGPIO_PCLRR_TIMER,
236 },
237 {
238 .gpio_chip = {
239 .label = "LCDDATAH",
240 .request = mcf_gpio_request,
241 .free = mcf_gpio_free,
242 .direction_input = mcf_gpio_direction_input,
243 .direction_output = mcf_gpio_direction_output,
244 .get = mcf_gpio_get_value,
245 .set = mcf_gpio_set_value_fast,
246 .base = 96,
247 .ngpio = 2,
248 },
249 .pddr = (void __iomem *) MCFGPIO_PDDR_LCDDATAH,
250 .podr = (void __iomem *) MCFGPIO_PODR_LCDDATAH,
251 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_LCDDATAH,
252 .setr = (void __iomem *) MCFGPIO_PPDSDR_LCDDATAH,
253 .clrr = (void __iomem *) MCFGPIO_PCLRR_LCDDATAH,
254 },
255 {
256 .gpio_chip = {
257 .label = "LCDDATAM",
258 .request = mcf_gpio_request,
259 .free = mcf_gpio_free,
260 .direction_input = mcf_gpio_direction_input,
261 .direction_output = mcf_gpio_direction_output,
262 .get = mcf_gpio_get_value,
263 .set = mcf_gpio_set_value_fast,
264 .base = 104,
265 .ngpio = 8,
266 },
267 .pddr = (void __iomem *) MCFGPIO_PDDR_LCDDATAM,
268 .podr = (void __iomem *) MCFGPIO_PODR_LCDDATAM,
269 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_LCDDATAM,
270 .setr = (void __iomem *) MCFGPIO_PPDSDR_LCDDATAM,
271 .clrr = (void __iomem *) MCFGPIO_PCLRR_LCDDATAM,
272 },
273 {
274 .gpio_chip = {
275 .label = "LCDDATAL",
276 .request = mcf_gpio_request,
277 .free = mcf_gpio_free,
278 .direction_input = mcf_gpio_direction_input,
279 .direction_output = mcf_gpio_direction_output,
280 .get = mcf_gpio_get_value,
281 .set = mcf_gpio_set_value_fast,
282 .base = 112,
283 .ngpio = 8,
284 },
285 .pddr = (void __iomem *) MCFGPIO_PDDR_LCDDATAL,
286 .podr = (void __iomem *) MCFGPIO_PODR_LCDDATAL,
287 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_LCDDATAL,
288 .setr = (void __iomem *) MCFGPIO_PPDSDR_LCDDATAL,
289 .clrr = (void __iomem *) MCFGPIO_PCLRR_LCDDATAL,
290 },
291 {
292 .gpio_chip = {
293 .label = "LCDCTLH",
294 .request = mcf_gpio_request,
295 .free = mcf_gpio_free,
296 .direction_input = mcf_gpio_direction_input,
297 .direction_output = mcf_gpio_direction_output,
298 .get = mcf_gpio_get_value,
299 .set = mcf_gpio_set_value_fast,
300 .base = 120,
301 .ngpio = 1,
302 },
303 .pddr = (void __iomem *) MCFGPIO_PDDR_LCDCTLH,
304 .podr = (void __iomem *) MCFGPIO_PODR_LCDCTLH,
305 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_LCDCTLH,
306 .setr = (void __iomem *) MCFGPIO_PPDSDR_LCDCTLH,
307 .clrr = (void __iomem *) MCFGPIO_PCLRR_LCDCTLH,
308 },
309 {
310 .gpio_chip = {
311 .label = "LCDCTLL",
312 .request = mcf_gpio_request,
313 .free = mcf_gpio_free,
314 .direction_input = mcf_gpio_direction_input,
315 .direction_output = mcf_gpio_direction_output,
316 .get = mcf_gpio_get_value,
317 .set = mcf_gpio_set_value_fast,
318 .base = 128,
319 .ngpio = 8,
320 },
321 .pddr = (void __iomem *) MCFGPIO_PDDR_LCDCTLL,
322 .podr = (void __iomem *) MCFGPIO_PODR_LCDCTLL,
323 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_LCDCTLL,
324 .setr = (void __iomem *) MCFGPIO_PPDSDR_LCDCTLL,
325 .clrr = (void __iomem *) MCFGPIO_PCLRR_LCDCTLL,
326 },
327};
328
329static int __init mcf_gpio_init(void)
330{
331 unsigned i = 0;
332 while (i < ARRAY_SIZE(mcf_gpio_chips))
333 (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
334 return 0;
335}
336
337core_initcall(mcf_gpio_init);
diff --git a/arch/m68k/platform/5407/Makefile b/arch/m68k/platform/5407/Makefile
new file mode 100644
index 000000000000..e83fe148eddc
--- /dev/null
+++ b/arch/m68k/platform/5407/Makefile
@@ -0,0 +1,18 @@
1#
2# Makefile for the m68knommu linux kernel.
3#
4
5#
6# If you want to play with the HW breakpoints then you will
7# need to add define this, which will give you a stack backtrace
8# on the console port whenever a DBG interrupt occurs. You have to
9# set up you HW breakpoints to trigger a DBG interrupt:
10#
11# ccflags-y := -DTRAP_DBG_INTERRUPT
12# asflags-y := -DTRAP_DBG_INTERRUPT
13#
14
15asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
16
17obj-y := config.o gpio.o
18
diff --git a/arch/m68k/platform/5407/config.c b/arch/m68k/platform/5407/config.c
new file mode 100644
index 000000000000..70ea789a400c
--- /dev/null
+++ b/arch/m68k/platform/5407/config.c
@@ -0,0 +1,122 @@
1/***************************************************************************/
2
3/*
4 * linux/arch/m68knommu/platform/5407/config.c
5 *
6 * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
7 * Copyright (C) 2000, Lineo (www.lineo.com)
8 */
9
10/***************************************************************************/
11
12#include <linux/kernel.h>
13#include <linux/param.h>
14#include <linux/init.h>
15#include <linux/io.h>
16#include <asm/machdep.h>
17#include <asm/coldfire.h>
18#include <asm/mcfsim.h>
19#include <asm/mcfuart.h>
20
21/***************************************************************************/
22
23static struct mcf_platform_uart m5407_uart_platform[] = {
24 {
25 .mapbase = MCF_MBAR + MCFUART_BASE1,
26 .irq = 73,
27 },
28 {
29 .mapbase = MCF_MBAR + MCFUART_BASE2,
30 .irq = 74,
31 },
32 { },
33};
34
35static struct platform_device m5407_uart = {
36 .name = "mcfuart",
37 .id = 0,
38 .dev.platform_data = m5407_uart_platform,
39};
40
41static struct platform_device *m5407_devices[] __initdata = {
42 &m5407_uart,
43};
44
45/***************************************************************************/
46
47static void __init m5407_uart_init_line(int line, int irq)
48{
49 if (line == 0) {
50 writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
51 writeb(irq, MCF_MBAR + MCFUART_BASE1 + MCFUART_UIVR);
52 mcf_mapirq2imr(irq, MCFINTC_UART0);
53 } else if (line == 1) {
54 writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
55 writeb(irq, MCF_MBAR + MCFUART_BASE2 + MCFUART_UIVR);
56 mcf_mapirq2imr(irq, MCFINTC_UART1);
57 }
58}
59
60static void __init m5407_uarts_init(void)
61{
62 const int nrlines = ARRAY_SIZE(m5407_uart_platform);
63 int line;
64
65 for (line = 0; (line < nrlines); line++)
66 m5407_uart_init_line(line, m5407_uart_platform[line].irq);
67}
68
69/***************************************************************************/
70
71static void __init m5407_timers_init(void)
72{
73 /* Timer1 is always used as system timer */
74 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
75 MCF_MBAR + MCFSIM_TIMER1ICR);
76 mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);
77
78#ifdef CONFIG_HIGHPROFILE
79 /* Timer2 is to be used as a high speed profile timer */
80 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
81 MCF_MBAR + MCFSIM_TIMER2ICR);
82 mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);
83#endif
84}
85
86/***************************************************************************/
87
88void m5407_cpu_reset(void)
89{
90 local_irq_disable();
91 /* set watchdog to soft reset, and enabled */
92 __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
93 for (;;)
94 /* wait for watchdog to timeout */;
95}
96
97/***************************************************************************/
98
99void __init config_BSP(char *commandp, int size)
100{
101 mach_reset = m5407_cpu_reset;
102 m5407_timers_init();
103 m5407_uarts_init();
104
105 /* Only support the external interrupts on their primary level */
106 mcf_mapirq2imr(25, MCFINTC_EINT1);
107 mcf_mapirq2imr(27, MCFINTC_EINT3);
108 mcf_mapirq2imr(29, MCFINTC_EINT5);
109 mcf_mapirq2imr(31, MCFINTC_EINT7);
110}
111
112/***************************************************************************/
113
114static int __init init_BSP(void)
115{
116 platform_add_devices(m5407_devices, ARRAY_SIZE(m5407_devices));
117 return 0;
118}
119
120arch_initcall(init_BSP);
121
122/***************************************************************************/
diff --git a/arch/m68k/platform/5407/gpio.c b/arch/m68k/platform/5407/gpio.c
new file mode 100644
index 000000000000..5850612b4a38
--- /dev/null
+++ b/arch/m68k/platform/5407/gpio.c
@@ -0,0 +1,49 @@
1/*
2 * Coldfire generic GPIO support
3 *
4 * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14*/
15
16#include <linux/kernel.h>
17#include <linux/init.h>
18
19#include <asm/coldfire.h>
20#include <asm/mcfsim.h>
21#include <asm/mcfgpio.h>
22
23static struct mcf_gpio_chip mcf_gpio_chips[] = {
24 {
25 .gpio_chip = {
26 .label = "PP",
27 .request = mcf_gpio_request,
28 .free = mcf_gpio_free,
29 .direction_input = mcf_gpio_direction_input,
30 .direction_output = mcf_gpio_direction_output,
31 .get = mcf_gpio_get_value,
32 .set = mcf_gpio_set_value,
33 .ngpio = 16,
34 },
35 .pddr = (void __iomem *) MCFSIM_PADDR,
36 .podr = (void __iomem *) MCFSIM_PADAT,
37 .ppdr = (void __iomem *) MCFSIM_PADAT,
38 },
39};
40
41static int __init mcf_gpio_init(void)
42{
43 unsigned i = 0;
44 while (i < ARRAY_SIZE(mcf_gpio_chips))
45 (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
46 return 0;
47}
48
49core_initcall(mcf_gpio_init);
diff --git a/arch/m68k/platform/54xx/Makefile b/arch/m68k/platform/54xx/Makefile
new file mode 100644
index 000000000000..6cfd090ec3cd
--- /dev/null
+++ b/arch/m68k/platform/54xx/Makefile
@@ -0,0 +1,19 @@
1#
2# Makefile for the m68knommu linux kernel.
3#
4
5#
6# If you want to play with the HW breakpoints then you will
7# need to add define this, which will give you a stack backtrace
8# on the console port whenever a DBG interrupt occurs. You have to
9# set up you HW breakpoints to trigger a DBG interrupt:
10#
11# EXTRA_CFLAGS += -DTRAP_DBG_INTERRUPT
12# EXTRA_AFLAGS += -DTRAP_DBG_INTERRUPT
13#
14
15asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
16
17obj-y := config.o
18obj-$(CONFIG_FIREBEE) += firebee.o
19
diff --git a/arch/m68k/platform/54xx/config.c b/arch/m68k/platform/54xx/config.c
new file mode 100644
index 000000000000..78130984db95
--- /dev/null
+++ b/arch/m68k/platform/54xx/config.c
@@ -0,0 +1,115 @@
1/***************************************************************************/
2
3/*
4 * linux/arch/m68knommu/platform/54xx/config.c
5 *
6 * Copyright (C) 2010, Philippe De Muyter <phdm@macqel.be>
7 */
8
9/***************************************************************************/
10
11#include <linux/kernel.h>
12#include <linux/param.h>
13#include <linux/init.h>
14#include <linux/interrupt.h>
15#include <linux/io.h>
16#include <asm/machdep.h>
17#include <asm/coldfire.h>
18#include <asm/m54xxsim.h>
19#include <asm/mcfuart.h>
20#include <asm/m54xxgpt.h>
21
22/***************************************************************************/
23
24static struct mcf_platform_uart m54xx_uart_platform[] = {
25 {
26 .mapbase = MCF_MBAR + MCFUART_BASE1,
27 .irq = 64 + 35,
28 },
29 {
30 .mapbase = MCF_MBAR + MCFUART_BASE2,
31 .irq = 64 + 34,
32 },
33 {
34 .mapbase = MCF_MBAR + MCFUART_BASE3,
35 .irq = 64 + 33,
36 },
37 {
38 .mapbase = MCF_MBAR + MCFUART_BASE4,
39 .irq = 64 + 32,
40 },
41};
42
43static struct platform_device m54xx_uart = {
44 .name = "mcfuart",
45 .id = 0,
46 .dev.platform_data = m54xx_uart_platform,
47};
48
49static struct platform_device *m54xx_devices[] __initdata = {
50 &m54xx_uart,
51};
52
53
54/***************************************************************************/
55
56static void __init m54xx_uart_init_line(int line, int irq)
57{
58 int rts_cts;
59
60 /* enable io pins */
61 switch (line) {
62 case 0:
63 rts_cts = 0; break;
64 case 1:
65 rts_cts = MCF_PAR_PSC_RTS_RTS; break;
66 case 2:
67 rts_cts = MCF_PAR_PSC_RTS_RTS | MCF_PAR_PSC_CTS_CTS; break;
68 case 3:
69 rts_cts = 0; break;
70 }
71 __raw_writeb(MCF_PAR_PSC_TXD | rts_cts | MCF_PAR_PSC_RXD,
72 MCF_MBAR + MCF_PAR_PSC(line));
73}
74
75static void __init m54xx_uarts_init(void)
76{
77 const int nrlines = ARRAY_SIZE(m54xx_uart_platform);
78 int line;
79
80 for (line = 0; (line < nrlines); line++)
81 m54xx_uart_init_line(line, m54xx_uart_platform[line].irq);
82}
83
84/***************************************************************************/
85
86static void mcf54xx_reset(void)
87{
88 /* disable interrupts and enable the watchdog */
89 asm("movew #0x2700, %sr\n");
90 __raw_writel(0, MCF_MBAR + MCF_GPT_GMS0);
91 __raw_writel(MCF_GPT_GCIR_CNT(1), MCF_MBAR + MCF_GPT_GCIR0);
92 __raw_writel(MCF_GPT_GMS_WDEN | MCF_GPT_GMS_CE | MCF_GPT_GMS_TMS(4),
93 MCF_MBAR + MCF_GPT_GMS0);
94}
95
96/***************************************************************************/
97
98void __init config_BSP(char *commandp, int size)
99{
100 mach_reset = mcf54xx_reset;
101 m54xx_uarts_init();
102}
103
104/***************************************************************************/
105
106static int __init init_BSP(void)
107{
108
109 platform_add_devices(m54xx_devices, ARRAY_SIZE(m54xx_devices));
110 return 0;
111}
112
113arch_initcall(init_BSP);
114
115/***************************************************************************/
diff --git a/arch/m68k/platform/54xx/firebee.c b/arch/m68k/platform/54xx/firebee.c
new file mode 100644
index 000000000000..46d50534f981
--- /dev/null
+++ b/arch/m68k/platform/54xx/firebee.c
@@ -0,0 +1,86 @@
1/***************************************************************************/
2
3/*
4 * firebee.c -- extra startup code support for the FireBee boards
5 *
6 * Copyright (C) 2011, Greg Ungerer (gerg@snapgear.com)
7 */
8
9/***************************************************************************/
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/io.h>
14#include <linux/platform_device.h>
15#include <linux/mtd/mtd.h>
16#include <linux/mtd/partitions.h>
17#include <linux/mtd/physmap.h>
18#include <asm/coldfire.h>
19#include <asm/mcfsim.h>
20
21/***************************************************************************/
22
23/*
24 * 8MB of NOR flash fitted to the FireBee board.
25 */
26#define FLASH_PHYS_ADDR 0xe0000000 /* Physical address of flash */
27#define FLASH_PHYS_SIZE 0x00800000 /* Size of flash */
28
29#define PART_BOOT_START 0x00000000 /* Start at bottom of flash */
30#define PART_BOOT_SIZE 0x00040000 /* 256k in size */
31#define PART_IMAGE_START 0x00040000 /* Start after boot loader */
32#define PART_IMAGE_SIZE 0x006c0000 /* Most of flash */
33#define PART_FPGA_START 0x00700000 /* Start at offset 7MB */
34#define PART_FPGA_SIZE 0x00100000 /* 1MB in size */
35
36static struct mtd_partition firebee_flash_parts[] = {
37 {
38 .name = "dBUG",
39 .offset = PART_BOOT_START,
40 .size = PART_BOOT_SIZE,
41 },
42 {
43 .name = "FPGA",
44 .offset = PART_FPGA_START,
45 .size = PART_FPGA_SIZE,
46 },
47 {
48 .name = "image",
49 .offset = PART_IMAGE_START,
50 .size = PART_IMAGE_SIZE,
51 },
52};
53
54static struct physmap_flash_data firebee_flash_data = {
55 .width = 2,
56 .nr_parts = ARRAY_SIZE(firebee_flash_parts),
57 .parts = firebee_flash_parts,
58};
59
60static struct resource firebee_flash_resource = {
61 .start = FLASH_PHYS_ADDR,
62 .end = FLASH_PHYS_ADDR + FLASH_PHYS_SIZE,
63 .flags = IORESOURCE_MEM,
64};
65
66static struct platform_device firebee_flash = {
67 .name = "physmap-flash",
68 .id = 0,
69 .dev = {
70 .platform_data = &firebee_flash_data,
71 },
72 .num_resources = 1,
73 .resource = &firebee_flash_resource,
74};
75
76/***************************************************************************/
77
78static int __init init_firebee(void)
79{
80 platform_device_register(&firebee_flash);
81 return 0;
82}
83
84arch_initcall(init_firebee);
85
86/***************************************************************************/
diff --git a/arch/m68k/platform/68328/Makefile b/arch/m68k/platform/68328/Makefile
new file mode 100644
index 000000000000..5e5435552d56
--- /dev/null
+++ b/arch/m68k/platform/68328/Makefile
@@ -0,0 +1,22 @@
1#
2# Makefile for arch/m68knommu/platform/68328.
3#
4
5head-y = head-$(MODEL).o
6head-$(CONFIG_PILOT) = head-pilot.o
7head-$(CONFIG_DRAGEN2) = head-de2.o
8
9obj-y += entry.o ints.o timers.o
10obj-$(CONFIG_M68328) += config.o
11obj-$(CONFIG_ROM) += romvec.o
12
13extra-y := head.o
14extra-$(CONFIG_M68328) += bootlogo.rh head.o
15
16$(obj)/bootlogo.rh: $(src)/bootlogo.h
17 perl $(src)/bootlogo.pl < $(src)/bootlogo.h > $(obj)/bootlogo.rh
18
19$(obj)/head.o: $(obj)/$(head-y)
20 ln -sf $(head-y) $(obj)/head.o
21
22clean-files := $(obj)/bootlogo.rh $(obj)/head.o $(head-y)
diff --git a/arch/m68k/platform/68328/bootlogo.h b/arch/m68k/platform/68328/bootlogo.h
new file mode 100644
index 000000000000..67bc2c17386e
--- /dev/null
+++ b/arch/m68k/platform/68328/bootlogo.h
@@ -0,0 +1,270 @@
1#define bootlogo_width 160
2#define bootlogo_height 160
3static unsigned char bootlogo_bits[] = {
4 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x01, 0x00, 0x00, 0x00,
5 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
6 0x00, 0x00, 0x40, 0x55, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
7 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x55,
8 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
9 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xac, 0x00, 0x00, 0x00, 0x00, 0x00,
10 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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165 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x95,
166 0x33, 0x7e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
167 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xdd, 0xfb, 0x7e, 0x00, 0x00,
168 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
169 0x00, 0x00, 0x80, 0x1d, 0xf8, 0x7e, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00,
170 0x02, 0x00, 0x40, 0x00, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x9b,
171 0x70, 0x7e, 0x00, 0x00, 0x08, 0x00, 0xe0, 0x00, 0x02, 0x00, 0x47, 0x80,
172 0x08, 0x00, 0x00, 0x08, 0x00, 0x00, 0x80, 0x03, 0x00, 0x7e, 0x00, 0x00,
173 0x3c, 0xa3, 0x20, 0x31, 0x52, 0x02, 0x49, 0xcc, 0x3f, 0xa3, 0x94, 0x08,
174 0x00, 0x00, 0x00, 0x27, 0x02, 0x7e, 0x00, 0x00, 0x88, 0xe4, 0x20, 0x41,
175 0xb2, 0x05, 0x49, 0x90, 0x88, 0xe4, 0x6c, 0x09, 0x00, 0x00, 0x00, 0x01,
176 0x00, 0x7e, 0x00, 0x00, 0x88, 0x24, 0xe0, 0x70, 0x92, 0x04, 0x47, 0x9c,
177 0x88, 0x24, 0x24, 0x09, 0x00, 0x00, 0x00, 0x13, 0x48, 0x7e, 0x00, 0x00,
178 0x88, 0x24, 0x20, 0x48, 0x92, 0x04, 0x41, 0x92, 0x88, 0x24, 0x24, 0x01,
179 0x00, 0x00, 0x00, 0x43, 0x00, 0xfe, 0x00, 0x00, 0x88, 0x24, 0x20, 0x48,
180 0x92, 0x04, 0x41, 0x92, 0x88, 0x24, 0x24, 0x09, 0x00, 0x00, 0x00, 0x07,
181 0x94, 0xce, 0x00, 0x00, 0x08, 0x23, 0x20, 0xb0, 0x92, 0x04, 0x41, 0x2c,
182 0x0b, 0x23, 0x24, 0x09, 0x00, 0x00, 0x00, 0x49, 0x02, 0xce, 0x01, 0x00,
183 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
184 0x00, 0x00, 0x00, 0x11, 0x08, 0xdc, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00,
185 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x41,
186 0x01, 0xfc, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
187 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x01, 0x00, 0xf8, 0x07, 0x00,
188 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
189 0x00, 0x00, 0xc0, 0x01, 0x00, 0xf8, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00,
190 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x01,
191 0x00, 0xf0, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
192 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x00, 0xf0, 0x1f, 0x00,
193 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
194 0x00, 0x00, 0x70, 0x00, 0x00, 0xe0, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00,
195 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x00,
196 0x00, 0xe0, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
197 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3c, 0x00, 0x00, 0xe0, 0x7f, 0x00,
198 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
199 0x00, 0x00, 0x3c, 0x00, 0x00, 0xe0, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00,
200 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3e, 0x00,
201 0x00, 0xc0, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
202 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x00, 0x00, 0xc0, 0xff, 0x01,
203 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
204 0x00, 0x00, 0x1f, 0x00, 0x00, 0x80, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00,
205 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x00,
206 0x00, 0x80, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
207 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x0f, 0x00, 0x00, 0x00, 0xff, 0x07,
208 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
209 0x00, 0x80, 0x07, 0x00, 0x00, 0x00, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00,
210 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x07, 0x00,
211 0x00, 0x00, 0xfe, 0x07, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00,
212 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x07, 0x00, 0x00, 0x00, 0xfe, 0x0f,
213 0x00, 0x00, 0x80, 0x08, 0x00, 0x00, 0x05, 0x00, 0x00, 0x80, 0x08, 0x00,
214 0x00, 0xc0, 0x03, 0x00, 0x78, 0x00, 0xfe, 0x0f, 0x00, 0x00, 0x40, 0x10,
215 0x12, 0x10, 0x05, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0xe0, 0x03, 0x00,
216 0x84, 0x00, 0xfe, 0x0f, 0x00, 0x00, 0x20, 0x26, 0x0a, 0x10, 0x9d, 0x39,
217 0xa6, 0xb2, 0x0a, 0x00, 0x00, 0xe0, 0x01, 0x00, 0x02, 0x00, 0xfe, 0x0f,
218 0x00, 0x00, 0x20, 0x21, 0x06, 0x28, 0x25, 0x4a, 0xa9, 0x8a, 0x09, 0x00,
219 0x00, 0xe0, 0x01, 0x22, 0x02, 0x00, 0xfc, 0x1f, 0x00, 0x00, 0x20, 0x21,
220 0x0e, 0x38, 0xa5, 0x4b, 0xa9, 0xb2, 0x09, 0x00, 0x00, 0xf0, 0x01, 0x22,
221 0x02, 0x00, 0xfc, 0x1f, 0x00, 0x00, 0x20, 0x21, 0x12, 0x44, 0xa5, 0x4a,
222 0x49, 0xa1, 0x0a, 0x00, 0x00, 0xf8, 0x01, 0x22, 0x02, 0x00, 0xfc, 0x1f,
223 0x00, 0x00, 0x20, 0x26, 0x52, 0x44, 0x9d, 0x4d, 0x46, 0x99, 0x0a, 0x00,
224 0x00, 0xfc, 0x01, 0x22, 0x02, 0x00, 0xfc, 0x1f, 0x00, 0x00, 0x40, 0x10,
225 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x01, 0xb2,
226 0x84, 0x00, 0xfc, 0x1f, 0x00, 0x00, 0x80, 0x08, 0x00, 0x00, 0x00, 0x00,
227 0x00, 0x00, 0x00, 0x00, 0x00, 0x7c, 0x01, 0x6e, 0x78, 0x00, 0xfc, 0x1f,
228 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
229 0x00, 0xfc, 0x01, 0x02, 0x00, 0x00, 0xfc, 0x1f, 0x00, 0x00, 0x00, 0x00,
230 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x88, 0x01, 0x02,
231 0x00, 0x00, 0xfe, 0x1f, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00,
232 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x06, 0x00, 0x00, 0xfc, 0x0f,
233 0x00, 0x00, 0x80, 0x08, 0x00, 0x00, 0x20, 0x01, 0x02, 0x00, 0x00, 0x00,
234 0x00, 0x24, 0x06, 0x00, 0x00, 0x00, 0xfc, 0x07, 0x00, 0x00, 0x40, 0x10,
235 0x1e, 0x20, 0x90, 0x78, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0c, 0x00,
236 0x00, 0x80, 0xfc, 0x03, 0x00, 0x00, 0x20, 0x26, 0x22, 0x20, 0xf9, 0x89,
237 0x32, 0xe7, 0x08, 0x00, 0x00, 0x92, 0x38, 0x00, 0x00, 0x00, 0xfc, 0x01,
238 0x00, 0x00, 0x20, 0x21, 0x22, 0xa0, 0x92, 0x88, 0x4a, 0x29, 0x15, 0x00,
239 0x00, 0x00, 0x78, 0x00, 0x00, 0x40, 0xfa, 0x04, 0x00, 0x00, 0x20, 0x21,
240 0x22, 0xa0, 0x93, 0x88, 0x4a, 0x29, 0x1d, 0x00, 0x00, 0x11, 0xf2, 0x00,
241 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x20, 0x21, 0x22, 0xa8, 0x90, 0x88,
242 0x4a, 0x29, 0x05, 0x00, 0x48, 0x40, 0xf0, 0x01, 0x00, 0x80, 0x14, 0x04,
243 0x00, 0x00, 0x20, 0x26, 0x9e, 0x10, 0x93, 0x78, 0x32, 0x29, 0x19, 0x00,
244 0x00, 0x09, 0xe0, 0x03, 0x00, 0x00, 0x80, 0x10, 0x00, 0x00, 0x40, 0x10,
245 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0xc5, 0x03,
246 0x00, 0x40, 0x22, 0x00, 0x00, 0x00, 0x80, 0x08, 0x00, 0x00, 0x00, 0x00,
247 0x00, 0x00, 0x00, 0x00, 0x40, 0x04, 0xc0, 0x07, 0x00, 0x20, 0x08, 0x04,
248 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
249 0x08, 0x50, 0x90, 0x03, 0x00, 0xb0, 0x00, 0x41, 0x00, 0x00, 0x00, 0x00,
250 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00,
251 0x00, 0x38, 0x22, 0x08, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
252 0x00, 0x00, 0x00, 0x00, 0x48, 0x04, 0x44, 0x00, 0x00, 0x3c, 0x08, 0x00,
253 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
254 0x00, 0x20, 0x00, 0x00, 0x00, 0xbf, 0x40, 0x42, 0x00, 0x00, 0x00, 0x00,
255 0x00, 0x00, 0x40, 0x02, 0x00, 0x00, 0x00, 0x00, 0x24, 0x80, 0x48, 0x02,
256 0xc0, 0x1f, 0x00, 0x08, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x4e, 0x00,
257 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a, 0x00, 0x05, 0xf0, 0x3f, 0x09, 0x00,
258 0x00, 0x10, 0x24, 0x48, 0x10, 0x12, 0x41, 0x52, 0x24, 0x09, 0x46, 0x71,
259 0x90, 0x20, 0x02, 0xfc, 0xff, 0x1f, 0x80, 0x22, 0x00, 0x90, 0x24, 0x49,
260 0x12, 0x92, 0x40, 0xb2, 0x24, 0x09, 0xc9, 0x49, 0x04, 0x80, 0x90, 0xfc,
261 0xff, 0xbf, 0x24, 0x00, 0x00, 0x90, 0x24, 0x49, 0x12, 0x92, 0x40, 0x92,
262 0x24, 0x06, 0x49, 0x48, 0x50, 0x0a, 0x02, 0xfe, 0xff, 0x3f, 0x00, 0x05,
263 0x00, 0x50, 0xa5, 0x4a, 0x15, 0x92, 0x40, 0x92, 0x24, 0x06, 0x49, 0x48,
264 0x80, 0x40, 0x48, 0xfe, 0xff, 0x3f, 0x49, 0x00, 0x00, 0x20, 0x42, 0x84,
265 0x88, 0x1a, 0x41, 0x92, 0x34, 0x49, 0x49, 0x68, 0x00, 0x38, 0x10, 0x07,
266 0x00, 0x60, 0x80, 0x00, 0x00, 0x20, 0x42, 0x84, 0x88, 0x14, 0x4e, 0x92,
267 0x28, 0x49, 0x46, 0x50, 0x00, 0x80, 0x83, 0x01, 0x00, 0xa0, 0x6a, 0x00,
268 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40,
269 0x00, 0x00, 0xfc, 0x00, 0x00, 0xc0, 0x3b, 0x00, 0x00, 0x00, 0x00, 0x00,
270 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, };
diff --git a/arch/m68k/platform/68328/bootlogo.pl b/arch/m68k/platform/68328/bootlogo.pl
new file mode 100644
index 000000000000..b04ae3f50da5
--- /dev/null
+++ b/arch/m68k/platform/68328/bootlogo.pl
@@ -0,0 +1,10 @@
1
2$_ = join("", <>);
3
4s/(0x[0-9a-f]{2})/sprintf("0x%.2x",ord(pack("b8",unpack("B8",chr(hex($1))))))/gei;
5
6s/^ / .byte /gm;
7s/[,};]+$//gm;
8s/^static.*//gm;
9
10print $_;
diff --git a/arch/m68k/platform/68328/config.c b/arch/m68k/platform/68328/config.c
new file mode 100644
index 000000000000..a7bd21deb00f
--- /dev/null
+++ b/arch/m68k/platform/68328/config.c
@@ -0,0 +1,52 @@
1/***************************************************************************/
2
3/*
4 * linux/arch/m68knommu/platform/68328/config.c
5 *
6 * Copyright (C) 1993 Hamish Macdonald
7 * Copyright (C) 1999 D. Jeff Dionne
8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file COPYING in the main directory of this archive
11 * for more details.
12 *
13 * VZ Support/Fixes Evan Stawnyczy <e@lineo.ca>
14 */
15
16/***************************************************************************/
17
18#include <linux/types.h>
19#include <linux/kernel.h>
20#include <asm/system.h>
21#include <asm/machdep.h>
22#include <asm/MC68328.h>
23
24/***************************************************************************/
25
26void m68328_timer_gettod(int *year, int *mon, int *day, int *hour, int *min, int *sec);
27
28/***************************************************************************/
29
30void m68328_reset (void)
31{
32 local_irq_disable();
33 asm volatile ("moveal #0x10c00000, %a0;\n\t"
34 "moveb #0, 0xFFFFF300;\n\t"
35 "moveal 0(%a0), %sp;\n\t"
36 "moveal 4(%a0), %a0;\n\t"
37 "jmp (%a0);");
38}
39
40/***************************************************************************/
41
42void config_BSP(char *command, int len)
43{
44 printk(KERN_INFO "\n68328 support D. Jeff Dionne <jeff@uclinux.org>\n");
45 printk(KERN_INFO "68328 support Kenneth Albanowski <kjahds@kjshds.com>\n");
46 printk(KERN_INFO "68328/Pilot support Bernhard Kuhn <kuhn@lpr.e-technik.tu-muenchen.de>\n");
47
48 mach_gettod = m68328_timer_gettod;
49 mach_reset = m68328_reset;
50}
51
52/***************************************************************************/
diff --git a/arch/m68k/platform/68328/entry.S b/arch/m68k/platform/68328/entry.S
new file mode 100644
index 000000000000..676960cf022a
--- /dev/null
+++ b/arch/m68k/platform/68328/entry.S
@@ -0,0 +1,263 @@
1/*
2 * linux/arch/m68knommu/platform/68328/entry.S
3 *
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file README.legal in the main directory of this archive
8 * for more details.
9 *
10 * Linux/m68k support by Hamish Macdonald
11 */
12
13#include <linux/sys.h>
14#include <linux/linkage.h>
15#include <asm/thread_info.h>
16#include <asm/unistd.h>
17#include <asm/errno.h>
18#include <asm/setup.h>
19#include <asm/segment.h>
20#include <asm/traps.h>
21#include <asm/asm-offsets.h>
22#include <asm/entry.h>
23
24.text
25
26.globl system_call
27.globl resume
28.globl ret_from_exception
29.globl ret_from_signal
30.globl sys_call_table
31.globl ret_from_interrupt
32.globl bad_interrupt
33.globl inthandler1
34.globl inthandler2
35.globl inthandler3
36.globl inthandler4
37.globl inthandler5
38.globl inthandler6
39.globl inthandler7
40
41badsys:
42 movel #-ENOSYS,%sp@(PT_OFF_D0)
43 jra ret_from_exception
44
45do_trace:
46 movel #-ENOSYS,%sp@(PT_OFF_D0) /* needed for strace*/
47 subql #4,%sp
48 SAVE_SWITCH_STACK
49 jbsr syscall_trace_enter
50 RESTORE_SWITCH_STACK
51 addql #4,%sp
52 movel %sp@(PT_OFF_ORIG_D0),%d1
53 movel #-ENOSYS,%d0
54 cmpl #NR_syscalls,%d1
55 jcc 1f
56 lsl #2,%d1
57 lea sys_call_table, %a0
58 jbsr %a0@(%d1)
59
601: movel %d0,%sp@(PT_OFF_D0) /* save the return value */
61 subql #4,%sp /* dummy return address */
62 SAVE_SWITCH_STACK
63 jbsr syscall_trace_leave
64
65ret_from_signal:
66 RESTORE_SWITCH_STACK
67 addql #4,%sp
68 jra ret_from_exception
69
70ENTRY(system_call)
71 SAVE_ALL
72
73 /* save top of frame*/
74 pea %sp@
75 jbsr set_esp0
76 addql #4,%sp
77
78 movel %sp@(PT_OFF_ORIG_D0),%d0
79
80 movel %sp,%d1 /* get thread_info pointer */
81 andl #-THREAD_SIZE,%d1
82 movel %d1,%a2
83 btst #(TIF_SYSCALL_TRACE%8),%a2@(TI_FLAGS+(31-TIF_SYSCALL_TRACE)/8)
84 jne do_trace
85 cmpl #NR_syscalls,%d0
86 jcc badsys
87 lsl #2,%d0
88 lea sys_call_table,%a0
89 movel %a0@(%d0), %a0
90 jbsr %a0@
91 movel %d0,%sp@(PT_OFF_D0) /* save the return value*/
92
93ret_from_exception:
94 btst #5,%sp@(PT_OFF_SR) /* check if returning to kernel*/
95 jeq Luser_return /* if so, skip resched, signals*/
96
97Lkernel_return:
98 RESTORE_ALL
99
100Luser_return:
101 /* only allow interrupts when we are really the last one on the*/
102 /* kernel stack, otherwise stack overflow can occur during*/
103 /* heavy interrupt load*/
104 andw #ALLOWINT,%sr
105
106 movel %sp,%d1 /* get thread_info pointer */
107 andl #-THREAD_SIZE,%d1
108 movel %d1,%a2
1091:
110 move %a2@(TI_FLAGS),%d1 /* thread_info->flags */
111 jne Lwork_to_do
112 RESTORE_ALL
113
114Lwork_to_do:
115 movel %a2@(TI_FLAGS),%d1 /* thread_info->flags */
116 btst #TIF_NEED_RESCHED,%d1
117 jne reschedule
118
119Lsignal_return:
120 subql #4,%sp /* dummy return address*/
121 SAVE_SWITCH_STACK
122 pea %sp@(SWITCH_STACK_SIZE)
123 bsrw do_signal
124 addql #4,%sp
125 RESTORE_SWITCH_STACK
126 addql #4,%sp
127 jra 1b
128
129/*
130 * This is the main interrupt handler, responsible for calling process_int()
131 */
132inthandler1:
133 SAVE_ALL
134 movew %sp@(PT_OFF_FORMATVEC), %d0
135 and #0x3ff, %d0
136
137 movel %sp,%sp@-
138 movel #65,%sp@- /* put vector # on stack*/
139 jbsr process_int /* process the IRQ*/
1403: addql #8,%sp /* pop parameters off stack*/
141 bra ret_from_interrupt
142
143inthandler2:
144 SAVE_ALL
145 movew %sp@(PT_OFF_FORMATVEC), %d0
146 and #0x3ff, %d0
147
148 movel %sp,%sp@-
149 movel #66,%sp@- /* put vector # on stack*/
150 jbsr process_int /* process the IRQ*/
1513: addql #8,%sp /* pop parameters off stack*/
152 bra ret_from_interrupt
153
154inthandler3:
155 SAVE_ALL
156 movew %sp@(PT_OFF_FORMATVEC), %d0
157 and #0x3ff, %d0
158
159 movel %sp,%sp@-
160 movel #67,%sp@- /* put vector # on stack*/
161 jbsr process_int /* process the IRQ*/
1623: addql #8,%sp /* pop parameters off stack*/
163 bra ret_from_interrupt
164
165inthandler4:
166 SAVE_ALL
167 movew %sp@(PT_OFF_FORMATVEC), %d0
168 and #0x3ff, %d0
169
170 movel %sp,%sp@-
171 movel #68,%sp@- /* put vector # on stack*/
172 jbsr process_int /* process the IRQ*/
1733: addql #8,%sp /* pop parameters off stack*/
174 bra ret_from_interrupt
175
176inthandler5:
177 SAVE_ALL
178 movew %sp@(PT_OFF_FORMATVEC), %d0
179 and #0x3ff, %d0
180
181 movel %sp,%sp@-
182 movel #69,%sp@- /* put vector # on stack*/
183 jbsr process_int /* process the IRQ*/
1843: addql #8,%sp /* pop parameters off stack*/
185 bra ret_from_interrupt
186
187inthandler6:
188 SAVE_ALL
189 movew %sp@(PT_OFF_FORMATVEC), %d0
190 and #0x3ff, %d0
191
192 movel %sp,%sp@-
193 movel #70,%sp@- /* put vector # on stack*/
194 jbsr process_int /* process the IRQ*/
1953: addql #8,%sp /* pop parameters off stack*/
196 bra ret_from_interrupt
197
198inthandler7:
199 SAVE_ALL
200 movew %sp@(PT_OFF_FORMATVEC), %d0
201 and #0x3ff, %d0
202
203 movel %sp,%sp@-
204 movel #71,%sp@- /* put vector # on stack*/
205 jbsr process_int /* process the IRQ*/
2063: addql #8,%sp /* pop parameters off stack*/
207 bra ret_from_interrupt
208
209inthandler:
210 SAVE_ALL
211 movew %sp@(PT_OFF_FORMATVEC), %d0
212 and #0x3ff, %d0
213
214 movel %sp,%sp@-
215 movel %d0,%sp@- /* put vector # on stack*/
216 jbsr process_int /* process the IRQ*/
2173: addql #8,%sp /* pop parameters off stack*/
218 bra ret_from_interrupt
219
220ret_from_interrupt:
221 jeq 1f
2222:
223 RESTORE_ALL
2241:
225 moveb %sp@(PT_OFF_SR), %d0
226 and #7, %d0
227 jhi 2b
228
229 /* check if we need to do software interrupts */
230 jeq ret_from_exception
231
232 pea ret_from_exception
233 jra do_softirq
234
235
236/*
237 * Handler for uninitialized and spurious interrupts.
238 */
239ENTRY(bad_interrupt)
240 addql #1,num_spurious
241 rte
242
243/*
244 * Beware - when entering resume, prev (the current task) is
245 * in a0, next (the new task) is in a1,so don't change these
246 * registers until their contents are no longer needed.
247 */
248ENTRY(resume)
249 movel %a0,%d1 /* save prev thread in d1 */
250 movew %sr,%a0@(TASK_THREAD+THREAD_SR) /* save sr */
251 movel %usp,%a2 /* save usp */
252 movel %a2,%a0@(TASK_THREAD+THREAD_USP)
253
254 SAVE_SWITCH_STACK
255 movel %sp,%a0@(TASK_THREAD+THREAD_KSP) /* save kernel stack */
256 movel %a1@(TASK_THREAD+THREAD_KSP),%sp /* restore new thread stack */
257 RESTORE_SWITCH_STACK
258
259 movel %a1@(TASK_THREAD+THREAD_USP),%a0 /* restore user stack */
260 movel %a0,%usp
261 movew %a1@(TASK_THREAD+THREAD_SR),%sr /* restore thread status reg */
262 rts
263
diff --git a/arch/m68k/platform/68328/head-de2.S b/arch/m68k/platform/68328/head-de2.S
new file mode 100644
index 000000000000..f632fdcb93e9
--- /dev/null
+++ b/arch/m68k/platform/68328/head-de2.S
@@ -0,0 +1,128 @@
1
2#define MEM_END 0x00800000 /* Memory size 8Mb */
3
4#undef CRT_DEBUG
5
6.macro PUTC CHAR
7#ifdef CRT_DEBUG
8 moveq #\CHAR, %d7
9 jsr putc
10#endif
11.endm
12
13 .global _start
14 .global _rambase
15 .global _ramvec
16 .global _ramstart
17 .global _ramend
18
19 .data
20
21/*
22 * Set up the usable of RAM stuff
23 */
24_rambase:
25 .long 0
26_ramvec:
27 .long 0
28_ramstart:
29 .long 0
30_ramend:
31 .long 0
32
33 .text
34
35_start:
36
37/*
38 * Setup initial stack
39 */
40 /* disable all interrupts */
41 movew #0x2700, %sr
42 movel #-1, 0xfffff304
43 movel #MEM_END-4, %sp
44
45 PUTC '\r'
46 PUTC '\n'
47 PUTC 'A'
48 PUTC 'B'
49
50/*
51 * Determine end of RAM
52 */
53
54 movel #MEM_END, %a0
55 movel %a0, _ramend
56
57 PUTC 'C'
58
59/*
60 * Move ROM filesystem above bss :-)
61 */
62
63 moveal #_sbss, %a0 /* romfs at the start of bss */
64 moveal #_ebss, %a1 /* Set up destination */
65 movel %a0, %a2 /* Copy of bss start */
66
67 movel 8(%a0), %d1 /* Get size of ROMFS */
68 addql #8, %d1 /* Allow for rounding */
69 andl #0xfffffffc, %d1 /* Whole words */
70
71 addl %d1, %a0 /* Copy from end */
72 addl %d1, %a1 /* Copy from end */
73 movel %a1, _ramstart /* Set start of ram */
74
751:
76 movel -(%a0), %d0 /* Copy dword */
77 movel %d0, -(%a1)
78 cmpl %a0, %a2 /* Check if at end */
79 bne 1b
80
81 PUTC 'D'
82
83/*
84 * Initialize BSS segment to 0
85 */
86
87 lea _sbss, %a0
88 lea _ebss, %a1
89
90 /* Copy 0 to %a0 until %a0 == %a1 */
912: cmpal %a0, %a1
92 beq 1f
93 clrl (%a0)+
94 bra 2b
951:
96
97 PUTC 'E'
98
99/*
100 * Load the current task pointer and stack
101 */
102
103 lea init_thread_union, %a0
104 lea 0x2000(%a0), %sp
105
106 PUTC 'F'
107 PUTC '\r'
108 PUTC '\n'
109
110/*
111 * Go
112 */
113
114 jmp start_kernel
115
116/*
117 * Local functions
118 */
119
120#ifdef CRT_DEBUG
121putc:
122 moveb %d7, 0xfffff907
1231:
124 movew 0xfffff906, %d7
125 andw #0x2000, %d7
126 beq 1b
127 rts
128#endif
diff --git a/arch/m68k/platform/68328/head-pilot.S b/arch/m68k/platform/68328/head-pilot.S
new file mode 100644
index 000000000000..aecff532b343
--- /dev/null
+++ b/arch/m68k/platform/68328/head-pilot.S
@@ -0,0 +1,222 @@
1/*
2 * linux/arch/m68knommu/platform/68328/head-pilot.S
3 * - A startup file for the MC68328
4 *
5 * Copyright (C) 1998 D. Jeff Dionne <jeff@ryeham.ee.ryerson.ca>,
6 * Kenneth Albanowski <kjahds@kjahds.com>,
7 * The Silver Hammer Group, Ltd.
8 *
9 * (c) 1995, Dionne & Associates
10 * (c) 1995, DKG Display Tech.
11 */
12
13#define ASSEMBLY
14
15#define IMMED #
16#define DBG_PUTC(x) moveb IMMED x, 0xfffff907
17
18
19.global _stext
20.global _start
21
22.global _rambase
23.global _ramvec
24.global _ramstart
25.global _ramend
26
27.global penguin_bits
28
29#ifdef CONFIG_PILOT
30
31#define IMR 0xFFFFF304
32
33 .data
34 .align 16
35
36penguin_bits:
37#include "bootlogo.rh"
38
39#endif
40
41/*****************************************************************************/
42
43.data
44
45/*
46 * Set up the usable of RAM stuff. Size of RAM is determined then
47 * an initial stack set up at the end.
48 */
49.align 4
50_ramvec:
51.long 0
52_rambase:
53.long 0
54_ramstart:
55.long 0
56_ramend:
57.long 0
58
59.text
60
61_start:
62_stext:
63
64
65#ifdef CONFIG_M68328
66
67#ifdef CONFIG_PILOT
68 .byte 0x4e, 0xfa, 0x00, 0x0a /* Jmp +X bytes */
69 .byte 'b', 'o', 'o', 't'
70 .word 10000
71
72 nop
73#endif
74
75 moveq #0, %d0
76 movew %d0, 0xfffff618 /* Watchdog off */
77 movel #0x00011f07, 0xfffff114 /* CS A1 Mask */
78
79 movew #0x0800, 0xfffff906 /* Ignore CTS */
80 movew #0x010b, 0xfffff902 /* BAUD to 9600 */
81
82 movew #0x2410, 0xfffff200 /* PLLCR */
83 movew #0x123, 0xfffff202 /* PLLFSR */
84
85#ifdef CONFIG_PILOT
86 moveb #0, 0xfffffA27 /* LCKCON */
87 movel #_start, 0xfffffA00 /* LSSA */
88 moveb #0xa, 0xfffffA05 /* LVPW */
89 movew #0x9f, 0xFFFFFa08 /* LXMAX */
90 movew #0x9f, 0xFFFFFa0a /* LYMAX */
91 moveb #9, 0xfffffa29 /* LBAR */
92 moveb #0, 0xfffffa25 /* LPXCD */
93 moveb #0x04, 0xFFFFFa20 /* LPICF */
94 moveb #0x58, 0xfffffA27 /* LCKCON */
95 moveb #0x85, 0xfffff429 /* PFDATA */
96 moveb #0xd8, 0xfffffA27 /* LCKCON */
97 moveb #0xc5, 0xfffff429 /* PFDATA */
98 moveb #0xd5, 0xfffff429 /* PFDATA */
99
100 moveal #0x00100000, %a3
101 moveal #0x100ffc00, %a4
102#endif /* CONFIG_PILOT */
103
104#endif /* CONFIG_M68328 */
105
106 movew #0x2700, %sr
107 lea %a4@(-4), %sp
108
109 DBG_PUTC('\r')
110 DBG_PUTC('\n')
111 DBG_PUTC('A')
112
113 moveq #0,%d0
114 movew #16384, %d0 /* PLL settle wait loop */
115L0:
116 subw #1, %d0
117 bne L0
118
119 DBG_PUTC('B')
120
121 /* Copy command line from beginning of RAM (+16) to end of bss */
122 movel #CONFIG_VECTORBASE, %d7
123 addl #16, %d7
124 moveal %d7, %a0
125 moveal #_ebss, %a1
126 lea %a1@(512), %a2
127
128 DBG_PUTC('C')
129
130 /* Copy %a0 to %a1 until %a1 == %a2 */
131L2:
132 movel %a0@+, %d0
133 movel %d0, %a1@+
134 cmpal %a1, %a2
135 bhi L2
136
137 /* Copy data+init segment from ROM to RAM */
138 moveal #_etext, %a0
139 moveal #_sdata, %a1
140 moveal #__init_end, %a2
141
142 DBG_PUTC('D')
143
144 /* Copy %a0 to %a1 until %a1 == %a2 */
145LD1:
146 movel %a0@+, %d0
147 movel %d0, %a1@+
148 cmpal %a1, %a2
149 bhi LD1
150
151 DBG_PUTC('E')
152
153 moveal #_sbss, %a0
154 moveal #_ebss, %a1
155
156 /* Copy 0 to %a0 until %a0 == %a1 */
157L1:
158 movel #0, %a0@+
159 cmpal %a0, %a1
160 bhi L1
161
162 DBG_PUTC('F')
163
164 /* Copy command line from end of bss to command line */
165 moveal #_ebss, %a0
166 moveal #command_line, %a1
167 lea %a1@(512), %a2
168
169 DBG_PUTC('G')
170
171 /* Copy %a0 to %a1 until %a1 == %a2 */
172L3:
173 movel %a0@+, %d0
174 movel %d0, %a1@+
175 cmpal %a1, %a2
176 bhi L3
177
178 movel #_sdata, %d0
179 movel %d0, _rambase
180 movel #_ebss, %d0
181 movel %d0, _ramstart
182
183 movel %a4, %d0
184 subl #4096, %d0 /* Reserve 4K of stack */
185 moveq #79, %d7
186 movel %d0, _ramend
187
188 movel %a3, %d0
189 movel %d0, rom_length
190
191 pea 0
192 pea env
193 pea %sp@(4)
194 pea 0
195
196 DBG_PUTC('H')
197
198#ifdef CONFIG_PILOT
199 movel #penguin_bits, 0xFFFFFA00
200 moveb #10, 0xFFFFFA05
201 movew #160, 0xFFFFFA08
202 movew #160, 0xFFFFFA0A
203#endif /* CONFIG_PILOT */
204
205 DBG_PUTC('I')
206
207 lea init_thread_union, %a0
208 lea 0x2000(%a0), %sp
209
210 DBG_PUTC('J')
211 DBG_PUTC('\r')
212 DBG_PUTC('\n')
213
214 jsr start_kernel
215_exit:
216
217 jmp _exit
218
219
220 .data
221env:
222 .long 0
diff --git a/arch/m68k/platform/68328/head-ram.S b/arch/m68k/platform/68328/head-ram.S
new file mode 100644
index 000000000000..7f1aeeacb219
--- /dev/null
+++ b/arch/m68k/platform/68328/head-ram.S
@@ -0,0 +1,141 @@
1
2 .global __main
3 .global __rom_start
4
5 .global _rambase
6 .global _ramstart
7
8 .global splash_bits
9 .global _start
10 .global _stext
11 .global _edata
12
13#define DEBUG
14#define ROM_OFFSET 0x10C00000
15#define STACK_GAURD 0x10
16
17 .text
18
19_start:
20_stext:
21 movew #0x2700, %sr /* Exceptions off! */
22
23#if 0
24 /* Init chip registers. uCsimm specific */
25 moveb #0x00, 0xfffffb0b /* Watchdog off */
26 moveb #0x10, 0xfffff000 /* SCR */
27
28 movew #0x2400, 0xfffff200 /* PLLCR */
29 movew #0x0123, 0xfffff202 /* PLLFSR */
30
31 moveb #0x00, 0xfffff40b /* enable chip select */
32 moveb #0x00, 0xfffff423 /* enable /DWE */
33 moveb #0x08, 0xfffffd0d /* disable hardmap */
34 moveb #0x07, 0xfffffd0e /* level 7 interrupt clear */
35
36 movew #0x8600, 0xfffff100 /* FLASH at 0x10c00000 */
37 movew #0x018b, 0xfffff110 /* 2Meg, enable, 0ws */
38
39 movew #0x8f00, 0xfffffc00 /* DRAM configuration */
40 movew #0x9667, 0xfffffc02 /* DRAM control */
41 movew #0x0000, 0xfffff106 /* DRAM at 0x00000000 */
42 movew #0x068f, 0xfffff116 /* 8Meg, enable, 0ws */
43
44 moveb #0x40, 0xfffff300 /* IVR */
45 movel #0x007FFFFF, %d0 /* IMR */
46 movel %d0, 0xfffff304
47
48 moveb 0xfffff42b, %d0
49 andb #0xe0, %d0
50 moveb %d0, 0xfffff42b
51
52 moveb #0x08, 0xfffff907 /* Ignore CTS */
53 movew #0x010b, 0xfffff902 /* BAUD to 9600 */
54 movew #0xe100, 0xfffff900 /* enable */
55#endif
56
57 movew #16384, %d0 /* PLL settle wait loop */
58L0:
59 subw #1, %d0
60 bne L0
61#ifdef DEBUG
62 moveq #70, %d7 /* 'F' */
63 moveb %d7,0xfffff907 /* No absolute addresses */
64pclp1:
65 movew 0xfffff906, %d7
66 andw #0x2000, %d7
67 beq pclp1
68#endif /* DEBUG */
69
70#ifdef DEBUG
71 moveq #82, %d7 /* 'R' */
72 moveb %d7,0xfffff907 /* No absolute addresses */
73pclp3:
74 movew 0xfffff906, %d7
75 andw #0x2000, %d7
76 beq pclp3
77#endif /* DEBUG */
78 moveal #0x007ffff0, %ssp
79 moveal #_sbss, %a0
80 moveal #_ebss, %a1
81
82 /* Copy 0 to %a0 until %a0 >= %a1 */
83L1:
84 movel #0, %a0@+
85 cmpal %a0, %a1
86 bhi L1
87
88#ifdef DEBUG
89 moveq #67, %d7 /* 'C' */
90 jsr putc
91#endif /* DEBUG */
92
93 pea 0
94 pea env
95 pea %sp@(4)
96 pea 0
97
98#ifdef DEBUG
99 moveq #70, %d7 /* 'F' */
100 jsr putc
101#endif /* DEBUG */
102
103lp:
104 jsr start_kernel
105 jmp lp
106_exit:
107
108 jmp _exit
109
110__main:
111 /* nothing */
112 rts
113
114#ifdef DEBUG
115putc:
116 moveb %d7,0xfffff907
117pclp:
118 movew 0xfffff906, %d7
119 andw #0x2000, %d7
120 beq pclp
121 rts
122#endif /* DEBUG */
123
124 .data
125
126/*
127 * Set up the usable of RAM stuff. Size of RAM is determined then
128 * an initial stack set up at the end.
129 */
130.align 4
131_ramvec:
132.long 0
133_rambase:
134.long 0
135_ramstart:
136.long 0
137_ramend:
138.long 0
139
140env:
141 .long 0
diff --git a/arch/m68k/platform/68328/head-rom.S b/arch/m68k/platform/68328/head-rom.S
new file mode 100644
index 000000000000..6ec77d3ea0b3
--- /dev/null
+++ b/arch/m68k/platform/68328/head-rom.S
@@ -0,0 +1,110 @@
1
2 .global _start
3 .global _stext
4
5 .global _rambase
6 .global _ramvec
7 .global _ramstart
8 .global _ramend
9
10#ifdef CONFIG_INIT_LCD
11 .global splash_bits
12#endif
13
14 .data
15
16/*
17 * Set up the usable of RAM stuff. Size of RAM is determined then
18 * an initial stack set up at the end.
19 */
20.align 4
21_ramvec:
22.long 0
23_rambase:
24.long 0
25_ramstart:
26.long 0
27_ramend:
28.long 0
29
30#define RAMEND (CONFIG_RAMBASE + CONFIG_RAMSIZE)
31
32#ifdef CONFIG_INIT_LCD
33splash_bits:
34#include "bootlogo.rh"
35#endif
36
37 .text
38_start:
39_stext: movew #0x2700,%sr
40#ifdef CONFIG_INIT_LCD
41 movel #splash_bits, 0xfffffA00 /* LSSA */
42 moveb #0x28, 0xfffffA05 /* LVPW */
43 movew #0x280, 0xFFFFFa08 /* LXMAX */
44 movew #0x1df, 0xFFFFFa0a /* LYMAX */
45 moveb #0, 0xfffffa29 /* LBAR */
46 moveb #0, 0xfffffa25 /* LPXCD */
47 moveb #0x08, 0xFFFFFa20 /* LPICF */
48 moveb #0x01, 0xFFFFFA21 /* -ve pol */
49 moveb #0x81, 0xfffffA27 /* LCKCON */
50 movew #0xff00, 0xfffff412 /* LCD pins */
51#endif
52 moveal #RAMEND-CONFIG_MEMORY_RESERVE*0x100000 - 0x10, %sp
53 movew #32767, %d0 /* PLL settle wait loop */
541: subq #1, %d0
55 bne 1b
56
57 /* Copy data segment from ROM to RAM */
58 moveal #_etext, %a0
59 moveal #_sdata, %a1
60 moveal #_edata, %a2
61
62 /* Copy %a0 to %a1 until %a1 == %a2 */
631: movel %a0@+, %a1@+
64 cmpal %a1, %a2
65 bhi 1b
66
67 moveal #_sbss, %a0
68 moveal #_ebss, %a1
69 /* Copy 0 to %a0 until %a0 == %a1 */
70
711:
72 clrl %a0@+
73 cmpal %a0, %a1
74 bhi 1b
75
76 movel #_sdata, %d0
77 movel %d0, _rambase
78 movel #_ebss, %d0
79 movel %d0, _ramstart
80 movel #RAMEND-CONFIG_MEMORY_RESERVE*0x100000, %d0
81 movel %d0, _ramend
82 movel #CONFIG_VECTORBASE, %d0
83 movel %d0, _ramvec
84
85/*
86 * load the current task pointer and stack
87 */
88 lea init_thread_union, %a0
89 lea 0x2000(%a0), %sp
90
911: jsr start_kernel
92 bra 1b
93_exit:
94
95 jmp _exit
96
97
98putc:
99 moveb %d7,0xfffff907
1001:
101 movew 0xfffff906, %d7
102 andw #0x2000, %d7
103 beq 1b
104 rts
105
106 .data
107env:
108 .long 0
109 .text
110
diff --git a/arch/m68k/platform/68328/ints.c b/arch/m68k/platform/68328/ints.c
new file mode 100644
index 000000000000..a90288cf7446
--- /dev/null
+++ b/arch/m68k/platform/68328/ints.c
@@ -0,0 +1,186 @@
1/*
2 * linux/arch/m68knommu/platform/68328/ints.c
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file COPYING in the main directory of this archive
6 * for more details.
7 *
8 * Copyright 1996 Roman Zippel
9 * Copyright 1999 D. Jeff Dionne <jeff@rt-control.com>
10 */
11
12#include <linux/types.h>
13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/interrupt.h>
16#include <linux/irq.h>
17#include <asm/traps.h>
18#include <asm/io.h>
19#include <asm/machdep.h>
20
21#if defined(CONFIG_M68328)
22#include <asm/MC68328.h>
23#elif defined(CONFIG_M68EZ328)
24#include <asm/MC68EZ328.h>
25#elif defined(CONFIG_M68VZ328)
26#include <asm/MC68VZ328.h>
27#endif
28
29/* assembler routines */
30asmlinkage void system_call(void);
31asmlinkage void buserr(void);
32asmlinkage void trap(void);
33asmlinkage void trap3(void);
34asmlinkage void trap4(void);
35asmlinkage void trap5(void);
36asmlinkage void trap6(void);
37asmlinkage void trap7(void);
38asmlinkage void trap8(void);
39asmlinkage void trap9(void);
40asmlinkage void trap10(void);
41asmlinkage void trap11(void);
42asmlinkage void trap12(void);
43asmlinkage void trap13(void);
44asmlinkage void trap14(void);
45asmlinkage void trap15(void);
46asmlinkage void trap33(void);
47asmlinkage void trap34(void);
48asmlinkage void trap35(void);
49asmlinkage void trap36(void);
50asmlinkage void trap37(void);
51asmlinkage void trap38(void);
52asmlinkage void trap39(void);
53asmlinkage void trap40(void);
54asmlinkage void trap41(void);
55asmlinkage void trap42(void);
56asmlinkage void trap43(void);
57asmlinkage void trap44(void);
58asmlinkage void trap45(void);
59asmlinkage void trap46(void);
60asmlinkage void trap47(void);
61asmlinkage irqreturn_t bad_interrupt(int, void *);
62asmlinkage irqreturn_t inthandler(void);
63asmlinkage irqreturn_t inthandler1(void);
64asmlinkage irqreturn_t inthandler2(void);
65asmlinkage irqreturn_t inthandler3(void);
66asmlinkage irqreturn_t inthandler4(void);
67asmlinkage irqreturn_t inthandler5(void);
68asmlinkage irqreturn_t inthandler6(void);
69asmlinkage irqreturn_t inthandler7(void);
70
71extern e_vector *_ramvec;
72
73/* The number of spurious interrupts */
74volatile unsigned int num_spurious;
75
76/* The 68k family did not have a good way to determine the source
77 * of interrupts until later in the family. The EC000 core does
78 * not provide the vector number on the stack, we vector everything
79 * into one vector and look in the blasted mask register...
80 * This code is designed to be fast, almost constant time, not clean!
81 */
82void process_int(int vec, struct pt_regs *fp)
83{
84 int irq;
85 int mask;
86
87 unsigned long pend = ISR;
88
89 while (pend) {
90 if (pend & 0x0000ffff) {
91 if (pend & 0x000000ff) {
92 if (pend & 0x0000000f) {
93 mask = 0x00000001;
94 irq = 0;
95 } else {
96 mask = 0x00000010;
97 irq = 4;
98 }
99 } else {
100 if (pend & 0x00000f00) {
101 mask = 0x00000100;
102 irq = 8;
103 } else {
104 mask = 0x00001000;
105 irq = 12;
106 }
107 }
108 } else {
109 if (pend & 0x00ff0000) {
110 if (pend & 0x000f0000) {
111 mask = 0x00010000;
112 irq = 16;
113 } else {
114 mask = 0x00100000;
115 irq = 20;
116 }
117 } else {
118 if (pend & 0x0f000000) {
119 mask = 0x01000000;
120 irq = 24;
121 } else {
122 mask = 0x10000000;
123 irq = 28;
124 }
125 }
126 }
127
128 while (! (mask & pend)) {
129 mask <<=1;
130 irq++;
131 }
132
133 do_IRQ(irq, fp);
134 pend &= ~mask;
135 }
136}
137
138static void intc_irq_unmask(struct irq_data *d)
139{
140 IMR &= ~(1 << d->irq);
141}
142
143static void intc_irq_mask(struct irq_data *d)
144{
145 IMR |= (1 << d->irq);
146}
147
148static struct irq_chip intc_irq_chip = {
149 .name = "M68K-INTC",
150 .irq_mask = intc_irq_mask,
151 .irq_unmask = intc_irq_unmask,
152};
153
154/*
155 * This function should be called during kernel startup to initialize
156 * the machine vector table.
157 */
158void __init init_IRQ(void)
159{
160 int i;
161
162 /* set up the vectors */
163 for (i = 72; i < 256; ++i)
164 _ramvec[i] = (e_vector) bad_interrupt;
165
166 _ramvec[32] = system_call;
167
168 _ramvec[65] = (e_vector) inthandler1;
169 _ramvec[66] = (e_vector) inthandler2;
170 _ramvec[67] = (e_vector) inthandler3;
171 _ramvec[68] = (e_vector) inthandler4;
172 _ramvec[69] = (e_vector) inthandler5;
173 _ramvec[70] = (e_vector) inthandler6;
174 _ramvec[71] = (e_vector) inthandler7;
175
176 IVR = 0x40; /* Set DragonBall IVR (interrupt base) to 64 */
177
178 /* turn off all interrupts */
179 IMR = ~0;
180
181 for (i = 0; (i < NR_IRQS); i++) {
182 irq_set_chip(i, &intc_irq_chip);
183 irq_set_handler(i, handle_level_irq);
184 }
185}
186
diff --git a/arch/m68k/platform/68328/romvec.S b/arch/m68k/platform/68328/romvec.S
new file mode 100644
index 000000000000..31084466eae8
--- /dev/null
+++ b/arch/m68k/platform/68328/romvec.S
@@ -0,0 +1,35 @@
1/*
2 * linux/arch/m68knommu/platform/68328/romvec.S
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file COPYING in the main directory of this archive
6 * for more details.
7 *
8 * Copyright 1996 Roman Zippel
9 * Copyright 1999 D. Jeff Dionne <jeff@rt-control.com>
10 * Copyright 2006 Greg Ungerer <gerg@snapgear.com>
11 */
12
13.global _start
14.global _buserr
15.global trap
16.global system_call
17
18.section .romvec
19
20e_vectors:
21.long CONFIG_RAMBASE+CONFIG_RAMSIZE-4, _start, buserr, trap
22.long trap, trap, trap, trap
23.long trap, trap, trap, trap
24.long trap, trap, trap, trap
25.long trap, trap, trap, trap
26.long trap, trap, trap, trap
27.long trap, trap, trap, trap
28.long trap, trap, trap, trap
29/* TRAP #0-15 */
30.long system_call, trap, trap, trap
31.long trap, trap, trap, trap
32.long trap, trap, trap, trap
33.long trap, trap, trap, trap
34.long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
35
diff --git a/arch/m68k/platform/68328/timers.c b/arch/m68k/platform/68328/timers.c
new file mode 100644
index 000000000000..309f725995bf
--- /dev/null
+++ b/arch/m68k/platform/68328/timers.c
@@ -0,0 +1,134 @@
1/***************************************************************************/
2
3/*
4 * linux/arch/m68knommu/platform/68328/timers.c
5 *
6 * Copyright (C) 1993 Hamish Macdonald
7 * Copyright (C) 1999 D. Jeff Dionne
8 * Copyright (C) 2001 Georges Menie, Ken Desmet
9 *
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file COPYING in the main directory of this archive
12 * for more details.
13 */
14
15/***************************************************************************/
16
17#include <linux/types.h>
18#include <linux/kernel.h>
19#include <linux/mm.h>
20#include <linux/interrupt.h>
21#include <linux/irq.h>
22#include <linux/clocksource.h>
23#include <asm/setup.h>
24#include <asm/system.h>
25#include <asm/pgtable.h>
26#include <asm/machdep.h>
27#include <asm/MC68VZ328.h>
28
29/***************************************************************************/
30
31#if defined(CONFIG_DRAGEN2)
32/* with a 33.16 MHz clock, this will give usec resolution to the time functions */
33#define CLOCK_SOURCE TCTL_CLKSOURCE_SYSCLK
34#define CLOCK_PRE 7
35#define TICKS_PER_JIFFY 41450
36
37#elif defined(CONFIG_XCOPILOT_BUGS)
38/*
39 * The only thing I know is that CLK32 is not available on Xcopilot
40 * I have little idea about what frequency SYSCLK has on Xcopilot.
41 * The values for prescaler and compare registers were simply
42 * taken from the original source
43 */
44#define CLOCK_SOURCE TCTL_CLKSOURCE_SYSCLK
45#define CLOCK_PRE 2
46#define TICKS_PER_JIFFY 0xd7e4
47
48#else
49/* default to using the 32Khz clock */
50#define CLOCK_SOURCE TCTL_CLKSOURCE_32KHZ
51#define CLOCK_PRE 31
52#define TICKS_PER_JIFFY 10
53#endif
54
55static u32 m68328_tick_cnt;
56
57/***************************************************************************/
58
59static irqreturn_t hw_tick(int irq, void *dummy)
60{
61 /* Reset Timer1 */
62 TSTAT &= 0;
63
64 m68328_tick_cnt += TICKS_PER_JIFFY;
65 return arch_timer_interrupt(irq, dummy);
66}
67
68/***************************************************************************/
69
70static struct irqaction m68328_timer_irq = {
71 .name = "timer",
72 .flags = IRQF_DISABLED | IRQF_TIMER,
73 .handler = hw_tick,
74};
75
76/***************************************************************************/
77
78static cycle_t m68328_read_clk(struct clocksource *cs)
79{
80 unsigned long flags;
81 u32 cycles;
82
83 local_irq_save(flags);
84 cycles = m68328_tick_cnt + TCN;
85 local_irq_restore(flags);
86
87 return cycles;
88}
89
90/***************************************************************************/
91
92static struct clocksource m68328_clk = {
93 .name = "timer",
94 .rating = 250,
95 .read = m68328_read_clk,
96 .shift = 20,
97 .mask = CLOCKSOURCE_MASK(32),
98 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
99};
100
101/***************************************************************************/
102
103void hw_timer_init(void)
104{
105 /* disable timer 1 */
106 TCTL = 0;
107
108 /* set ISR */
109 setup_irq(TMR_IRQ_NUM, &m68328_timer_irq);
110
111 /* Restart mode, Enable int, Set clock source */
112 TCTL = TCTL_OM | TCTL_IRQEN | CLOCK_SOURCE;
113 TPRER = CLOCK_PRE;
114 TCMP = TICKS_PER_JIFFY;
115
116 /* Enable timer 1 */
117 TCTL |= TCTL_TEN;
118 m68328_clk.mult = clocksource_hz2mult(TICKS_PER_JIFFY*HZ, m68328_clk.shift);
119 clocksource_register(&m68328_clk);
120}
121
122/***************************************************************************/
123
124void m68328_timer_gettod(int *year, int *mon, int *day, int *hour, int *min, int *sec)
125{
126 long now = RTCTIME;
127
128 *year = *mon = *day = 1;
129 *hour = (now >> 24) % 24;
130 *min = (now >> 16) % 60;
131 *sec = now % 60;
132}
133
134/***************************************************************************/
diff --git a/arch/m68k/platform/68360/Makefile b/arch/m68k/platform/68360/Makefile
new file mode 100644
index 000000000000..cf5af73a5789
--- /dev/null
+++ b/arch/m68k/platform/68360/Makefile
@@ -0,0 +1,10 @@
1#
2# Makefile for arch/m68knommu/platform/68360.
3#
4
5obj-y := config.o commproc.o entry.o ints.o
6
7extra-y := head.o
8
9$(obj)/head.o: $(obj)/head-$(MODEL).o
10 ln -sf head-$(MODEL).o $(obj)/head.o
diff --git a/arch/m68k/platform/68360/commproc.c b/arch/m68k/platform/68360/commproc.c
new file mode 100644
index 000000000000..8e4e10cc0080
--- /dev/null
+++ b/arch/m68k/platform/68360/commproc.c
@@ -0,0 +1,308 @@
1/*
2 * General Purpose functions for the global management of the
3 * Communication Processor Module.
4 *
5 * Copyright (c) 2000 Michael Leslie <mleslie@lineo.com>
6 * Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
7 *
8 * In addition to the individual control of the communication
9 * channels, there are a few functions that globally affect the
10 * communication processor.
11 *
12 * Buffer descriptors must be allocated from the dual ported memory
13 * space. The allocator for that is here. When the communication
14 * process is reset, we reclaim the memory available. There is
15 * currently no deallocator for this memory.
16 * The amount of space available is platform dependent. On the
17 * MBX, the EPPC software loads additional microcode into the
18 * communication processor, and uses some of the DP ram for this
19 * purpose. Current, the first 512 bytes and the last 256 bytes of
20 * memory are used. Right now I am conservative and only use the
21 * memory that can never be used for microcode. If there are
22 * applications that require more DP ram, we can expand the boundaries
23 * but then we have to be careful of any downloaded microcode.
24 *
25 */
26
27/*
28 * Michael Leslie <mleslie@lineo.com>
29 * adapted Dan Malek's ppc8xx drivers to M68360
30 *
31 */
32
33#include <linux/errno.h>
34#include <linux/sched.h>
35#include <linux/kernel.h>
36#include <linux/param.h>
37#include <linux/string.h>
38#include <linux/mm.h>
39#include <linux/interrupt.h>
40#include <asm/irq.h>
41#include <asm/m68360.h>
42#include <asm/commproc.h>
43
44/* #include <asm/page.h> */
45/* #include <asm/pgtable.h> */
46extern void *_quicc_base;
47extern unsigned int system_clock;
48
49
50static uint dp_alloc_base; /* Starting offset in DP ram */
51static uint dp_alloc_top; /* Max offset + 1 */
52
53#if 0
54static void *host_buffer; /* One page of host buffer */
55static void *host_end; /* end + 1 */
56#endif
57
58/* struct cpm360_t *cpmp; */ /* Pointer to comm processor space */
59
60QUICC *pquicc;
61/* QUICC *quicc_dpram; */ /* mleslie - temporary; use extern pquicc elsewhere instead */
62
63
64/* CPM interrupt vector functions. */
65struct cpm_action {
66 void (*handler)(void *);
67 void *dev_id;
68};
69static struct cpm_action cpm_vecs[CPMVEC_NR];
70static void cpm_interrupt(int irq, void * dev, struct pt_regs * regs);
71static void cpm_error_interrupt(void *);
72
73/* prototypes: */
74void cpm_install_handler(int vec, void (*handler)(), void *dev_id);
75void m360_cpm_reset(void);
76
77
78
79
80void m360_cpm_reset()
81{
82/* pte_t *pte; */
83
84 pquicc = (struct quicc *)(_quicc_base); /* initialized in crt0_rXm.S */
85
86 /* Perform a CPM reset. */
87 pquicc->cp_cr = (SOFTWARE_RESET | CMD_FLAG);
88
89 /* Wait for CPM to become ready (should be 2 clocks). */
90 while (pquicc->cp_cr & CMD_FLAG);
91
92 /* On the recommendation of the 68360 manual, p. 7-60
93 * - Set sdma interrupt service mask to 7
94 * - Set sdma arbitration ID to 4
95 */
96 pquicc->sdma_sdcr = 0x0740;
97
98
99 /* Claim the DP memory for our use.
100 */
101 dp_alloc_base = CPM_DATAONLY_BASE;
102 dp_alloc_top = dp_alloc_base + CPM_DATAONLY_SIZE;
103
104
105 /* Set the host page for allocation.
106 */
107 /* host_buffer = host_page_addr; */
108 /* host_end = host_page_addr + PAGE_SIZE; */
109
110 /* pte = find_pte(&init_mm, host_page_addr); */
111 /* pte_val(*pte) |= _PAGE_NO_CACHE; */
112 /* flush_tlb_page(current->mm->mmap, host_buffer); */
113
114 /* Tell everyone where the comm processor resides.
115 */
116/* cpmp = (cpm360_t *)commproc; */
117}
118
119
120/* This is called during init_IRQ. We used to do it above, but this
121 * was too early since init_IRQ was not yet called.
122 */
123void
124cpm_interrupt_init(void)
125{
126 /* Initialize the CPM interrupt controller.
127 * NOTE THAT pquicc had better have been initialized!
128 * reference: MC68360UM p. 7-377
129 */
130 pquicc->intr_cicr =
131 (CICR_SCD_SCC4 | CICR_SCC_SCC3 | CICR_SCB_SCC2 | CICR_SCA_SCC1) |
132 (CPM_INTERRUPT << 13) |
133 CICR_HP_MASK |
134 (CPM_VECTOR_BASE << 5) |
135 CICR_SPS;
136
137 /* mask all CPM interrupts from reaching the cpu32 core: */
138 pquicc->intr_cimr = 0;
139
140
141 /* mles - If I understand correctly, the 360 just pops over to the CPM
142 * specific vector, obviating the necessity to vector through the IRQ
143 * whose priority the CPM is set to. This needs a closer look, though.
144 */
145
146 /* Set our interrupt handler with the core CPU. */
147/* if (request_irq(CPM_INTERRUPT, cpm_interrupt, 0, "cpm", NULL) != 0) */
148/* panic("Could not allocate CPM IRQ!"); */
149
150 /* Install our own error handler.
151 */
152 /* I think we want to hold off on this one for the moment - mles */
153 /* cpm_install_handler(CPMVEC_ERROR, cpm_error_interrupt, NULL); */
154
155 /* master CPM interrupt enable */
156 /* pquicc->intr_cicr |= CICR_IEN; */ /* no such animal for 360 */
157}
158
159
160
161/* CPM interrupt controller interrupt.
162*/
163static void
164cpm_interrupt(int irq, void * dev, struct pt_regs * regs)
165{
166 /* uint vec; */
167
168 /* mles: Note that this stuff is currently being performed by
169 * M68360_do_irq(int vec, struct pt_regs *fp), in ../ints.c */
170
171 /* figure out the vector */
172 /* call that vector's handler */
173 /* clear the irq's bit in the service register */
174
175#if 0 /* old 860 stuff: */
176 /* Get the vector by setting the ACK bit and then reading
177 * the register.
178 */
179 ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_civr = 1;
180 vec = ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_civr;
181 vec >>= 11;
182
183
184 if (cpm_vecs[vec].handler != 0)
185 (*cpm_vecs[vec].handler)(cpm_vecs[vec].dev_id);
186 else
187 ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr &= ~(1 << vec);
188
189 /* After servicing the interrupt, we have to remove the status
190 * indicator.
191 */
192 ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cisr |= (1 << vec);
193#endif
194
195}
196
197/* The CPM can generate the error interrupt when there is a race condition
198 * between generating and masking interrupts. All we have to do is ACK it
199 * and return. This is a no-op function so we don't need any special
200 * tests in the interrupt handler.
201 */
202static void
203cpm_error_interrupt(void *dev)
204{
205}
206
207/* Install a CPM interrupt handler.
208*/
209void
210cpm_install_handler(int vec, void (*handler)(), void *dev_id)
211{
212
213 request_irq(vec, handler, 0, "timer", dev_id);
214
215/* if (cpm_vecs[vec].handler != 0) */
216/* printk(KERN_INFO "CPM interrupt %x replacing %x\n", */
217/* (uint)handler, (uint)cpm_vecs[vec].handler); */
218/* cpm_vecs[vec].handler = handler; */
219/* cpm_vecs[vec].dev_id = dev_id; */
220
221 /* ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr |= (1 << vec); */
222/* pquicc->intr_cimr |= (1 << vec); */
223
224}
225
226/* Free a CPM interrupt handler.
227*/
228void
229cpm_free_handler(int vec)
230{
231 cpm_vecs[vec].handler = NULL;
232 cpm_vecs[vec].dev_id = NULL;
233 /* ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr &= ~(1 << vec); */
234 pquicc->intr_cimr &= ~(1 << vec);
235}
236
237
238
239
240/* Allocate some memory from the dual ported ram. We may want to
241 * enforce alignment restrictions, but right now everyone is a good
242 * citizen.
243 */
244uint
245m360_cpm_dpalloc(uint size)
246{
247 uint retloc;
248
249 if ((dp_alloc_base + size) >= dp_alloc_top)
250 return(CPM_DP_NOSPACE);
251
252 retloc = dp_alloc_base;
253 dp_alloc_base += size;
254
255 return(retloc);
256}
257
258
259#if 0 /* mleslie - for now these are simply kmalloc'd */
260/* We also own one page of host buffer space for the allocation of
261 * UART "fifos" and the like.
262 */
263uint
264m360_cpm_hostalloc(uint size)
265{
266 uint retloc;
267
268 if ((host_buffer + size) >= host_end)
269 return(0);
270
271 retloc = host_buffer;
272 host_buffer += size;
273
274 return(retloc);
275}
276#endif
277
278
279/* Set a baud rate generator. This needs lots of work. There are
280 * four BRGs, any of which can be wired to any channel.
281 * The internal baud rate clock is the system clock divided by 16.
282 * This assumes the baudrate is 16x oversampled by the uart.
283 */
284/* #define BRG_INT_CLK (((bd_t *)__res)->bi_intfreq * 1000000) */
285#define BRG_INT_CLK system_clock
286#define BRG_UART_CLK (BRG_INT_CLK/16)
287
288void
289m360_cpm_setbrg(uint brg, uint rate)
290{
291 volatile uint *bp;
292
293 /* This is good enough to get SMCs running.....
294 */
295 /* bp = (uint *)&cpmp->cp_brgc1; */
296 bp = (volatile uint *)(&pquicc->brgc[0].l);
297 bp += brg;
298 *bp = ((BRG_UART_CLK / rate - 1) << 1) | CPM_BRG_EN;
299}
300
301
302/*
303 * Local variables:
304 * c-indent-level: 4
305 * c-basic-offset: 4
306 * tab-width: 4
307 * End:
308 */
diff --git a/arch/m68k/platform/68360/config.c b/arch/m68k/platform/68360/config.c
new file mode 100644
index 000000000000..9dd5bca38749
--- /dev/null
+++ b/arch/m68k/platform/68360/config.c
@@ -0,0 +1,186 @@
1/*
2 * linux/arch/m68knommu/platform/68360/config.c
3 *
4 * Copyright (c) 2000 Michael Leslie <mleslie@lineo.com>
5 * Copyright (C) 1993 Hamish Macdonald
6 * Copyright (C) 1999 D. Jeff Dionne <jeff@uclinux.org>
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file COPYING in the main directory of this archive
10 * for more details.
11 */
12
13#include <stdarg.h>
14#include <linux/types.h>
15#include <linux/kernel.h>
16#include <linux/mm.h>
17#include <linux/interrupt.h>
18#include <linux/irq.h>
19
20#include <asm/setup.h>
21#include <asm/system.h>
22#include <asm/pgtable.h>
23#include <asm/machdep.h>
24#include <asm/m68360.h>
25
26#ifdef CONFIG_UCQUICC
27#include <asm/bootstd.h>
28#endif
29
30extern void m360_cpm_reset(void);
31
32// Mask to select if the PLL prescaler is enabled.
33#define MCU_PREEN ((unsigned short)(0x0001 << 13))
34
35#if defined(CONFIG_UCQUICC)
36#define OSCILLATOR (unsigned long int)33000000
37#endif
38
39unsigned long int system_clock;
40
41extern QUICC *pquicc;
42
43/* TODO DON"T Hard Code this */
44/* calculate properly using the right PLL and prescaller */
45// unsigned int system_clock = 33000000l;
46extern unsigned long int system_clock; //In kernel setup.c
47
48
49static irqreturn_t hw_tick(int irq, void *dummy)
50{
51 /* Reset Timer1 */
52 /* TSTAT &= 0; */
53
54 pquicc->timer_ter1 = 0x0002; /* clear timer event */
55
56 return arch_timer_interrupt(irq, dummy);
57}
58
59static struct irqaction m68360_timer_irq = {
60 .name = "timer",
61 .flags = IRQF_DISABLED | IRQF_TIMER,
62 .handler = hw_tick,
63};
64
65void hw_timer_init(void)
66{
67 unsigned char prescaler;
68 unsigned short tgcr_save;
69
70#if 0
71 /* Restart mode, Enable int, 32KHz, Enable timer */
72 TCTL = TCTL_OM | TCTL_IRQEN | TCTL_CLKSOURCE_32KHZ | TCTL_TEN;
73 /* Set prescaler (Divide 32KHz by 32)*/
74 TPRER = 31;
75 /* Set compare register 32Khz / 32 / 10 = 100 */
76 TCMP = 10;
77
78 request_irq(IRQ_MACHSPEC | 1, timer_routine, 0, "timer", NULL);
79#endif
80
81 /* General purpose quicc timers: MC68360UM p7-20 */
82
83 /* Set up timer 1 (in [1..4]) to do 100Hz */
84 tgcr_save = pquicc->timer_tgcr & 0xfff0;
85 pquicc->timer_tgcr = tgcr_save; /* stop and reset timer 1 */
86 /* pquicc->timer_tgcr |= 0x4444; */ /* halt timers when FREEZE (ie bdm freeze) */
87
88 prescaler = 8;
89 pquicc->timer_tmr1 = 0x001a | /* or=1, frr=1, iclk=01b */
90 (unsigned short)((prescaler - 1) << 8);
91
92 pquicc->timer_tcn1 = 0x0000; /* initial count */
93 /* calculate interval for 100Hz based on the _system_clock: */
94 pquicc->timer_trr1 = (system_clock/ prescaler) / HZ; /* reference count */
95
96 pquicc->timer_ter1 = 0x0003; /* clear timer events */
97
98 /* enable timer 1 interrupt in CIMR */
99 setup_irq(CPMVEC_TIMER1, &m68360_timer_irq);
100
101 /* Start timer 1: */
102 tgcr_save = (pquicc->timer_tgcr & 0xfff0) | 0x0001;
103 pquicc->timer_tgcr = tgcr_save;
104}
105
106void BSP_gettod (int *yearp, int *monp, int *dayp,
107 int *hourp, int *minp, int *secp)
108{
109}
110
111int BSP_set_clock_mmss(unsigned long nowtime)
112{
113#if 0
114 short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60;
115
116 tod->second1 = real_seconds / 10;
117 tod->second2 = real_seconds % 10;
118 tod->minute1 = real_minutes / 10;
119 tod->minute2 = real_minutes % 10;
120#endif
121 return 0;
122}
123
124void BSP_reset (void)
125{
126 local_irq_disable();
127 asm volatile (
128 "moveal #_start, %a0;\n"
129 "moveb #0, 0xFFFFF300;\n"
130 "moveal 0(%a0), %sp;\n"
131 "moveal 4(%a0), %a0;\n"
132 "jmp (%a0);\n"
133 );
134}
135
136unsigned char *scc1_hwaddr;
137static int errno;
138
139#if defined (CONFIG_UCQUICC)
140_bsc0(char *, getserialnum)
141_bsc1(unsigned char *, gethwaddr, int, a)
142_bsc1(char *, getbenv, char *, a)
143#endif
144
145
146void config_BSP(char *command, int len)
147{
148 unsigned char *p;
149
150 m360_cpm_reset();
151
152 /* Calculate the real system clock value. */
153 {
154 unsigned int local_pllcr = (unsigned int)(pquicc->sim_pllcr);
155 if( local_pllcr & MCU_PREEN ) // If the prescaler is dividing by 128
156 {
157 int mf = (int)(pquicc->sim_pllcr & 0x0fff);
158 system_clock = (OSCILLATOR / 128) * (mf + 1);
159 }
160 else
161 {
162 int mf = (int)(pquicc->sim_pllcr & 0x0fff);
163 system_clock = (OSCILLATOR) * (mf + 1);
164 }
165 }
166
167 printk(KERN_INFO "\n68360 QUICC support (C) 2000 Lineo Inc.\n");
168
169#if defined(CONFIG_UCQUICC) && 0
170 printk(KERN_INFO "uCquicc serial string [%s]\n",getserialnum());
171 p = scc1_hwaddr = gethwaddr(0);
172 printk(KERN_INFO "uCquicc hwaddr %.2x:%.2x:%.2x:%.2x:%.2x:%.2x\n",
173 p[0], p[1], p[2], p[3], p[4], p[5]);
174
175 p = getbenv("APPEND");
176 if (p)
177 strcpy(p,command);
178 else
179 command[0] = 0;
180#else
181 scc1_hwaddr = "\00\01\02\03\04\05";
182#endif
183
184 mach_gettod = BSP_gettod;
185 mach_reset = BSP_reset;
186}
diff --git a/arch/m68k/platform/68360/entry.S b/arch/m68k/platform/68360/entry.S
new file mode 100644
index 000000000000..46c1b18c9dcb
--- /dev/null
+++ b/arch/m68k/platform/68360/entry.S
@@ -0,0 +1,184 @@
1/*
2 * linux/arch/m68knommu/platform/68360/entry.S
3 *
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Copyright (C) 2001 SED Systems, a Division of Calian Ltd.
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file README.legal in the main directory of this archive
9 * for more details.
10 *
11 * Linux/m68k support by Hamish Macdonald
12 * M68360 Port by SED Systems, and Lineo.
13 */
14
15#include <linux/sys.h>
16#include <linux/linkage.h>
17#include <asm/thread_info.h>
18#include <asm/unistd.h>
19#include <asm/errno.h>
20#include <asm/setup.h>
21#include <asm/segment.h>
22#include <asm/traps.h>
23#include <asm/asm-offsets.h>
24#include <asm/entry.h>
25
26.text
27
28.globl system_call
29.globl resume
30.globl ret_from_exception
31.globl ret_from_signal
32.globl sys_call_table
33.globl ret_from_interrupt
34.globl bad_interrupt
35.globl inthandler
36
37badsys:
38 movel #-ENOSYS,%sp@(PT_OFF_D0)
39 jra ret_from_exception
40
41do_trace:
42 movel #-ENOSYS,%sp@(PT_OFF_D0) /* needed for strace*/
43 subql #4,%sp
44 SAVE_SWITCH_STACK
45 jbsr syscall_trace_enter
46 RESTORE_SWITCH_STACK
47 addql #4,%sp
48 movel %sp@(PT_OFF_ORIG_D0),%d1
49 movel #-ENOSYS,%d0
50 cmpl #NR_syscalls,%d1
51 jcc 1f
52 lsl #2,%d1
53 lea sys_call_table, %a0
54 jbsr %a0@(%d1)
55
561: movel %d0,%sp@(PT_OFF_D0) /* save the return value */
57 subql #4,%sp /* dummy return address */
58 SAVE_SWITCH_STACK
59 jbsr syscall_trace_leave
60
61ret_from_signal:
62 RESTORE_SWITCH_STACK
63 addql #4,%sp
64 jra ret_from_exception
65
66ENTRY(system_call)
67 SAVE_ALL
68
69 /* save top of frame*/
70 pea %sp@
71 jbsr set_esp0
72 addql #4,%sp
73
74 movel %sp@(PT_OFF_ORIG_D0),%d0
75
76 movel %sp,%d1 /* get thread_info pointer */
77 andl #-THREAD_SIZE,%d1
78 movel %d1,%a2
79 btst #(TIF_SYSCALL_TRACE%8),%a2@(TI_FLAGS+(31-TIF_SYSCALL_TRACE)/8)
80 jne do_trace
81 cmpl #NR_syscalls,%d0
82 jcc badsys
83 lsl #2,%d0
84 lea sys_call_table,%a0
85 movel %a0@(%d0), %a0
86 jbsr %a0@
87 movel %d0,%sp@(PT_OFF_D0) /* save the return value*/
88
89ret_from_exception:
90 btst #5,%sp@(PT_OFF_SR) /* check if returning to kernel*/
91 jeq Luser_return /* if so, skip resched, signals*/
92
93Lkernel_return:
94 RESTORE_ALL
95
96Luser_return:
97 /* only allow interrupts when we are really the last one on the*/
98 /* kernel stack, otherwise stack overflow can occur during*/
99 /* heavy interrupt load*/
100 andw #ALLOWINT,%sr
101
102 movel %sp,%d1 /* get thread_info pointer */
103 andl #-THREAD_SIZE,%d1
104 movel %d1,%a2
1051:
106 move %a2@(TI_FLAGS),%d1 /* thread_info->flags */
107 jne Lwork_to_do
108 RESTORE_ALL
109
110Lwork_to_do:
111 movel %a2@(TI_FLAGS),%d1 /* thread_info->flags */
112 btst #TIF_NEED_RESCHED,%d1
113 jne reschedule
114
115Lsignal_return:
116 subql #4,%sp /* dummy return address*/
117 SAVE_SWITCH_STACK
118 pea %sp@(SWITCH_STACK_SIZE)
119 bsrw do_signal
120 addql #4,%sp
121 RESTORE_SWITCH_STACK
122 addql #4,%sp
123 jra 1b
124
125/*
126 * This is the main interrupt handler, responsible for calling do_IRQ()
127 */
128inthandler:
129 SAVE_ALL
130 movew %sp@(PT_OFF_FORMATVEC), %d0
131 and.l #0x3ff, %d0
132 lsr.l #0x02, %d0
133
134 movel %sp,%sp@-
135 movel %d0,%sp@- /* put vector # on stack*/
136 jbsr do_IRQ /* process the IRQ*/
1373: addql #8,%sp /* pop parameters off stack*/
138 bra ret_from_interrupt
139
140ret_from_interrupt:
141 jeq 1f
1422:
143 RESTORE_ALL
1441:
145 moveb %sp@(PT_OFF_SR), %d0
146 and #7, %d0
147 jhi 2b
148 /* check if we need to do software interrupts */
149
150 movel irq_stat+CPUSTAT_SOFTIRQ_PENDING,%d0
151 jeq ret_from_exception
152
153 pea ret_from_exception
154 jra do_softirq
155
156
157/*
158 * Handler for uninitialized and spurious interrupts.
159 */
160bad_interrupt:
161 addql #1,num_spurious
162 rte
163
164/*
165 * Beware - when entering resume, prev (the current task) is
166 * in a0, next (the new task) is in a1,so don't change these
167 * registers until their contents are no longer needed.
168 */
169ENTRY(resume)
170 movel %a0,%d1 /* save prev thread in d1 */
171 movew %sr,%a0@(TASK_THREAD+THREAD_SR) /* save sr */
172 movel %usp,%a2 /* save usp */
173 movel %a2,%a0@(TASK_THREAD+THREAD_USP)
174
175 SAVE_SWITCH_STACK
176 movel %sp,%a0@(TASK_THREAD+THREAD_KSP) /* save kernel stack */
177 movel %a1@(TASK_THREAD+THREAD_KSP),%sp /* restore new thread stack */
178 RESTORE_SWITCH_STACK
179
180 movel %a1@(TASK_THREAD+THREAD_USP),%a0 /* restore user stack */
181 movel %a0,%usp
182 movew %a1@(TASK_THREAD+THREAD_SR),%sr /* restore thread status reg */
183 rts
184
diff --git a/arch/m68k/platform/68360/head-ram.S b/arch/m68k/platform/68360/head-ram.S
new file mode 100644
index 000000000000..8eb94fb6b971
--- /dev/null
+++ b/arch/m68k/platform/68360/head-ram.S
@@ -0,0 +1,403 @@
1/* arch/m68knommu/platform/68360/head-ram.S
2 *
3 * Startup code for Motorola 68360
4 *
5 * Copyright 2001 (C) SED Systems, a Division of Calian Ltd.
6 * Based on: arch/m68knommu/platform/68328/pilot/crt0_rom.S
7 * Based on: arch/m68knommu/platform/68360/uCquicc/crt0_rom.S, 2.0.38.1.pre7
8 * uClinux Kernel
9 * Copyright (C) Michael Leslie <mleslie@lineo.com>
10 * Based on: arch/m68knommu/platform/68EZ328/ucsimm/crt0_rom.S
11 * Copyright (C) 1998 D. Jeff Dionne <jeff@uclinux.org>,
12 *
13 */
14#define ASSEMBLY
15
16.global _stext
17.global _start
18
19.global _rambase
20.global _ramvec
21.global _ramstart
22.global _ramend
23
24.global _quicc_base
25.global _periph_base
26
27#define RAMEND (CONFIG_RAMBASE + CONFIG_RAMSIZE)
28#define ROMEND (CONFIG_ROMBASE + CONFIG_ROMSIZE)
29
30#define REGB 0x1000
31#define PEPAR (_dprbase + REGB + 0x0016)
32#define GMR (_dprbase + REGB + 0x0040)
33#define OR0 (_dprbase + REGB + 0x0054)
34#define BR0 (_dprbase + REGB + 0x0050)
35#define OR1 (_dprbase + REGB + 0x0064)
36#define BR1 (_dprbase + REGB + 0x0060)
37#define OR4 (_dprbase + REGB + 0x0094)
38#define BR4 (_dprbase + REGB + 0x0090)
39#define OR6 (_dprbase + REGB + 0x00b4)
40#define BR6 (_dprbase + REGB + 0x00b0)
41#define OR7 (_dprbase + REGB + 0x00c4)
42#define BR7 (_dprbase + REGB + 0x00c0)
43
44#define MCR (_dprbase + REGB + 0x0000)
45#define AVR (_dprbase + REGB + 0x0008)
46
47#define SYPCR (_dprbase + REGB + 0x0022)
48
49#define PLLCR (_dprbase + REGB + 0x0010)
50#define CLKOCR (_dprbase + REGB + 0x000C)
51#define CDVCR (_dprbase + REGB + 0x0014)
52
53#define BKAR (_dprbase + REGB + 0x0030)
54#define BKCR (_dprbase + REGB + 0x0034)
55#define SWIV (_dprbase + REGB + 0x0023)
56#define PICR (_dprbase + REGB + 0x0026)
57#define PITR (_dprbase + REGB + 0x002A)
58
59/* Define for all memory configuration */
60#define MCU_SIM_GMR 0x00000000
61#define SIM_OR_MASK 0x0fffffff
62
63/* Defines for chip select zero - the flash */
64#define SIM_OR0_MASK 0x20000002
65#define SIM_BR0_MASK 0x00000001
66
67
68/* Defines for chip select one - the RAM */
69#define SIM_OR1_MASK 0x10000000
70#define SIM_BR1_MASK 0x00000001
71
72#define MCU_SIM_MBAR_ADRS 0x0003ff00
73#define MCU_SIM_MBAR_BA_MASK 0xfffff000
74#define MCU_SIM_MBAR_AS_MASK 0x00000001
75
76#define MCU_SIM_PEPAR 0x00B4
77
78#define MCU_DISABLE_INTRPTS 0x2700
79#define MCU_SIM_AVR 0x00
80
81#define MCU_SIM_MCR 0x00005cff
82
83#define MCU_SIM_CLKOCR 0x00
84#define MCU_SIM_PLLCR 0x8000
85#define MCU_SIM_CDVCR 0x0000
86
87#define MCU_SIM_SYPCR 0x0000
88#define MCU_SIM_SWIV 0x00
89#define MCU_SIM_PICR 0x0000
90#define MCU_SIM_PITR 0x0000
91
92
93#include <asm/m68360_regs.h>
94
95
96/*
97 * By the time this RAM specific code begins to execute, DPRAM
98 * and DRAM should already be mapped and accessible.
99 */
100
101 .text
102_start:
103_stext:
104 nop
105 ori.w #MCU_DISABLE_INTRPTS, %sr /* disable interrupts: */
106 /* We should not need to setup the boot stack the reset should do it. */
107 movea.l #RAMEND, %sp /*set up stack at the end of DRAM:*/
108
109set_mbar_register:
110 moveq.l #0x07, %d1 /* Setup MBAR */
111 movec %d1, %dfc
112
113 lea.l MCU_SIM_MBAR_ADRS, %a0
114 move.l #_dprbase, %d0
115 andi.l #MCU_SIM_MBAR_BA_MASK, %d0
116 ori.l #MCU_SIM_MBAR_AS_MASK, %d0
117 moves.l %d0, %a0@
118
119 moveq.l #0x05, %d1
120 movec.l %d1, %dfc
121
122 /* Now we can begin to access registers in DPRAM */
123
124set_sim_mcr:
125 /* Set Module Configuration Register */
126 move.l #MCU_SIM_MCR, MCR
127
128 /* to do: Determine cause of reset */
129
130 /*
131 * configure system clock MC68360 p. 6-40
132 * (value +1)*osc/128 = system clock
133 */
134set_sim_clock:
135 move.w #MCU_SIM_PLLCR, PLLCR
136 move.b #MCU_SIM_CLKOCR, CLKOCR
137 move.w #MCU_SIM_CDVCR, CDVCR
138
139 /* Wait for the PLL to settle */
140 move.w #16384, %d0
141pll_settle_wait:
142 subi.w #1, %d0
143 bne pll_settle_wait
144
145 /* Setup the system protection register, and watchdog timer register */
146 move.b #MCU_SIM_SWIV, SWIV
147 move.w #MCU_SIM_PICR, PICR
148 move.w #MCU_SIM_PITR, PITR
149 move.w #MCU_SIM_SYPCR, SYPCR
150
151 /* Clear DPRAM - system + parameter */
152 movea.l #_dprbase, %a0
153 movea.l #_dprbase+0x2000, %a1
154
155 /* Copy 0 to %a0 until %a0 == %a1 */
156clear_dpram:
157 movel #0, %a0@+
158 cmpal %a0, %a1
159 bhi clear_dpram
160
161configure_memory_controller:
162 /* Set up Global Memory Register (GMR) */
163 move.l #MCU_SIM_GMR, %d0
164 move.l %d0, GMR
165
166configure_chip_select_0:
167 move.l #RAMEND, %d0
168 subi.l #__ramstart, %d0
169 subq.l #0x01, %d0
170 eori.l #SIM_OR_MASK, %d0
171 ori.l #SIM_OR0_MASK, %d0
172 move.l %d0, OR0
173
174 move.l #__ramstart, %d0
175 ori.l #SIM_BR0_MASK, %d0
176 move.l %d0, BR0
177
178configure_chip_select_1:
179 move.l #ROMEND, %d0
180 subi.l #__rom_start, %d0
181 subq.l #0x01, %d0
182 eori.l #SIM_OR_MASK, %d0
183 ori.l #SIM_OR1_MASK, %d0
184 move.l %d0, OR1
185
186 move.l #__rom_start, %d0
187 ori.l #SIM_BR1_MASK, %d0
188 move.l %d0, BR1
189
190 move.w #MCU_SIM_PEPAR, PEPAR
191
192 /* point to vector table: */
193 move.l #_romvec, %a0
194 move.l #_ramvec, %a1
195copy_vectors:
196 move.l %a0@, %d0
197 move.l %d0, %a1@
198 move.l %a0@, %a1@
199 addq.l #0x04, %a0
200 addq.l #0x04, %a1
201 cmp.l #_start, %a0
202 blt copy_vectors
203
204 move.l #_ramvec, %a1
205 movec %a1, %vbr
206
207
208 /* Copy data segment from ROM to RAM */
209 moveal #_stext, %a0
210 moveal #_sdata, %a1
211 moveal #_edata, %a2
212
213 /* Copy %a0 to %a1 until %a1 == %a2 */
214LD1:
215 move.l %a0@, %d0
216 addq.l #0x04, %a0
217 move.l %d0, %a1@
218 addq.l #0x04, %a1
219 cmp.l #_edata, %a1
220 blt LD1
221
222 moveal #_sbss, %a0
223 moveal #_ebss, %a1
224
225 /* Copy 0 to %a0 until %a0 == %a1 */
226L1:
227 movel #0, %a0@+
228 cmpal %a0, %a1
229 bhi L1
230
231load_quicc:
232 move.l #_dprbase, _quicc_base
233
234store_ram_size:
235 /* Set ram size information */
236 move.l #_sdata, _rambase
237 move.l #_ebss, _ramstart
238 move.l #RAMEND, %d0
239 sub.l #0x1000, %d0 /* Reserve 4K for stack space.*/
240 move.l %d0, _ramend /* Different from RAMEND.*/
241
242 pea 0
243 pea env
244 pea %sp@(4)
245 pea 0
246
247 lea init_thread_union, %a2
248 lea 0x2000(%a2), %sp
249
250lp:
251 jsr start_kernel
252
253_exit:
254 jmp _exit
255
256
257 .data
258 .align 4
259env:
260 .long 0
261_quicc_base:
262 .long 0
263_periph_base:
264 .long 0
265_ramvec:
266 .long 0
267_rambase:
268 .long 0
269_ramstart:
270 .long 0
271_ramend:
272 .long 0
273_dprbase:
274 .long 0xffffe000
275
276 .text
277
278 /*
279 * These are the exception vectors at boot up, they are copied into RAM
280 * and then overwritten as needed.
281 */
282
283.section ".data..initvect","awx"
284 .long RAMEND /* Reset: Initial Stack Pointer - 0. */
285 .long _start /* Reset: Initial Program Counter - 1. */
286 .long buserr /* Bus Error - 2. */
287 .long trap /* Address Error - 3. */
288 .long trap /* Illegal Instruction - 4. */
289 .long trap /* Divide by zero - 5. */
290 .long trap /* CHK, CHK2 Instructions - 6. */
291 .long trap /* TRAPcc, TRAPV Instructions - 7. */
292 .long trap /* Privilege Violation - 8. */
293 .long trap /* Trace - 9. */
294 .long trap /* Line 1010 Emulator - 10. */
295 .long trap /* Line 1111 Emualtor - 11. */
296 .long trap /* Harware Breakpoint - 12. */
297 .long trap /* (Reserved for Coprocessor Protocol Violation)- 13. */
298 .long trap /* Format Error - 14. */
299 .long trap /* Uninitialized Interrupt - 15. */
300 .long trap /* (Unassigned, Reserver) - 16. */
301 .long trap /* (Unassigned, Reserver) - 17. */
302 .long trap /* (Unassigned, Reserver) - 18. */
303 .long trap /* (Unassigned, Reserver) - 19. */
304 .long trap /* (Unassigned, Reserver) - 20. */
305 .long trap /* (Unassigned, Reserver) - 21. */
306 .long trap /* (Unassigned, Reserver) - 22. */
307 .long trap /* (Unassigned, Reserver) - 23. */
308 .long trap /* Spurious Interrupt - 24. */
309 .long trap /* Level 1 Interrupt Autovector - 25. */
310 .long trap /* Level 2 Interrupt Autovector - 26. */
311 .long trap /* Level 3 Interrupt Autovector - 27. */
312 .long trap /* Level 4 Interrupt Autovector - 28. */
313 .long trap /* Level 5 Interrupt Autovector - 29. */
314 .long trap /* Level 6 Interrupt Autovector - 30. */
315 .long trap /* Level 7 Interrupt Autovector - 31. */
316 .long system_call /* Trap Instruction Vectors 0 - 32. */
317 .long trap /* Trap Instruction Vectors 1 - 33. */
318 .long trap /* Trap Instruction Vectors 2 - 34. */
319 .long trap /* Trap Instruction Vectors 3 - 35. */
320 .long trap /* Trap Instruction Vectors 4 - 36. */
321 .long trap /* Trap Instruction Vectors 5 - 37. */
322 .long trap /* Trap Instruction Vectors 6 - 38. */
323 .long trap /* Trap Instruction Vectors 7 - 39. */
324 .long trap /* Trap Instruction Vectors 8 - 40. */
325 .long trap /* Trap Instruction Vectors 9 - 41. */
326 .long trap /* Trap Instruction Vectors 10 - 42. */
327 .long trap /* Trap Instruction Vectors 11 - 43. */
328 .long trap /* Trap Instruction Vectors 12 - 44. */
329 .long trap /* Trap Instruction Vectors 13 - 45. */
330 .long trap /* Trap Instruction Vectors 14 - 46. */
331 .long trap /* Trap Instruction Vectors 15 - 47. */
332 .long 0 /* (Reserved for Coprocessor) - 48. */
333 .long 0 /* (Reserved for Coprocessor) - 49. */
334 .long 0 /* (Reserved for Coprocessor) - 50. */
335 .long 0 /* (Reserved for Coprocessor) - 51. */
336 .long 0 /* (Reserved for Coprocessor) - 52. */
337 .long 0 /* (Reserved for Coprocessor) - 53. */
338 .long 0 /* (Reserved for Coprocessor) - 54. */
339 .long 0 /* (Reserved for Coprocessor) - 55. */
340 .long 0 /* (Reserved for Coprocessor) - 56. */
341 .long 0 /* (Reserved for Coprocessor) - 57. */
342 .long 0 /* (Reserved for Coprocessor) - 58. */
343 .long 0 /* (Unassigned, Reserved) - 59. */
344 .long 0 /* (Unassigned, Reserved) - 60. */
345 .long 0 /* (Unassigned, Reserved) - 61. */
346 .long 0 /* (Unassigned, Reserved) - 62. */
347 .long 0 /* (Unassigned, Reserved) - 63. */
348 /* The assignment of these vectors to the CPM is */
349 /* dependent on the configuration of the CPM vba */
350 /* fields. */
351 .long 0 /* (User-Defined Vectors 1) CPM Error - 64. */
352 .long 0 /* (User-Defined Vectors 2) CPM Parallel IO PC11- 65. */
353 .long 0 /* (User-Defined Vectors 3) CPM Parallel IO PC10- 66. */
354 .long 0 /* (User-Defined Vectors 4) CPM SMC2 / PIP - 67. */
355 .long 0 /* (User-Defined Vectors 5) CPM SMC1 - 68. */
356 .long 0 /* (User-Defined Vectors 6) CPM SPI - 69. */
357 .long 0 /* (User-Defined Vectors 7) CPM Parallel IO PC9 - 70. */
358 .long 0 /* (User-Defined Vectors 8) CPM Timer 4 - 71. */
359 .long 0 /* (User-Defined Vectors 9) CPM Reserved - 72. */
360 .long 0 /* (User-Defined Vectors 10) CPM Parallel IO PC8- 73. */
361 .long 0 /* (User-Defined Vectors 11) CPM Parallel IO PC7- 74. */
362 .long 0 /* (User-Defined Vectors 12) CPM Parallel IO PC6- 75. */
363 .long 0 /* (User-Defined Vectors 13) CPM Timer 3 - 76. */
364 .long 0 /* (User-Defined Vectors 14) CPM Reserved - 77. */
365 .long 0 /* (User-Defined Vectors 15) CPM Parallel IO PC5- 78. */
366 .long 0 /* (User-Defined Vectors 16) CPM Parallel IO PC4- 79. */
367 .long 0 /* (User-Defined Vectors 17) CPM Reserved - 80. */
368 .long 0 /* (User-Defined Vectors 18) CPM RISC Timer Tbl - 81. */
369 .long 0 /* (User-Defined Vectors 19) CPM Timer 2 - 82. */
370 .long 0 /* (User-Defined Vectors 21) CPM Reserved - 83. */
371 .long 0 /* (User-Defined Vectors 22) CPM IDMA2 - 84. */
372 .long 0 /* (User-Defined Vectors 23) CPM IDMA1 - 85. */
373 .long 0 /* (User-Defined Vectors 24) CPM SDMA Bus Err - 86. */
374 .long 0 /* (User-Defined Vectors 25) CPM Parallel IO PC3- 87. */
375 .long 0 /* (User-Defined Vectors 26) CPM Parallel IO PC2- 88. */
376 .long 0 /* (User-Defined Vectors 27) CPM Timer 1 - 89. */
377 .long 0 /* (User-Defined Vectors 28) CPM Parallel IO PC1- 90. */
378 .long 0 /* (User-Defined Vectors 29) CPM SCC 4 - 91. */
379 .long 0 /* (User-Defined Vectors 30) CPM SCC 3 - 92. */
380 .long 0 /* (User-Defined Vectors 31) CPM SCC 2 - 93. */
381 .long 0 /* (User-Defined Vectors 32) CPM SCC 1 - 94. */
382 .long 0 /* (User-Defined Vectors 33) CPM Parallel IO PC0- 95. */
383 /* I don't think anything uses the vectors after here. */
384 .long 0 /* (User-Defined Vectors 34) - 96. */
385 .long 0,0,0,0,0 /* (User-Defined Vectors 35 - 39). */
386 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 40 - 49). */
387 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 50 - 59). */
388 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 60 - 69). */
389 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 70 - 79). */
390 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 80 - 89). */
391 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 90 - 99). */
392 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 100 - 109). */
393 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 110 - 119). */
394 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 120 - 129). */
395 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 130 - 139). */
396 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 140 - 149). */
397 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 150 - 159). */
398 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 160 - 169). */
399 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 170 - 179). */
400 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 180 - 189). */
401 .long 0,0,0 /* (User-Defined Vectors 190 - 192). */
402.text
403ignore: rte
diff --git a/arch/m68k/platform/68360/head-rom.S b/arch/m68k/platform/68360/head-rom.S
new file mode 100644
index 000000000000..97510e55b802
--- /dev/null
+++ b/arch/m68k/platform/68360/head-rom.S
@@ -0,0 +1,414 @@
1/* arch/m68knommu/platform/68360/head-rom.S
2 *
3 * Startup code for Motorola 68360
4 *
5 * Copyright (C) SED Systems, a Division of Calian Ltd.
6 * Based on: arch/m68knommu/platform/68328/pilot/crt0_rom.S
7 * Based on: arch/m68knommu/platform/68360/uCquicc/crt0_rom.S, 2.0.38.1.pre7
8 * uClinux Kernel
9 * Copyright (C) Michael Leslie <mleslie@lineo.com>
10 * Based on: arch/m68knommu/platform/68EZ328/ucsimm/crt0_rom.S
11 * Copyright (C) 1998 D. Jeff Dionne <jeff@uclinux.org>,
12 *
13 */
14
15.global _stext
16.global _sbss
17.global _start
18
19.global _rambase
20.global _ramvec
21.global _ramstart
22.global _ramend
23
24.global _quicc_base
25.global _periph_base
26
27#define RAMEND (CONFIG_RAMBASE + CONFIG_RAMSIZE)
28
29#define REGB 0x1000
30#define PEPAR (_dprbase + REGB + 0x0016)
31#define GMR (_dprbase + REGB + 0x0040)
32#define OR0 (_dprbase + REGB + 0x0054)
33#define BR0 (_dprbase + REGB + 0x0050)
34
35#define OR1 (_dprbase + REGB + 0x0064)
36#define BR1 (_dprbase + REGB + 0x0060)
37
38#define OR2 (_dprbase + REGB + 0x0074)
39#define BR2 (_dprbase + REGB + 0x0070)
40
41#define OR3 (_dprbase + REGB + 0x0084)
42#define BR3 (_dprbase + REGB + 0x0080)
43
44#define OR4 (_dprbase + REGB + 0x0094)
45#define BR4 (_dprbase + REGB + 0x0090)
46
47#define OR5 (_dprbase + REGB + 0x00A4)
48#define BR5 (_dprbase + REGB + 0x00A0)
49
50#define OR6 (_dprbase + REGB + 0x00b4)
51#define BR6 (_dprbase + REGB + 0x00b0)
52
53#define OR7 (_dprbase + REGB + 0x00c4)
54#define BR7 (_dprbase + REGB + 0x00c0)
55
56#define MCR (_dprbase + REGB + 0x0000)
57#define AVR (_dprbase + REGB + 0x0008)
58
59#define SYPCR (_dprbase + REGB + 0x0022)
60
61#define PLLCR (_dprbase + REGB + 0x0010)
62#define CLKOCR (_dprbase + REGB + 0x000C)
63#define CDVCR (_dprbase + REGB + 0x0014)
64
65#define BKAR (_dprbase + REGB + 0x0030)
66#define BKCR (_dprbase + REGB + 0x0034)
67#define SWIV (_dprbase + REGB + 0x0023)
68#define PICR (_dprbase + REGB + 0x0026)
69#define PITR (_dprbase + REGB + 0x002A)
70
71/* Define for all memory configuration */
72#define MCU_SIM_GMR 0x00000000
73#define SIM_OR_MASK 0x0fffffff
74
75/* Defines for chip select zero - the flash */
76#define SIM_OR0_MASK 0x20000000
77#define SIM_BR0_MASK 0x00000001
78
79/* Defines for chip select one - the RAM */
80#define SIM_OR1_MASK 0x10000000
81#define SIM_BR1_MASK 0x00000001
82
83#define MCU_SIM_MBAR_ADRS 0x0003ff00
84#define MCU_SIM_MBAR_BA_MASK 0xfffff000
85#define MCU_SIM_MBAR_AS_MASK 0x00000001
86
87#define MCU_SIM_PEPAR 0x00B4
88
89#define MCU_DISABLE_INTRPTS 0x2700
90#define MCU_SIM_AVR 0x00
91
92#define MCU_SIM_MCR 0x00005cff
93
94#define MCU_SIM_CLKOCR 0x00
95#define MCU_SIM_PLLCR 0x8000
96#define MCU_SIM_CDVCR 0x0000
97
98#define MCU_SIM_SYPCR 0x0000
99#define MCU_SIM_SWIV 0x00
100#define MCU_SIM_PICR 0x0000
101#define MCU_SIM_PITR 0x0000
102
103
104#include <asm/m68360_regs.h>
105
106
107/*
108 * By the time this RAM specific code begins to execute, DPRAM
109 * and DRAM should already be mapped and accessible.
110 */
111
112 .text
113_start:
114_stext:
115 nop
116 ori.w #MCU_DISABLE_INTRPTS, %sr /* disable interrupts: */
117 /* We should not need to setup the boot stack the reset should do it. */
118 movea.l #RAMEND, %sp /* set up stack at the end of DRAM:*/
119
120
121set_mbar_register:
122 moveq.l #0x07, %d1 /* Setup MBAR */
123 movec %d1, %dfc
124
125 lea.l MCU_SIM_MBAR_ADRS, %a0
126 move.l #_dprbase, %d0
127 andi.l #MCU_SIM_MBAR_BA_MASK, %d0
128 ori.l #MCU_SIM_MBAR_AS_MASK, %d0
129 moves.l %d0, %a0@
130
131 moveq.l #0x05, %d1
132 movec.l %d1, %dfc
133
134 /* Now we can begin to access registers in DPRAM */
135
136set_sim_mcr:
137 /* Set Module Configuration Register */
138 move.l #MCU_SIM_MCR, MCR
139
140 /* to do: Determine cause of reset */
141
142 /*
143 * configure system clock MC68360 p. 6-40
144 * (value +1)*osc/128 = system clock
145 * or
146 * (value + 1)*osc = system clock
147 * You do not need to divide the oscillator by 128 unless you want to.
148 */
149set_sim_clock:
150 move.w #MCU_SIM_PLLCR, PLLCR
151 move.b #MCU_SIM_CLKOCR, CLKOCR
152 move.w #MCU_SIM_CDVCR, CDVCR
153
154 /* Wait for the PLL to settle */
155 move.w #16384, %d0
156pll_settle_wait:
157 subi.w #1, %d0
158 bne pll_settle_wait
159
160 /* Setup the system protection register, and watchdog timer register */
161 move.b #MCU_SIM_SWIV, SWIV
162 move.w #MCU_SIM_PICR, PICR
163 move.w #MCU_SIM_PITR, PITR
164 move.w #MCU_SIM_SYPCR, SYPCR
165
166 /* Clear DPRAM - system + parameter */
167 movea.l #_dprbase, %a0
168 movea.l #_dprbase+0x2000, %a1
169
170 /* Copy 0 to %a0 until %a0 == %a1 */
171clear_dpram:
172 movel #0, %a0@+
173 cmpal %a0, %a1
174 bhi clear_dpram
175
176configure_memory_controller:
177 /* Set up Global Memory Register (GMR) */
178 move.l #MCU_SIM_GMR, %d0
179 move.l %d0, GMR
180
181configure_chip_select_0:
182 move.l #0x00400000, %d0
183 subq.l #0x01, %d0
184 eori.l #SIM_OR_MASK, %d0
185 ori.l #SIM_OR0_MASK, %d0
186 move.l %d0, OR0
187
188 move.l #__rom_start, %d0
189 ori.l #SIM_BR0_MASK, %d0
190 move.l %d0, BR0
191
192 move.l #0x0, BR1
193 move.l #0x0, BR2
194 move.l #0x0, BR3
195 move.l #0x0, BR4
196 move.l #0x0, BR5
197 move.l #0x0, BR6
198 move.l #0x0, BR7
199
200 move.w #MCU_SIM_PEPAR, PEPAR
201
202 /* point to vector table: */
203 move.l #_romvec, %a0
204 move.l #_ramvec, %a1
205copy_vectors:
206 move.l %a0@, %d0
207 move.l %d0, %a1@
208 move.l %a0@, %a1@
209 addq.l #0x04, %a0
210 addq.l #0x04, %a1
211 cmp.l #_start, %a0
212 blt copy_vectors
213
214 move.l #_ramvec, %a1
215 movec %a1, %vbr
216
217
218 /* Copy data segment from ROM to RAM */
219 moveal #_etext, %a0
220 moveal #_sdata, %a1
221 moveal #_edata, %a2
222
223 /* Copy %a0 to %a1 until %a1 == %a2 */
224LD1:
225 move.l %a0@, %d0
226 addq.l #0x04, %a0
227 move.l %d0, %a1@
228 addq.l #0x04, %a1
229 cmp.l #_edata, %a1
230 blt LD1
231
232 moveal #_sbss, %a0
233 moveal #_ebss, %a1
234
235 /* Copy 0 to %a0 until %a0 == %a1 */
236L1:
237 movel #0, %a0@+
238 cmpal %a0, %a1
239 bhi L1
240
241load_quicc:
242 move.l #_dprbase, _quicc_base
243
244store_ram_size:
245 /* Set ram size information */
246 move.l #_sdata, _rambase
247 move.l #_ebss, _ramstart
248 move.l #RAMEND, %d0
249 sub.l #0x1000, %d0 /* Reserve 4K for stack space.*/
250 move.l %d0, _ramend /* Different from RAMEND.*/
251
252 pea 0
253 pea env
254 pea %sp@(4)
255 pea 0
256
257 lea init_thread_union, %a2
258 lea 0x2000(%a2), %sp
259
260lp:
261 jsr start_kernel
262
263_exit:
264 jmp _exit
265
266
267 .data
268 .align 4
269env:
270 .long 0
271_quicc_base:
272 .long 0
273_periph_base:
274 .long 0
275_ramvec:
276 .long 0
277_rambase:
278 .long 0
279_ramstart:
280 .long 0
281_ramend:
282 .long 0
283_dprbase:
284 .long 0xffffe000
285
286
287 .text
288
289 /*
290 * These are the exception vectors at boot up, they are copied into RAM
291 * and then overwritten as needed.
292 */
293
294.section ".data..initvect","awx"
295 .long RAMEND /* Reset: Initial Stack Pointer - 0. */
296 .long _start /* Reset: Initial Program Counter - 1. */
297 .long buserr /* Bus Error - 2. */
298 .long trap /* Address Error - 3. */
299 .long trap /* Illegal Instruction - 4. */
300 .long trap /* Divide by zero - 5. */
301 .long trap /* CHK, CHK2 Instructions - 6. */
302 .long trap /* TRAPcc, TRAPV Instructions - 7. */
303 .long trap /* Privilege Violation - 8. */
304 .long trap /* Trace - 9. */
305 .long trap /* Line 1010 Emulator - 10. */
306 .long trap /* Line 1111 Emualtor - 11. */
307 .long trap /* Harware Breakpoint - 12. */
308 .long trap /* (Reserved for Coprocessor Protocol Violation)- 13. */
309 .long trap /* Format Error - 14. */
310 .long trap /* Uninitialized Interrupt - 15. */
311 .long trap /* (Unassigned, Reserver) - 16. */
312 .long trap /* (Unassigned, Reserver) - 17. */
313 .long trap /* (Unassigned, Reserver) - 18. */
314 .long trap /* (Unassigned, Reserver) - 19. */
315 .long trap /* (Unassigned, Reserver) - 20. */
316 .long trap /* (Unassigned, Reserver) - 21. */
317 .long trap /* (Unassigned, Reserver) - 22. */
318 .long trap /* (Unassigned, Reserver) - 23. */
319 .long trap /* Spurious Interrupt - 24. */
320 .long trap /* Level 1 Interrupt Autovector - 25. */
321 .long trap /* Level 2 Interrupt Autovector - 26. */
322 .long trap /* Level 3 Interrupt Autovector - 27. */
323 .long trap /* Level 4 Interrupt Autovector - 28. */
324 .long trap /* Level 5 Interrupt Autovector - 29. */
325 .long trap /* Level 6 Interrupt Autovector - 30. */
326 .long trap /* Level 7 Interrupt Autovector - 31. */
327 .long system_call /* Trap Instruction Vectors 0 - 32. */
328 .long trap /* Trap Instruction Vectors 1 - 33. */
329 .long trap /* Trap Instruction Vectors 2 - 34. */
330 .long trap /* Trap Instruction Vectors 3 - 35. */
331 .long trap /* Trap Instruction Vectors 4 - 36. */
332 .long trap /* Trap Instruction Vectors 5 - 37. */
333 .long trap /* Trap Instruction Vectors 6 - 38. */
334 .long trap /* Trap Instruction Vectors 7 - 39. */
335 .long trap /* Trap Instruction Vectors 8 - 40. */
336 .long trap /* Trap Instruction Vectors 9 - 41. */
337 .long trap /* Trap Instruction Vectors 10 - 42. */
338 .long trap /* Trap Instruction Vectors 11 - 43. */
339 .long trap /* Trap Instruction Vectors 12 - 44. */
340 .long trap /* Trap Instruction Vectors 13 - 45. */
341 .long trap /* Trap Instruction Vectors 14 - 46. */
342 .long trap /* Trap Instruction Vectors 15 - 47. */
343 .long 0 /* (Reserved for Coprocessor) - 48. */
344 .long 0 /* (Reserved for Coprocessor) - 49. */
345 .long 0 /* (Reserved for Coprocessor) - 50. */
346 .long 0 /* (Reserved for Coprocessor) - 51. */
347 .long 0 /* (Reserved for Coprocessor) - 52. */
348 .long 0 /* (Reserved for Coprocessor) - 53. */
349 .long 0 /* (Reserved for Coprocessor) - 54. */
350 .long 0 /* (Reserved for Coprocessor) - 55. */
351 .long 0 /* (Reserved for Coprocessor) - 56. */
352 .long 0 /* (Reserved for Coprocessor) - 57. */
353 .long 0 /* (Reserved for Coprocessor) - 58. */
354 .long 0 /* (Unassigned, Reserved) - 59. */
355 .long 0 /* (Unassigned, Reserved) - 60. */
356 .long 0 /* (Unassigned, Reserved) - 61. */
357 .long 0 /* (Unassigned, Reserved) - 62. */
358 .long 0 /* (Unassigned, Reserved) - 63. */
359 /* The assignment of these vectors to the CPM is */
360 /* dependent on the configuration of the CPM vba */
361 /* fields. */
362 .long 0 /* (User-Defined Vectors 1) CPM Error - 64. */
363 .long 0 /* (User-Defined Vectors 2) CPM Parallel IO PC11- 65. */
364 .long 0 /* (User-Defined Vectors 3) CPM Parallel IO PC10- 66. */
365 .long 0 /* (User-Defined Vectors 4) CPM SMC2 / PIP - 67. */
366 .long 0 /* (User-Defined Vectors 5) CPM SMC1 - 68. */
367 .long 0 /* (User-Defined Vectors 6) CPM SPI - 69. */
368 .long 0 /* (User-Defined Vectors 7) CPM Parallel IO PC9 - 70. */
369 .long 0 /* (User-Defined Vectors 8) CPM Timer 4 - 71. */
370 .long 0 /* (User-Defined Vectors 9) CPM Reserved - 72. */
371 .long 0 /* (User-Defined Vectors 10) CPM Parallel IO PC8- 73. */
372 .long 0 /* (User-Defined Vectors 11) CPM Parallel IO PC7- 74. */
373 .long 0 /* (User-Defined Vectors 12) CPM Parallel IO PC6- 75. */
374 .long 0 /* (User-Defined Vectors 13) CPM Timer 3 - 76. */
375 .long 0 /* (User-Defined Vectors 14) CPM Reserved - 77. */
376 .long 0 /* (User-Defined Vectors 15) CPM Parallel IO PC5- 78. */
377 .long 0 /* (User-Defined Vectors 16) CPM Parallel IO PC4- 79. */
378 .long 0 /* (User-Defined Vectors 17) CPM Reserved - 80. */
379 .long 0 /* (User-Defined Vectors 18) CPM RISC Timer Tbl - 81. */
380 .long 0 /* (User-Defined Vectors 19) CPM Timer 2 - 82. */
381 .long 0 /* (User-Defined Vectors 21) CPM Reserved - 83. */
382 .long 0 /* (User-Defined Vectors 22) CPM IDMA2 - 84. */
383 .long 0 /* (User-Defined Vectors 23) CPM IDMA1 - 85. */
384 .long 0 /* (User-Defined Vectors 24) CPM SDMA Bus Err - 86. */
385 .long 0 /* (User-Defined Vectors 25) CPM Parallel IO PC3- 87. */
386 .long 0 /* (User-Defined Vectors 26) CPM Parallel IO PC2- 88. */
387 .long 0 /* (User-Defined Vectors 27) CPM Timer 1 - 89. */
388 .long 0 /* (User-Defined Vectors 28) CPM Parallel IO PC1- 90. */
389 .long 0 /* (User-Defined Vectors 29) CPM SCC 4 - 91. */
390 .long 0 /* (User-Defined Vectors 30) CPM SCC 3 - 92. */
391 .long 0 /* (User-Defined Vectors 31) CPM SCC 2 - 93. */
392 .long 0 /* (User-Defined Vectors 32) CPM SCC 1 - 94. */
393 .long 0 /* (User-Defined Vectors 33) CPM Parallel IO PC0- 95. */
394 /* I don't think anything uses the vectors after here. */
395 .long 0 /* (User-Defined Vectors 34) - 96. */
396 .long 0,0,0,0,0 /* (User-Defined Vectors 35 - 39). */
397 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 40 - 49). */
398 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 50 - 59). */
399 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 60 - 69). */
400 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 70 - 79). */
401 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 80 - 89). */
402 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 90 - 99). */
403 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 100 - 109). */
404 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 110 - 119). */
405 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 120 - 129). */
406 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 130 - 139). */
407 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 140 - 149). */
408 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 150 - 159). */
409 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 160 - 169). */
410 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 170 - 179). */
411 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 180 - 189). */
412 .long 0,0,0 /* (User-Defined Vectors 190 - 192). */
413.text
414ignore: rte
diff --git a/arch/m68k/platform/68360/ints.c b/arch/m68k/platform/68360/ints.c
new file mode 100644
index 000000000000..4af0f4e30f74
--- /dev/null
+++ b/arch/m68k/platform/68360/ints.c
@@ -0,0 +1,139 @@
1/*
2 * linux/arch/$(ARCH)/platform/$(PLATFORM)/ints.c
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file COPYING in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (c) 2000 Michael Leslie <mleslie@lineo.com>
9 * Copyright (c) 1996 Roman Zippel
10 * Copyright (c) 1999 D. Jeff Dionne <jeff@uclinux.org>
11 */
12
13#include <linux/types.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/interrupt.h>
17#include <linux/irq.h>
18#include <asm/traps.h>
19#include <asm/machdep.h>
20#include <asm/m68360.h>
21
22/* from quicc/commproc.c: */
23extern QUICC *pquicc;
24extern void cpm_interrupt_init(void);
25
26#define INTERNAL_IRQS (96)
27
28/* assembler routines */
29asmlinkage void system_call(void);
30asmlinkage void buserr(void);
31asmlinkage void trap(void);
32asmlinkage void bad_interrupt(void);
33asmlinkage void inthandler(void);
34
35extern void *_ramvec[];
36
37/* The number of spurious interrupts */
38volatile unsigned int num_spurious;
39
40static void intc_irq_unmask(struct irq_data *d)
41{
42 pquicc->intr_cimr |= (1 << d->irq);
43}
44
45static void intc_irq_mask(struct irq_data *d)
46{
47 pquicc->intr_cimr &= ~(1 << d->irq);
48}
49
50static void intc_irq_ack(struct irq_data *d)
51{
52 pquicc->intr_cisr = (1 << d->irq);
53}
54
55static struct irq_chip intc_irq_chip = {
56 .name = "M68K-INTC",
57 .irq_mask = intc_irq_mask,
58 .irq_unmask = intc_irq_unmask,
59 .irq_ack = intc_irq_ack,
60};
61
62/*
63 * This function should be called during kernel startup to initialize
64 * the vector table.
65 */
66void init_IRQ(void)
67{
68 int i;
69 int vba = (CPM_VECTOR_BASE<<4);
70
71 /* set up the vectors */
72 _ramvec[2] = buserr;
73 _ramvec[3] = trap;
74 _ramvec[4] = trap;
75 _ramvec[5] = trap;
76 _ramvec[6] = trap;
77 _ramvec[7] = trap;
78 _ramvec[8] = trap;
79 _ramvec[9] = trap;
80 _ramvec[10] = trap;
81 _ramvec[11] = trap;
82 _ramvec[12] = trap;
83 _ramvec[13] = trap;
84 _ramvec[14] = trap;
85 _ramvec[15] = trap;
86
87 _ramvec[32] = system_call;
88 _ramvec[33] = trap;
89
90 cpm_interrupt_init();
91
92 /* set up CICR for vector base address and irq level */
93 /* irl = 4, hp = 1f - see MC68360UM p 7-377 */
94 pquicc->intr_cicr = 0x00e49f00 | vba;
95
96 /* CPM interrupt vectors: (p 7-376) */
97 _ramvec[vba+CPMVEC_ERROR] = bad_interrupt; /* Error */
98 _ramvec[vba+CPMVEC_PIO_PC11] = inthandler; /* pio - pc11 */
99 _ramvec[vba+CPMVEC_PIO_PC10] = inthandler; /* pio - pc10 */
100 _ramvec[vba+CPMVEC_SMC2] = inthandler; /* smc2/pip */
101 _ramvec[vba+CPMVEC_SMC1] = inthandler; /* smc1 */
102 _ramvec[vba+CPMVEC_SPI] = inthandler; /* spi */
103 _ramvec[vba+CPMVEC_PIO_PC9] = inthandler; /* pio - pc9 */
104 _ramvec[vba+CPMVEC_TIMER4] = inthandler; /* timer 4 */
105 _ramvec[vba+CPMVEC_RESERVED1] = inthandler; /* reserved */
106 _ramvec[vba+CPMVEC_PIO_PC8] = inthandler; /* pio - pc8 */
107 _ramvec[vba+CPMVEC_PIO_PC7] = inthandler; /* pio - pc7 */
108 _ramvec[vba+CPMVEC_PIO_PC6] = inthandler; /* pio - pc6 */
109 _ramvec[vba+CPMVEC_TIMER3] = inthandler; /* timer 3 */
110 _ramvec[vba+CPMVEC_PIO_PC5] = inthandler; /* pio - pc5 */
111 _ramvec[vba+CPMVEC_PIO_PC4] = inthandler; /* pio - pc4 */
112 _ramvec[vba+CPMVEC_RESERVED2] = inthandler; /* reserved */
113 _ramvec[vba+CPMVEC_RISCTIMER] = inthandler; /* timer table */
114 _ramvec[vba+CPMVEC_TIMER2] = inthandler; /* timer 2 */
115 _ramvec[vba+CPMVEC_RESERVED3] = inthandler; /* reserved */
116 _ramvec[vba+CPMVEC_IDMA2] = inthandler; /* idma 2 */
117 _ramvec[vba+CPMVEC_IDMA1] = inthandler; /* idma 1 */
118 _ramvec[vba+CPMVEC_SDMA_CB_ERR] = inthandler; /* sdma channel bus error */
119 _ramvec[vba+CPMVEC_PIO_PC3] = inthandler; /* pio - pc3 */
120 _ramvec[vba+CPMVEC_PIO_PC2] = inthandler; /* pio - pc2 */
121 /* _ramvec[vba+CPMVEC_TIMER1] = cpm_isr_timer1; */ /* timer 1 */
122 _ramvec[vba+CPMVEC_TIMER1] = inthandler; /* timer 1 */
123 _ramvec[vba+CPMVEC_PIO_PC1] = inthandler; /* pio - pc1 */
124 _ramvec[vba+CPMVEC_SCC4] = inthandler; /* scc 4 */
125 _ramvec[vba+CPMVEC_SCC3] = inthandler; /* scc 3 */
126 _ramvec[vba+CPMVEC_SCC2] = inthandler; /* scc 2 */
127 _ramvec[vba+CPMVEC_SCC1] = inthandler; /* scc 1 */
128 _ramvec[vba+CPMVEC_PIO_PC0] = inthandler; /* pio - pc0 */
129
130
131 /* turn off all CPM interrupts */
132 pquicc->intr_cimr = 0x00000000;
133
134 for (i = 0; (i < NR_IRQS); i++) {
135 irq_set_chip(i, &intc_irq_chip);
136 irq_set_handler(i, handle_level_irq);
137 }
138}
139
diff --git a/arch/m68k/platform/68EZ328/Makefile b/arch/m68k/platform/68EZ328/Makefile
new file mode 100644
index 000000000000..ee97735a242c
--- /dev/null
+++ b/arch/m68k/platform/68EZ328/Makefile
@@ -0,0 +1,11 @@
1#
2# Makefile for arch/m68knommu/platform/68EZ328.
3#
4
5obj-y := config.o
6
7extra-y := bootlogo.rh
8
9$(obj)/bootlogo.rh: $(src)/bootlogo.h
10 perl $(src)/../68328/bootlogo.pl < $(src)/bootlogo.h \
11 > $(obj)/bootlogo.rh
diff --git a/arch/m68k/platform/68EZ328/bootlogo.h b/arch/m68k/platform/68EZ328/bootlogo.h
new file mode 100644
index 000000000000..e842bdae5839
--- /dev/null
+++ b/arch/m68k/platform/68EZ328/bootlogo.h
@@ -0,0 +1,3204 @@
1#define splash_width 640
2#define splash_height 480
3static unsigned char splash_bits[] = {
4 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
5 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
6 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
7 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
8 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
9 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
10 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
11 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
12 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
13 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
14 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
15 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
16 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
17 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
18 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
19 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
20 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
21 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
22 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
23 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
24 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
25 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
26 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
27 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
28 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
29 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
30 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
31 0x00, 0x00, 0x80, 0xff, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
32 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
33 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
34 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
35 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
36 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
37 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff,
38 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
39 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
40 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
41 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
42 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
43 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
44 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00,
45 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
46 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
47 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
48 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
49 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
50 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
51 0x00, 0xf8, 0xff, 0xff, 0xff, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00,
52 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
53 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
54 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
55 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
56 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
57 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff,
58 0xff, 0xff, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
59 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
60 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
61 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
62 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
63 0x00, 0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
64 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00,
65 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
66 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
67 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
68 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
69 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, 0x00,
70 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
71 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00,
72 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
73 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
74 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
75 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
76 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00,
77 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff, 0xff,
78 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
79 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
80 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
81 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
82 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
83 0x00, 0xf8, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
84 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f,
85 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
86 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
87 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
88 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
89 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff,
90 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
91 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f, 0x00, 0x00, 0x00, 0x00,
92 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
93 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
94 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
95 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
96 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00,
97 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0xff,
98 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
99 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
100 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
101 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
102 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
103 0x00, 0x00, 0xe0, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
104 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
105 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
106 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
107 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
108 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
109 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8,
110 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8,
111 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x07, 0x00, 0x00, 0x00,
112 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
113 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
114 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
115 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
116 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0x7f, 0x00, 0x00,
117 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff, 0xff, 0xff,
118 0xff, 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
119 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
120 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
121 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
122 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
123 0x00, 0x00, 0x00, 0xe0, 0xff, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00,
124 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
125 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
126 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
127 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
128 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
129 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0,
130 0x03, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff,
131 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f, 0x00, 0x00, 0x00,
132 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
133 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
134 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
135 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
136 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x00, 0xfe, 0xff, 0x1f,
137 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0xff, 0xff,
138 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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944 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
945 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3f,
946 0x08, 0x00, 0x00, 0x1c, 0x02, 0x08, 0x04, 0x4c, 0x00, 0x00, 0x00, 0x00,
947 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
948 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
949 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc,
950 0xff, 0x01, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
951 0x00, 0x00, 0x10, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
952 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0c, 0x00, 0x00, 0x00, 0x1c,
953 0x02, 0x08, 0x04, 0x4c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
954 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
955 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
956 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x1f, 0xc0, 0x00,
957 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, 0x10, 0x80,
958 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
959 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 0x00, 0x64, 0x4c, 0x00, 0x00, 0x00,
960 0x36, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
961 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
962 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
963 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00,
964 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, 0xf0, 0xff, 0x00, 0x00, 0x00, 0x00,
965 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0,
966 0x09, 0x00, 0x00, 0x64, 0x4c, 0x00, 0x00, 0x00, 0x36, 0x01, 0x00, 0x00,
967 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
968 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
969 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
970 0xff, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff,
971 0xff, 0x03, 0xf0, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
972 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 0x00, 0x00, 0x9c,
973 0x01, 0x08, 0x83, 0x0c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
974 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
975 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
976 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0x01,
977 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0x03, 0xf0, 0xff,
978 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
979 0x00, 0x00, 0x00, 0x80, 0x0f, 0x00, 0x00, 0x64, 0x8c, 0x01, 0x18, 0x40,
980 0x30, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
981 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
982 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
983 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00,
984 0x00, 0x00, 0x00, 0xff, 0xff, 0x03, 0xf0, 0xff, 0x00, 0x00, 0x00, 0x00,
985 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0,
986 0x0f, 0x00, 0x00, 0x64, 0x8c, 0x01, 0x18, 0x40, 0x30, 0x01, 0x00, 0x00,
987 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
988 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
989 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
990 0x00, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff,
991 0xff, 0x03, 0x10, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
992 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x0f, 0x00, 0x00, 0x9b,
993 0x01, 0xc0, 0x00, 0x00, 0xc6, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
994 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
995 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00,
996 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xbc, 0xff, 0x01,
997 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x02, 0x02, 0x00, 0x40,
998 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
999 0x00, 0x00, 0x00, 0xff, 0x09, 0x00, 0x00, 0x9b, 0x01, 0xc0, 0x00, 0x00,
1000 0xc6, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1001 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1002 0x00, 0x00, 0x00, 0xc0, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1003 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0xf8, 0x01, 0x00, 0x00, 0x00, 0x00,
1004 0x00, 0x00, 0x00, 0x01, 0x02, 0x02, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x00,
1005 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3f,
1006 0x00, 0x00, 0x00, 0x07, 0x32, 0x06, 0x18, 0x43, 0x00, 0x06, 0x00, 0x00,
1007 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1008 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0,
1009 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1010 0x00, 0xf0, 0xc1, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01,
1011 0x02, 0x02, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1012 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0c, 0x00, 0x00, 0x00, 0x07,
1013 0x32, 0x06, 0x18, 0x43, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1014 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1015 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x00, 0x00, 0x00,
1016 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x03, 0x00,
1017 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x02, 0x10, 0xe0,
1018 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1019 0x00, 0x00, 0x00, 0x70, 0x08, 0x00, 0x00, 0x7b, 0x00, 0x30, 0x03, 0x0c,
1020 0x08, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1021 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1022 0x00, 0x00, 0x00, 0xf0, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1023 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00,
1024 0x00, 0x00, 0x00, 0xe0, 0x07, 0x03, 0xf0, 0xff, 0x00, 0x00, 0x00, 0x00,
1025 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0,
1026 0x09, 0x00, 0xc0, 0x84, 0x8d, 0x01, 0x80, 0x00, 0xc0, 0x06, 0x00, 0x00,
1027 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1028 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70,
1029 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1030 0x00, 0x00, 0x1c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8,
1031 0xfd, 0x03, 0xf0, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1032 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 0x00, 0xc0, 0x84,
1033 0x8d, 0x01, 0x80, 0x00, 0xc0, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1034 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1035 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x00,
1036 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x00,
1037 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xfd, 0x03, 0xf0, 0x7f,
1038 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1039 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0xc0, 0x1b, 0x00, 0x30, 0x00, 0x40,
1040 0x08, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1041 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1042 0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1043 0x00, 0x00, 0x00, 0x78, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00,
1044 0x00, 0x00, 0x00, 0xff, 0xfc, 0x01, 0xf0, 0x3f, 0x00, 0x00, 0x00, 0x00,
1045 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1046 0x08, 0x00, 0xc0, 0x1b, 0x00, 0x30, 0x00, 0x40, 0x08, 0x18, 0x00, 0x00,
1047 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1048 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20,
1049 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc,
1050 0x07, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3f,
1051 0xf8, 0x01, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1052 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0xc0, 0x64,
1053 0x42, 0x06, 0x1b, 0x03, 0x00, 0x61, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00,
1054 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1055 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x80, 0x00, 0x00, 0x00,
1056 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x7f, 0x00, 0xc0, 0x00,
1057 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 0xf0, 0x00, 0x10, 0x00,
1058 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1059 0x00, 0x00, 0x00, 0x00, 0x0e, 0x00, 0xc0, 0x64, 0x42, 0x06, 0x1b, 0x03,
1060 0x00, 0x61, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1061 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1062 0x00, 0x00, 0x00, 0xf0, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1063 0x00, 0x00, 0x00, 0xfe, 0xff, 0x03, 0xe0, 0x01, 0x00, 0x00, 0x00, 0x00,
1064 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1065 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
1066 0x0f, 0x00, 0x00, 0x1b, 0x00, 0x00, 0x80, 0x30, 0x08, 0x86, 0x00, 0x00,
1067 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1068 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0,
1069 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe,
1070 0xff, 0x3f, 0xc0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02,
1071 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1072 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x0f, 0x00, 0x00, 0x1b,
1073 0x00, 0x00, 0x80, 0x30, 0x08, 0x86, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1074 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1075 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x00, 0x00, 0x00,
1076 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff, 0xc3, 0x03,
1077 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0c, 0x00, 0x00, 0x00, 0x00,
1078 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1079 0x00, 0x00, 0x00, 0xfc, 0x0f, 0x00, 0xe0, 0x84, 0x31, 0x30, 0x04, 0x80,
1080 0xc1, 0x18, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1081 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1082 0x00, 0x00, 0x00, 0xf0, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1083 0x00, 0x00, 0x00, 0x1c, 0xff, 0xff, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00,
1084 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1085 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff,
1086 0x09, 0x00, 0xc0, 0x63, 0x02, 0x06, 0x00, 0x00, 0x00, 0x60, 0x6c, 0xfc,
1087 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1088 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10,
1089 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18,
1090 0xe0, 0xff, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1091 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1092 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3f, 0x08, 0x00, 0xc0, 0x63,
1093 0x02, 0x06, 0x00, 0x00, 0x00, 0x60, 0x6c, 0xfc, 0xff, 0x03, 0x00, 0x00,
1094 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1095 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00,
1096 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x00, 0xff, 0xff, 0x03,
1097 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1098 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1099 0x00, 0x00, 0x00, 0x0c, 0x00, 0x00, 0xe0, 0x1c, 0x40, 0x00, 0x1b, 0x4c,
1100 0x06, 0x81, 0x80, 0xfd, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1101 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1102 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1103 0x00, 0x00, 0x00, 0x70, 0x00, 0xf0, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00,
1104 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1105 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70,
1106 0x00, 0x00, 0xe0, 0x1c, 0x40, 0x00, 0x1b, 0x4c, 0x06, 0x81, 0x80, 0xfd,
1107 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1108 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1109 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0,
1110 0x00, 0x80, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1111 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1112 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x09, 0x00, 0x20, 0x63,
1113 0x0c, 0x08, 0x80, 0x00, 0x30, 0x06, 0x0c, 0xfc, 0xff, 0x7f, 0x00, 0x00,
1114 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1115 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x00, 0x00, 0x00,
1116 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x01, 0x00, 0x30, 0x00,
1117 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f,
1118 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1119 0x00, 0x00, 0x00, 0x00, 0x0f, 0x00, 0x20, 0x63, 0x0c, 0x08, 0x80, 0x00,
1120 0x30, 0x06, 0x0c, 0xfc, 0xff, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1121 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1122 0x00, 0x00, 0x00, 0x00, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1123 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1124 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x3f, 0x00, 0x00, 0x00, 0x00,
1125 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
1126 0x0f, 0x00, 0xd8, 0x84, 0x01, 0xc0, 0x00, 0x00, 0x06, 0x00, 0x80, 0xf1,
1127 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1128 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0,
1129 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1130 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1131 0x00, 0x00, 0xe0, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1132 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x0f, 0x00, 0xf8, 0x1b,
1133 0x40, 0x08, 0x84, 0x0c, 0xc0, 0x18, 0x13, 0xcc, 0xff, 0xff, 0x0f, 0x00,
1134 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1135 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0x0f, 0x00, 0x00,
1136 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1137 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x00, 0xe0, 0x7f,
1138 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1139 0x00, 0x00, 0x00, 0xfc, 0x0f, 0x00, 0xf8, 0x1b, 0x40, 0x08, 0x84, 0x0c,
1140 0xc0, 0x18, 0x13, 0xcc, 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00,
1141 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1142 0x00, 0x00, 0x00, 0xe0, 0xff, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1143 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1144 0x00, 0x00, 0x00, 0xfc, 0x03, 0x00, 0xf0, 0xe4, 0x00, 0x00, 0x00, 0x00,
1145 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff,
1146 0x09, 0x00, 0x38, 0x80, 0x01, 0x00, 0x18, 0x30, 0x06, 0x01, 0x00, 0xc0,
1147 0xff, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1148 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30,
1149 0x00, 0x1c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1150 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe,
1151 0x07, 0x00, 0x30, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1152 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3f, 0x00, 0x00, 0x38, 0x80,
1153 0x01, 0x00, 0x18, 0x30, 0x06, 0x01, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x01,
1154 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1155 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x00, 0x30, 0x00, 0x00,
1156 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x07, 0x00, 0x00, 0x00,
1157 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x07, 0x00, 0x10, 0x84,
1158 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1159 0x00, 0x00, 0x00, 0x0c, 0x00, 0x00, 0xd8, 0x1f, 0x30, 0x36, 0x80, 0x00,
1160 0x00, 0x00, 0x03, 0xf2, 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00,
1161 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1162 0x00, 0x00, 0x00, 0x10, 0x00, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1163 0x00, 0x00, 0x00, 0xfc, 0x3f, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
1164 0x00, 0x00, 0x00, 0x4f, 0x0e, 0x00, 0x10, 0x84, 0x00, 0x00, 0x00, 0x00,
1165 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70,
1166 0x08, 0x00, 0xd8, 0x1f, 0x30, 0x36, 0x80, 0x00, 0x00, 0x00, 0x03, 0xf2,
1167 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1168 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10,
1169 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe,
1170 0xff, 0x03, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x43,
1171 0x08, 0x00, 0x10, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1172 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x09, 0x00, 0x3e, 0x00,
1173 0x82, 0x01, 0x03, 0x40, 0x30, 0x98, 0x10, 0xf0, 0xe7, 0xff, 0xff, 0xff,
1174 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1175 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x20, 0x00, 0x00,
1176 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0x1f, 0xc0, 0x00,
1177 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x41, 0x08, 0x00, 0x10, 0xe4,
1178 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1179 0x00, 0x00, 0x00, 0x00, 0x0f, 0x00, 0xe6, 0x1b, 0x00, 0x00, 0x18, 0x0c,
1180 0x00, 0x00, 0x00, 0xfc, 0xff, 0xfb, 0xff, 0xff, 0x1f, 0x00, 0x00, 0x00,
1181 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1182 0x00, 0x00, 0x00, 0x10, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1183 0x00, 0x00, 0x00, 0xfe, 0xff, 0xff, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00,
1184 0x00, 0x00, 0x00, 0x41, 0x08, 0x00, 0x30, 0x7c, 0x00, 0x00, 0x00, 0x00,
1185 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1186 0x08, 0x00, 0xe6, 0x1b, 0x00, 0x00, 0x18, 0x0c, 0x00, 0x00, 0x00, 0xfc,
1187 0xff, 0xfb, 0xff, 0xff, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1188 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10,
1189 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x9e,
1190 0xff, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x41,
1191 0x08, 0x00, 0x20, 0x7c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1192 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x1e, 0x64,
1193 0x30, 0xc6, 0x80, 0x80, 0x09, 0x06, 0x63, 0xfe, 0xf9, 0xff, 0xff, 0xff,
1194 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1195 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x30, 0x00, 0x00,
1196 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1c, 0xf8, 0xff, 0xff, 0x01,
1197 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x41, 0x0e, 0x00, 0xc0, 0x3c,
1198 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1199 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x1e, 0x64, 0x30, 0xc6, 0x80, 0x80,
1200 0x09, 0x06, 0x63, 0xfe, 0xf9, 0xff, 0xff, 0xff, 0xff, 0x03, 0x00, 0x00,
1201 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1202 0x00, 0x00, 0x00, 0x20, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1203 0x00, 0x00, 0x00, 0x1c, 0x80, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00,
1204 0x00, 0x00, 0x00, 0xc3, 0x07, 0x00, 0x00, 0x0c, 0x00, 0x00, 0x00, 0x00,
1205 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1206 0x0e, 0x00, 0x39, 0x03, 0x00, 0x00, 0x04, 0x0c, 0xc0, 0x60, 0x80, 0x3f,
1207 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1208 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0,
1209 0x00, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3c,
1210 0x00, 0xfc, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc2,
1211 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1212 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x0f, 0x00, 0x39, 0x03,
1213 0x00, 0x00, 0x04, 0x0c, 0xc0, 0x60, 0x80, 0x3f, 0xff, 0xff, 0xff, 0xff,
1214 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1215 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x3e, 0x00, 0x00,
1216 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x80, 0xff, 0x01,
1217 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xcc, 0x03, 0x00, 0x00, 0x00,
1218 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1219 0x00, 0x00, 0x00, 0xe0, 0x0f, 0x00, 0xe7, 0x04, 0x42, 0xc6, 0x00, 0x00,
1220 0x00, 0x00, 0xec, 0xcf, 0xff, 0xff, 0xff, 0x3f, 0xff, 0xff, 0x0f, 0x00,
1221 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1222 0x00, 0x00, 0x00, 0x00, 0x80, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1223 0x00, 0x00, 0x00, 0xe0, 0x00, 0x00, 0xfc, 0x01, 0x00, 0x00, 0x00, 0x00,
1224 0x00, 0x00, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1225 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc,
1226 0x0f, 0xc0, 0x1f, 0x80, 0x01, 0x00, 0x98, 0x4c, 0x06, 0x06, 0xf0, 0x01,
1227 0x00, 0xe0, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00,
1228 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10,
1229 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0,
1230 0x01, 0x00, 0xc0, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1231 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1232 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x09, 0xc0, 0x1f, 0x80,
1233 0x01, 0x00, 0x98, 0x4c, 0x06, 0x06, 0xf0, 0x01, 0x00, 0xe0, 0xff, 0xff,
1234 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1235 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x20, 0x00, 0x00,
1236 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x07, 0x00, 0x00, 0x00,
1237 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1238 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1239 0x00, 0x00, 0x00, 0x3f, 0x08, 0xc0, 0xe6, 0x04, 0x0c, 0x08, 0x00, 0x00,
1240 0xc0, 0x60, 0x7c, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0xff, 0x01,
1241 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1242 0x00, 0x00, 0x00, 0xf0, 0x1f, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1243 0x00, 0x00, 0x00, 0x00, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1244 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1245 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0c,
1246 0x00, 0xc0, 0xe6, 0x04, 0x0c, 0x08, 0x00, 0x00, 0xc0, 0x60, 0x7c, 0x00,
1247 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00,
1248 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0,
1249 0xff, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1250 0x1e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1251 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1252 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0xc0, 0x19, 0x60,
1253 0x40, 0x00, 0x63, 0x30, 0x08, 0x00, 0x7f, 0x00, 0x00, 0x00, 0x00, 0xf8,
1254 0xff, 0xf3, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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1380 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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1387 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x1f, 0xf8,
1388 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x08,
1389 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70,
1390 0x00, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1391 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1392 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0xc0, 0x3f, 0x07,
1393 0xb0, 0xc9, 0xf8, 0xff, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1394 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1395 0xff, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1396 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x00, 0xc0, 0x01,
1397 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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1399 0x00, 0x00, 0x00, 0x00, 0x08, 0xc0, 0x3f, 0x07, 0xb0, 0xc9, 0xf8, 0xff,
1400 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1401 0x00, 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x0f,
1402 0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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1407 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff,
1408 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00,
1409 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1410 0x07, 0x00, 0xc0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1411 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1412 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x0f, 0x00, 0xe7, 0xfb,
1413 0x43, 0x30, 0xf8, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1414 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1415 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x08, 0x70, 0x00, 0x00, 0x00,
1416 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e, 0x00, 0xe0, 0x01,
1417 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1418 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1419 0x00, 0x00, 0x00, 0xff, 0x0f, 0x00, 0xfe, 0x1c, 0xb2, 0x0f, 0xe0, 0xff,
1420 0x07, 0x00, 0xe0, 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00,
1421 0x00, 0xc0, 0xff, 0xff, 0xcf, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1422 0x00, 0x00, 0x00, 0xf8, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1423 0x00, 0x00, 0x00, 0x00, 0x78, 0x00, 0xfc, 0x03, 0x00, 0x00, 0x00, 0x00,
1424 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1425 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff,
1426 0x0f, 0x00, 0xf8, 0xe7, 0xfd, 0x01, 0xe0, 0xff, 0x07, 0x00, 0xe0, 0xff,
1427 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc1, 0xe0,
1428 0xb1, 0x3f, 0x00, 0xe0, 0xff, 0xff, 0xff, 0xff, 0x01, 0x00, 0x00, 0xf8,
1429 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1430 0xf0, 0xc0, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78,
1431 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1432 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0xf8, 0xe7,
1433 0xfd, 0x01, 0xe0, 0xff, 0x07, 0x00, 0xe0, 0xff, 0xff, 0xff, 0x0f, 0x00,
1434 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc1, 0xe0, 0xb1, 0x3f, 0x00, 0x00,
1435 0xf8, 0xff, 0xff, 0xff, 0x07, 0x00, 0x00, 0xf8, 0x7f, 0x00, 0x00, 0x00,
1436 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0xff, 0x03,
1437 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x00, 0x00, 0x00,
1438 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1439 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0xf8, 0xff, 0x7f, 0x00, 0x80, 0xff,
1440 0x01, 0x00, 0xe0, 0x03, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1441 0x00, 0x00, 0x00, 0x98, 0x4f, 0x0e, 0x18, 0x00, 0xf8, 0xff, 0xff, 0xff,
1442 0x07, 0x00, 0x00, 0xf8, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1443 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00,
1444 0x00, 0x00, 0x00, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1445 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03,
1446 0x00, 0x00, 0xf8, 0xff, 0x7f, 0x00, 0x80, 0xff, 0x01, 0x00, 0xe0, 0x03,
1447 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x98,
1448 0x4f, 0x0e, 0xf8, 0x1f, 0xf6, 0xff, 0xff, 0xff, 0x1f, 0x00, 0x00, 0x08,
1449 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
1450 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff,
1451 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1452 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0xf8, 0xff,
1453 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x01, 0x00, 0x00, 0x00,
1454 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xb1, 0x01, 0xff, 0x1f,
1455 0xf6, 0xff, 0xff, 0xff, 0x1f, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00,
1456 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0x1f, 0x00,
1457 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x03, 0x07, 0x00, 0x00, 0x00,
1458 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1459 0x00, 0x00, 0x00, 0x04, 0x08, 0x00, 0xf8, 0xff, 0x7f, 0x00, 0x00, 0x00,
1460 0x00, 0x00, 0x00, 0xc0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1461 0x00, 0x00, 0x00, 0xf8, 0xb1, 0x01, 0xff, 0x7f, 0xc0, 0xff, 0xff, 0xff,
1462 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1463 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1464 0x00, 0x00, 0x80, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1465 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff,
1466 0x0f, 0x00, 0xe0, 0xff, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0,
1467 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7f,
1468 0x00, 0xce, 0xff, 0x7f, 0xc0, 0xff, 0xff, 0xff, 0x3f, 0x00, 0x00, 0x00,
1469 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe,
1470 0xff, 0xe3, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00,
1471 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1472 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x0f, 0x00, 0xe0, 0xff,
1473 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x01, 0x00, 0x00, 0x00,
1474 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7f, 0x00, 0xce, 0xff, 0x7f,
1475 0x00, 0xff, 0xff, 0xff, 0x3f, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00,
1476 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x1f, 0x00, 0x07, 0x00,
1477 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x04, 0x00, 0x00, 0x00,
1478 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1479 0x00, 0x00, 0x00, 0xff, 0x0f, 0x00, 0xc0, 0xff, 0x3f, 0x00, 0x00, 0x00,
1480 0x00, 0x00, 0x00, 0xc0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1481 0x00, 0x00, 0x20, 0x1b, 0xb2, 0x31, 0xff, 0x7f, 0x00, 0xff, 0xff, 0xff,
1482 0x3f, 0x00, 0x00, 0xe0, 0x5f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1483 0x00, 0x00, 0x00, 0xfe, 0x03, 0x00, 0x1e, 0x00, 0x00, 0x00, 0x00, 0x00,
1484 0x00, 0x00, 0x80, 0x01, 0x06, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1485 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff,
1486 0x0f, 0x00, 0xc0, 0xff, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0,
1487 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xc0, 0x1c,
1488 0x00, 0xc0, 0xff, 0x73, 0xc0, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0xf0,
1489 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3e,
1490 0x00, 0x00, 0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03,
1491 0x03, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1492 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0xc0, 0xff,
1493 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x07, 0x00, 0x00, 0x00,
1494 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xc0, 0x1c, 0x00, 0xc0, 0x7f, 0x1c,
1495 0x30, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0xf8, 0x7f, 0x00, 0x00, 0x00,
1496 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1c, 0x00, 0x00, 0x78, 0x00,
1497 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0x01, 0x00, 0x00,
1498 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1499 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0xc0, 0xff, 0x0f, 0x00, 0x00, 0x00,
1500 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00,
1501 0x00, 0x00, 0x38, 0x87, 0x31, 0x06, 0x7c, 0x1c, 0x30, 0xff, 0xff, 0xff,
1502 0xff, 0x00, 0x00, 0xf8, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1503 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00,
1504 0x00, 0x00, 0x80, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1505 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1506 0x00, 0x00, 0xc0, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1507 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x87,
1508 0x31, 0x06, 0xfc, 0x0f, 0xc8, 0xff, 0xff, 0xff, 0xff, 0x03, 0x00, 0x38,
1509 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30,
1510 0x00, 0x00, 0xc0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff,
1511 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1512 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x00, 0xc0, 0xff,
1513 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0x0f, 0x00,
1514 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0xe6, 0x04, 0x00, 0x30, 0xe3, 0x0f,
1515 0xc8, 0xff, 0xff, 0xff, 0xff, 0x03, 0x00, 0x18, 0x00, 0x00, 0x00, 0x00,
1516 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0xe0, 0x01,
1517 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0x01, 0x00, 0x00,
1518 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1519 0x00, 0x00, 0x00, 0xfc, 0x03, 0x00, 0xc0, 0xff, 0x0f, 0x00, 0x00, 0x00,
1520 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00,
1521 0x00, 0x30, 0xe6, 0x04, 0x00, 0x30, 0x03, 0x00, 0xf0, 0xff, 0xff, 0xff,
1522 0xff, 0x03, 0x00, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1523 0x00, 0x00, 0x00, 0xc0, 0x01, 0x00, 0xe0, 0x03, 0x00, 0x00, 0x00, 0x00,
1524 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1525 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe,
1526 0x07, 0x00, 0xc0, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0,
1527 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x1b,
1528 0x4c, 0x00, 0x04, 0x00, 0xf0, 0xff, 0xff, 0xff, 0xff, 0x03, 0x00, 0x10,
1529 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1530 0x01, 0x00, 0xf0, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00,
1531 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1532 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x07, 0x00, 0xc0, 0xff,
1533 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x01, 0x00, 0x00, 0x00,
1534 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x07, 0x04, 0x00, 0x06, 0x18, 0x80,
1535 0xff, 0xff, 0xff, 0xff, 0xff, 0x03, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00,
1536 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x03,
1537 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1538 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1539 0x00, 0x00, 0x00, 0x0f, 0x0e, 0x00, 0xc0, 0xff, 0x0f, 0x00, 0x00, 0x00,
1540 0x00, 0x00, 0x00, 0xc0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1541 0x00, 0x02, 0x07, 0x04, 0x00, 0x06, 0x78, 0xf3, 0xff, 0xff, 0xff, 0xff,
1542 0xff, 0x07, 0x00, 0xf8, 0x5f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1543 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x01, 0x00, 0x00, 0x00, 0x00,
1544 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1545 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03,
1546 0x08, 0x00, 0xc0, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1547 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x3e, 0x04,
1548 0x02, 0x30, 0x60, 0xf3, 0xff, 0xff, 0xff, 0xff, 0xff, 0x07, 0x00, 0xf8,
1549 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1550 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1551 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1552 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x08, 0x00, 0xc0, 0xff,
1553 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00,
1554 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x3e, 0x04, 0x02, 0x30, 0xe0, 0xff,
1555 0xff, 0xff, 0xff, 0xff, 0xff, 0x07, 0x00, 0xf8, 0x7f, 0x00, 0x00, 0x00,
1556 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1557 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1558 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1559 0x00, 0x00, 0x00, 0x01, 0x08, 0x00, 0x00, 0xff, 0x0f, 0x00, 0x00, 0x00,
1560 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1561 0x00, 0x00, 0xc6, 0x04, 0x40, 0x00, 0xfb, 0xff, 0xff, 0xff, 0xff, 0xff,
1562 0xff, 0x07, 0x00, 0xf8, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1563 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1564 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1565 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01,
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1762 0xff, 0x03, 0x00, 0xf8, 0xc0, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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1788 0xff, 0xff, 0x03, 0xfc, 0xff, 0xff, 0xff, 0xff, 0x3f, 0x00, 0x00, 0x38,
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1802 0x1f, 0x00, 0x00, 0x38, 0xf8, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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1805 0x80, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff,
1806 0x0f, 0x00, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1807 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff,
1808 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0x00, 0x00, 0x78,
1809 0xf0, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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1813 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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1815 0xff, 0xff, 0xff, 0xff, 0x07, 0x00, 0x00, 0xf8, 0xc1, 0x07, 0x00, 0x00,
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1821 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1822 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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1824 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0,
1825 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01,
1826 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00,
1827 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0xff, 0xff,
1828 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x07, 0x00, 0x00, 0x00,
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1833 0xff, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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1835 0xff, 0xff, 0xff, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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1840 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1841 0x00, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1842 0x01, 0x00, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1843 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1844 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1845 0xe0, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1846 0x08, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00,
1847 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0x67,
1848 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0xf8,
1849 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1850 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1851 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x13, 0x00, 0x00,
1852 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0xc0, 0xff,
1853 0xff, 0xff, 0x1f, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1854 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0x67, 0xfe, 0xff, 0xff, 0xff,
1855 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0xf8, 0x00, 0x00, 0x00, 0x00,
1856 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1857 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1858 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1859 0x00, 0x00, 0x00, 0xfc, 0x0f, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x1f, 0x03,
1860 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1861 0xf0, 0xff, 0xff, 0x98, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x0f,
1862 0x00, 0x00, 0x00, 0xf8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1863 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1864 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1865 0x00, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe,
1866 0x0f, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x7f, 0x00, 0x08, 0x00, 0x00, 0x00,
1867 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x98,
1868 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x70,
1869 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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1871 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00,
1872 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x0f, 0x00, 0xf8, 0xff,
1873 0xff, 0xff, 0x7f, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1874 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0x3f, 0xe7, 0xff, 0xff, 0xff, 0xff,
1875 0xff, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1876 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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1879 0x00, 0x00, 0x00, 0xff, 0x0f, 0x00, 0xff, 0xfc, 0xff, 0xff, 0xff, 0x00,
1880 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe,
1881 0xff, 0xff, 0x3f, 0xe7, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x01,
1882 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1883 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1884 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1885 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07,
1886 0x00, 0xc0, 0xff, 0x67, 0x8c, 0xf9, 0xfb, 0x73, 0x00, 0x67, 0x10, 0x00,
1887 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0xff, 0xf8,
1888 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x80,
1889 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1890 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1891 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1892 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0xc0, 0xff, 0x67,
1893 0x8c, 0xf9, 0xfb, 0x73, 0x00, 0x67, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00,
1894 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x1f, 0xe7, 0xff, 0xff, 0xff, 0xff,
1895 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x07, 0x00, 0x00,
1896 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1897 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1898 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1899 0x00, 0x00, 0x00, 0x03, 0x00, 0xc0, 0x27, 0xfc, 0x73, 0xc6, 0x1c, 0x8c,
1900 0x37, 0x80, 0x0c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff,
1901 0xff, 0xff, 0x1f, 0xe7, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x0f, 0x00,
1902 0x00, 0x00, 0x00, 0xf0, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1903 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1904 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1905 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02,
1906 0x00, 0xc0, 0x27, 0xfc, 0x73, 0xc6, 0x1c, 0x8c, 0x37, 0x80, 0x0c, 0x00,
1907 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0xff, 0xfc,
1908 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0,
1909 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1910 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1911 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1912 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x08, 0xc0, 0xfe, 0x03,
1913 0x8c, 0x09, 0xe3, 0x73, 0xc8, 0x06, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00,
1914 0x00, 0x80, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfc, 0xff, 0xff, 0xff, 0xff,
1915 0xff, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x18, 0x00, 0x00,
1916 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1917 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1918 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1919 0x00, 0x00, 0x00, 0xff, 0x0f, 0xc0, 0xfe, 0x03, 0x8c, 0x09, 0xe3, 0x73,
1920 0xc8, 0x06, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff,
1921 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x07, 0x00, 0x00, 0x00,
1922 0x00, 0x00, 0x00, 0x08, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1923 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1924 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1925 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff,
1926 0x0f, 0xc0, 0x27, 0xe7, 0x31, 0x36, 0x04, 0x8c, 0x01, 0x60, 0x03, 0x00,
1927 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1928 0xff, 0xff, 0xff, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08,
1929 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1930 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1931 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1932 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x0f, 0xc0, 0xde, 0x18,
1933 0x42, 0xc0, 0x98, 0x30, 0x08, 0x01, 0x80, 0x01, 0x00, 0x00, 0x00, 0x00,
1934 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x07, 0x00, 0x00,
1935 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x18, 0x00, 0x00,
1936 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1937 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1938 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00,
1939 0x00, 0x00, 0x00, 0xff, 0x0f, 0xc0, 0xde, 0x18, 0x42, 0xc0, 0x98, 0x30,
1940 0x08, 0x01, 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff,
1941 0xff, 0xff, 0xff, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1942 0x00, 0x00, 0x00, 0xf0, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1943 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1944 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1945 0x02, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01,
1946 0x00, 0xc0, 0x27, 0x63, 0x00, 0x08, 0x63, 0x03, 0x06, 0x60, 0x10, 0x00,
1947 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1948 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0,
1949 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1950 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1951 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0x07, 0x00,
1952 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0xc0, 0x27, 0x63,
1953 0x00, 0x08, 0x63, 0x03, 0x06, 0x60, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00,
1954 0xe0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0x00, 0x00, 0x00, 0x00,
1955 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x07, 0x00, 0x00,
1956 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1957 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1958 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00,
1959 0x00, 0x00, 0x00, 0x00, 0x08, 0xc0, 0xd9, 0x04, 0xb2, 0x01, 0x00, 0xb0,
1960 0x31, 0x19, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xf9, 0xff,
1961 0xff, 0xff, 0xff, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1962 0x00, 0x00, 0x00, 0x80, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1963 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1964 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1965 0xfe, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01,
1966 0x08, 0xc0, 0xd9, 0x04, 0xb2, 0x01, 0x00, 0xb0, 0x31, 0x19, 0x03, 0x00,
1967 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xf9, 0xff, 0xff, 0xff, 0xff, 0x07,
1968 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1969 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1970 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1971 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0x07, 0x00,
1972 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x0c, 0xc0, 0x1e, 0x63,
1973 0x00, 0x30, 0x04, 0x03, 0xc8, 0x60, 0x00, 0x0e, 0x00, 0x00, 0xfc, 0xff,
1974 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00,
1975 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1976 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1977 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1978 0x00, 0x00, 0x00, 0x00, 0x02, 0x04, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00,
1979 0x00, 0x00, 0x00, 0x03, 0x0e, 0xc0, 0xe1, 0x18, 0x80, 0x01, 0x60, 0xb0,
1980 0x01, 0xe7, 0xf3, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1981 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1982 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1983 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1984 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1985 0x02, 0x04, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07,
1986 0x0f, 0xc0, 0xe1, 0x18, 0x80, 0x01, 0x60, 0xb0, 0x01, 0xe7, 0xf3, 0xff,
1987 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x07, 0x00,
1988 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8,
1989 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1990 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1991 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x04, 0x04, 0x00,
1992 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x8d, 0x0f, 0xc0, 0x1e, 0x03,
1993 0x02, 0x08, 0x04, 0x00, 0xc8, 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1994 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00,
1995 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x00, 0x00, 0x00, 0x00,
1996 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1997 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1998 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00,
1999 0x00, 0x00, 0x00, 0xd8, 0x0f, 0xc0, 0x1e, 0x03, 0x02, 0x08, 0x04, 0x00,
2000 0xc8, 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
2001 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2002 0x00, 0x00, 0x00, 0xf8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2003 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2004 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2005 0xc0, 0x0f, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0,
2006 0x0b, 0x00, 0x21, 0x64, 0x40, 0xc0, 0x00, 0xb3, 0xf1, 0xfe, 0xff, 0xff,
2007 0xff, 0xff, 0xff, 0xff, 0xfb, 0xff, 0xff, 0xff, 0xff, 0xff, 0x01, 0x00,
2008 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70,
2009 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2010 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2011 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xfb, 0x07, 0x00,
2012 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x01, 0x00, 0x21, 0x64,
2013 0x40, 0xc0, 0x00, 0xb3, 0xf1, 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
2014 0xfb, 0xff, 0xff, 0xff, 0xff, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2015 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2016 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2017 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2018 0x00, 0x00, 0x00, 0x00, 0xfc, 0xfb, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00,
2019 0x00, 0x00, 0x00, 0xfd, 0x00, 0xc0, 0xdf, 0x00, 0x00, 0x06, 0x60, 0x00,
2020 0x0e, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
2021 0xff, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2022 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2023 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2024 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2025 0xfe, 0xf9, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xbf,
2026 0x01, 0xc0, 0xdf, 0x00, 0x00, 0x06, 0x60, 0x00, 0x0e, 0xff, 0xff, 0xff,
2027 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00,
2028 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0,
2029 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2030 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2031 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, 0xf0, 0x03, 0x00,
2032 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x0b, 0xc0, 0xc0, 0x84,
2033 0x31, 0xc0, 0x00, 0x4c, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
2034 0xff, 0xff, 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2035 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x83, 0x07, 0x00, 0x00,
2036 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2037 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2038 0x00, 0x00, 0x00, 0x00, 0x1e, 0xe0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
2039 0x00, 0x00, 0x00, 0x0f, 0x0e, 0xc0, 0x3f, 0x18, 0x00, 0x06, 0x84, 0x80,
2040 0x09, 0xff, 0xff, 0x3f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
2041 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2042 0x00, 0x00, 0x00, 0xf0, 0xc3, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2043 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2044 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2045 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07,
2046 0x0c, 0xc0, 0x3f, 0x18, 0x00, 0x06, 0x84, 0x80, 0x09, 0xff, 0xff, 0x3f,
2047 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f, 0x00, 0x00, 0x00,
2048 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc8,
2049 0xc1, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2050 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2051 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00,
2052 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x08, 0xc0, 0xc1, 0x03,
2053 0x4c, 0x00, 0x00, 0x30, 0xf6, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
2054 0xff, 0xff, 0xff, 0xff, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2055 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x90, 0x13, 0x00, 0x00,
2056 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2057 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2058 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2059 0x00, 0x00, 0x00, 0x01, 0x08, 0xc0, 0xc1, 0x03, 0x4c, 0x00, 0x00, 0x30,
2060 0xf6, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
2061 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2062 0x00, 0x00, 0x00, 0x08, 0x10, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2063 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2064 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2065 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01,
2066 0x00, 0xc0, 0x3f, 0x98, 0x01, 0x08, 0x1b, 0x43, 0xc8, 0xff, 0xff, 0xff,
2067 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00,
2068 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08,
2069 0x10, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2070 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2071 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2072 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x3f, 0x98,
2073 0x01, 0x08, 0x1b, 0x43, 0xc8, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
2074 0xff, 0xff, 0xff, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2075 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x38, 0x18, 0x00, 0x00,
2076 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2077 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2078 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00,
2079 0x00, 0x00, 0x00, 0x0e, 0x00, 0xc0, 0xc6, 0x03, 0x40, 0x00, 0x00, 0x80,
2080 0x31, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf7, 0xff, 0xff, 0xff, 0xff,
2081 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2082 0x00, 0x00, 0x00, 0xf8, 0xef, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2083 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2084 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2085 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f,
2086 0x00, 0x00, 0x3f, 0x18, 0x0c, 0x30, 0x60, 0x0c, 0xce, 0xff, 0xff, 0xff,
2087 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
2088 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0,
2089 0xef, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2090 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2091 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00,
2092 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x00, 0x00, 0x3f, 0x18,
2093 0x0c, 0x30, 0x60, 0x0c, 0xce, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
2094 0xff, 0xff, 0xff, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2095 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xc7, 0x0f, 0x00, 0x00,
2096 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2097 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2098 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00,
2099 0x00, 0x00, 0x00, 0x1f, 0x00, 0x00, 0xde, 0x63, 0x40, 0x06, 0x03, 0x30,
2100 0x30, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f,
2101 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2102 0x00, 0x00, 0x00, 0xc0, 0x83, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2103 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2104 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2105 0x02, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0e,
2106 0x00, 0x00, 0xde, 0x63, 0x40, 0x06, 0x03, 0x30, 0x30, 0xff, 0xff, 0xff,
2107 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00,
2108 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2109 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2110 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2111 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x04, 0x00,
2112 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x04,
2113 0x02, 0x00, 0x00, 0x83, 0xc9, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
2114 0xff, 0xff, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2115 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2116 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2117 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2118 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00,
2119 0x00, 0x00, 0x00, 0xf0, 0x00, 0x00, 0x38, 0x04, 0x02, 0x00, 0x00, 0x83,
2120 0xc9, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x01,
2121 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2122 0x00, 0x00, 0x00, 0xc0, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2123 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2124 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2125 0xfe, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc,
2126 0x03, 0x00, 0xe0, 0x1b, 0x0c, 0x08, 0x18, 0x40, 0x30, 0xfe, 0xff, 0xff,
2127 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00,
2128 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0,
2129 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2130 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2131 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0x07, 0x00,
2132 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x07, 0x00, 0xc0, 0x84,
2133 0x81, 0x01, 0x03, 0x0c, 0xc6, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
2134 0xff, 0xff, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2135 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x0f, 0x00, 0x00,
2136 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2137 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2138 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00,
2139 0x00, 0x00, 0x00, 0xfe, 0x07, 0x00, 0xc0, 0x84, 0x81, 0x01, 0x03, 0x0c,
2140 0xc6, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x0f, 0x00,
2141 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2142 0x00, 0x00, 0x00, 0xf8, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2143 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2144 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2145 0x02, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07,
2146 0x0e, 0x00, 0x00, 0x1b, 0x0c, 0x30, 0x80, 0x00, 0x30, 0xf8, 0xff, 0xff,
2147 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00,
2148 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18,
2149 0x10, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2150 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2151 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x04, 0x00,
2152 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x08, 0x00, 0x00, 0x1b,
2153 0x0c, 0x30, 0x80, 0x00, 0x30, 0xf8, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
2154 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2155 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x20, 0x10, 0x00, 0x00,
2156 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2157 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2158 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00,
2159 0x00, 0x00, 0x00, 0x01, 0x08, 0x00, 0x00, 0x67, 0xc0, 0x01, 0x04, 0x40,
2160 0x00, 0xe1, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x01, 0x00,
2161 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2162 0x00, 0x00, 0x00, 0x08, 0x20, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2163 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2164 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2165 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01,
2166 0x08, 0x00, 0x00, 0x67, 0xc0, 0x01, 0x04, 0x40, 0x00, 0xe1, 0xff, 0xff,
2167 0xff, 0xff, 0xff, 0xff, 0xff, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2168 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18,
2169 0x30, 0x17, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2170 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2171 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x00,
2172 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x08, 0x00, 0x00, 0x9c,
2173 0x01, 0x08, 0x60, 0x0c, 0x06, 0x86, 0xff, 0xfd, 0xff, 0xff, 0xff, 0xff,
2174 0xff, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2175 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xbf, 0x1f, 0x00, 0x00,
2176 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2177 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2178 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00,
2179 0x00, 0x00, 0x00, 0x07, 0x0e, 0x00, 0x00, 0x18, 0x0c, 0xc0, 0x00, 0x00,
2180 0xc0, 0x00, 0xfc, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x03, 0x00, 0x00,
2181 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2182 0x00, 0x00, 0x00, 0xf0, 0x9f, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2183 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2184 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2185 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe,
2186 0x07, 0x00, 0x00, 0x18, 0x0c, 0xc0, 0x00, 0x00, 0xc0, 0x00, 0xfc, 0xff,
2187 0xff, 0xff, 0xff, 0xff, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2188 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0,
2189 0x1f, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2190 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2191 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2192 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x07, 0x00, 0x00, 0xe0,
2193 0x01, 0x06, 0x00, 0x30, 0x06, 0x86, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff,
2194 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2195 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x07, 0x00, 0x00, 0x00,
2196 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2197 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2198 0x00, 0x00, 0x00, 0x00, 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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3131 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3132 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3133 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3134 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3135 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3136 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3137 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3138 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3139 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3140 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3141 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3142 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3143 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3144 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3145 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3146 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3147 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3148 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3149 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3150 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3151 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3152 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3153 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3154 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3155 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3156 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3157 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3158 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3159 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3160 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3161 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3162 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3163 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3164 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3165 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3166 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3167 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3168 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3169 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3170 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3171 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3172 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3173 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3174 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3175 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3176 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3177 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3178 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3179 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3180 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3181 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3182 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3183 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3184 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3185 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3186 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3187 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3188 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3189 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3190 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3191 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3192 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3193 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3194 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3195 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3196 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3197 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3198 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3199 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3200 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3201 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3202 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3203 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3204 };
diff --git a/arch/m68k/platform/68EZ328/config.c b/arch/m68k/platform/68EZ328/config.c
new file mode 100644
index 000000000000..1be1a16f6896
--- /dev/null
+++ b/arch/m68k/platform/68EZ328/config.c
@@ -0,0 +1,76 @@
1/***************************************************************************/
2
3/*
4 * linux/arch/m68knommu/platform/68EZ328/config.c
5 *
6 * Copyright (C) 1993 Hamish Macdonald
7 * Copyright (C) 1999 D. Jeff Dionne
8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file COPYING in the main directory of this archive
11 * for more details.
12 */
13
14/***************************************************************************/
15
16#include <linux/types.h>
17#include <linux/kernel.h>
18#include <asm/system.h>
19#include <asm/pgtable.h>
20#include <asm/machdep.h>
21#include <asm/MC68EZ328.h>
22#ifdef CONFIG_UCSIMM
23#include <asm/bootstd.h>
24#endif
25
26/***************************************************************************/
27
28void m68328_timer_gettod(int *year, int *mon, int *day, int *hour, int *min, int *sec);
29
30/***************************************************************************/
31
32void m68ez328_reset(void)
33{
34 local_irq_disable();
35 asm volatile (
36 "moveal #0x10c00000, %a0;\n"
37 "moveb #0, 0xFFFFF300;\n"
38 "moveal 0(%a0), %sp;\n"
39 "moveal 4(%a0), %a0;\n"
40 "jmp (%a0);\n"
41 );
42}
43
44/***************************************************************************/
45
46unsigned char *cs8900a_hwaddr;
47static int errno;
48
49#ifdef CONFIG_UCSIMM
50_bsc0(char *, getserialnum)
51_bsc1(unsigned char *, gethwaddr, int, a)
52_bsc1(char *, getbenv, char *, a)
53#endif
54
55void config_BSP(char *command, int len)
56{
57 unsigned char *p;
58
59 printk(KERN_INFO "\n68EZ328 DragonBallEZ support (C) 1999 Rt-Control, Inc\n");
60
61#ifdef CONFIG_UCSIMM
62 printk(KERN_INFO "uCsimm serial string [%s]\n",getserialnum());
63 p = cs8900a_hwaddr = gethwaddr(0);
64 printk(KERN_INFO "uCsimm hwaddr %.2x:%.2x:%.2x:%.2x:%.2x:%.2x\n",
65 p[0], p[1], p[2], p[3], p[4], p[5]);
66
67 p = getbenv("APPEND");
68 if (p) strcpy(p,command);
69 else command[0] = 0;
70#endif
71
72 mach_gettod = m68328_timer_gettod;
73 mach_reset = m68ez328_reset;
74}
75
76/***************************************************************************/
diff --git a/arch/m68k/platform/68VZ328/Makefile b/arch/m68k/platform/68VZ328/Makefile
new file mode 100644
index 000000000000..447ffa0fd7c7
--- /dev/null
+++ b/arch/m68k/platform/68VZ328/Makefile
@@ -0,0 +1,16 @@
1#
2# Makefile for arch/m68knommu/platform/68VZ328.
3#
4
5obj-y := config.o
6logo-$(UCDIMM) := bootlogo.rh
7logo-$(DRAGEN2) := screen.h
8extra-y := $(logo-y)
9
10$(obj)/bootlogo.rh: $(src)/../68EZ328/bootlogo.h
11 perl $(src)/bootlogo.pl < $(src)/../68328/bootlogo.h > $(obj)/bootlogo.rh
12
13$(obj)/screen.h: $(src)/screen.xbm $(src)/xbm2lcd.pl
14 perl $(src)/xbm2lcd.pl < $(src)/screen.xbm > $(obj)/screen.h
15
16clean-files := $(obj)/screen.h $(obj)/bootlogo.rh
diff --git a/arch/m68k/platform/68VZ328/config.c b/arch/m68k/platform/68VZ328/config.c
new file mode 100644
index 000000000000..eabaabe8af36
--- /dev/null
+++ b/arch/m68k/platform/68VZ328/config.c
@@ -0,0 +1,188 @@
1/***************************************************************************/
2
3/*
4 * linux/arch/m68knommu/platform/68VZ328/config.c
5 *
6 * Copyright (C) 1993 Hamish Macdonald
7 * Copyright (C) 1999 D. Jeff Dionne
8 * Copyright (C) 2001 Georges Menie, Ken Desmet
9 *
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file COPYING in the main directory of this archive
12 * for more details.
13 */
14
15/***************************************************************************/
16
17#include <linux/types.h>
18#include <linux/kernel.h>
19#include <linux/kd.h>
20#include <linux/netdevice.h>
21#include <linux/interrupt.h>
22#include <linux/irq.h>
23
24#include <asm/system.h>
25#include <asm/pgtable.h>
26#include <asm/machdep.h>
27#include <asm/MC68VZ328.h>
28#include <asm/bootstd.h>
29
30#ifdef CONFIG_INIT_LCD
31#include "bootlogo.h"
32#endif
33
34/***************************************************************************/
35
36void m68328_timer_gettod(int *year, int *mon, int *day, int *hour, int *min, int *sec);
37
38/***************************************************************************/
39/* Init Drangon Engine hardware */
40/***************************************************************************/
41#if defined(CONFIG_DRAGEN2)
42
43static void m68vz328_reset(void)
44{
45 local_irq_disable();
46
47#ifdef CONFIG_INIT_LCD
48 PBDATA |= 0x20; /* disable CCFL light */
49 PKDATA |= 0x4; /* disable LCD controller */
50 LCKCON = 0;
51#endif
52
53 __asm__ __volatile__(
54 "reset\n\t"
55 "moveal #0x04000000, %a0\n\t"
56 "moveal 0(%a0), %sp\n\t"
57 "moveal 4(%a0), %a0\n\t"
58 "jmp (%a0)"
59 );
60}
61
62static void init_hardware(char *command, int size)
63{
64#ifdef CONFIG_DIRECT_IO_ACCESS
65 SCR = 0x10; /* allow user access to internal registers */
66#endif
67
68 /* CSGB Init */
69 CSGBB = 0x4000;
70 CSB = 0x1a1;
71
72 /* CS8900 init */
73 /* PK3: hardware sleep function pin, active low */
74 PKSEL |= PK(3); /* select pin as I/O */
75 PKDIR |= PK(3); /* select pin as output */
76 PKDATA |= PK(3); /* set pin high */
77
78 /* PF5: hardware reset function pin, active high */
79 PFSEL |= PF(5); /* select pin as I/O */
80 PFDIR |= PF(5); /* select pin as output */
81 PFDATA &= ~PF(5); /* set pin low */
82
83 /* cs8900 hardware reset */
84 PFDATA |= PF(5);
85 { int i; for (i = 0; i < 32000; ++i); }
86 PFDATA &= ~PF(5);
87
88 /* INT1 enable (cs8900 IRQ) */
89 PDPOL &= ~PD(1); /* active high signal */
90 PDIQEG &= ~PD(1);
91 PDIRQEN |= PD(1); /* IRQ enabled */
92
93#ifdef CONFIG_INIT_LCD
94 /* initialize LCD controller */
95 LSSA = (long) screen_bits;
96 LVPW = 0x14;
97 LXMAX = 0x140;
98 LYMAX = 0xef;
99 LRRA = 0;
100 LPXCD = 3;
101 LPICF = 0x08;
102 LPOLCF = 0;
103 LCKCON = 0x80;
104 PCPDEN = 0xff;
105 PCSEL = 0;
106
107 /* Enable LCD controller */
108 PKDIR |= 0x4;
109 PKSEL |= 0x4;
110 PKDATA &= ~0x4;
111
112 /* Enable CCFL backlighting circuit */
113 PBDIR |= 0x20;
114 PBSEL |= 0x20;
115 PBDATA &= ~0x20;
116
117 /* contrast control register */
118 PFDIR |= 0x1;
119 PFSEL &= ~0x1;
120 PWMR = 0x037F;
121#endif
122}
123
124/***************************************************************************/
125/* Init RT-Control uCdimm hardware */
126/***************************************************************************/
127#elif defined(CONFIG_UCDIMM)
128
129static void m68vz328_reset(void)
130{
131 local_irq_disable();
132 asm volatile (
133 "moveal #0x10c00000, %a0;\n\t"
134 "moveb #0, 0xFFFFF300;\n\t"
135 "moveal 0(%a0), %sp;\n\t"
136 "moveal 4(%a0), %a0;\n\t"
137 "jmp (%a0);\n"
138 );
139}
140
141unsigned char *cs8900a_hwaddr;
142static int errno;
143
144_bsc0(char *, getserialnum)
145_bsc1(unsigned char *, gethwaddr, int, a)
146_bsc1(char *, getbenv, char *, a)
147
148static void init_hardware(char *command, int size)
149{
150 char *p;
151
152 printk(KERN_INFO "uCdimm serial string [%s]\n", getserialnum());
153 p = cs8900a_hwaddr = gethwaddr(0);
154 printk(KERN_INFO "uCdimm hwaddr %.2x:%.2x:%.2x:%.2x:%.2x:%.2x\n",
155 p[0], p[1], p[2], p[3], p[4], p[5]);
156 p = getbenv("APPEND");
157 if (p)
158 strcpy(p, command);
159 else
160 command[0] = 0;
161}
162
163/***************************************************************************/
164#else
165
166static void m68vz328_reset(void)
167{
168}
169
170static void init_hardware(char *command, int size)
171{
172}
173
174/***************************************************************************/
175#endif
176/***************************************************************************/
177
178void config_BSP(char *command, int size)
179{
180 printk(KERN_INFO "68VZ328 DragonBallVZ support (c) 2001 Lineo, Inc.\n");
181
182 init_hardware(command, size);
183
184 mach_gettod = m68328_timer_gettod;
185 mach_reset = m68vz328_reset;
186}
187
188/***************************************************************************/
diff --git a/arch/m68k/platform/Makefile b/arch/m68k/platform/Makefile
new file mode 100644
index 000000000000..fc932bf65d34
--- /dev/null
+++ b/arch/m68k/platform/Makefile
@@ -0,0 +1,3 @@
1#
2# Makefile for the arch/m68knommu/platform.
3#
diff --git a/arch/m68k/platform/coldfire/Makefile b/arch/m68k/platform/coldfire/Makefile
new file mode 100644
index 000000000000..a8967baabd72
--- /dev/null
+++ b/arch/m68k/platform/coldfire/Makefile
@@ -0,0 +1,32 @@
1#
2# Makefile for the m68knommu kernel.
3#
4
5#
6# If you want to play with the HW breakpoints then you will
7# need to add define this, which will give you a stack backtrace
8# on the console port whenever a DBG interrupt occurs. You have to
9# set up you HW breakpoints to trigger a DBG interrupt:
10#
11# ccflags-y := -DTRAP_DBG_INTERRUPT
12# asflags-y := -DTRAP_DBG_INTERRUPT
13#
14
15asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
16
17obj-$(CONFIG_COLDFIRE) += cache.o clk.o dma.o entry.o vectors.o
18obj-$(CONFIG_M5206) += timers.o intc.o
19obj-$(CONFIG_M5206e) += timers.o intc.o
20obj-$(CONFIG_M520x) += pit.o intc-simr.o
21obj-$(CONFIG_M523x) += pit.o dma_timer.o intc-2.o
22obj-$(CONFIG_M5249) += timers.o intc.o
23obj-$(CONFIG_M527x) += pit.o intc-2.o
24obj-$(CONFIG_M5272) += timers.o
25obj-$(CONFIG_M528x) += pit.o intc-2.o
26obj-$(CONFIG_M5307) += timers.o intc.o
27obj-$(CONFIG_M532x) += timers.o intc-simr.o
28obj-$(CONFIG_M5407) += timers.o intc.o
29obj-$(CONFIG_M54xx) += sltimers.o intc-2.o
30
31obj-y += pinmux.o gpio.o
32extra-y := head.o
diff --git a/arch/m68k/platform/coldfire/cache.c b/arch/m68k/platform/coldfire/cache.c
new file mode 100644
index 000000000000..71beeaf0c5c4
--- /dev/null
+++ b/arch/m68k/platform/coldfire/cache.c
@@ -0,0 +1,48 @@
1/***************************************************************************/
2
3/*
4 * cache.c -- general ColdFire Cache maintenance code
5 *
6 * Copyright (C) 2010, Greg Ungerer (gerg@snapgear.com)
7 */
8
9/***************************************************************************/
10
11#include <linux/kernel.h>
12#include <asm/coldfire.h>
13#include <asm/mcfsim.h>
14
15/***************************************************************************/
16#ifdef CACHE_PUSH
17/***************************************************************************/
18
19/*
20 * Use cpushl to push all dirty cache lines back to memory.
21 * Older versions of GAS don't seem to know how to generate the
22 * ColdFire cpushl instruction... Oh well, bit stuff it for now.
23 */
24
25void mcf_cache_push(void)
26{
27 __asm__ __volatile__ (
28 "clrl %%d0\n\t"
29 "1:\n\t"
30 "movel %%d0,%%a0\n\t"
31 "2:\n\t"
32 ".word 0xf468\n\t"
33 "addl %0,%%a0\n\t"
34 "cmpl %1,%%a0\n\t"
35 "blt 2b\n\t"
36 "addql #1,%%d0\n\t"
37 "cmpil %2,%%d0\n\t"
38 "bne 1b\n\t"
39 : /* No output */
40 : "i" (CACHE_LINE_SIZE),
41 "i" (DCACHE_SIZE / CACHE_WAYS),
42 "i" (CACHE_WAYS)
43 : "d0", "a0" );
44}
45
46/***************************************************************************/
47#endif /* CACHE_PUSH */
48/***************************************************************************/
diff --git a/arch/m68k/platform/coldfire/clk.c b/arch/m68k/platform/coldfire/clk.c
new file mode 100644
index 000000000000..9f1260c5e2ad
--- /dev/null
+++ b/arch/m68k/platform/coldfire/clk.c
@@ -0,0 +1,45 @@
1/***************************************************************************/
2
3/*
4 * clk.c -- general ColdFire CPU kernel clk handling
5 *
6 * Copyright (C) 2009, Greg Ungerer (gerg@snapgear.com)
7 */
8
9/***************************************************************************/
10
11#include <linux/kernel.h>
12#include <linux/module.h>
13#include <linux/clk.h>
14#include <asm/coldfire.h>
15
16/***************************************************************************/
17
18struct clk *clk_get(struct device *dev, const char *id)
19{
20 return NULL;
21}
22EXPORT_SYMBOL(clk_get);
23
24int clk_enable(struct clk *clk)
25{
26 return 0;
27}
28EXPORT_SYMBOL(clk_enable);
29
30void clk_disable(struct clk *clk)
31{
32}
33EXPORT_SYMBOL(clk_disable);
34
35void clk_put(struct clk *clk)
36{
37}
38EXPORT_SYMBOL(clk_put);
39
40unsigned long clk_get_rate(struct clk *clk)
41{
42 return MCF_CLK;
43}
44EXPORT_SYMBOL(clk_get_rate);
45/***************************************************************************/
diff --git a/arch/m68k/platform/coldfire/dma.c b/arch/m68k/platform/coldfire/dma.c
new file mode 100644
index 000000000000..e88b95e2cc62
--- /dev/null
+++ b/arch/m68k/platform/coldfire/dma.c
@@ -0,0 +1,39 @@
1/***************************************************************************/
2
3/*
4 * dma.c -- Freescale ColdFire DMA support
5 *
6 * Copyright (C) 2007, Greg Ungerer (gerg@snapgear.com)
7 */
8
9/***************************************************************************/
10
11#include <linux/kernel.h>
12#include <asm/dma.h>
13#include <asm/coldfire.h>
14#include <asm/mcfsim.h>
15#include <asm/mcfdma.h>
16
17/***************************************************************************/
18
19/*
20 * DMA channel base address table.
21 */
22unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = {
23#ifdef MCFDMA_BASE0
24 MCFDMA_BASE0,
25#endif
26#ifdef MCFDMA_BASE1
27 MCFDMA_BASE1,
28#endif
29#ifdef MCFDMA_BASE2
30 MCFDMA_BASE2,
31#endif
32#ifdef MCFDMA_BASE3
33 MCFDMA_BASE3,
34#endif
35};
36
37unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS];
38
39/***************************************************************************/
diff --git a/arch/m68k/platform/coldfire/dma_timer.c b/arch/m68k/platform/coldfire/dma_timer.c
new file mode 100644
index 000000000000..a5f562823d7a
--- /dev/null
+++ b/arch/m68k/platform/coldfire/dma_timer.c
@@ -0,0 +1,84 @@
1/*
2 * dma_timer.c -- Freescale ColdFire DMA Timer.
3 *
4 * Copyright (C) 2007, Benedikt Spranger <b.spranger@linutronix.de>
5 * Copyright (C) 2008. Sebastian Siewior, Linutronix
6 *
7 */
8
9#include <linux/clocksource.h>
10#include <linux/io.h>
11
12#include <asm/machdep.h>
13#include <asm/coldfire.h>
14#include <asm/mcfpit.h>
15#include <asm/mcfsim.h>
16
17#define DMA_TIMER_0 (0x00)
18#define DMA_TIMER_1 (0x40)
19#define DMA_TIMER_2 (0x80)
20#define DMA_TIMER_3 (0xc0)
21
22#define DTMR0 (MCF_IPSBAR + DMA_TIMER_0 + 0x400)
23#define DTXMR0 (MCF_IPSBAR + DMA_TIMER_0 + 0x402)
24#define DTER0 (MCF_IPSBAR + DMA_TIMER_0 + 0x403)
25#define DTRR0 (MCF_IPSBAR + DMA_TIMER_0 + 0x404)
26#define DTCR0 (MCF_IPSBAR + DMA_TIMER_0 + 0x408)
27#define DTCN0 (MCF_IPSBAR + DMA_TIMER_0 + 0x40c)
28
29#define DMA_FREQ ((MCF_CLK / 2) / 16)
30
31/* DTMR */
32#define DMA_DTMR_RESTART (1 << 3)
33#define DMA_DTMR_CLK_DIV_1 (1 << 1)
34#define DMA_DTMR_CLK_DIV_16 (2 << 1)
35#define DMA_DTMR_ENABLE (1 << 0)
36
37static cycle_t cf_dt_get_cycles(struct clocksource *cs)
38{
39 return __raw_readl(DTCN0);
40}
41
42static struct clocksource clocksource_cf_dt = {
43 .name = "coldfire_dma_timer",
44 .rating = 200,
45 .read = cf_dt_get_cycles,
46 .mask = CLOCKSOURCE_MASK(32),
47 .shift = 20,
48 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
49};
50
51static int __init init_cf_dt_clocksource(void)
52{
53 /*
54 * We setup DMA timer 0 in free run mode. This incrementing counter is
55 * used as a highly precious clock source. With MCF_CLOCK = 150 MHz we
56 * get a ~213 ns resolution and the 32bit register will overflow almost
57 * every 15 minutes.
58 */
59 __raw_writeb(0x00, DTXMR0);
60 __raw_writeb(0x00, DTER0);
61 __raw_writel(0x00000000, DTRR0);
62 __raw_writew(DMA_DTMR_CLK_DIV_16 | DMA_DTMR_ENABLE, DTMR0);
63 clocksource_cf_dt.mult = clocksource_hz2mult(DMA_FREQ,
64 clocksource_cf_dt.shift);
65 return clocksource_register(&clocksource_cf_dt);
66}
67
68arch_initcall(init_cf_dt_clocksource);
69
70#define CYC2NS_SCALE_FACTOR 10 /* 2^10, carefully chosen */
71#define CYC2NS_SCALE ((1000000 << CYC2NS_SCALE_FACTOR) / (DMA_FREQ / 1000))
72
73static unsigned long long cycles2ns(unsigned long cycl)
74{
75 return (unsigned long long) ((unsigned long long)cycl *
76 CYC2NS_SCALE) >> CYC2NS_SCALE_FACTOR;
77}
78
79unsigned long long sched_clock(void)
80{
81 unsigned long cycl = __raw_readl(DTCN0);
82
83 return cycles2ns(cycl);
84}
diff --git a/arch/m68k/platform/coldfire/entry.S b/arch/m68k/platform/coldfire/entry.S
new file mode 100644
index 000000000000..eab63f09965b
--- /dev/null
+++ b/arch/m68k/platform/coldfire/entry.S
@@ -0,0 +1,203 @@
1/*
2 * linux/arch/m68knommu/platform/5307/entry.S
3 *
4 * Copyright (C) 1999-2007, Greg Ungerer (gerg@snapgear.com)
5 * Copyright (C) 1998 D. Jeff Dionne <jeff@lineo.ca>,
6 * Kenneth Albanowski <kjahds@kjahds.com>,
7 * Copyright (C) 2000 Lineo Inc. (www.lineo.com)
8 * Copyright (C) 2004-2006 Macq Electronique SA. (www.macqel.com)
9 *
10 * Based on:
11 *
12 * linux/arch/m68k/kernel/entry.S
13 *
14 * Copyright (C) 1991, 1992 Linus Torvalds
15 *
16 * This file is subject to the terms and conditions of the GNU General Public
17 * License. See the file README.legal in the main directory of this archive
18 * for more details.
19 *
20 * Linux/m68k support by Hamish Macdonald
21 *
22 * 68060 fixes by Jesper Skov
23 * ColdFire support by Greg Ungerer (gerg@snapgear.com)
24 * 5307 fixes by David W. Miller
25 * linux 2.4 support David McCullough <davidm@snapgear.com>
26 * Bug, speed and maintainability fixes by Philippe De Muyter <phdm@macqel.be>
27 */
28
29#include <linux/sys.h>
30#include <linux/linkage.h>
31#include <asm/unistd.h>
32#include <asm/thread_info.h>
33#include <asm/errno.h>
34#include <asm/setup.h>
35#include <asm/segment.h>
36#include <asm/asm-offsets.h>
37#include <asm/entry.h>
38
39#ifdef CONFIG_COLDFIRE_SW_A7
40/*
41 * Define software copies of the supervisor and user stack pointers.
42 */
43.bss
44sw_ksp:
45.long 0
46sw_usp:
47.long 0
48#endif /* CONFIG_COLDFIRE_SW_A7 */
49
50.text
51
52.globl system_call
53.globl resume
54.globl ret_from_exception
55.globl ret_from_signal
56.globl sys_call_table
57.globl inthandler
58.globl fasthandler
59
60enosys:
61 mov.l #sys_ni_syscall,%d3
62 bra 1f
63
64ENTRY(system_call)
65 SAVE_ALL
66 move #0x2000,%sr /* enable intrs again */
67
68 cmpl #NR_syscalls,%d0
69 jcc enosys
70 lea sys_call_table,%a0
71 lsll #2,%d0 /* movel %a0@(%d0:l:4),%d3 */
72 movel %a0@(%d0),%d3
73 jeq enosys
74
751:
76 movel %sp,%d2 /* get thread_info pointer */
77 andl #-THREAD_SIZE,%d2 /* at start of kernel stack */
78 movel %d2,%a0
79 movel %a0@,%a1 /* save top of frame */
80 movel %sp,%a1@(TASK_THREAD+THREAD_ESP0)
81 btst #(TIF_SYSCALL_TRACE%8),%a0@(TI_FLAGS+(31-TIF_SYSCALL_TRACE)/8)
82 bnes 1f
83
84 movel %d3,%a0
85 jbsr %a0@
86 movel %d0,%sp@(PT_OFF_D0) /* save the return value */
87 jra ret_from_exception
881:
89 movel #-ENOSYS,%d2 /* strace needs -ENOSYS in PT_OFF_D0 */
90 movel %d2,PT_OFF_D0(%sp) /* on syscall entry */
91 subql #4,%sp
92 SAVE_SWITCH_STACK
93 jbsr syscall_trace_enter
94 RESTORE_SWITCH_STACK
95 addql #4,%sp
96 movel %d3,%a0
97 jbsr %a0@
98 movel %d0,%sp@(PT_OFF_D0) /* save the return value */
99 subql #4,%sp /* dummy return address */
100 SAVE_SWITCH_STACK
101 jbsr syscall_trace_leave
102
103ret_from_signal:
104 RESTORE_SWITCH_STACK
105 addql #4,%sp
106
107ret_from_exception:
108 move #0x2700,%sr /* disable intrs */
109 btst #5,%sp@(PT_OFF_SR) /* check if returning to kernel */
110 jeq Luser_return /* if so, skip resched, signals */
111
112#ifdef CONFIG_PREEMPT
113 movel %sp,%d1 /* get thread_info pointer */
114 andl #-THREAD_SIZE,%d1 /* at base of kernel stack */
115 movel %d1,%a0
116 movel %a0@(TI_FLAGS),%d1 /* get thread_info->flags */
117 andl #(1<<TIF_NEED_RESCHED),%d1
118 jeq Lkernel_return
119
120 movel %a0@(TI_PREEMPTCOUNT),%d1
121 cmpl #0,%d1
122 jne Lkernel_return
123
124 pea Lkernel_return
125 jmp preempt_schedule_irq /* preempt the kernel */
126#endif
127
128Lkernel_return:
129 moveml %sp@,%d1-%d5/%a0-%a2
130 lea %sp@(32),%sp /* space for 8 regs */
131 movel %sp@+,%d0
132 addql #4,%sp /* orig d0 */
133 addl %sp@+,%sp /* stk adj */
134 rte
135
136Luser_return:
137 movel %sp,%d1 /* get thread_info pointer */
138 andl #-THREAD_SIZE,%d1 /* at base of kernel stack */
139 movel %d1,%a0
140 movel %a0@(TI_FLAGS),%d1 /* get thread_info->flags */
141 jne Lwork_to_do /* still work to do */
142
143Lreturn:
144 RESTORE_USER
145
146Lwork_to_do:
147 movel %a0@(TI_FLAGS),%d1 /* get thread_info->flags */
148 move #0x2000,%sr /* enable intrs again */
149 btst #TIF_NEED_RESCHED,%d1
150 jne reschedule
151
152 /* GERG: do we need something here for TRACEing?? */
153
154Lsignal_return:
155 subql #4,%sp /* dummy return address */
156 SAVE_SWITCH_STACK
157 pea %sp@(SWITCH_STACK_SIZE)
158 jsr do_signal
159 addql #4,%sp
160 RESTORE_SWITCH_STACK
161 addql #4,%sp
162 jmp Luser_return
163
164/*
165 * This is the generic interrupt handler (for all hardware interrupt
166 * sources). Calls up to high level code to do all the work.
167 */
168ENTRY(inthandler)
169 SAVE_ALL
170 moveq #-1,%d0
171 movel %d0,%sp@(PT_OFF_ORIG_D0)
172
173 movew %sp@(PT_OFF_FORMATVEC),%d0 /* put exception # in d0 */
174 andl #0x03fc,%d0 /* mask out vector only */
175
176 movel %sp,%sp@- /* push regs arg */
177 lsrl #2,%d0 /* calculate real vector # */
178 movel %d0,%sp@- /* push vector number */
179 jbsr do_IRQ /* call high level irq handler */
180 lea %sp@(8),%sp /* pop args off stack */
181
182 bra ret_from_exception
183
184/*
185 * Beware - when entering resume, prev (the current task) is
186 * in a0, next (the new task) is in a1,so don't change these
187 * registers until their contents are no longer needed.
188 * This is always called in supervisor mode, so don't bother to save
189 * and restore sr; user's process sr is actually in the stack.
190 */
191ENTRY(resume)
192 movel %a0, %d1 /* get prev thread in d1 */
193 RDUSP
194 movel %a2,%a0@(TASK_THREAD+THREAD_USP)
195
196 SAVE_SWITCH_STACK
197 movel %sp,%a0@(TASK_THREAD+THREAD_KSP) /* save kernel stack pointer */
198 movel %a1@(TASK_THREAD+THREAD_KSP),%sp /* restore new thread stack */
199 RESTORE_SWITCH_STACK
200
201 movel %a1@(TASK_THREAD+THREAD_USP),%a0 /* restore thread user stack */
202 WRUSP
203 rts
diff --git a/arch/m68k/platform/coldfire/gpio.c b/arch/m68k/platform/coldfire/gpio.c
new file mode 100644
index 000000000000..ff0045793450
--- /dev/null
+++ b/arch/m68k/platform/coldfire/gpio.c
@@ -0,0 +1,127 @@
1/*
2 * Coldfire generic GPIO support.
3 *
4 * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/sysdev.h>
19
20#include <asm/gpio.h>
21#include <asm/pinmux.h>
22#include <asm/mcfgpio.h>
23
24#define MCF_CHIP(chip) container_of(chip, struct mcf_gpio_chip, gpio_chip)
25
26int mcf_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
27{
28 unsigned long flags;
29 MCFGPIO_PORTTYPE dir;
30 struct mcf_gpio_chip *mcf_chip = MCF_CHIP(chip);
31
32 local_irq_save(flags);
33 dir = mcfgpio_read(mcf_chip->pddr);
34 dir &= ~mcfgpio_bit(chip->base + offset);
35 mcfgpio_write(dir, mcf_chip->pddr);
36 local_irq_restore(flags);
37
38 return 0;
39}
40
41int mcf_gpio_get_value(struct gpio_chip *chip, unsigned offset)
42{
43 struct mcf_gpio_chip *mcf_chip = MCF_CHIP(chip);
44
45 return mcfgpio_read(mcf_chip->ppdr) & mcfgpio_bit(chip->base + offset);
46}
47
48int mcf_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
49 int value)
50{
51 unsigned long flags;
52 MCFGPIO_PORTTYPE data;
53 struct mcf_gpio_chip *mcf_chip = MCF_CHIP(chip);
54
55 local_irq_save(flags);
56 /* write the value to the output latch */
57 data = mcfgpio_read(mcf_chip->podr);
58 if (value)
59 data |= mcfgpio_bit(chip->base + offset);
60 else
61 data &= ~mcfgpio_bit(chip->base + offset);
62 mcfgpio_write(data, mcf_chip->podr);
63
64 /* now set the direction to output */
65 data = mcfgpio_read(mcf_chip->pddr);
66 data |= mcfgpio_bit(chip->base + offset);
67 mcfgpio_write(data, mcf_chip->pddr);
68 local_irq_restore(flags);
69
70 return 0;
71}
72
73void mcf_gpio_set_value(struct gpio_chip *chip, unsigned offset, int value)
74{
75 struct mcf_gpio_chip *mcf_chip = MCF_CHIP(chip);
76
77 unsigned long flags;
78 MCFGPIO_PORTTYPE data;
79
80 local_irq_save(flags);
81 data = mcfgpio_read(mcf_chip->podr);
82 if (value)
83 data |= mcfgpio_bit(chip->base + offset);
84 else
85 data &= ~mcfgpio_bit(chip->base + offset);
86 mcfgpio_write(data, mcf_chip->podr);
87 local_irq_restore(flags);
88}
89
90void mcf_gpio_set_value_fast(struct gpio_chip *chip, unsigned offset, int value)
91{
92 struct mcf_gpio_chip *mcf_chip = MCF_CHIP(chip);
93
94 if (value)
95 mcfgpio_write(mcfgpio_bit(chip->base + offset), mcf_chip->setr);
96 else
97 mcfgpio_write(~mcfgpio_bit(chip->base + offset), mcf_chip->clrr);
98}
99
100int mcf_gpio_request(struct gpio_chip *chip, unsigned offset)
101{
102 struct mcf_gpio_chip *mcf_chip = MCF_CHIP(chip);
103
104 return mcf_chip->gpio_to_pinmux ?
105 mcf_pinmux_request(mcf_chip->gpio_to_pinmux[offset], 0) : 0;
106}
107
108void mcf_gpio_free(struct gpio_chip *chip, unsigned offset)
109{
110 struct mcf_gpio_chip *mcf_chip = MCF_CHIP(chip);
111
112 mcf_gpio_direction_input(chip, offset);
113
114 if (mcf_chip->gpio_to_pinmux)
115 mcf_pinmux_release(mcf_chip->gpio_to_pinmux[offset], 0);
116}
117
118struct sysdev_class mcf_gpio_sysclass = {
119 .name = "gpio",
120};
121
122static int __init mcf_gpio_sysinit(void)
123{
124 return sysdev_class_register(&mcf_gpio_sysclass);
125}
126
127core_initcall(mcf_gpio_sysinit);
diff --git a/arch/m68k/platform/coldfire/head.S b/arch/m68k/platform/coldfire/head.S
new file mode 100644
index 000000000000..6ae91a499184
--- /dev/null
+++ b/arch/m68k/platform/coldfire/head.S
@@ -0,0 +1,250 @@
1/*****************************************************************************/
2
3/*
4 * head.S -- common startup code for ColdFire CPUs.
5 *
6 * (C) Copyright 1999-2010, Greg Ungerer <gerg@snapgear.com>.
7 */
8
9/*****************************************************************************/
10
11#include <linux/sys.h>
12#include <linux/linkage.h>
13#include <linux/init.h>
14#include <asm/asm-offsets.h>
15#include <asm/coldfire.h>
16#include <asm/mcfsim.h>
17#include <asm/thread_info.h>
18
19/*****************************************************************************/
20
21/*
22 * If we don't have a fixed memory size, then lets build in code
23 * to auto detect the DRAM size. Obviously this is the preferred
24 * method, and should work for most boards. It won't work for those
25 * that do not have their RAM starting at address 0, and it only
26 * works on SDRAM (not boards fitted with SRAM).
27 */
28#if CONFIG_RAMSIZE != 0
29.macro GET_MEM_SIZE
30 movel #CONFIG_RAMSIZE,%d0 /* hard coded memory size */
31.endm
32
33#elif defined(CONFIG_M5206) || defined(CONFIG_M5206e) || \
34 defined(CONFIG_M5249) || defined(CONFIG_M527x) || \
35 defined(CONFIG_M528x) || defined(CONFIG_M5307) || \
36 defined(CONFIG_M5407)
37/*
38 * Not all these devices have exactly the same DRAM controller,
39 * but the DCMR register is virtually identical - give or take
40 * a couple of bits. The only exception is the 5272 devices, their
41 * DRAM controller is quite different.
42 */
43.macro GET_MEM_SIZE
44 movel MCFSIM_DMR0,%d0 /* get mask for 1st bank */
45 btst #0,%d0 /* check if region enabled */
46 beq 1f
47 andl #0xfffc0000,%d0
48 beq 1f
49 addl #0x00040000,%d0 /* convert mask to size */
501:
51 movel MCFSIM_DMR1,%d1 /* get mask for 2nd bank */
52 btst #0,%d1 /* check if region enabled */
53 beq 2f
54 andl #0xfffc0000,%d1
55 beq 2f
56 addl #0x00040000,%d1
57 addl %d1,%d0 /* total mem size in d0 */
582:
59.endm
60
61#elif defined(CONFIG_M5272)
62.macro GET_MEM_SIZE
63 movel MCF_MBAR+MCFSIM_CSOR7,%d0 /* get SDRAM address mask */
64 andil #0xfffff000,%d0 /* mask out chip select options */
65 negl %d0 /* negate bits */
66.endm
67
68#elif defined(CONFIG_M520x)
69.macro GET_MEM_SIZE
70 clrl %d0
71 movel MCFSIM_SDCS0, %d2 /* Get SDRAM chip select 0 config */
72 andl #0x1f, %d2 /* Get only the chip select size */
73 beq 3f /* Check if it is enabled */
74 addql #1, %d2 /* Form exponent */
75 moveql #1, %d0
76 lsll %d2, %d0 /* 2 ^ exponent */
773:
78 movel MCFSIM_SDCS1, %d2 /* Get SDRAM chip select 1 config */
79 andl #0x1f, %d2 /* Get only the chip select size */
80 beq 4f /* Check if it is enabled */
81 addql #1, %d2 /* Form exponent */
82 moveql #1, %d1
83 lsll %d2, %d1 /* 2 ^ exponent */
84 addl %d1, %d0 /* Total size of SDRAM in d0 */
854:
86.endm
87
88#else
89#error "ERROR: I don't know how to probe your boards memory size?"
90#endif
91
92/*****************************************************************************/
93
94/*
95 * Boards and platforms can do specific early hardware setup if
96 * they need to. Most don't need this, define away if not required.
97 */
98#ifndef PLATFORM_SETUP
99#define PLATFORM_SETUP
100#endif
101
102/*****************************************************************************/
103
104.global _start
105.global _rambase
106.global _ramvec
107.global _ramstart
108.global _ramend
109#if defined(CONFIG_UBOOT)
110.global _init_sp
111#endif
112
113/*****************************************************************************/
114
115.data
116
117/*
118 * During startup we store away the RAM setup. These are not in the
119 * bss, since their values are determined and written before the bss
120 * has been cleared.
121 */
122_rambase:
123.long 0
124_ramvec:
125.long 0
126_ramstart:
127.long 0
128_ramend:
129.long 0
130#if defined(CONFIG_UBOOT)
131_init_sp:
132.long 0
133#endif
134
135/*****************************************************************************/
136
137__HEAD
138
139/*
140 * This is the codes first entry point. This is where it all
141 * begins...
142 */
143
144_start:
145 nop /* filler */
146 movew #0x2700, %sr /* no interrupts */
147#if defined(CONFIG_UBOOT)
148 movel %sp,_init_sp /* save initial stack pointer */
149#endif
150
151 /*
152 * Do any platform or board specific setup now. Most boards
153 * don't need anything. Those exceptions are define this in
154 * their board specific includes.
155 */
156 PLATFORM_SETUP
157
158 /*
159 * Create basic memory configuration. Set VBR accordingly,
160 * and size memory.
161 */
162 movel #CONFIG_VECTORBASE,%a7
163 movec %a7,%VBR /* set vectors addr */
164 movel %a7,_ramvec
165
166 movel #CONFIG_RAMBASE,%a7 /* mark the base of RAM */
167 movel %a7,_rambase
168
169 GET_MEM_SIZE /* macro code determines size */
170 addl %a7,%d0
171 movel %d0,_ramend /* set end ram addr */
172
173 /*
174 * Now that we know what the memory is, lets enable cache
175 * and get things moving. This is Coldfire CPU specific. Not
176 * all version cores have identical cache register setup. But
177 * it is very similar. Define the exact settings in the headers
178 * then the code here is the same for all.
179 */
180 movel #CACHE_INIT,%d0 /* invalidate whole cache */
181 movec %d0,%CACR
182 nop
183 movel #ACR0_MODE,%d0 /* set RAM region for caching */
184 movec %d0,%ACR0
185 movel #ACR1_MODE,%d0 /* anything else to cache? */
186 movec %d0,%ACR1
187#ifdef ACR2_MODE
188 movel #ACR2_MODE,%d0
189 movec %d0,%ACR2
190 movel #ACR3_MODE,%d0
191 movec %d0,%ACR3
192#endif
193 movel #CACHE_MODE,%d0 /* enable cache */
194 movec %d0,%CACR
195 nop
196
197#ifdef CONFIG_ROMFS_FS
198 /*
199 * Move ROM filesystem above bss :-)
200 */
201 lea _sbss,%a0 /* get start of bss */
202 lea _ebss,%a1 /* set up destination */
203 movel %a0,%a2 /* copy of bss start */
204
205 movel 8(%a0),%d0 /* get size of ROMFS */
206 addql #8,%d0 /* allow for rounding */
207 andl #0xfffffffc, %d0 /* whole words */
208
209 addl %d0,%a0 /* copy from end */
210 addl %d0,%a1 /* copy from end */
211 movel %a1,_ramstart /* set start of ram */
212
213_copy_romfs:
214 movel -(%a0),%d0 /* copy dword */
215 movel %d0,-(%a1)
216 cmpl %a0,%a2 /* check if at end */
217 bne _copy_romfs
218
219#else /* CONFIG_ROMFS_FS */
220 lea _ebss,%a1
221 movel %a1,_ramstart
222#endif /* CONFIG_ROMFS_FS */
223
224
225 /*
226 * Zero out the bss region.
227 */
228 lea _sbss,%a0 /* get start of bss */
229 lea _ebss,%a1 /* get end of bss */
230 clrl %d0 /* set value */
231_clear_bss:
232 movel %d0,(%a0)+ /* clear each word */
233 cmpl %a0,%a1 /* check if at end */
234 bne _clear_bss
235
236 /*
237 * Load the current task pointer and stack.
238 */
239 lea init_thread_union,%a0
240 lea THREAD_SIZE(%a0),%sp
241
242 /*
243 * Assember start up done, start code proper.
244 */
245 jsr start_kernel /* start Linux kernel */
246
247_exit:
248 jmp _exit /* should never get here */
249
250/*****************************************************************************/
diff --git a/arch/m68k/platform/coldfire/intc-2.c b/arch/m68k/platform/coldfire/intc-2.c
new file mode 100644
index 000000000000..74b55cfbc3cb
--- /dev/null
+++ b/arch/m68k/platform/coldfire/intc-2.c
@@ -0,0 +1,214 @@
1/*
2 * intc-2.c
3 *
4 * General interrupt controller code for the many ColdFire cores that use
5 * interrupt controllers with 63 interrupt sources, organized as 56 fully-
6 * programmable + 7 fixed-level interrupt sources. This includes the 523x
7 * family, the 5270, 5271, 5274, 5275, and the 528x family which have two such
8 * controllers, and the 547x and 548x families which have only one of them.
9 *
10 * The external 7 fixed interrupts are part the the Edge Port unit of these
11 * ColdFire parts. They can be configured as level or edge triggered.
12 *
13 * (C) Copyright 2009-2011, Greg Ungerer <gerg@snapgear.com>
14 *
15 * This file is subject to the terms and conditions of the GNU General Public
16 * License. See the file COPYING in the main directory of this archive
17 * for more details.
18 */
19
20#include <linux/types.h>
21#include <linux/init.h>
22#include <linux/kernel.h>
23#include <linux/interrupt.h>
24#include <linux/irq.h>
25#include <linux/io.h>
26#include <asm/coldfire.h>
27#include <asm/mcfsim.h>
28#include <asm/traps.h>
29
30/*
31 * Bit definitions for the ICR family of registers.
32 */
33#define MCFSIM_ICR_LEVEL(l) ((l)<<3) /* Level l intr */
34#define MCFSIM_ICR_PRI(p) (p) /* Priority p intr */
35
36/*
37 * The EDGE Port interrupts are the fixed 7 external interrupts.
38 * They need some special treatment, for example they need to be acked.
39 */
40#define EINT0 64 /* Is not actually used, but spot reserved for it */
41#define EINT1 65 /* EDGE Port interrupt 1 */
42#define EINT7 71 /* EDGE Port interrupt 7 */
43
44#ifdef MCFICM_INTC1
45#define NR_VECS 128
46#else
47#define NR_VECS 64
48#endif
49
50static void intc_irq_mask(struct irq_data *d)
51{
52 unsigned int irq = d->irq - MCFINT_VECBASE;
53 unsigned long imraddr;
54 u32 val, imrbit;
55
56#ifdef MCFICM_INTC1
57 imraddr = (irq & 0x40) ? MCFICM_INTC1 : MCFICM_INTC0;
58#else
59 imraddr = MCFICM_INTC0;
60#endif
61 imraddr += (irq & 0x20) ? MCFINTC_IMRH : MCFINTC_IMRL;
62 imrbit = 0x1 << (irq & 0x1f);
63
64 val = __raw_readl(imraddr);
65 __raw_writel(val | imrbit, imraddr);
66}
67
68static void intc_irq_unmask(struct irq_data *d)
69{
70 unsigned int irq = d->irq - MCFINT_VECBASE;
71 unsigned long imraddr;
72 u32 val, imrbit;
73
74#ifdef MCFICM_INTC1
75 imraddr = (irq & 0x40) ? MCFICM_INTC1 : MCFICM_INTC0;
76#else
77 imraddr = MCFICM_INTC0;
78#endif
79 imraddr += ((irq & 0x20) ? MCFINTC_IMRH : MCFINTC_IMRL);
80 imrbit = 0x1 << (irq & 0x1f);
81
82 /* Don't set the "maskall" bit! */
83 if ((irq & 0x20) == 0)
84 imrbit |= 0x1;
85
86 val = __raw_readl(imraddr);
87 __raw_writel(val & ~imrbit, imraddr);
88}
89
90/*
91 * Only the external (or EDGE Port) interrupts need to be acknowledged
92 * here, as part of the IRQ handler. They only really need to be ack'ed
93 * if they are in edge triggered mode, but there is no harm in doing it
94 * for all types.
95 */
96static void intc_irq_ack(struct irq_data *d)
97{
98 unsigned int irq = d->irq;
99
100 __raw_writeb(0x1 << (irq - EINT0), MCFEPORT_EPFR);
101}
102
103/*
104 * Each vector needs a unique priority and level associated with it.
105 * We don't really care so much what they are, we don't rely on the
106 * traditional priority interrupt scheme of the m68k/ColdFire. This
107 * only needs to be set once for an interrupt, and we will never change
108 * these values once we have set them.
109 */
110static u8 intc_intpri = MCFSIM_ICR_LEVEL(6) | MCFSIM_ICR_PRI(6);
111
112static unsigned int intc_irq_startup(struct irq_data *d)
113{
114 unsigned int irq = d->irq - MCFINT_VECBASE;
115 unsigned long icraddr;
116
117#ifdef MCFICM_INTC1
118 icraddr = (irq & 0x40) ? MCFICM_INTC1 : MCFICM_INTC0;
119#else
120 icraddr = MCFICM_INTC0;
121#endif
122 icraddr += MCFINTC_ICR0 + (irq & 0x3f);
123 if (__raw_readb(icraddr) == 0)
124 __raw_writeb(intc_intpri--, icraddr);
125
126 irq = d->irq;
127 if ((irq >= EINT1) && (irq <= EINT7)) {
128 u8 v;
129
130 irq -= EINT0;
131
132 /* Set EPORT line as input */
133 v = __raw_readb(MCFEPORT_EPDDR);
134 __raw_writeb(v & ~(0x1 << irq), MCFEPORT_EPDDR);
135
136 /* Set EPORT line as interrupt source */
137 v = __raw_readb(MCFEPORT_EPIER);
138 __raw_writeb(v | (0x1 << irq), MCFEPORT_EPIER);
139 }
140
141 intc_irq_unmask(d);
142 return 0;
143}
144
145static int intc_irq_set_type(struct irq_data *d, unsigned int type)
146{
147 unsigned int irq = d->irq;
148 u16 pa, tb;
149
150 switch (type) {
151 case IRQ_TYPE_EDGE_RISING:
152 tb = 0x1;
153 break;
154 case IRQ_TYPE_EDGE_FALLING:
155 tb = 0x2;
156 break;
157 case IRQ_TYPE_EDGE_BOTH:
158 tb = 0x3;
159 break;
160 default:
161 /* Level triggered */
162 tb = 0;
163 break;
164 }
165
166 if (tb)
167 irq_set_handler(irq, handle_edge_irq);
168
169 irq -= EINT0;
170 pa = __raw_readw(MCFEPORT_EPPAR);
171 pa = (pa & ~(0x3 << (irq * 2))) | (tb << (irq * 2));
172 __raw_writew(pa, MCFEPORT_EPPAR);
173
174 return 0;
175}
176
177static struct irq_chip intc_irq_chip = {
178 .name = "CF-INTC",
179 .irq_startup = intc_irq_startup,
180 .irq_mask = intc_irq_mask,
181 .irq_unmask = intc_irq_unmask,
182};
183
184static struct irq_chip intc_irq_chip_edge_port = {
185 .name = "CF-INTC-EP",
186 .irq_startup = intc_irq_startup,
187 .irq_mask = intc_irq_mask,
188 .irq_unmask = intc_irq_unmask,
189 .irq_ack = intc_irq_ack,
190 .irq_set_type = intc_irq_set_type,
191};
192
193void __init init_IRQ(void)
194{
195 int irq;
196
197 init_vectors();
198
199 /* Mask all interrupt sources */
200 __raw_writel(0x1, MCFICM_INTC0 + MCFINTC_IMRL);
201#ifdef MCFICM_INTC1
202 __raw_writel(0x1, MCFICM_INTC1 + MCFINTC_IMRL);
203#endif
204
205 for (irq = MCFINT_VECBASE; (irq < MCFINT_VECBASE + NR_VECS); irq++) {
206 if ((irq >= EINT1) && (irq <=EINT7))
207 irq_set_chip(irq, &intc_irq_chip_edge_port);
208 else
209 irq_set_chip(irq, &intc_irq_chip);
210 irq_set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH);
211 irq_set_handler(irq, handle_level_irq);
212 }
213}
214
diff --git a/arch/m68k/platform/coldfire/intc-simr.c b/arch/m68k/platform/coldfire/intc-simr.c
new file mode 100644
index 000000000000..d6a4d9d53e42
--- /dev/null
+++ b/arch/m68k/platform/coldfire/intc-simr.c
@@ -0,0 +1,191 @@
1/*
2 * intc-simr.c
3 *
4 * Interrupt controller code for the ColdFire 5208, 5207 & 532x parts.
5 *
6 * (C) Copyright 2009-2011, Greg Ungerer <gerg@snapgear.com>
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file COPYING in the main directory of this archive
10 * for more details.
11 */
12
13#include <linux/types.h>
14#include <linux/init.h>
15#include <linux/kernel.h>
16#include <linux/interrupt.h>
17#include <linux/irq.h>
18#include <linux/io.h>
19#include <asm/coldfire.h>
20#include <asm/mcfsim.h>
21#include <asm/traps.h>
22
23/*
24 * The EDGE Port interrupts are the fixed 7 external interrupts.
25 * They need some special treatment, for example they need to be acked.
26 */
27#ifdef CONFIG_M520x
28/*
29 * The 520x parts only support a limited range of these external
30 * interrupts, only 1, 4 and 7 (as interrupts 65, 66 and 67).
31 */
32#define EINT0 64 /* Is not actually used, but spot reserved for it */
33#define EINT1 65 /* EDGE Port interrupt 1 */
34#define EINT4 66 /* EDGE Port interrupt 4 */
35#define EINT7 67 /* EDGE Port interrupt 7 */
36
37static unsigned int irqebitmap[] = { 0, 1, 4, 7 };
38static unsigned int inline irq2ebit(unsigned int irq)
39{
40 return irqebitmap[irq - EINT0];
41}
42
43#else
44
45/*
46 * Most of the ColdFire parts with the EDGE Port module just have
47 * a strait direct mapping of the 7 external interrupts. Although
48 * there is a bit reserved for 0, it is not used.
49 */
50#define EINT0 64 /* Is not actually used, but spot reserved for it */
51#define EINT1 65 /* EDGE Port interrupt 1 */
52#define EINT7 71 /* EDGE Port interrupt 7 */
53
54static unsigned int inline irq2ebit(unsigned int irq)
55{
56 return irq - EINT0;
57}
58
59#endif
60
61/*
62 * There maybe one or two interrupt control units, each has 64
63 * interrupts. If there is no second unit then MCFINTC1_* defines
64 * will be 0 (and code for them optimized away).
65 */
66
67static void intc_irq_mask(struct irq_data *d)
68{
69 unsigned int irq = d->irq - MCFINT_VECBASE;
70
71 if (MCFINTC1_SIMR && (irq > 64))
72 __raw_writeb(irq - 64, MCFINTC1_SIMR);
73 else
74 __raw_writeb(irq, MCFINTC0_SIMR);
75}
76
77static void intc_irq_unmask(struct irq_data *d)
78{
79 unsigned int irq = d->irq - MCFINT_VECBASE;
80
81 if (MCFINTC1_CIMR && (irq > 64))
82 __raw_writeb(irq - 64, MCFINTC1_CIMR);
83 else
84 __raw_writeb(irq, MCFINTC0_CIMR);
85}
86
87static void intc_irq_ack(struct irq_data *d)
88{
89 unsigned int ebit = irq2ebit(d->irq);
90
91 __raw_writeb(0x1 << ebit, MCFEPORT_EPFR);
92}
93
94static unsigned int intc_irq_startup(struct irq_data *d)
95{
96 unsigned int irq = d->irq;
97
98 if ((irq >= EINT1) && (irq <= EINT7)) {
99 unsigned int ebit = irq2ebit(irq);
100 u8 v;
101
102 /* Set EPORT line as input */
103 v = __raw_readb(MCFEPORT_EPDDR);
104 __raw_writeb(v & ~(0x1 << ebit), MCFEPORT_EPDDR);
105
106 /* Set EPORT line as interrupt source */
107 v = __raw_readb(MCFEPORT_EPIER);
108 __raw_writeb(v | (0x1 << ebit), MCFEPORT_EPIER);
109 }
110
111 irq -= MCFINT_VECBASE;
112 if (MCFINTC1_ICR0 && (irq > 64))
113 __raw_writeb(5, MCFINTC1_ICR0 + irq - 64);
114 else
115 __raw_writeb(5, MCFINTC0_ICR0 + irq);
116
117
118 intc_irq_unmask(d);
119 return 0;
120}
121
122static int intc_irq_set_type(struct irq_data *d, unsigned int type)
123{
124 unsigned int ebit, irq = d->irq;
125 u16 pa, tb;
126
127 switch (type) {
128 case IRQ_TYPE_EDGE_RISING:
129 tb = 0x1;
130 break;
131 case IRQ_TYPE_EDGE_FALLING:
132 tb = 0x2;
133 break;
134 case IRQ_TYPE_EDGE_BOTH:
135 tb = 0x3;
136 break;
137 default:
138 /* Level triggered */
139 tb = 0;
140 break;
141 }
142
143 if (tb)
144 irq_set_handler(irq, handle_edge_irq);
145
146 ebit = irq2ebit(irq) * 2;
147 pa = __raw_readw(MCFEPORT_EPPAR);
148 pa = (pa & ~(0x3 << ebit)) | (tb << ebit);
149 __raw_writew(pa, MCFEPORT_EPPAR);
150
151 return 0;
152}
153
154static struct irq_chip intc_irq_chip = {
155 .name = "CF-INTC",
156 .irq_startup = intc_irq_startup,
157 .irq_mask = intc_irq_mask,
158 .irq_unmask = intc_irq_unmask,
159};
160
161static struct irq_chip intc_irq_chip_edge_port = {
162 .name = "CF-INTC-EP",
163 .irq_startup = intc_irq_startup,
164 .irq_mask = intc_irq_mask,
165 .irq_unmask = intc_irq_unmask,
166 .irq_ack = intc_irq_ack,
167 .irq_set_type = intc_irq_set_type,
168};
169
170void __init init_IRQ(void)
171{
172 int irq, eirq;
173
174 init_vectors();
175
176 /* Mask all interrupt sources */
177 __raw_writeb(0xff, MCFINTC0_SIMR);
178 if (MCFINTC1_SIMR)
179 __raw_writeb(0xff, MCFINTC1_SIMR);
180
181 eirq = MCFINT_VECBASE + 64 + (MCFINTC1_ICR0 ? 64 : 0);
182 for (irq = MCFINT_VECBASE; (irq < eirq); irq++) {
183 if ((irq >= EINT1) && (irq <= EINT7))
184 irq_set_chip(irq, &intc_irq_chip_edge_port);
185 else
186 irq_set_chip(irq, &intc_irq_chip);
187 irq_set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH);
188 irq_set_handler(irq, handle_level_irq);
189 }
190}
191
diff --git a/arch/m68k/platform/coldfire/intc.c b/arch/m68k/platform/coldfire/intc.c
new file mode 100644
index 000000000000..0bbb414856eb
--- /dev/null
+++ b/arch/m68k/platform/coldfire/intc.c
@@ -0,0 +1,151 @@
1/*
2 * intc.c -- support for the old ColdFire interrupt controller
3 *
4 * (C) Copyright 2009, Greg Ungerer <gerg@snapgear.com>
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/types.h>
12#include <linux/init.h>
13#include <linux/kernel.h>
14#include <linux/interrupt.h>
15#include <linux/irq.h>
16#include <linux/io.h>
17#include <asm/traps.h>
18#include <asm/coldfire.h>
19#include <asm/mcfsim.h>
20
21/*
22 * The mapping of irq number to a mask register bit is not one-to-one.
23 * The irq numbers are either based on "level" of interrupt or fixed
24 * for an autovector-able interrupt. So we keep a local data structure
25 * that maps from irq to mask register. Not all interrupts will have
26 * an IMR bit.
27 */
28unsigned char mcf_irq2imr[NR_IRQS];
29
30/*
31 * Define the miniumun and maximum external interrupt numbers.
32 * This is also used as the "level" interrupt numbers.
33 */
34#define EIRQ1 25
35#define EIRQ7 31
36
37/*
38 * In the early version 2 core ColdFire parts the IMR register was 16 bits
39 * in size. Version 3 (and later version 2) core parts have a 32 bit
40 * sized IMR register. Provide some size independent methods to access the
41 * IMR register.
42 */
43#ifdef MCFSIM_IMR_IS_16BITS
44
45void mcf_setimr(int index)
46{
47 u16 imr;
48 imr = __raw_readw(MCF_MBAR + MCFSIM_IMR);
49 __raw_writew(imr | (0x1 << index), MCF_MBAR + MCFSIM_IMR);
50}
51
52void mcf_clrimr(int index)
53{
54 u16 imr;
55 imr = __raw_readw(MCF_MBAR + MCFSIM_IMR);
56 __raw_writew(imr & ~(0x1 << index), MCF_MBAR + MCFSIM_IMR);
57}
58
59void mcf_maskimr(unsigned int mask)
60{
61 u16 imr;
62 imr = __raw_readw(MCF_MBAR + MCFSIM_IMR);
63 imr |= mask;
64 __raw_writew(imr, MCF_MBAR + MCFSIM_IMR);
65}
66
67#else
68
69void mcf_setimr(int index)
70{
71 u32 imr;
72 imr = __raw_readl(MCF_MBAR + MCFSIM_IMR);
73 __raw_writel(imr | (0x1 << index), MCF_MBAR + MCFSIM_IMR);
74}
75
76void mcf_clrimr(int index)
77{
78 u32 imr;
79 imr = __raw_readl(MCF_MBAR + MCFSIM_IMR);
80 __raw_writel(imr & ~(0x1 << index), MCF_MBAR + MCFSIM_IMR);
81}
82
83void mcf_maskimr(unsigned int mask)
84{
85 u32 imr;
86 imr = __raw_readl(MCF_MBAR + MCFSIM_IMR);
87 imr |= mask;
88 __raw_writel(imr, MCF_MBAR + MCFSIM_IMR);
89}
90
91#endif
92
93/*
94 * Interrupts can be "vectored" on the ColdFire cores that support this old
95 * interrupt controller. That is, the device raising the interrupt can also
96 * supply the vector number to interrupt through. The AVR register of the
97 * interrupt controller enables or disables this for each external interrupt,
98 * so provide generic support for this. Setting this up is out-of-band for
99 * the interrupt system API's, and needs to be done by the driver that
100 * supports this device. Very few devices actually use this.
101 */
102void mcf_autovector(int irq)
103{
104#ifdef MCFSIM_AVR
105 if ((irq >= EIRQ1) && (irq <= EIRQ7)) {
106 u8 avec;
107 avec = __raw_readb(MCF_MBAR + MCFSIM_AVR);
108 avec |= (0x1 << (irq - EIRQ1 + 1));
109 __raw_writeb(avec, MCF_MBAR + MCFSIM_AVR);
110 }
111#endif
112}
113
114static void intc_irq_mask(struct irq_data *d)
115{
116 if (mcf_irq2imr[d->irq])
117 mcf_setimr(mcf_irq2imr[d->irq]);
118}
119
120static void intc_irq_unmask(struct irq_data *d)
121{
122 if (mcf_irq2imr[d->irq])
123 mcf_clrimr(mcf_irq2imr[d->irq]);
124}
125
126static int intc_irq_set_type(struct irq_data *d, unsigned int type)
127{
128 return 0;
129}
130
131static struct irq_chip intc_irq_chip = {
132 .name = "CF-INTC",
133 .irq_mask = intc_irq_mask,
134 .irq_unmask = intc_irq_unmask,
135 .irq_set_type = intc_irq_set_type,
136};
137
138void __init init_IRQ(void)
139{
140 int irq;
141
142 init_vectors();
143 mcf_maskimr(0xffffffff);
144
145 for (irq = 0; (irq < NR_IRQS); irq++) {
146 irq_set_chip(irq, &intc_irq_chip);
147 irq_set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH);
148 irq_set_handler(irq, handle_level_irq);
149 }
150}
151
diff --git a/arch/m68k/platform/coldfire/pinmux.c b/arch/m68k/platform/coldfire/pinmux.c
new file mode 100644
index 000000000000..8c62b825939f
--- /dev/null
+++ b/arch/m68k/platform/coldfire/pinmux.c
@@ -0,0 +1,28 @@
1/*
2 * Coldfire generic GPIO pinmux support.
3 *
4 * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#include <linux/kernel.h>
18
19#include <asm/pinmux.h>
20
21int mcf_pinmux_request(unsigned pinmux, unsigned func)
22{
23 return 0;
24}
25
26void mcf_pinmux_release(unsigned pinmux, unsigned func)
27{
28}
diff --git a/arch/m68k/platform/coldfire/pit.c b/arch/m68k/platform/coldfire/pit.c
new file mode 100644
index 000000000000..c2b980926bec
--- /dev/null
+++ b/arch/m68k/platform/coldfire/pit.c
@@ -0,0 +1,169 @@
1/***************************************************************************/
2
3/*
4 * pit.c -- Freescale ColdFire PIT timer. Currently this type of
5 * hardware timer only exists in the Freescale ColdFire
6 * 5270/5271, 5282 and 5208 CPUs. No doubt newer ColdFire
7 * family members will probably use it too.
8 *
9 * Copyright (C) 1999-2008, Greg Ungerer (gerg@snapgear.com)
10 * Copyright (C) 2001-2004, SnapGear Inc. (www.snapgear.com)
11 */
12
13/***************************************************************************/
14
15#include <linux/kernel.h>
16#include <linux/sched.h>
17#include <linux/param.h>
18#include <linux/init.h>
19#include <linux/interrupt.h>
20#include <linux/irq.h>
21#include <linux/clockchips.h>
22#include <asm/machdep.h>
23#include <asm/io.h>
24#include <asm/coldfire.h>
25#include <asm/mcfpit.h>
26#include <asm/mcfsim.h>
27
28/***************************************************************************/
29
30/*
31 * By default use timer1 as the system clock timer.
32 */
33#define FREQ ((MCF_CLK / 2) / 64)
34#define TA(a) (MCFPIT_BASE1 + (a))
35#define PIT_CYCLES_PER_JIFFY (FREQ / HZ)
36
37static u32 pit_cnt;
38
39/*
40 * Initialize the PIT timer.
41 *
42 * This is also called after resume to bring the PIT into operation again.
43 */
44
45static void init_cf_pit_timer(enum clock_event_mode mode,
46 struct clock_event_device *evt)
47{
48 switch (mode) {
49 case CLOCK_EVT_MODE_PERIODIC:
50
51 __raw_writew(MCFPIT_PCSR_DISABLE, TA(MCFPIT_PCSR));
52 __raw_writew(PIT_CYCLES_PER_JIFFY, TA(MCFPIT_PMR));
53 __raw_writew(MCFPIT_PCSR_EN | MCFPIT_PCSR_PIE | \
54 MCFPIT_PCSR_OVW | MCFPIT_PCSR_RLD | \
55 MCFPIT_PCSR_CLK64, TA(MCFPIT_PCSR));
56 break;
57
58 case CLOCK_EVT_MODE_SHUTDOWN:
59 case CLOCK_EVT_MODE_UNUSED:
60
61 __raw_writew(MCFPIT_PCSR_DISABLE, TA(MCFPIT_PCSR));
62 break;
63
64 case CLOCK_EVT_MODE_ONESHOT:
65
66 __raw_writew(MCFPIT_PCSR_DISABLE, TA(MCFPIT_PCSR));
67 __raw_writew(MCFPIT_PCSR_EN | MCFPIT_PCSR_PIE | \
68 MCFPIT_PCSR_OVW | MCFPIT_PCSR_CLK64, \
69 TA(MCFPIT_PCSR));
70 break;
71
72 case CLOCK_EVT_MODE_RESUME:
73 /* Nothing to do here */
74 break;
75 }
76}
77
78/*
79 * Program the next event in oneshot mode
80 *
81 * Delta is given in PIT ticks
82 */
83static int cf_pit_next_event(unsigned long delta,
84 struct clock_event_device *evt)
85{
86 __raw_writew(delta, TA(MCFPIT_PMR));
87 return 0;
88}
89
90struct clock_event_device cf_pit_clockevent = {
91 .name = "pit",
92 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
93 .set_mode = init_cf_pit_timer,
94 .set_next_event = cf_pit_next_event,
95 .shift = 32,
96 .irq = MCFINT_VECBASE + MCFINT_PIT1,
97};
98
99
100
101/***************************************************************************/
102
103static irqreturn_t pit_tick(int irq, void *dummy)
104{
105 struct clock_event_device *evt = &cf_pit_clockevent;
106 u16 pcsr;
107
108 /* Reset the ColdFire timer */
109 pcsr = __raw_readw(TA(MCFPIT_PCSR));
110 __raw_writew(pcsr | MCFPIT_PCSR_PIF, TA(MCFPIT_PCSR));
111
112 pit_cnt += PIT_CYCLES_PER_JIFFY;
113 evt->event_handler(evt);
114 return IRQ_HANDLED;
115}
116
117/***************************************************************************/
118
119static struct irqaction pit_irq = {
120 .name = "timer",
121 .flags = IRQF_DISABLED | IRQF_TIMER,
122 .handler = pit_tick,
123};
124
125/***************************************************************************/
126
127static cycle_t pit_read_clk(struct clocksource *cs)
128{
129 unsigned long flags;
130 u32 cycles;
131 u16 pcntr;
132
133 local_irq_save(flags);
134 pcntr = __raw_readw(TA(MCFPIT_PCNTR));
135 cycles = pit_cnt;
136 local_irq_restore(flags);
137
138 return cycles + PIT_CYCLES_PER_JIFFY - pcntr;
139}
140
141/***************************************************************************/
142
143static struct clocksource pit_clk = {
144 .name = "pit",
145 .rating = 100,
146 .read = pit_read_clk,
147 .shift = 20,
148 .mask = CLOCKSOURCE_MASK(32),
149};
150
151/***************************************************************************/
152
153void hw_timer_init(void)
154{
155 cf_pit_clockevent.cpumask = cpumask_of(smp_processor_id());
156 cf_pit_clockevent.mult = div_sc(FREQ, NSEC_PER_SEC, 32);
157 cf_pit_clockevent.max_delta_ns =
158 clockevent_delta2ns(0xFFFF, &cf_pit_clockevent);
159 cf_pit_clockevent.min_delta_ns =
160 clockevent_delta2ns(0x3f, &cf_pit_clockevent);
161 clockevents_register_device(&cf_pit_clockevent);
162
163 setup_irq(MCFINT_VECBASE + MCFINT_PIT1, &pit_irq);
164
165 pit_clk.mult = clocksource_hz2mult(FREQ, pit_clk.shift);
166 clocksource_register(&pit_clk);
167}
168
169/***************************************************************************/
diff --git a/arch/m68k/platform/coldfire/sltimers.c b/arch/m68k/platform/coldfire/sltimers.c
new file mode 100644
index 000000000000..6a85daf9a7fd
--- /dev/null
+++ b/arch/m68k/platform/coldfire/sltimers.c
@@ -0,0 +1,145 @@
1/***************************************************************************/
2
3/*
4 * sltimers.c -- generic ColdFire slice timer support.
5 *
6 * Copyright (C) 2009-2010, Philippe De Muyter <phdm@macqel.be>
7 * based on
8 * timers.c -- generic ColdFire hardware timer support.
9 * Copyright (C) 1999-2008, Greg Ungerer <gerg@snapgear.com>
10 */
11
12/***************************************************************************/
13
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/sched.h>
17#include <linux/interrupt.h>
18#include <linux/irq.h>
19#include <linux/profile.h>
20#include <linux/clocksource.h>
21#include <asm/io.h>
22#include <asm/traps.h>
23#include <asm/machdep.h>
24#include <asm/coldfire.h>
25#include <asm/mcfslt.h>
26#include <asm/mcfsim.h>
27
28/***************************************************************************/
29
30#ifdef CONFIG_HIGHPROFILE
31
32/*
33 * By default use Slice Timer 1 as the profiler clock timer.
34 */
35#define PA(a) (MCF_MBAR + MCFSLT_TIMER1 + (a))
36
37/*
38 * Choose a reasonably fast profile timer. Make it an odd value to
39 * try and get good coverage of kernel operations.
40 */
41#define PROFILEHZ 1013
42
43irqreturn_t mcfslt_profile_tick(int irq, void *dummy)
44{
45 /* Reset Slice Timer 1 */
46 __raw_writel(MCFSLT_SSR_BE | MCFSLT_SSR_TE, PA(MCFSLT_SSR));
47 if (current->pid)
48 profile_tick(CPU_PROFILING);
49 return IRQ_HANDLED;
50}
51
52static struct irqaction mcfslt_profile_irq = {
53 .name = "profile timer",
54 .flags = IRQF_DISABLED | IRQF_TIMER,
55 .handler = mcfslt_profile_tick,
56};
57
58void mcfslt_profile_init(void)
59{
60 printk(KERN_INFO "PROFILE: lodging TIMER 1 @ %dHz as profile timer\n",
61 PROFILEHZ);
62
63 setup_irq(MCF_IRQ_PROFILER, &mcfslt_profile_irq);
64
65 /* Set up TIMER 2 as high speed profile clock */
66 __raw_writel(MCF_BUSCLK / PROFILEHZ - 1, PA(MCFSLT_STCNT));
67 __raw_writel(MCFSLT_SCR_RUN | MCFSLT_SCR_IEN | MCFSLT_SCR_TEN,
68 PA(MCFSLT_SCR));
69
70}
71
72#endif /* CONFIG_HIGHPROFILE */
73
74/***************************************************************************/
75
76/*
77 * By default use Slice Timer 0 as the system clock timer.
78 */
79#define TA(a) (MCF_MBAR + MCFSLT_TIMER0 + (a))
80
81static u32 mcfslt_cycles_per_jiffy;
82static u32 mcfslt_cnt;
83
84static irqreturn_t mcfslt_tick(int irq, void *dummy)
85{
86 /* Reset Slice Timer 0 */
87 __raw_writel(MCFSLT_SSR_BE | MCFSLT_SSR_TE, TA(MCFSLT_SSR));
88 mcfslt_cnt += mcfslt_cycles_per_jiffy;
89 return arch_timer_interrupt(irq, dummy);
90}
91
92static struct irqaction mcfslt_timer_irq = {
93 .name = "timer",
94 .flags = IRQF_DISABLED | IRQF_TIMER,
95 .handler = mcfslt_tick,
96};
97
98static cycle_t mcfslt_read_clk(struct clocksource *cs)
99{
100 unsigned long flags;
101 u32 cycles;
102 u16 scnt;
103
104 local_irq_save(flags);
105 scnt = __raw_readl(TA(MCFSLT_SCNT));
106 cycles = mcfslt_cnt;
107 local_irq_restore(flags);
108
109 /* subtract because slice timers count down */
110 return cycles - scnt;
111}
112
113static struct clocksource mcfslt_clk = {
114 .name = "slt",
115 .rating = 250,
116 .read = mcfslt_read_clk,
117 .shift = 20,
118 .mask = CLOCKSOURCE_MASK(32),
119 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
120};
121
122void hw_timer_init(void)
123{
124 mcfslt_cycles_per_jiffy = MCF_BUSCLK / HZ;
125 /*
126 * The coldfire slice timer (SLT) runs from STCNT to 0 included,
127 * then STCNT again and so on. It counts thus actually
128 * STCNT + 1 steps for 1 tick, not STCNT. So if you want
129 * n cycles, initialize STCNT with n - 1.
130 */
131 __raw_writel(mcfslt_cycles_per_jiffy - 1, TA(MCFSLT_STCNT));
132 __raw_writel(MCFSLT_SCR_RUN | MCFSLT_SCR_IEN | MCFSLT_SCR_TEN,
133 TA(MCFSLT_SCR));
134 /* initialize mcfslt_cnt knowing that slice timers count down */
135 mcfslt_cnt = mcfslt_cycles_per_jiffy;
136
137 setup_irq(MCF_IRQ_TIMER, &mcfslt_timer_irq);
138
139 mcfslt_clk.mult = clocksource_hz2mult(MCF_BUSCLK, mcfslt_clk.shift);
140 clocksource_register(&mcfslt_clk);
141
142#ifdef CONFIG_HIGHPROFILE
143 mcfslt_profile_init();
144#endif
145}
diff --git a/arch/m68k/platform/coldfire/timers.c b/arch/m68k/platform/coldfire/timers.c
new file mode 100644
index 000000000000..60242f65fea9
--- /dev/null
+++ b/arch/m68k/platform/coldfire/timers.c
@@ -0,0 +1,174 @@
1/***************************************************************************/
2
3/*
4 * timers.c -- generic ColdFire hardware timer support.
5 *
6 * Copyright (C) 1999-2008, Greg Ungerer <gerg@snapgear.com>
7 */
8
9/***************************************************************************/
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/sched.h>
14#include <linux/interrupt.h>
15#include <linux/irq.h>
16#include <linux/profile.h>
17#include <linux/clocksource.h>
18#include <asm/io.h>
19#include <asm/traps.h>
20#include <asm/machdep.h>
21#include <asm/coldfire.h>
22#include <asm/mcftimer.h>
23#include <asm/mcfsim.h>
24
25/***************************************************************************/
26
27/*
28 * By default use timer1 as the system clock timer.
29 */
30#define FREQ (MCF_BUSCLK / 16)
31#define TA(a) (MCFTIMER_BASE1 + (a))
32
33/*
34 * These provide the underlying interrupt vector support.
35 * Unfortunately it is a little different on each ColdFire.
36 */
37void coldfire_profile_init(void);
38
39#if defined(CONFIG_M532x)
40#define __raw_readtrr __raw_readl
41#define __raw_writetrr __raw_writel
42#else
43#define __raw_readtrr __raw_readw
44#define __raw_writetrr __raw_writew
45#endif
46
47static u32 mcftmr_cycles_per_jiffy;
48static u32 mcftmr_cnt;
49
50/***************************************************************************/
51
52static irqreturn_t mcftmr_tick(int irq, void *dummy)
53{
54 /* Reset the ColdFire timer */
55 __raw_writeb(MCFTIMER_TER_CAP | MCFTIMER_TER_REF, TA(MCFTIMER_TER));
56
57 mcftmr_cnt += mcftmr_cycles_per_jiffy;
58 return arch_timer_interrupt(irq, dummy);
59}
60
61/***************************************************************************/
62
63static struct irqaction mcftmr_timer_irq = {
64 .name = "timer",
65 .flags = IRQF_DISABLED | IRQF_TIMER,
66 .handler = mcftmr_tick,
67};
68
69/***************************************************************************/
70
71static cycle_t mcftmr_read_clk(struct clocksource *cs)
72{
73 unsigned long flags;
74 u32 cycles;
75 u16 tcn;
76
77 local_irq_save(flags);
78 tcn = __raw_readw(TA(MCFTIMER_TCN));
79 cycles = mcftmr_cnt;
80 local_irq_restore(flags);
81
82 return cycles + tcn;
83}
84
85/***************************************************************************/
86
87static struct clocksource mcftmr_clk = {
88 .name = "tmr",
89 .rating = 250,
90 .read = mcftmr_read_clk,
91 .shift = 20,
92 .mask = CLOCKSOURCE_MASK(32),
93 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
94};
95
96/***************************************************************************/
97
98void hw_timer_init(void)
99{
100 __raw_writew(MCFTIMER_TMR_DISABLE, TA(MCFTIMER_TMR));
101 mcftmr_cycles_per_jiffy = FREQ / HZ;
102 /*
103 * The coldfire timer runs from 0 to TRR included, then 0
104 * again and so on. It counts thus actually TRR + 1 steps
105 * for 1 tick, not TRR. So if you want n cycles,
106 * initialize TRR with n - 1.
107 */
108 __raw_writetrr(mcftmr_cycles_per_jiffy - 1, TA(MCFTIMER_TRR));
109 __raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 |
110 MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, TA(MCFTIMER_TMR));
111
112 mcftmr_clk.mult = clocksource_hz2mult(FREQ, mcftmr_clk.shift);
113 clocksource_register(&mcftmr_clk);
114
115 setup_irq(MCF_IRQ_TIMER, &mcftmr_timer_irq);
116
117#ifdef CONFIG_HIGHPROFILE
118 coldfire_profile_init();
119#endif
120}
121
122/***************************************************************************/
123#ifdef CONFIG_HIGHPROFILE
124/***************************************************************************/
125
126/*
127 * By default use timer2 as the profiler clock timer.
128 */
129#define PA(a) (MCFTIMER_BASE2 + (a))
130
131/*
132 * Choose a reasonably fast profile timer. Make it an odd value to
133 * try and get good coverage of kernel operations.
134 */
135#define PROFILEHZ 1013
136
137/*
138 * Use the other timer to provide high accuracy profiling info.
139 */
140irqreturn_t coldfire_profile_tick(int irq, void *dummy)
141{
142 /* Reset ColdFire timer2 */
143 __raw_writeb(MCFTIMER_TER_CAP | MCFTIMER_TER_REF, PA(MCFTIMER_TER));
144 if (current->pid)
145 profile_tick(CPU_PROFILING);
146 return IRQ_HANDLED;
147}
148
149/***************************************************************************/
150
151static struct irqaction coldfire_profile_irq = {
152 .name = "profile timer",
153 .flags = IRQF_DISABLED | IRQF_TIMER,
154 .handler = coldfire_profile_tick,
155};
156
157void coldfire_profile_init(void)
158{
159 printk(KERN_INFO "PROFILE: lodging TIMER2 @ %dHz as profile timer\n",
160 PROFILEHZ);
161
162 /* Set up TIMER 2 as high speed profile clock */
163 __raw_writew(MCFTIMER_TMR_DISABLE, PA(MCFTIMER_TMR));
164
165 __raw_writetrr(((MCF_BUSCLK / 16) / PROFILEHZ), PA(MCFTIMER_TRR));
166 __raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 |
167 MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, PA(MCFTIMER_TMR));
168
169 setup_irq(MCF_IRQ_PROFILER, &coldfire_profile_irq);
170}
171
172/***************************************************************************/
173#endif /* CONFIG_HIGHPROFILE */
174/***************************************************************************/
diff --git a/arch/m68k/platform/coldfire/vectors.c b/arch/m68k/platform/coldfire/vectors.c
new file mode 100644
index 000000000000..a21d3f870b7a
--- /dev/null
+++ b/arch/m68k/platform/coldfire/vectors.c
@@ -0,0 +1,80 @@
1/***************************************************************************/
2
3/*
4 * linux/arch/m68knommu/platform/coldfire/vectors.c
5 *
6 * Copyright (C) 1999-2007, Greg Ungerer <gerg@snapgear.com>
7 */
8
9/***************************************************************************/
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/irq.h>
14#include <asm/traps.h>
15#include <asm/machdep.h>
16#include <asm/coldfire.h>
17#include <asm/mcfsim.h>
18#include <asm/mcfwdebug.h>
19
20/***************************************************************************/
21
22#ifdef TRAP_DBG_INTERRUPT
23
24asmlinkage void dbginterrupt_c(struct frame *fp)
25{
26 extern void dump(struct pt_regs *fp);
27 printk(KERN_DEBUG "%s(%d): BUS ERROR TRAP\n", __FILE__, __LINE__);
28 dump((struct pt_regs *) fp);
29 asm("halt");
30}
31
32#endif
33
34/***************************************************************************/
35
36extern e_vector *_ramvec;
37
38void set_evector(int vecnum, void (*handler)(void))
39{
40 if (vecnum >= 0 && vecnum <= 255)
41 _ramvec[vecnum] = handler;
42}
43
44/***************************************************************************/
45
46/* Assembler routines */
47asmlinkage void buserr(void);
48asmlinkage void trap(void);
49asmlinkage void system_call(void);
50asmlinkage void inthandler(void);
51
52void __init init_vectors(void)
53{
54 int i;
55
56 /*
57 * There is a common trap handler and common interrupt
58 * handler that handle almost every vector. We treat
59 * the system call and bus error special, they get their
60 * own first level handlers.
61 */
62 for (i = 3; (i <= 23); i++)
63 _ramvec[i] = trap;
64 for (i = 33; (i <= 63); i++)
65 _ramvec[i] = trap;
66 for (i = 24; (i <= 31); i++)
67 _ramvec[i] = inthandler;
68 for (i = 64; (i < 255); i++)
69 _ramvec[i] = inthandler;
70 _ramvec[255] = 0;
71
72 _ramvec[2] = buserr;
73 _ramvec[32] = system_call;
74
75#ifdef TRAP_DBG_INTERRUPT
76 _ramvec[12] = dbginterrupt;
77#endif
78}
79
80/***************************************************************************/
diff --git a/arch/m68k/q40/README b/arch/m68k/q40/README
index f877b7249790..b26d5f55e91d 100644
--- a/arch/m68k/q40/README
+++ b/arch/m68k/q40/README
@@ -89,7 +89,7 @@ The main interrupt register IIRQ_REG will indicate whether an IRQ was internal
89or from some ISA devices, EIRQ_REG can distinguish up to 8 ISA IRQs. 89or from some ISA devices, EIRQ_REG can distinguish up to 8 ISA IRQs.
90 90
91The Q40 custom chip is programmable to provide 2 periodic timers: 91The Q40 custom chip is programmable to provide 2 periodic timers:
92 - 50 or 200 Hz - level 2, !!THIS CANT BE DISABLED!! 92 - 50 or 200 Hz - level 2, !!THIS CAN'T BE DISABLED!!
93 - 10 or 20 KHz - level 4, used for dma-sound 93 - 10 or 20 KHz - level 4, used for dma-sound
94 94
95Linux uses the 200 Hz interrupt for timer and beep by default. 95Linux uses the 200 Hz interrupt for timer and beep by default.