Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu:
  arch/m68knommu/platform/68360/commproc.c: Checkpatch cleanup
  arch/m68knommu/mm/fault.c: Checkpatch cleanup
  m68knommu: improve short help of m68knommu/Kconfig/RAMSIZE for '0' case
  m68knommu: remove un-used mcfsmc.h
  m68knommu: add smc91x support for ColdFire NETtel boards
  m68knommu: add smc91x support to ColdFire 5249 platform
  m68knommu: remove size limit on non-MMU TASK_SIZE
  m68knommu: fix broken use of BUAD_TABLE_SIZE in 68328serial driver
  m68knommu: Coldfire QSPI platform support

9 files changed, 85 insertions, 253 deletions

diff --git a/arch/m68k/include/asm/m520xsim.h b/arch/m68k/include/asm/m520xsim.h
index ed2b69b96805..db824a4b136e 100644
--- a/arch/m68k/include/asm/m520xsim.h
+++ b/arch/m68k/include/asm/m520xsim.h
@@ -113,6 +113,7 @@
 
 #define MCF_GPIO_PAR_UART                   (0xA4036)
 #define MCF_GPIO_PAR_FECI2C                 (0xA4033)
+#define MCF_GPIO_PAR_QSPI                   (0xA4034)
 #define MCF_GPIO_PAR_FEC                    (0xA4038)
 
 #define MCF_GPIO_PAR_UART_PAR_URXD0         (0x0001)
diff --git a/arch/m68k/include/asm/m523xsim.h b/arch/m68k/include/asm/m523xsim.h
index a34894cf8e6f..e8d06b24a48e 100644
--- a/arch/m68k/include/asm/m523xsim.h
+++ b/arch/m68k/include/asm/m523xsim.h
@@ -127,5 +127,10 @@
 #define MCFGPIO_IRQ_MAX                 8
 #define MCFGPIO_IRQ_VECBASE             MCFINT_VECBASE
 
+/*
+ * Pin Assignment
+*/
+#define MCFGPIO_PAR_QSPI        (MCF_IPSBAR + 0x10004A)
+#define MCFGPIO_PAR_TIMER       (MCF_IPSBAR + 0x10004C)
 /****************************************************************************/
 #endif  /* m523xsim_h */
diff --git a/arch/m68k/include/asm/m5249sim.h b/arch/m68k/include/asm/m5249sim.h
index 14bce877ed88..79b7b402f3c9 100644
--- a/arch/m68k/include/asm/m5249sim.h
+++ b/arch/m68k/include/asm/m5249sim.h
@@ -69,10 +69,12 @@
 #define MCFSIM_DMA1ICR          MCFSIM_ICR7     /* DMA 1 ICR */
 #define MCFSIM_DMA2ICR          MCFSIM_ICR8     /* DMA 2 ICR */
 #define MCFSIM_DMA3ICR          MCFSIM_ICR9     /* DMA 3 ICR */
+#define MCFSIM_QSPIICR          MCFSIM_ICR10    /* QSPI ICR */
 
 /*
  *      Define system peripheral IRQ usage.
  */
+#define MCF_IRQ_QSPI            28              /* QSPI, Level 4 */
 #define MCF_IRQ_TIMER           30              /* Timer0, Level 6 */
 #define MCF_IRQ_PROFILER        31              /* Timer1, Level 7 */
 
diff --git a/arch/m68k/include/asm/m527xsim.h b/arch/m68k/include/asm/m527xsim.h
index 453356d72d80..1feb46f108ce 100644
--- a/arch/m68k/include/asm/m527xsim.h
+++ b/arch/m68k/include/asm/m527xsim.h
@@ -31,6 +31,7 @@
 #define MCFINT_UART0            13              /* Interrupt number for UART0 */
 #define MCFINT_UART1            14              /* Interrupt number for UART1 */
 #define MCFINT_UART2            15              /* Interrupt number for UART2 */
+#define MCFINT_QSPI             18              /* Interrupt number for QSPI */
 #define MCFINT_PIT1             36              /* Interrupt number for PIT1 */
 
 /*
@@ -120,6 +121,9 @@
 #define MCFGPIO_PIN_MAX                 100
 #define MCFGPIO_IRQ_MAX                 8
 #define MCFGPIO_IRQ_VECBASE             MCFINT_VECBASE
+
+#define MCFGPIO_PAR_QSPI        (MCF_IPSBAR + 0x10004A)
+#define MCFGPIO_PAR_TIMER       (MCF_IPSBAR + 0x10004C)
 #endif
 
 #ifdef CONFIG_M5275
@@ -212,6 +216,8 @@
 #define MCFGPIO_PIN_MAX                 148
 #define MCFGPIO_IRQ_MAX                 8
 #define MCFGPIO_IRQ_VECBASE             MCFINT_VECBASE
+
+#define MCFGPIO_PAR_QSPI        (MCF_IPSBAR + 0x10007E)
 #endif
 
 /*
@@ -223,6 +229,7 @@
 #define MCFEPORT_EPPDR          (MCF_IPSBAR + 0x130005)
 
 
+
 /*
  *      GPIO pins setups to enable the UARTs.
  */
diff --git a/arch/m68k/include/asm/m528xsim.h b/arch/m68k/include/asm/m528xsim.h
index e2ad1f42b657..891cbedad972 100644
--- a/arch/m68k/include/asm/m528xsim.h
+++ b/arch/m68k/include/asm/m528xsim.h
@@ -29,6 +29,7 @@
 
 #define MCFINT_VECBASE          64              /* Vector base number */
 #define MCFINT_UART0            13              /* Interrupt number for UART0 */
+#define MCFINT_QSPI             18              /* Interrupt number for QSPI */
 #define MCFINT_PIT1             55              /* Interrupt number for PIT1 */
 
 /*
@@ -249,70 +250,4 @@
 #define MCF5282_I2C_I2SR_RXAK   (0x01)  // received acknowledge
 
 
-
-/*********************************************************************
-*
-* Queued Serial Peripheral Interface (QSPI) Module
-*
-*********************************************************************/
-/* Derek - 21 Feb 2005 */
-/* change to the format used in I2C */
-/* Read/Write access macros for general use */
-#define MCF5282_QSPI_QMR        MCF_IPSBAR + 0x0340
-#define MCF5282_QSPI_QDLYR      MCF_IPSBAR + 0x0344
-#define MCF5282_QSPI_QWR        MCF_IPSBAR + 0x0348
-#define MCF5282_QSPI_QIR        MCF_IPSBAR + 0x034C
-#define MCF5282_QSPI_QAR        MCF_IPSBAR + 0x0350
-#define MCF5282_QSPI_QDR        MCF_IPSBAR + 0x0354
-#define MCF5282_QSPI_QCR        MCF_IPSBAR + 0x0354
-
-/* Bit level definitions and macros */
-#define MCF5282_QSPI_QMR_MSTR                           (0x8000)
-#define MCF5282_QSPI_QMR_DOHIE                          (0x4000)
-#define MCF5282_QSPI_QMR_BITS_16                        (0x0000)
-#define MCF5282_QSPI_QMR_BITS_8                         (0x2000)
-#define MCF5282_QSPI_QMR_BITS_9                         (0x2400)
-#define MCF5282_QSPI_QMR_BITS_10                        (0x2800)
-#define MCF5282_QSPI_QMR_BITS_11                        (0x2C00)
-#define MCF5282_QSPI_QMR_BITS_12                        (0x3000)
-#define MCF5282_QSPI_QMR_BITS_13                        (0x3400)
-#define MCF5282_QSPI_QMR_BITS_14                        (0x3800)
-#define MCF5282_QSPI_QMR_BITS_15                        (0x3C00)
-#define MCF5282_QSPI_QMR_CPOL                           (0x0200)
-#define MCF5282_QSPI_QMR_CPHA                           (0x0100)
-#define MCF5282_QSPI_QMR_BAUD(x)                        (((x)&0x00FF))
-
-#define MCF5282_QSPI_QDLYR_SPE                          (0x80)
-#define MCF5282_QSPI_QDLYR_QCD(x)                       (((x)&0x007F)<<8)
-#define MCF5282_QSPI_QDLYR_DTL(x)                       (((x)&0x00FF))
-
-#define MCF5282_QSPI_QWR_HALT                           (0x8000)
-#define MCF5282_QSPI_QWR_WREN                           (0x4000)
-#define MCF5282_QSPI_QWR_WRTO                           (0x2000)
-#define MCF5282_QSPI_QWR_CSIV                           (0x1000)
-#define MCF5282_QSPI_QWR_ENDQP(x)                       (((x)&0x000F)<<8)
-#define MCF5282_QSPI_QWR_CPTQP(x)                       (((x)&0x000F)<<4)
-#define MCF5282_QSPI_QWR_NEWQP(x)                       (((x)&0x000F))
-
-#define MCF5282_QSPI_QIR_WCEFB                          (0x8000)
-#define MCF5282_QSPI_QIR_ABRTB                          (0x4000)
-#define MCF5282_QSPI_QIR_ABRTL                          (0x1000)
-#define MCF5282_QSPI_QIR_WCEFE                          (0x0800)
-#define MCF5282_QSPI_QIR_ABRTE                          (0x0400)
-#define MCF5282_QSPI_QIR_SPIFE                          (0x0100)
-#define MCF5282_QSPI_QIR_WCEF                           (0x0008)
-#define MCF5282_QSPI_QIR_ABRT                           (0x0004)
-#define MCF5282_QSPI_QIR_SPIF                           (0x0001)
-
-#define MCF5282_QSPI_QAR_ADDR(x)                        (((x)&0x003F))
-
-#define MCF5282_QSPI_QDR_COMMAND(x)                     (((x)&0xFF00))
-#define MCF5282_QSPI_QCR_DATA(x)                        (((x)&0x00FF)<<8)
-#define MCF5282_QSPI_QCR_CONT                           (0x8000)
-#define MCF5282_QSPI_QCR_BITSE                          (0x4000)
-#define MCF5282_QSPI_QCR_DT                             (0x2000)
-#define MCF5282_QSPI_QCR_DSCK                           (0x1000)
-#define MCF5282_QSPI_QCR_CS                             (((x)&0x000F)<<8)
-
-/****************************************************************************/
 #endif  /* m528xsim_h */
diff --git a/arch/m68k/include/asm/m532xsim.h b/arch/m68k/include/asm/m532xsim.h
index 36bf15aec9ae..c4bf1c81e3cf 100644
--- a/arch/m68k/include/asm/m532xsim.h
+++ b/arch/m68k/include/asm/m532xsim.h
@@ -17,6 +17,7 @@
 #define MCFINT_UART0        26          /* Interrupt number for UART0 */
 #define MCFINT_UART1        27          /* Interrupt number for UART1 */
 #define MCFINT_UART2        28          /* Interrupt number for UART2 */
+#define MCFINT_QSPI         31          /* Interrupt number for QSPI */
 
 #define MCF_WTM_WCR     MCF_REG16(0xFC098000)
 
diff --git a/arch/m68k/include/asm/mcfqspi.h b/arch/m68k/include/asm/mcfqspi.h
new file mode 100644
index 000000000000..39d90d51111d
--- /dev/null
+++ b/arch/m68k/include/asm/mcfqspi.h
@@ -0,0 +1,64 @@
+/*
+ * Definitions for Freescale Coldfire QSPI module
+ *
+ * Copyright 2010 Steven King <sfking@fdwdc.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+*/
+
+#ifndef mcfqspi_h
+#define mcfqspi_h
+
+#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x)
+#define MCFQSPI_IOBASE          (MCF_IPSBAR + 0x340)
+#elif defined(CONFIG_M5249)
+#define MCFQSPI_IOBASE          (MCF_MBAR + 0x300)
+#elif defined(CONFIG_M520x) || defined(CONFIG_M532x)
+#define MCFQSPI_IOBASE          0xFC058000
+#endif
+#define MCFQSPI_IOSIZE          0x40
+
+/**
+ * struct mcfqspi_cs_control - chip select control for the coldfire qspi driver
+ * @setup: setup the control; allocate gpio's, etc. May be NULL.
+ * @teardown: finish with the control; free gpio's, etc. May be NULL.
+ * @select: output the signals to select the device.  Can not be NULL.
+ * @deselect: output the signals to deselect the device. Can not be NULL.
+ *
+ * The QSPI module has 4 hardware chip selects.  We don't use them.  Instead
+ * platforms are required to supply a mcfqspi_cs_control as a part of the
+ * platform data for each QSPI master controller.  Only the select and
+ * deselect functions are required.
+*/
+struct mcfqspi_cs_control {
+        int     (*setup)(struct mcfqspi_cs_control *);
+        void    (*teardown)(struct mcfqspi_cs_control *);
+        void    (*select)(struct mcfqspi_cs_control *, u8, bool);
+        void    (*deselect)(struct mcfqspi_cs_control *, u8, bool);
+};
+
+/**
+ * struct mcfqspi_platform_data - platform data for the coldfire qspi driver
+ * @bus_num: board specific identifier for this qspi driver.
+ * @num_chipselects: number of chip selects supported by this qspi driver.
+ * @cs_control: platform dependent chip select control.
+*/
+struct mcfqspi_platform_data {
+        s16     bus_num;
+        u16     num_chipselect;
+        struct mcfqspi_cs_control *cs_control;
+};
+
+#endif /* mcfqspi_h */
diff --git a/arch/m68k/include/asm/mcfsmc.h b/arch/m68k/include/asm/mcfsmc.h
deleted file mode 100644
index 527bea5d6788..000000000000
--- a/arch/m68k/include/asm/mcfsmc.h
+++ /dev/null
@@ -1,187 +0,0 @@
-/****************************************************************************/
-
-/*
- *      mcfsmc.h -- SMC ethernet support for ColdFire environments.
- *
- *      (C) Copyright 1999-2002, Greg Ungerer (gerg@snapgear.com)
- *      (C) Copyright 2000, Lineo Inc. (www.lineo.com) 
- */
-
-/****************************************************************************/
-#ifndef mcfsmc_h
-#define mcfsmc_h
-/****************************************************************************/
-
-/*
- *      None of the current ColdFire targets that use the SMC91x111
- *      allow 8 bit accesses. So this code is 16bit access only.
- */
-
-
-#undef  outb
-#undef  inb
-#undef  outw
-#undef  outwd
-#undef  inw     
-#undef  outl
-#undef  inl
-
-#undef  outsb
-#undef  outsw
-#undef  outsl
-#undef  insb
-#undef  insw
-#undef  insl
-
-/*
- *      Re-defines for ColdFire environment... The SMC part is
- *      mapped into memory space, so remap the PC-style in/out
- *      routines to handle that.
- */
-#define outb    smc_outb
-#define inb     smc_inb
-#define outw    smc_outw
-#define outwd   smc_outwd
-#define inw     smc_inw
-#define outl    smc_outl
-#define inl     smc_inl
-
-#define outsb   smc_outsb
-#define outsw   smc_outsw
-#define outsl   smc_outsl
-#define insb    smc_insb
-#define insw    smc_insw
-#define insl    smc_insl
-
-
-static inline int smc_inb(unsigned int addr)
-{
-        register unsigned short w;
-        w = *((volatile unsigned short *) (addr & ~0x1));
-        return(((addr & 0x1) ? w : (w >> 8)) & 0xff);
-}
-
-static inline void smc_outw(unsigned int val, unsigned int addr)
-{
-        *((volatile unsigned short *) addr) = (val << 8) | (val >> 8);
-}
-
-static inline int smc_inw(unsigned int addr)
-{
-        register unsigned short w;
-        w = *((volatile unsigned short *) addr);
-        return(((w << 8) | (w >> 8)) & 0xffff);
-}
-
-static inline void smc_outl(unsigned long val, unsigned int addr)
-{
-        *((volatile unsigned long *) addr) = 
-                ((val << 8) & 0xff000000) | ((val >> 8) & 0x00ff0000) |
-                ((val << 8) & 0x0000ff00) | ((val >> 8) & 0x000000ff);
-}
-
-static inline void smc_outwd(unsigned int val, unsigned int addr)
-{
-        *((volatile unsigned short *) addr) = val;
-}
-
-
-/*
- *      The rep* functions are used to feed the data port with
- *      raw data. So we do not byte swap them when copying.
- */
-
-static inline void smc_insb(unsigned int addr, void *vbuf, int unsigned long len)
-{
-        volatile unsigned short *rp;
-        unsigned short          *buf, *ebuf;
-
-        buf = (unsigned short *) vbuf;
-        rp = (volatile unsigned short *) addr;
-
-        /* Copy as words for as long as possible */
-        for (ebuf = buf + (len >> 1); (buf < ebuf); )
-                *buf++ = *rp;
-
-        /* Lastly, handle left over byte */
-        if (len & 0x1)
-                *((unsigned char *) buf) = (*rp >> 8) & 0xff;
-}
-
-static inline void smc_insw(unsigned int addr, void *vbuf, unsigned long len)
-{
-        volatile unsigned short *rp;
-        unsigned short          *buf, *ebuf;
-
-        buf = (unsigned short *) vbuf;
-        rp = (volatile unsigned short *) addr;
-        for (ebuf = buf + len; (buf < ebuf); )
-                *buf++ = *rp;
-}
-
-static inline void smc_insl(unsigned int addr, void *vbuf, unsigned long len)
-{
-        volatile unsigned long  *rp;
-        unsigned long           *buf, *ebuf;
-
-        buf = (unsigned long *) vbuf;
-        rp = (volatile unsigned long *) addr;
-        for (ebuf = buf + len; (buf < ebuf); )
-                *buf++ = *rp;
-}
-
-static inline void smc_outsw(unsigned int addr, const void *vbuf, unsigned long len)
-{
-        volatile unsigned short *rp;
-        unsigned short          *buf, *ebuf;
-
-        buf = (unsigned short *) vbuf;
-        rp = (volatile unsigned short *) addr;
-        for (ebuf = buf + len; (buf < ebuf); )
-                *rp = *buf++;
-}
-
-static inline void smc_outsl(unsigned int addr, void *vbuf, unsigned long len)
-{
-        volatile unsigned long  *rp;
-        unsigned long           *buf, *ebuf;
-
-        buf = (unsigned long *) vbuf;
-        rp = (volatile unsigned long *) addr;
-        for (ebuf = buf + len; (buf < ebuf); )
-                *rp = *buf++;
-}
-
-
-#ifdef CONFIG_NETtel
-/*
- *      Re-map the address space of at least one of the SMC ethernet
- *      parts. Both parts power up decoding the same address, so we
- *      need to move one of them first, before doing enything else.
- *
- *      We also increase the number of wait states for this part by one.
- */
-
-void smc_remap(unsigned int ioaddr)
-{
-        static int              once = 0;
-        extern unsigned short   ppdata;
-        if (once++ == 0) {
-                *((volatile unsigned short *)MCFSIM_PADDR) = 0x00ec;
-                ppdata |= 0x0080;
-                *((volatile unsigned short *)MCFSIM_PADAT) = ppdata;
-                outw(0x0001, ioaddr + BANK_SELECT);
-                outw(0x0001, ioaddr + BANK_SELECT);
-                outw(0x0067, ioaddr + BASE);
-
-                ppdata &= ~0x0080;
-                *((volatile unsigned short *)MCFSIM_PADAT) = ppdata;
-        }
-        
-        *((volatile unsigned short *)(MCF_MBAR+MCFSIM_CSCR3)) = 0x1180;
-}
-
-#endif
-
-/****************************************************************************/
-#endif  /* mcfsmc_h */
diff --git a/arch/m68k/include/asm/processor.h b/arch/m68k/include/asm/processor.h
index cbd3d4751dd2..7a6a7590cc02 100644
--- a/arch/m68k/include/asm/processor.h
+++ b/arch/m68k/include/asm/processor.h
@@ -44,11 +44,15 @@ static inline void wrusp(unsigned long usp)
  * User space process size: 3.75GB. This is hardcoded into a few places,
  * so don't change it unless you know what you are doing.
  */
+#ifdef CONFIG_MMU
 #ifndef CONFIG_SUN3
 #define TASK_SIZE       (0xF0000000UL)
 #else
 #define TASK_SIZE       (0x0E000000UL)
 #endif
+#else
+#define TASK_SIZE       (0xFFFFFFFFUL)
+#endif
 
 #ifdef __KERNEL__
 #define STACK_TOP       TASK_SIZE