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authorGreg Ungerer <gerg@uclinux.org>2010-11-02 03:40:37 -0400
committerGreg Ungerer <gerg@uclinux.org>2011-01-05 00:19:17 -0500
commit733f31b764061d976a60c5ee454632d9562900ea (patch)
tree7e7d5bceb6d6815c54a4c0ab37dddbd53dbe41a5 /arch/m68k
parent7fc82b655a169039d8a58fde609b5e778573d5ab (diff)
m68knommu: fix clock rate value reported for ColdFire 54xx parts
The instruction timings of the ColdFire 54xx family parts are different to other version 4 parts (or version 2 or 3 parts for that matter too). Move the instruction timing setting into the ColdFire part specific headers, and set the 54xx value appropriately. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k')
-rw-r--r--arch/m68k/include/asm/m5206sim.h3
-rw-r--r--arch/m68k/include/asm/m520xsim.h3
-rw-r--r--arch/m68k/include/asm/m523xsim.h3
-rw-r--r--arch/m68k/include/asm/m5249sim.h3
-rw-r--r--arch/m68k/include/asm/m5272sim.h3
-rw-r--r--arch/m68k/include/asm/m527xsim.h3
-rw-r--r--arch/m68k/include/asm/m528xsim.h3
-rw-r--r--arch/m68k/include/asm/m5307sim.h3
-rw-r--r--arch/m68k/include/asm/m532xsim.h3
-rw-r--r--arch/m68k/include/asm/m5407sim.h3
-rw-r--r--arch/m68k/include/asm/m54xxsim.h5
11 files changed, 23 insertions, 12 deletions
diff --git a/arch/m68k/include/asm/m5206sim.h b/arch/m68k/include/asm/m5206sim.h
index 6cc7a42cc425..b882a210ee6e 100644
--- a/arch/m68k/include/asm/m5206sim.h
+++ b/arch/m68k/include/asm/m5206sim.h
@@ -12,7 +12,8 @@
12#define m5206sim_h 12#define m5206sim_h
13/****************************************************************************/ 13/****************************************************************************/
14 14
15#define CPU_NAME "COLDFIRE(m5206)" 15#define CPU_NAME "COLDFIRE(m5206)"
16#define CPU_INSTR_PER_JIFFY 3
16 17
17/* 18/*
18 * Define the 5206 SIM register set addresses. 19 * Define the 5206 SIM register set addresses.
diff --git a/arch/m68k/include/asm/m520xsim.h b/arch/m68k/include/asm/m520xsim.h
index afa211858ecb..85b39edf41a0 100644
--- a/arch/m68k/include/asm/m520xsim.h
+++ b/arch/m68k/include/asm/m520xsim.h
@@ -11,7 +11,8 @@
11#define m520xsim_h 11#define m520xsim_h
12/****************************************************************************/ 12/****************************************************************************/
13 13
14#define CPU_NAME "COLDFIRE(m520x)" 14#define CPU_NAME "COLDFIRE(m520x)"
15#define CPU_INSTR_PER_JIFFY 3
15 16
16/* 17/*
17 * Define the 520x SIM register set addresses. 18 * Define the 520x SIM register set addresses.
diff --git a/arch/m68k/include/asm/m523xsim.h b/arch/m68k/include/asm/m523xsim.h
index 6a2c90d74d15..9d597dcb29c0 100644
--- a/arch/m68k/include/asm/m523xsim.h
+++ b/arch/m68k/include/asm/m523xsim.h
@@ -11,7 +11,8 @@
11#define m523xsim_h 11#define m523xsim_h
12/****************************************************************************/ 12/****************************************************************************/
13 13
14#define CPU_NAME "COLDFIRE(m523x)" 14#define CPU_NAME "COLDFIRE(m523x)"
15#define CPU_INSTR_PER_JIFFY 3
15 16
16/* 17/*
17 * Define the 523x SIM register set addresses. 18 * Define the 523x SIM register set addresses.
diff --git a/arch/m68k/include/asm/m5249sim.h b/arch/m68k/include/asm/m5249sim.h
index 6c49ed88845c..c107228728db 100644
--- a/arch/m68k/include/asm/m5249sim.h
+++ b/arch/m68k/include/asm/m5249sim.h
@@ -11,7 +11,8 @@
11#define m5249sim_h 11#define m5249sim_h
12/****************************************************************************/ 12/****************************************************************************/
13 13
14#define CPU_NAME "COLDFIRE(m5249)" 14#define CPU_NAME "COLDFIRE(m5249)"
15#define CPU_INSTR_PER_JIFFY 3
15 16
16/* 17/*
17 * Define the 5249 SIM register set addresses. 18 * Define the 5249 SIM register set addresses.
diff --git a/arch/m68k/include/asm/m5272sim.h b/arch/m68k/include/asm/m5272sim.h
index 7edef8fc1920..8cea714dee46 100644
--- a/arch/m68k/include/asm/m5272sim.h
+++ b/arch/m68k/include/asm/m5272sim.h
@@ -12,7 +12,8 @@
12#define m5272sim_h 12#define m5272sim_h
13/****************************************************************************/ 13/****************************************************************************/
14 14
15#define CPU_NAME "COLDFIRE(m5272)" 15#define CPU_NAME "COLDFIRE(m5272)"
16#define CPU_INSTR_PER_JIFFY 3
16 17
17/* 18/*
18 * Define the 5272 SIM register set addresses. 19 * Define the 5272 SIM register set addresses.
diff --git a/arch/m68k/include/asm/m527xsim.h b/arch/m68k/include/asm/m527xsim.h
index 627156a1d96a..5223b71d3432 100644
--- a/arch/m68k/include/asm/m527xsim.h
+++ b/arch/m68k/include/asm/m527xsim.h
@@ -11,7 +11,8 @@
11#define m527xsim_h 11#define m527xsim_h
12/****************************************************************************/ 12/****************************************************************************/
13 13
14#define CPU_NAME "COLDFIRE(m527x)" 14#define CPU_NAME "COLDFIRE(m527x)"
15#define CPU_INSTR_PER_JIFFY 3
15 16
16 17
17/* 18/*
diff --git a/arch/m68k/include/asm/m528xsim.h b/arch/m68k/include/asm/m528xsim.h
index 03a6d576787c..4e35f970f662 100644
--- a/arch/m68k/include/asm/m528xsim.h
+++ b/arch/m68k/include/asm/m528xsim.h
@@ -11,7 +11,8 @@
11#define m528xsim_h 11#define m528xsim_h
12/****************************************************************************/ 12/****************************************************************************/
13 13
14#define CPU_NAME "COLDFIRE(m528x)" 14#define CPU_NAME "COLDFIRE(m528x)"
15#define CPU_INSTR_PER_JIFFY 3
15 16
16/* 17/*
17 * Define the 5280/5282 SIM register set addresses. 18 * Define the 5280/5282 SIM register set addresses.
diff --git a/arch/m68k/include/asm/m5307sim.h b/arch/m68k/include/asm/m5307sim.h
index 3e06b8379a49..008f36bd66c3 100644
--- a/arch/m68k/include/asm/m5307sim.h
+++ b/arch/m68k/include/asm/m5307sim.h
@@ -14,7 +14,8 @@
14#define m5307sim_h 14#define m5307sim_h
15/****************************************************************************/ 15/****************************************************************************/
16 16
17#define CPU_NAME "COLDFIRE(m5307)" 17#define CPU_NAME "COLDFIRE(m5307)"
18#define CPU_INSTR_PER_JIFFY 3
18 19
19/* 20/*
20 * Define the 5307 SIM register set addresses. 21 * Define the 5307 SIM register set addresses.
diff --git a/arch/m68k/include/asm/m532xsim.h b/arch/m68k/include/asm/m532xsim.h
index 9f4688bcc454..b8126d3253e1 100644
--- a/arch/m68k/include/asm/m532xsim.h
+++ b/arch/m68k/include/asm/m532xsim.h
@@ -9,7 +9,8 @@
9#define m532xsim_h 9#define m532xsim_h
10/****************************************************************************/ 10/****************************************************************************/
11 11
12#define CPU_NAME "COLDFIRE(m532x)" 12#define CPU_NAME "COLDFIRE(m532x)"
13#define CPU_INSTR_PER_JIFFY 3
13 14
14#define MCF_REG32(x) (*(volatile unsigned long *)(x)) 15#define MCF_REG32(x) (*(volatile unsigned long *)(x))
15#define MCF_REG16(x) (*(volatile unsigned short *)(x)) 16#define MCF_REG16(x) (*(volatile unsigned short *)(x))
diff --git a/arch/m68k/include/asm/m5407sim.h b/arch/m68k/include/asm/m5407sim.h
index 1de44c5affe0..e07d4d8cf31f 100644
--- a/arch/m68k/include/asm/m5407sim.h
+++ b/arch/m68k/include/asm/m5407sim.h
@@ -14,7 +14,8 @@
14#define m5407sim_h 14#define m5407sim_h
15/****************************************************************************/ 15/****************************************************************************/
16 16
17#define CPU_NAME "COLDFIRE(m5407)" 17#define CPU_NAME "COLDFIRE(m5407)"
18#define CPU_INSTR_PER_JIFFY 3
18 19
19/* 20/*
20 * Define the 5407 SIM register set addresses. 21 * Define the 5407 SIM register set addresses.
diff --git a/arch/m68k/include/asm/m54xxsim.h b/arch/m68k/include/asm/m54xxsim.h
index d69a64fd3bde..6072248916ac 100644
--- a/arch/m68k/include/asm/m54xxsim.h
+++ b/arch/m68k/include/asm/m54xxsim.h
@@ -5,9 +5,10 @@
5#ifndef m54xxsim_h 5#ifndef m54xxsim_h
6#define m54xxsim_h 6#define m54xxsim_h
7 7
8#define CPU_NAME "COLDFIRE(m54xx)" 8#define CPU_NAME "COLDFIRE(m54xx)"
9#define CPU_INSTR_PER_JIFFY 2
9 10
10#define MCFINT_VECBASE 64 11#define MCFINT_VECBASE 64
11 12
12/* 13/*
13 * Interrupt Controller Registers 14 * Interrupt Controller Registers