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authorGreg Ungerer <gerg@uclinux.org>2012-09-17 02:51:20 -0400
committerGreg Ungerer <gerg@uclinux.org>2012-09-27 09:34:01 -0400
commitf2f41c68eabfb32574f9088135480618206dd432 (patch)
tree9ad4275732b742d8be36eb862b922d937f491520 /arch/m68k
parent6d8a1393ec700d8621858dd0f3bee2b7e821e9fc (diff)
m68knommu: move ColdFire slice timer address defiens to 54xx header
Move the base address defines of the ColdFire 54xx CPU slice timers into the 54xx specific header (m54xxsim.h). They are CPU specific, and belong with the CPU specific defines. Also make them relative to the MBAR peripheral region, making the define the absolute address. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k')
-rw-r--r--arch/m68k/include/asm/m54xxsim.h6
-rw-r--r--arch/m68k/include/asm/mcfslt.h7
-rw-r--r--arch/m68k/platform/coldfire/sltimers.c4
3 files changed, 8 insertions, 9 deletions
diff --git a/arch/m68k/include/asm/m54xxsim.h b/arch/m68k/include/asm/m54xxsim.h
index d3c5e0dbdadf..d6a50799ff27 100644
--- a/arch/m68k/include/asm/m54xxsim.h
+++ b/arch/m68k/include/asm/m54xxsim.h
@@ -47,6 +47,12 @@
47#define MCF_IRQ_UART3 (MCFINT_VECBASE + 32) 47#define MCF_IRQ_UART3 (MCFINT_VECBASE + 32)
48 48
49/* 49/*
50 * Slice Timer support.
51 */
52#define MCFSLT_TIMER0 (MCF_MBAR + 0x900) /* Base addr TIMER0 */
53#define MCFSLT_TIMER1 (MCF_MBAR + 0x910) /* Base addr TIMER1 */
54
55/*
50 * Generic GPIO support 56 * Generic GPIO support
51 */ 57 */
52#define MCFGPIO_PIN_MAX 0 /* I am too lazy to count */ 58#define MCFGPIO_PIN_MAX 0 /* I am too lazy to count */
diff --git a/arch/m68k/include/asm/mcfslt.h b/arch/m68k/include/asm/mcfslt.h
index d0d0ecba5333..c2314b6f8caa 100644
--- a/arch/m68k/include/asm/mcfslt.h
+++ b/arch/m68k/include/asm/mcfslt.h
@@ -13,13 +13,6 @@
13/****************************************************************************/ 13/****************************************************************************/
14 14
15/* 15/*
16 * Get address specific defines for the 547x.
17 */
18#define MCFSLT_TIMER0 0x900 /* Base address of TIMER0 */
19#define MCFSLT_TIMER1 0x910 /* Base address of TIMER1 */
20
21
22/*
23 * Define the SLT timer register set addresses. 16 * Define the SLT timer register set addresses.
24 */ 17 */
25#define MCFSLT_STCNT 0x00 /* Terminal count */ 18#define MCFSLT_STCNT 0x00 /* Terminal count */
diff --git a/arch/m68k/platform/coldfire/sltimers.c b/arch/m68k/platform/coldfire/sltimers.c
index 2027fc20b876..bb5a25ada848 100644
--- a/arch/m68k/platform/coldfire/sltimers.c
+++ b/arch/m68k/platform/coldfire/sltimers.c
@@ -32,7 +32,7 @@
32/* 32/*
33 * By default use Slice Timer 1 as the profiler clock timer. 33 * By default use Slice Timer 1 as the profiler clock timer.
34 */ 34 */
35#define PA(a) (MCF_MBAR + MCFSLT_TIMER1 + (a)) 35#define PA(a) (MCFSLT_TIMER1 + (a))
36 36
37/* 37/*
38 * Choose a reasonably fast profile timer. Make it an odd value to 38 * Choose a reasonably fast profile timer. Make it an odd value to
@@ -76,7 +76,7 @@ void mcfslt_profile_init(void)
76/* 76/*
77 * By default use Slice Timer 0 as the system clock timer. 77 * By default use Slice Timer 0 as the system clock timer.
78 */ 78 */
79#define TA(a) (MCF_MBAR + MCFSLT_TIMER0 + (a)) 79#define TA(a) (MCFSLT_TIMER0 + (a))
80 80
81static u32 mcfslt_cycles_per_jiffy; 81static u32 mcfslt_cycles_per_jiffy;
82static u32 mcfslt_cnt; 82static u32 mcfslt_cnt;