aboutsummaryrefslogtreecommitdiffstats
path: root/arch/m68k/platform
diff options
context:
space:
mode:
authorPeter Turczak <peter@turczak.de>2011-08-09 00:11:19 -0400
committerGreg Ungerer <gerg@uclinux.org>2011-10-18 00:22:25 -0400
commit89127ed381fb244aa51c1a74ed695a1f3578ef7d (patch)
tree7c0f331b438cb1f56b73bd18e39766274d43cbe5 /arch/m68k/platform
parentf230e80b423f6cb002015ab4771c06a53d5a2287 (diff)
m68knommu: fix problems with SPI/GPIO on ColdFire 520x
The problem has its root in the calculation of the set-port offsets (macro MCFGPIO_SETR() in arch/m68k/include/asm/gpio.h), this assumes that all ports have the same offset from the base port address (MCFGPIO_SETR) which is defined in mcf520xsim.h as an alias of MCFGIO_PSETR_BUSCTL. Because the BUSCTL and BE port do not have a set-register (see MCF5208 Reference Manual Page 13-10, Table 13-3) the offset calculations went wrong. Because the BE and BUSCTL port do not seem useful in these parts, as they lack a set register, I removed them and adapted the gpio chip bases which are also used for the offset-calculations. Now both setting and resetting the chip selects works as expected from userland and from the kernelspace. Signed-off-by: Peter Turczak <peter@turczak.de> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k/platform')
-rw-r--r--arch/m68k/platform/520x/config.c6
-rw-r--r--arch/m68k/platform/520x/gpio.c50
2 files changed, 10 insertions, 46 deletions
diff --git a/arch/m68k/platform/520x/config.c b/arch/m68k/platform/520x/config.c
index 621238f1a219..8a98683f1b15 100644
--- a/arch/m68k/platform/520x/config.c
+++ b/arch/m68k/platform/520x/config.c
@@ -91,9 +91,9 @@ static struct resource m520x_qspi_resources[] = {
91 }, 91 },
92}; 92};
93 93
94#define MCFQSPI_CS0 62 94#define MCFQSPI_CS0 46
95#define MCFQSPI_CS1 63 95#define MCFQSPI_CS1 47
96#define MCFQSPI_CS2 44 96#define MCFQSPI_CS2 27
97 97
98static int m520x_cs_setup(struct mcfqspi_cs_control *cs_control) 98static int m520x_cs_setup(struct mcfqspi_cs_control *cs_control)
99{ 99{
diff --git a/arch/m68k/platform/520x/gpio.c b/arch/m68k/platform/520x/gpio.c
index d757328563d1..9bcc3e4b60c5 100644
--- a/arch/m68k/platform/520x/gpio.c
+++ b/arch/m68k/platform/520x/gpio.c
@@ -38,42 +38,6 @@ static struct mcf_gpio_chip mcf_gpio_chips[] = {
38 }, 38 },
39 { 39 {
40 .gpio_chip = { 40 .gpio_chip = {
41 .label = "BUSCTL",
42 .request = mcf_gpio_request,
43 .free = mcf_gpio_free,
44 .direction_input = mcf_gpio_direction_input,
45 .direction_output = mcf_gpio_direction_output,
46 .get = mcf_gpio_get_value,
47 .set = mcf_gpio_set_value_fast,
48 .base = 8,
49 .ngpio = 4,
50 },
51 .pddr = (void __iomem *) MCFGPIO_PDDR_BUSCTL,
52 .podr = (void __iomem *) MCFGPIO_PODR_BUSCTL,
53 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
54 .setr = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
55 .clrr = (void __iomem *) MCFGPIO_PCLRR_BUSCTL,
56 },
57 {
58 .gpio_chip = {
59 .label = "BE",
60 .request = mcf_gpio_request,
61 .free = mcf_gpio_free,
62 .direction_input = mcf_gpio_direction_input,
63 .direction_output = mcf_gpio_direction_output,
64 .get = mcf_gpio_get_value,
65 .set = mcf_gpio_set_value_fast,
66 .base = 16,
67 .ngpio = 4,
68 },
69 .pddr = (void __iomem *) MCFGPIO_PDDR_BE,
70 .podr = (void __iomem *) MCFGPIO_PODR_BE,
71 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_BE,
72 .setr = (void __iomem *) MCFGPIO_PPDSDR_BE,
73 .clrr = (void __iomem *) MCFGPIO_PCLRR_BE,
74 },
75 {
76 .gpio_chip = {
77 .label = "CS", 41 .label = "CS",
78 .request = mcf_gpio_request, 42 .request = mcf_gpio_request,
79 .free = mcf_gpio_free, 43 .free = mcf_gpio_free,
@@ -81,7 +45,7 @@ static struct mcf_gpio_chip mcf_gpio_chips[] = {
81 .direction_output = mcf_gpio_direction_output, 45 .direction_output = mcf_gpio_direction_output,
82 .get = mcf_gpio_get_value, 46 .get = mcf_gpio_get_value,
83 .set = mcf_gpio_set_value_fast, 47 .set = mcf_gpio_set_value_fast,
84 .base = 25, 48 .base = 9,
85 .ngpio = 3, 49 .ngpio = 3,
86 }, 50 },
87 .pddr = (void __iomem *) MCFGPIO_PDDR_CS, 51 .pddr = (void __iomem *) MCFGPIO_PDDR_CS,
@@ -99,7 +63,7 @@ static struct mcf_gpio_chip mcf_gpio_chips[] = {
99 .direction_output = mcf_gpio_direction_output, 63 .direction_output = mcf_gpio_direction_output,
100 .get = mcf_gpio_get_value, 64 .get = mcf_gpio_get_value,
101 .set = mcf_gpio_set_value_fast, 65 .set = mcf_gpio_set_value_fast,
102 .base = 32, 66 .base = 16,
103 .ngpio = 4, 67 .ngpio = 4,
104 }, 68 },
105 .pddr = (void __iomem *) MCFGPIO_PDDR_FECI2C, 69 .pddr = (void __iomem *) MCFGPIO_PDDR_FECI2C,
@@ -117,7 +81,7 @@ static struct mcf_gpio_chip mcf_gpio_chips[] = {
117 .direction_output = mcf_gpio_direction_output, 81 .direction_output = mcf_gpio_direction_output,
118 .get = mcf_gpio_get_value, 82 .get = mcf_gpio_get_value,
119 .set = mcf_gpio_set_value_fast, 83 .set = mcf_gpio_set_value_fast,
120 .base = 40, 84 .base = 24,
121 .ngpio = 4, 85 .ngpio = 4,
122 }, 86 },
123 .pddr = (void __iomem *) MCFGPIO_PDDR_QSPI, 87 .pddr = (void __iomem *) MCFGPIO_PDDR_QSPI,
@@ -135,7 +99,7 @@ static struct mcf_gpio_chip mcf_gpio_chips[] = {
135 .direction_output = mcf_gpio_direction_output, 99 .direction_output = mcf_gpio_direction_output,
136 .get = mcf_gpio_get_value, 100 .get = mcf_gpio_get_value,
137 .set = mcf_gpio_set_value_fast, 101 .set = mcf_gpio_set_value_fast,
138 .base = 48, 102 .base = 32,
139 .ngpio = 4, 103 .ngpio = 4,
140 }, 104 },
141 .pddr = (void __iomem *) MCFGPIO_PDDR_TIMER, 105 .pddr = (void __iomem *) MCFGPIO_PDDR_TIMER,
@@ -153,7 +117,7 @@ static struct mcf_gpio_chip mcf_gpio_chips[] = {
153 .direction_output = mcf_gpio_direction_output, 117 .direction_output = mcf_gpio_direction_output,
154 .get = mcf_gpio_get_value, 118 .get = mcf_gpio_get_value,
155 .set = mcf_gpio_set_value_fast, 119 .set = mcf_gpio_set_value_fast,
156 .base = 56, 120 .base = 40,
157 .ngpio = 8, 121 .ngpio = 8,
158 }, 122 },
159 .pddr = (void __iomem *) MCFGPIO_PDDR_UART, 123 .pddr = (void __iomem *) MCFGPIO_PDDR_UART,
@@ -171,7 +135,7 @@ static struct mcf_gpio_chip mcf_gpio_chips[] = {
171 .direction_output = mcf_gpio_direction_output, 135 .direction_output = mcf_gpio_direction_output,
172 .get = mcf_gpio_get_value, 136 .get = mcf_gpio_get_value,
173 .set = mcf_gpio_set_value_fast, 137 .set = mcf_gpio_set_value_fast,
174 .base = 64, 138 .base = 48,
175 .ngpio = 8, 139 .ngpio = 8,
176 }, 140 },
177 .pddr = (void __iomem *) MCFGPIO_PDDR_FECH, 141 .pddr = (void __iomem *) MCFGPIO_PDDR_FECH,
@@ -189,7 +153,7 @@ static struct mcf_gpio_chip mcf_gpio_chips[] = {
189 .direction_output = mcf_gpio_direction_output, 153 .direction_output = mcf_gpio_direction_output,
190 .get = mcf_gpio_get_value, 154 .get = mcf_gpio_get_value,
191 .set = mcf_gpio_set_value_fast, 155 .set = mcf_gpio_set_value_fast,
192 .base = 72, 156 .base = 56,
193 .ngpio = 8, 157 .ngpio = 8,
194 }, 158 },
195 .pddr = (void __iomem *) MCFGPIO_PDDR_FECL, 159 .pddr = (void __iomem *) MCFGPIO_PDDR_FECL,
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-21 11:00:12 -0500