diff options
author | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
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committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
commit | 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch) | |
tree | 0bba044c4ce775e45a88a51686b5d9f90697ea9d /arch/m68k/mac/iop.c |
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
Diffstat (limited to 'arch/m68k/mac/iop.c')
-rw-r--r-- | arch/m68k/mac/iop.c | 714 |
1 files changed, 714 insertions, 0 deletions
diff --git a/arch/m68k/mac/iop.c b/arch/m68k/mac/iop.c new file mode 100644 index 000000000000..d889ba80ccdc --- /dev/null +++ b/arch/m68k/mac/iop.c | |||
@@ -0,0 +1,714 @@ | |||
1 | /* | ||
2 | * I/O Processor (IOP) management | ||
3 | * Written and (C) 1999 by Joshua M. Thompson (funaho@jurai.org) | ||
4 | * | ||
5 | * Redistribution and use in source and binary forms, with or without | ||
6 | * modification, are permitted provided that the following conditions | ||
7 | * are met: | ||
8 | * 1. Redistributions of source code must retain the above copyright | ||
9 | * notice and this list of conditions. | ||
10 | * 2. Redistributions in binary form must reproduce the above copyright | ||
11 | * notice and this list of conditions in the documentation and/or other | ||
12 | * materials provided with the distribution. | ||
13 | */ | ||
14 | |||
15 | /* | ||
16 | * The IOP chips are used in the IIfx and some Quadras (900, 950) to manage | ||
17 | * serial and ADB. They are actually a 6502 processor and some glue logic. | ||
18 | * | ||
19 | * 990429 (jmt) - Initial implementation, just enough to knock the SCC IOP | ||
20 | * into compatible mode so nobody has to fiddle with the | ||
21 | * Serial Switch control panel anymore. | ||
22 | * 990603 (jmt) - Added code to grab the correct ISM IOP interrupt for OSS | ||
23 | * and non-OSS machines (at least I hope it's correct on a | ||
24 | * non-OSS machine -- someone with a Q900 or Q950 needs to | ||
25 | * check this.) | ||
26 | * 990605 (jmt) - Rearranged things a bit wrt IOP detection; iop_present is | ||
27 | * gone, IOP base addresses are now in an array and the | ||
28 | * globally-visible functions take an IOP number instead of an | ||
29 | * an actual base address. | ||
30 | * 990610 (jmt) - Finished the message passing framework and it seems to work. | ||
31 | * Sending _definitely_ works; my adb-bus.c mods can send | ||
32 | * messages and receive the MSG_COMPLETED status back from the | ||
33 | * IOP. The trick now is figuring out the message formats. | ||
34 | * 990611 (jmt) - More cleanups. Fixed problem where unclaimed messages on a | ||
35 | * receive channel were never properly acknowledged. Bracketed | ||
36 | * the remaining debug printk's with #ifdef's and disabled | ||
37 | * debugging. I can now type on the console. | ||
38 | * 990612 (jmt) - Copyright notice added. Reworked the way replies are handled. | ||
39 | * It turns out that replies are placed back in the send buffer | ||
40 | * for that channel; messages on the receive channels are always | ||
41 | * unsolicited messages from the IOP (and our replies to them | ||
42 | * should go back in the receive channel.) Also added tracking | ||
43 | * of device names to the listener functions ala the interrupt | ||
44 | * handlers. | ||
45 | * 990729 (jmt) - Added passing of pt_regs structure to IOP handlers. This is | ||
46 | * used by the new unified ADB driver. | ||
47 | * | ||
48 | * TODO: | ||
49 | * | ||
50 | * o Something should be periodically checking iop_alive() to make sure the | ||
51 | * IOP hasn't died. | ||
52 | * o Some of the IOP manager routines need better error checking and | ||
53 | * return codes. Nothing major, just prettying up. | ||
54 | */ | ||
55 | |||
56 | /* | ||
57 | * ----------------------- | ||
58 | * IOP Message Passing 101 | ||
59 | * ----------------------- | ||
60 | * | ||
61 | * The host talks to the IOPs using a rather simple message-passing scheme via | ||
62 | * a shared memory area in the IOP RAM. Each IOP has seven "channels"; each | ||
63 | * channel is conneced to a specific software driver on the IOP. For example | ||
64 | * on the SCC IOP there is one channel for each serial port. Each channel has | ||
65 | * an incoming and and outgoing message queue with a depth of one. | ||
66 | * | ||
67 | * A message is 32 bytes plus a state byte for the channel (MSG_IDLE, MSG_NEW, | ||
68 | * MSG_RCVD, MSG_COMPLETE). To send a message you copy the message into the | ||
69 | * buffer, set the state to MSG_NEW and signal the IOP by setting the IRQ flag | ||
70 | * in the IOP control to 1. The IOP will move the state to MSG_RCVD when it | ||
71 | * receives the message and then to MSG_COMPLETE when the message processing | ||
72 | * has completed. It is the host's responsibility at that point to read the | ||
73 | * reply back out of the send channel buffer and reset the channel state back | ||
74 | * to MSG_IDLE. | ||
75 | * | ||
76 | * To receive message from the IOP the same procedure is used except the roles | ||
77 | * are reversed. That is, the IOP puts message in the channel with a state of | ||
78 | * MSG_NEW, and the host receives the message and move its state to MSG_RCVD | ||
79 | * and then to MSG_COMPLETE when processing is completed and the reply (if any) | ||
80 | * has been placed back in the receive channel. The IOP will then reset the | ||
81 | * channel state to MSG_IDLE. | ||
82 | * | ||
83 | * Two sets of host interrupts are provided, INT0 and INT1. Both appear on one | ||
84 | * interrupt level; they are distinguished by a pair of bits in the IOP status | ||
85 | * register. The IOP will raise INT0 when one or more messages in the send | ||
86 | * channels have gone to the MSG_COMPLETE state and it will raise INT1 when one | ||
87 | * or more messages on the receive channels have gone to the MSG_NEW state. | ||
88 | * | ||
89 | * Since each channel handles only one message we have to implement a small | ||
90 | * interrupt-driven queue on our end. Messages to be sent are placed on the | ||
91 | * queue for sending and contain a pointer to an optional callback function. | ||
92 | * The handler for a message is called when the message state goes to | ||
93 | * MSG_COMPLETE. | ||
94 | * | ||
95 | * For receiving message we maintain a list of handler functions to call when | ||
96 | * a message is received on that IOP/channel combination. The handlers are | ||
97 | * called much like an interrupt handler and are passed a copy of the message | ||
98 | * from the IOP. The message state will be in MSG_RCVD while the handler runs; | ||
99 | * it is the handler's responsibility to call iop_complete_message() when | ||
100 | * finished; this function moves the message state to MSG_COMPLETE and signals | ||
101 | * the IOP. This two-step process is provided to allow the handler to defer | ||
102 | * message processing to a bottom-half handler if the processing will take | ||
103 | * a signifigant amount of time (handlers are called at interrupt time so they | ||
104 | * should execute quickly.) | ||
105 | */ | ||
106 | |||
107 | #include <linux/config.h> | ||
108 | #include <linux/types.h> | ||
109 | #include <linux/kernel.h> | ||
110 | #include <linux/mm.h> | ||
111 | #include <linux/delay.h> | ||
112 | #include <linux/init.h> | ||
113 | #include <linux/proc_fs.h> | ||
114 | #include <linux/interrupt.h> | ||
115 | |||
116 | #include <asm/bootinfo.h> | ||
117 | #include <asm/macintosh.h> | ||
118 | #include <asm/macints.h> | ||
119 | #include <asm/mac_iop.h> | ||
120 | #include <asm/mac_oss.h> | ||
121 | |||
122 | /*#define DEBUG_IOP*/ | ||
123 | |||
124 | /* Set to nonezero if the IOPs are present. Set by iop_init() */ | ||
125 | |||
126 | int iop_scc_present,iop_ism_present; | ||
127 | |||
128 | #ifdef CONFIG_PROC_FS | ||
129 | static int iop_get_proc_info(char *, char **, off_t, int); | ||
130 | #endif /* CONFIG_PROC_FS */ | ||
131 | |||
132 | /* structure for tracking channel listeners */ | ||
133 | |||
134 | struct listener { | ||
135 | const char *devname; | ||
136 | void (*handler)(struct iop_msg *, struct pt_regs *); | ||
137 | }; | ||
138 | |||
139 | /* | ||
140 | * IOP structures for the two IOPs | ||
141 | * | ||
142 | * The SCC IOP controls both serial ports (A and B) as its two functions. | ||
143 | * The ISM IOP controls the SWIM (floppy drive) and ADB. | ||
144 | */ | ||
145 | |||
146 | static volatile struct mac_iop *iop_base[NUM_IOPS]; | ||
147 | |||
148 | /* | ||
149 | * IOP message queues | ||
150 | */ | ||
151 | |||
152 | static struct iop_msg iop_msg_pool[NUM_IOP_MSGS]; | ||
153 | static struct iop_msg *iop_send_queue[NUM_IOPS][NUM_IOP_CHAN]; | ||
154 | static struct listener iop_listeners[NUM_IOPS][NUM_IOP_CHAN]; | ||
155 | |||
156 | irqreturn_t iop_ism_irq(int, void *, struct pt_regs *); | ||
157 | |||
158 | extern void oss_irq_enable(int); | ||
159 | |||
160 | /* | ||
161 | * Private access functions | ||
162 | */ | ||
163 | |||
164 | static __inline__ void iop_loadaddr(volatile struct mac_iop *iop, __u16 addr) | ||
165 | { | ||
166 | iop->ram_addr_lo = addr; | ||
167 | iop->ram_addr_hi = addr >> 8; | ||
168 | } | ||
169 | |||
170 | static __inline__ __u8 iop_readb(volatile struct mac_iop *iop, __u16 addr) | ||
171 | { | ||
172 | iop->ram_addr_lo = addr; | ||
173 | iop->ram_addr_hi = addr >> 8; | ||
174 | return iop->ram_data; | ||
175 | } | ||
176 | |||
177 | static __inline__ void iop_writeb(volatile struct mac_iop *iop, __u16 addr, __u8 data) | ||
178 | { | ||
179 | iop->ram_addr_lo = addr; | ||
180 | iop->ram_addr_hi = addr >> 8; | ||
181 | iop->ram_data = data; | ||
182 | } | ||
183 | |||
184 | static __inline__ void iop_stop(volatile struct mac_iop *iop) | ||
185 | { | ||
186 | iop->status_ctrl &= ~IOP_RUN; | ||
187 | } | ||
188 | |||
189 | static __inline__ void iop_start(volatile struct mac_iop *iop) | ||
190 | { | ||
191 | iop->status_ctrl = IOP_RUN | IOP_AUTOINC; | ||
192 | } | ||
193 | |||
194 | static __inline__ void iop_bypass(volatile struct mac_iop *iop) | ||
195 | { | ||
196 | iop->status_ctrl |= IOP_BYPASS; | ||
197 | } | ||
198 | |||
199 | static __inline__ void iop_interrupt(volatile struct mac_iop *iop) | ||
200 | { | ||
201 | iop->status_ctrl |= IOP_IRQ; | ||
202 | } | ||
203 | |||
204 | static int iop_alive(volatile struct mac_iop *iop) | ||
205 | { | ||
206 | int retval; | ||
207 | |||
208 | retval = (iop_readb(iop, IOP_ADDR_ALIVE) == 0xFF); | ||
209 | iop_writeb(iop, IOP_ADDR_ALIVE, 0); | ||
210 | return retval; | ||
211 | } | ||
212 | |||
213 | static struct iop_msg *iop_alloc_msg(void) | ||
214 | { | ||
215 | int i; | ||
216 | unsigned long flags; | ||
217 | |||
218 | local_irq_save(flags); | ||
219 | |||
220 | for (i = 0 ; i < NUM_IOP_MSGS ; i++) { | ||
221 | if (iop_msg_pool[i].status == IOP_MSGSTATUS_UNUSED) { | ||
222 | iop_msg_pool[i].status = IOP_MSGSTATUS_WAITING; | ||
223 | local_irq_restore(flags); | ||
224 | return &iop_msg_pool[i]; | ||
225 | } | ||
226 | } | ||
227 | |||
228 | local_irq_restore(flags); | ||
229 | return NULL; | ||
230 | } | ||
231 | |||
232 | static void iop_free_msg(struct iop_msg *msg) | ||
233 | { | ||
234 | msg->status = IOP_MSGSTATUS_UNUSED; | ||
235 | } | ||
236 | |||
237 | /* | ||
238 | * This is called by the startup code before anything else. Its purpose | ||
239 | * is to find and initialize the IOPs early in the boot sequence, so that | ||
240 | * the serial IOP can be placed into bypass mode _before_ we try to | ||
241 | * initialize the serial console. | ||
242 | */ | ||
243 | |||
244 | void __init iop_preinit(void) | ||
245 | { | ||
246 | if (macintosh_config->scc_type == MAC_SCC_IOP) { | ||
247 | if (macintosh_config->ident == MAC_MODEL_IIFX) { | ||
248 | iop_base[IOP_NUM_SCC] = (struct mac_iop *) SCC_IOP_BASE_IIFX; | ||
249 | } else { | ||
250 | iop_base[IOP_NUM_SCC] = (struct mac_iop *) SCC_IOP_BASE_QUADRA; | ||
251 | } | ||
252 | iop_base[IOP_NUM_SCC]->status_ctrl = 0x87; | ||
253 | iop_scc_present = 1; | ||
254 | } else { | ||
255 | iop_base[IOP_NUM_SCC] = NULL; | ||
256 | iop_scc_present = 0; | ||
257 | } | ||
258 | if (macintosh_config->adb_type == MAC_ADB_IOP) { | ||
259 | if (macintosh_config->ident == MAC_MODEL_IIFX) { | ||
260 | iop_base[IOP_NUM_ISM] = (struct mac_iop *) ISM_IOP_BASE_IIFX; | ||
261 | } else { | ||
262 | iop_base[IOP_NUM_ISM] = (struct mac_iop *) ISM_IOP_BASE_QUADRA; | ||
263 | } | ||
264 | iop_base[IOP_NUM_ISM]->status_ctrl = 0; | ||
265 | iop_ism_present = 1; | ||
266 | } else { | ||
267 | iop_base[IOP_NUM_ISM] = NULL; | ||
268 | iop_ism_present = 0; | ||
269 | } | ||
270 | } | ||
271 | |||
272 | /* | ||
273 | * Initialize the IOPs, if present. | ||
274 | */ | ||
275 | |||
276 | void __init iop_init(void) | ||
277 | { | ||
278 | int i; | ||
279 | |||
280 | if (iop_scc_present) { | ||
281 | printk("IOP: detected SCC IOP at %p\n", iop_base[IOP_NUM_SCC]); | ||
282 | } | ||
283 | if (iop_ism_present) { | ||
284 | printk("IOP: detected ISM IOP at %p\n", iop_base[IOP_NUM_ISM]); | ||
285 | iop_start(iop_base[IOP_NUM_ISM]); | ||
286 | iop_alive(iop_base[IOP_NUM_ISM]); /* clears the alive flag */ | ||
287 | } | ||
288 | |||
289 | /* Make the whole pool available and empty the queues */ | ||
290 | |||
291 | for (i = 0 ; i < NUM_IOP_MSGS ; i++) { | ||
292 | iop_msg_pool[i].status = IOP_MSGSTATUS_UNUSED; | ||
293 | } | ||
294 | |||
295 | for (i = 0 ; i < NUM_IOP_CHAN ; i++) { | ||
296 | iop_send_queue[IOP_NUM_SCC][i] = 0; | ||
297 | iop_send_queue[IOP_NUM_ISM][i] = 0; | ||
298 | iop_listeners[IOP_NUM_SCC][i].devname = NULL; | ||
299 | iop_listeners[IOP_NUM_SCC][i].handler = NULL; | ||
300 | iop_listeners[IOP_NUM_ISM][i].devname = NULL; | ||
301 | iop_listeners[IOP_NUM_ISM][i].handler = NULL; | ||
302 | } | ||
303 | |||
304 | #if 0 /* Crashing in 2.4 now, not yet sure why. --jmt */ | ||
305 | #ifdef CONFIG_PROC_FS | ||
306 | create_proc_info_entry("mac_iop", 0, &proc_root, iop_get_proc_info); | ||
307 | #endif | ||
308 | #endif | ||
309 | } | ||
310 | |||
311 | /* | ||
312 | * Register the interrupt handler for the IOPs. | ||
313 | * TODO: might be wrong for non-OSS machines. Anyone? | ||
314 | */ | ||
315 | |||
316 | void __init iop_register_interrupts(void) | ||
317 | { | ||
318 | if (iop_ism_present) { | ||
319 | if (oss_present) { | ||
320 | cpu_request_irq(OSS_IRQLEV_IOPISM, iop_ism_irq, | ||
321 | IRQ_FLG_LOCK, "ISM IOP", | ||
322 | (void *) IOP_NUM_ISM); | ||
323 | oss_irq_enable(IRQ_MAC_ADB); | ||
324 | } else { | ||
325 | request_irq(IRQ_VIA2_0, iop_ism_irq, | ||
326 | IRQ_FLG_LOCK|IRQ_FLG_FAST, "ISM IOP", | ||
327 | (void *) IOP_NUM_ISM); | ||
328 | } | ||
329 | if (!iop_alive(iop_base[IOP_NUM_ISM])) { | ||
330 | printk("IOP: oh my god, they killed the ISM IOP!\n"); | ||
331 | } else { | ||
332 | printk("IOP: the ISM IOP seems to be alive.\n"); | ||
333 | } | ||
334 | } | ||
335 | } | ||
336 | |||
337 | /* | ||
338 | * Register or unregister a listener for a specific IOP and channel | ||
339 | * | ||
340 | * If the handler pointer is NULL the current listener (if any) is | ||
341 | * unregistered. Otherwise the new listener is registered provided | ||
342 | * there is no existing listener registered. | ||
343 | */ | ||
344 | |||
345 | int iop_listen(uint iop_num, uint chan, | ||
346 | void (*handler)(struct iop_msg *, struct pt_regs *), | ||
347 | const char *devname) | ||
348 | { | ||
349 | if ((iop_num >= NUM_IOPS) || !iop_base[iop_num]) return -EINVAL; | ||
350 | if (chan >= NUM_IOP_CHAN) return -EINVAL; | ||
351 | if (iop_listeners[iop_num][chan].handler && handler) return -EINVAL; | ||
352 | iop_listeners[iop_num][chan].devname = devname; | ||
353 | iop_listeners[iop_num][chan].handler = handler; | ||
354 | return 0; | ||
355 | } | ||
356 | |||
357 | /* | ||
358 | * Complete reception of a message, which just means copying the reply | ||
359 | * into the buffer, setting the channel state to MSG_COMPLETE and | ||
360 | * notifying the IOP. | ||
361 | */ | ||
362 | |||
363 | void iop_complete_message(struct iop_msg *msg) | ||
364 | { | ||
365 | int iop_num = msg->iop_num; | ||
366 | int chan = msg->channel; | ||
367 | int i,offset; | ||
368 | |||
369 | #ifdef DEBUG_IOP | ||
370 | printk("iop_complete(%p): iop %d chan %d\n", msg, msg->iop_num, msg->channel); | ||
371 | #endif | ||
372 | |||
373 | offset = IOP_ADDR_RECV_MSG + (msg->channel * IOP_MSG_LEN); | ||
374 | |||
375 | for (i = 0 ; i < IOP_MSG_LEN ; i++, offset++) { | ||
376 | iop_writeb(iop_base[iop_num], offset, msg->reply[i]); | ||
377 | } | ||
378 | |||
379 | iop_writeb(iop_base[iop_num], | ||
380 | IOP_ADDR_RECV_STATE + chan, IOP_MSG_COMPLETE); | ||
381 | iop_interrupt(iop_base[msg->iop_num]); | ||
382 | |||
383 | iop_free_msg(msg); | ||
384 | } | ||
385 | |||
386 | /* | ||
387 | * Actually put a message into a send channel buffer | ||
388 | */ | ||
389 | |||
390 | static void iop_do_send(struct iop_msg *msg) | ||
391 | { | ||
392 | volatile struct mac_iop *iop = iop_base[msg->iop_num]; | ||
393 | int i,offset; | ||
394 | |||
395 | offset = IOP_ADDR_SEND_MSG + (msg->channel * IOP_MSG_LEN); | ||
396 | |||
397 | for (i = 0 ; i < IOP_MSG_LEN ; i++, offset++) { | ||
398 | iop_writeb(iop, offset, msg->message[i]); | ||
399 | } | ||
400 | |||
401 | iop_writeb(iop, IOP_ADDR_SEND_STATE + msg->channel, IOP_MSG_NEW); | ||
402 | |||
403 | iop_interrupt(iop); | ||
404 | } | ||
405 | |||
406 | /* | ||
407 | * Handle sending a message on a channel that | ||
408 | * has gone into the IOP_MSG_COMPLETE state. | ||
409 | */ | ||
410 | |||
411 | static void iop_handle_send(uint iop_num, uint chan, struct pt_regs *regs) | ||
412 | { | ||
413 | volatile struct mac_iop *iop = iop_base[iop_num]; | ||
414 | struct iop_msg *msg,*msg2; | ||
415 | int i,offset; | ||
416 | |||
417 | #ifdef DEBUG_IOP | ||
418 | printk("iop_handle_send: iop %d channel %d\n", iop_num, chan); | ||
419 | #endif | ||
420 | |||
421 | iop_writeb(iop, IOP_ADDR_SEND_STATE + chan, IOP_MSG_IDLE); | ||
422 | |||
423 | if (!(msg = iop_send_queue[iop_num][chan])) return; | ||
424 | |||
425 | msg->status = IOP_MSGSTATUS_COMPLETE; | ||
426 | offset = IOP_ADDR_SEND_MSG + (chan * IOP_MSG_LEN); | ||
427 | for (i = 0 ; i < IOP_MSG_LEN ; i++, offset++) { | ||
428 | msg->reply[i] = iop_readb(iop, offset); | ||
429 | } | ||
430 | if (msg->handler) (*msg->handler)(msg, regs); | ||
431 | msg2 = msg; | ||
432 | msg = msg->next; | ||
433 | iop_free_msg(msg2); | ||
434 | |||
435 | iop_send_queue[iop_num][chan] = msg; | ||
436 | if (msg) iop_do_send(msg); | ||
437 | } | ||
438 | |||
439 | /* | ||
440 | * Handle reception of a message on a channel that has | ||
441 | * gone into the IOP_MSG_NEW state. | ||
442 | */ | ||
443 | |||
444 | static void iop_handle_recv(uint iop_num, uint chan, struct pt_regs *regs) | ||
445 | { | ||
446 | volatile struct mac_iop *iop = iop_base[iop_num]; | ||
447 | int i,offset; | ||
448 | struct iop_msg *msg; | ||
449 | |||
450 | #ifdef DEBUG_IOP | ||
451 | printk("iop_handle_recv: iop %d channel %d\n", iop_num, chan); | ||
452 | #endif | ||
453 | |||
454 | msg = iop_alloc_msg(); | ||
455 | msg->iop_num = iop_num; | ||
456 | msg->channel = chan; | ||
457 | msg->status = IOP_MSGSTATUS_UNSOL; | ||
458 | msg->handler = iop_listeners[iop_num][chan].handler; | ||
459 | |||
460 | offset = IOP_ADDR_RECV_MSG + (chan * IOP_MSG_LEN); | ||
461 | |||
462 | for (i = 0 ; i < IOP_MSG_LEN ; i++, offset++) { | ||
463 | msg->message[i] = iop_readb(iop, offset); | ||
464 | } | ||
465 | |||
466 | iop_writeb(iop, IOP_ADDR_RECV_STATE + chan, IOP_MSG_RCVD); | ||
467 | |||
468 | /* If there is a listener, call it now. Otherwise complete */ | ||
469 | /* the message ourselves to avoid possible stalls. */ | ||
470 | |||
471 | if (msg->handler) { | ||
472 | (*msg->handler)(msg, regs); | ||
473 | } else { | ||
474 | #ifdef DEBUG_IOP | ||
475 | printk("iop_handle_recv: unclaimed message on iop %d channel %d\n", iop_num, chan); | ||
476 | printk("iop_handle_recv:"); | ||
477 | for (i = 0 ; i < IOP_MSG_LEN ; i++) { | ||
478 | printk(" %02X", (uint) msg->message[i]); | ||
479 | } | ||
480 | printk("\n"); | ||
481 | #endif | ||
482 | iop_complete_message(msg); | ||
483 | } | ||
484 | } | ||
485 | |||
486 | /* | ||
487 | * Send a message | ||
488 | * | ||
489 | * The message is placed at the end of the send queue. Afterwards if the | ||
490 | * channel is idle we force an immediate send of the next message in the | ||
491 | * queue. | ||
492 | */ | ||
493 | |||
494 | int iop_send_message(uint iop_num, uint chan, void *privdata, | ||
495 | uint msg_len, __u8 *msg_data, | ||
496 | void (*handler)(struct iop_msg *, struct pt_regs *)) | ||
497 | { | ||
498 | struct iop_msg *msg, *q; | ||
499 | |||
500 | if ((iop_num >= NUM_IOPS) || !iop_base[iop_num]) return -EINVAL; | ||
501 | if (chan >= NUM_IOP_CHAN) return -EINVAL; | ||
502 | if (msg_len > IOP_MSG_LEN) return -EINVAL; | ||
503 | |||
504 | msg = iop_alloc_msg(); | ||
505 | if (!msg) return -ENOMEM; | ||
506 | |||
507 | msg->next = NULL; | ||
508 | msg->status = IOP_MSGSTATUS_WAITING; | ||
509 | msg->iop_num = iop_num; | ||
510 | msg->channel = chan; | ||
511 | msg->caller_priv = privdata; | ||
512 | memcpy(msg->message, msg_data, msg_len); | ||
513 | msg->handler = handler; | ||
514 | |||
515 | if (!(q = iop_send_queue[iop_num][chan])) { | ||
516 | iop_send_queue[iop_num][chan] = msg; | ||
517 | } else { | ||
518 | while (q->next) q = q->next; | ||
519 | q->next = msg; | ||
520 | } | ||
521 | |||
522 | if (iop_readb(iop_base[iop_num], | ||
523 | IOP_ADDR_SEND_STATE + chan) == IOP_MSG_IDLE) { | ||
524 | iop_do_send(msg); | ||
525 | } | ||
526 | |||
527 | return 0; | ||
528 | } | ||
529 | |||
530 | /* | ||
531 | * Upload code to the shared RAM of an IOP. | ||
532 | */ | ||
533 | |||
534 | void iop_upload_code(uint iop_num, __u8 *code_start, | ||
535 | uint code_len, __u16 shared_ram_start) | ||
536 | { | ||
537 | if ((iop_num >= NUM_IOPS) || !iop_base[iop_num]) return; | ||
538 | |||
539 | iop_loadaddr(iop_base[iop_num], shared_ram_start); | ||
540 | |||
541 | while (code_len--) { | ||
542 | iop_base[iop_num]->ram_data = *code_start++; | ||
543 | } | ||
544 | } | ||
545 | |||
546 | /* | ||
547 | * Download code from the shared RAM of an IOP. | ||
548 | */ | ||
549 | |||
550 | void iop_download_code(uint iop_num, __u8 *code_start, | ||
551 | uint code_len, __u16 shared_ram_start) | ||
552 | { | ||
553 | if ((iop_num >= NUM_IOPS) || !iop_base[iop_num]) return; | ||
554 | |||
555 | iop_loadaddr(iop_base[iop_num], shared_ram_start); | ||
556 | |||
557 | while (code_len--) { | ||
558 | *code_start++ = iop_base[iop_num]->ram_data; | ||
559 | } | ||
560 | } | ||
561 | |||
562 | /* | ||
563 | * Compare the code in the shared RAM of an IOP with a copy in system memory | ||
564 | * and return 0 on match or the first nonmatching system memory address on | ||
565 | * failure. | ||
566 | */ | ||
567 | |||
568 | __u8 *iop_compare_code(uint iop_num, __u8 *code_start, | ||
569 | uint code_len, __u16 shared_ram_start) | ||
570 | { | ||
571 | if ((iop_num >= NUM_IOPS) || !iop_base[iop_num]) return code_start; | ||
572 | |||
573 | iop_loadaddr(iop_base[iop_num], shared_ram_start); | ||
574 | |||
575 | while (code_len--) { | ||
576 | if (*code_start != iop_base[iop_num]->ram_data) { | ||
577 | return code_start; | ||
578 | } | ||
579 | code_start++; | ||
580 | } | ||
581 | return (__u8 *) 0; | ||
582 | } | ||
583 | |||
584 | /* | ||
585 | * Handle an ISM IOP interrupt | ||
586 | */ | ||
587 | |||
588 | irqreturn_t iop_ism_irq(int irq, void *dev_id, struct pt_regs *regs) | ||
589 | { | ||
590 | uint iop_num = (uint) dev_id; | ||
591 | volatile struct mac_iop *iop = iop_base[iop_num]; | ||
592 | int i,state; | ||
593 | |||
594 | #ifdef DEBUG_IOP | ||
595 | printk("iop_ism_irq: status = %02X\n", (uint) iop->status_ctrl); | ||
596 | #endif | ||
597 | |||
598 | /* INT0 indicates a state change on an outgoing message channel */ | ||
599 | |||
600 | if (iop->status_ctrl & IOP_INT0) { | ||
601 | iop->status_ctrl = IOP_INT0 | IOP_RUN | IOP_AUTOINC; | ||
602 | #ifdef DEBUG_IOP | ||
603 | printk("iop_ism_irq: new status = %02X, send states", | ||
604 | (uint) iop->status_ctrl); | ||
605 | #endif | ||
606 | for (i = 0 ; i < NUM_IOP_CHAN ; i++) { | ||
607 | state = iop_readb(iop, IOP_ADDR_SEND_STATE + i); | ||
608 | #ifdef DEBUG_IOP | ||
609 | printk(" %02X", state); | ||
610 | #endif | ||
611 | if (state == IOP_MSG_COMPLETE) { | ||
612 | iop_handle_send(iop_num, i, regs); | ||
613 | } | ||
614 | } | ||
615 | #ifdef DEBUG_IOP | ||
616 | printk("\n"); | ||
617 | #endif | ||
618 | } | ||
619 | |||
620 | if (iop->status_ctrl & IOP_INT1) { /* INT1 for incoming msgs */ | ||
621 | iop->status_ctrl = IOP_INT1 | IOP_RUN | IOP_AUTOINC; | ||
622 | #ifdef DEBUG_IOP | ||
623 | printk("iop_ism_irq: new status = %02X, recv states", | ||
624 | (uint) iop->status_ctrl); | ||
625 | #endif | ||
626 | for (i = 0 ; i < NUM_IOP_CHAN ; i++) { | ||
627 | state = iop_readb(iop, IOP_ADDR_RECV_STATE + i); | ||
628 | #ifdef DEBUG_IOP | ||
629 | printk(" %02X", state); | ||
630 | #endif | ||
631 | if (state == IOP_MSG_NEW) { | ||
632 | iop_handle_recv(iop_num, i, regs); | ||
633 | } | ||
634 | } | ||
635 | #ifdef DEBUG_IOP | ||
636 | printk("\n"); | ||
637 | #endif | ||
638 | } | ||
639 | return IRQ_HANDLED; | ||
640 | } | ||
641 | |||
642 | #ifdef CONFIG_PROC_FS | ||
643 | |||
644 | char *iop_chan_state(int state) | ||
645 | { | ||
646 | switch(state) { | ||
647 | case IOP_MSG_IDLE : return "idle "; | ||
648 | case IOP_MSG_NEW : return "new "; | ||
649 | case IOP_MSG_RCVD : return "received "; | ||
650 | case IOP_MSG_COMPLETE : return "completed "; | ||
651 | default : return "unknown "; | ||
652 | } | ||
653 | } | ||
654 | |||
655 | int iop_dump_one_iop(char *buf, int iop_num, char *iop_name) | ||
656 | { | ||
657 | int i,len = 0; | ||
658 | volatile struct mac_iop *iop = iop_base[iop_num]; | ||
659 | |||
660 | len += sprintf(buf+len, "%s IOP channel states:\n\n", iop_name); | ||
661 | len += sprintf(buf+len, "## send_state recv_state device\n"); | ||
662 | len += sprintf(buf+len, "------------------------------------------------\n"); | ||
663 | for (i = 0 ; i < NUM_IOP_CHAN ; i++) { | ||
664 | len += sprintf(buf+len, "%2d %10s %10s %s\n", i, | ||
665 | iop_chan_state(iop_readb(iop, IOP_ADDR_SEND_STATE+i)), | ||
666 | iop_chan_state(iop_readb(iop, IOP_ADDR_RECV_STATE+i)), | ||
667 | iop_listeners[iop_num][i].handler? | ||
668 | iop_listeners[iop_num][i].devname : ""); | ||
669 | |||
670 | } | ||
671 | len += sprintf(buf+len, "\n"); | ||
672 | return len; | ||
673 | } | ||
674 | |||
675 | static int iop_get_proc_info(char *buf, char **start, off_t pos, int count) | ||
676 | { | ||
677 | int len, cnt; | ||
678 | |||
679 | cnt = 0; | ||
680 | len = sprintf(buf, "IOPs detected:\n\n"); | ||
681 | |||
682 | if (iop_scc_present) { | ||
683 | len += sprintf(buf+len, "SCC IOP (%p): status %02X\n", | ||
684 | iop_base[IOP_NUM_SCC], | ||
685 | (uint) iop_base[IOP_NUM_SCC]->status_ctrl); | ||
686 | } | ||
687 | if (iop_ism_present) { | ||
688 | len += sprintf(buf+len, "ISM IOP (%p): status %02X\n\n", | ||
689 | iop_base[IOP_NUM_ISM], | ||
690 | (uint) iop_base[IOP_NUM_ISM]->status_ctrl); | ||
691 | } | ||
692 | |||
693 | if (iop_scc_present) { | ||
694 | len += iop_dump_one_iop(buf+len, IOP_NUM_SCC, "SCC"); | ||
695 | |||
696 | } | ||
697 | |||
698 | if (iop_ism_present) { | ||
699 | len += iop_dump_one_iop(buf+len, IOP_NUM_ISM, "ISM"); | ||
700 | |||
701 | } | ||
702 | |||
703 | if (len >= pos) { | ||
704 | if (!*start) { | ||
705 | *start = buf + pos; | ||
706 | cnt = len - pos; | ||
707 | } else { | ||
708 | cnt += len; | ||
709 | } | ||
710 | } | ||
711 | return (count > cnt) ? cnt : count; | ||
712 | } | ||
713 | |||
714 | #endif /* CONFIG_PROC_FS */ | ||