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authorGreg Ungerer <gerg@uclinux.org>2011-03-08 18:57:14 -0500
committerGreg Ungerer <gerg@uclinux.org>2011-03-15 07:01:54 -0400
commit58f0ac98f386d2b335e5852e8feec828c43a0e13 (patch)
treee5155ca33386026a9d0b7b2e0de00514f76fd295 /arch/m68k/include/asm/m5407sim.h
parentbabc08b7e953cd23e10d175d546309dedadaabea (diff)
m68knommu: remove use of MBAR in old-style ColdFire timer
Not all ColdFire CPUs that use the old style timer hardware module use an MBAR set peripheral region. Move the TIMER base address defines to the per-CPU header files where we can set it correctly based on how the peripherals are mapped - instead of using a fake MBAR for some platforms. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k/include/asm/m5407sim.h')
-rw-r--r--arch/m68k/include/asm/m5407sim.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/m68k/include/asm/m5407sim.h b/arch/m68k/include/asm/m5407sim.h
index 70181727326f..43272584dc09 100644
--- a/arch/m68k/include/asm/m5407sim.h
+++ b/arch/m68k/include/asm/m5407sim.h
@@ -78,6 +78,12 @@
78#define MCFSIM_DACR1 0x110 /* DRAM 1 Addr and Ctrl (r/w) */ 78#define MCFSIM_DACR1 0x110 /* DRAM 1 Addr and Ctrl (r/w) */
79#define MCFSIM_DMR1 0x114 /* DRAM 1 Mask reg (r/w) */ 79#define MCFSIM_DMR1 0x114 /* DRAM 1 Mask reg (r/w) */
80 80
81/*
82 * Timer module.
83 */
84#define MCFTIMER_BASE1 (MCF_MBAR + 0x140) /* Base of TIMER1 */
85#define MCFTIMER_BASE2 (MCF_MBAR + 0x180) /* Base of TIMER2 */
86
81#define MCFUART_BASE1 0x1c0 /* Base address of UART1 */ 87#define MCFUART_BASE1 0x1c0 /* Base address of UART1 */
82#define MCFUART_BASE2 0x200 /* Base address of UART2 */ 88#define MCFUART_BASE2 0x200 /* Base address of UART2 */
83 89