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authorGreg Ungerer <gerg@uclinux.org>2011-03-08 18:57:14 -0500
committerGreg Ungerer <gerg@uclinux.org>2011-03-15 07:01:54 -0400
commit58f0ac98f386d2b335e5852e8feec828c43a0e13 (patch)
treee5155ca33386026a9d0b7b2e0de00514f76fd295 /arch/m68k/include/asm/m5307sim.h
parentbabc08b7e953cd23e10d175d546309dedadaabea (diff)
m68knommu: remove use of MBAR in old-style ColdFire timer
Not all ColdFire CPUs that use the old style timer hardware module use an MBAR set peripheral region. Move the TIMER base address defines to the per-CPU header files where we can set it correctly based on how the peripherals are mapped - instead of using a fake MBAR for some platforms. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k/include/asm/m5307sim.h')
-rw-r--r--arch/m68k/include/asm/m5307sim.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/m68k/include/asm/m5307sim.h b/arch/m68k/include/asm/m5307sim.h
index 39285769c0e2..c3846fcfa5d1 100644
--- a/arch/m68k/include/asm/m5307sim.h
+++ b/arch/m68k/include/asm/m5307sim.h
@@ -95,6 +95,12 @@
95#define MCFSIM_DACR1 0x110 /* DRAM 1 Addr and Ctrl (r/w) */ 95#define MCFSIM_DACR1 0x110 /* DRAM 1 Addr and Ctrl (r/w) */
96#define MCFSIM_DMR1 0x114 /* DRAM 1 Mask reg (r/w) */ 96#define MCFSIM_DMR1 0x114 /* DRAM 1 Mask reg (r/w) */
97 97
98/*
99 * Timer module.
100 */
101#define MCFTIMER_BASE1 (MCF_MBAR + 0x140) /* Base of TIMER1 */
102#define MCFTIMER_BASE2 (MCF_MBAR + 0x180) /* Base of TIMER2 */
103
98#define MCFSIM_PADDR (MCF_MBAR + 0x244) 104#define MCFSIM_PADDR (MCF_MBAR + 0x244)
99#define MCFSIM_PADAT (MCF_MBAR + 0x248) 105#define MCFSIM_PADAT (MCF_MBAR + 0x248)
100 106