diff options
author | Paul Mundt <lethal@linux-sh.org> | 2010-05-30 23:59:19 -0400 |
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committer | Paul Mundt <lethal@linux-sh.org> | 2010-05-30 23:59:19 -0400 |
commit | 8fa76f7e61ef4e5bc97207143ea4e198b22487bc (patch) | |
tree | 266c42b6687e68e4febb72d8c031e5facd899a1c /arch/m68k/include/asm/m527xsim.h | |
parent | a41a7b91772da2c77ac0da74285fd8ebd86a85ba (diff) | |
parent | 67a3e12b05e055c0415c556a315a3d3eb637e29e (diff) |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Diffstat (limited to 'arch/m68k/include/asm/m527xsim.h')
-rw-r--r-- | arch/m68k/include/asm/m527xsim.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/m68k/include/asm/m527xsim.h b/arch/m68k/include/asm/m527xsim.h index 453356d72d80..1feb46f108ce 100644 --- a/arch/m68k/include/asm/m527xsim.h +++ b/arch/m68k/include/asm/m527xsim.h | |||
@@ -31,6 +31,7 @@ | |||
31 | #define MCFINT_UART0 13 /* Interrupt number for UART0 */ | 31 | #define MCFINT_UART0 13 /* Interrupt number for UART0 */ |
32 | #define MCFINT_UART1 14 /* Interrupt number for UART1 */ | 32 | #define MCFINT_UART1 14 /* Interrupt number for UART1 */ |
33 | #define MCFINT_UART2 15 /* Interrupt number for UART2 */ | 33 | #define MCFINT_UART2 15 /* Interrupt number for UART2 */ |
34 | #define MCFINT_QSPI 18 /* Interrupt number for QSPI */ | ||
34 | #define MCFINT_PIT1 36 /* Interrupt number for PIT1 */ | 35 | #define MCFINT_PIT1 36 /* Interrupt number for PIT1 */ |
35 | 36 | ||
36 | /* | 37 | /* |
@@ -120,6 +121,9 @@ | |||
120 | #define MCFGPIO_PIN_MAX 100 | 121 | #define MCFGPIO_PIN_MAX 100 |
121 | #define MCFGPIO_IRQ_MAX 8 | 122 | #define MCFGPIO_IRQ_MAX 8 |
122 | #define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE | 123 | #define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE |
124 | |||
125 | #define MCFGPIO_PAR_QSPI (MCF_IPSBAR + 0x10004A) | ||
126 | #define MCFGPIO_PAR_TIMER (MCF_IPSBAR + 0x10004C) | ||
123 | #endif | 127 | #endif |
124 | 128 | ||
125 | #ifdef CONFIG_M5275 | 129 | #ifdef CONFIG_M5275 |
@@ -212,6 +216,8 @@ | |||
212 | #define MCFGPIO_PIN_MAX 148 | 216 | #define MCFGPIO_PIN_MAX 148 |
213 | #define MCFGPIO_IRQ_MAX 8 | 217 | #define MCFGPIO_IRQ_MAX 8 |
214 | #define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE | 218 | #define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE |
219 | |||
220 | #define MCFGPIO_PAR_QSPI (MCF_IPSBAR + 0x10007E) | ||
215 | #endif | 221 | #endif |
216 | 222 | ||
217 | /* | 223 | /* |
@@ -223,6 +229,7 @@ | |||
223 | #define MCFEPORT_EPPDR (MCF_IPSBAR + 0x130005) | 229 | #define MCFEPORT_EPPDR (MCF_IPSBAR + 0x130005) |
224 | 230 | ||
225 | 231 | ||
232 | |||
226 | /* | 233 | /* |
227 | * GPIO pins setups to enable the UARTs. | 234 | * GPIO pins setups to enable the UARTs. |
228 | */ | 235 | */ |