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authorGreg Ungerer <gerg@uclinux.org>2009-05-19 00:52:40 -0400
committerGreg Ungerer <gerg@uclinux.org>2009-09-15 19:43:51 -0400
commit04b75b10dceadf937e3707ecc3dfccf6a076fd29 (patch)
tree87965d12b8f7eb622efd1d36bebd2a7b8a26452e /arch/m68k/include/asm/m5206sim.h
parentf9311f26434cea3e926f56ca2aa3e5740e962c72 (diff)
m68knommu: simplify ColdFire "timers" clock initialization
The ColdFire "timers" clock setup can be simplified. There is really no need for the flexible per-platform setup code. The clock interrupt can be hard defined per CPU platform (in CPU include files). This makes the actual timer code simpler. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k/include/asm/m5206sim.h')
-rw-r--r--arch/m68k/include/asm/m5206sim.h13
1 files changed, 7 insertions, 6 deletions
diff --git a/arch/m68k/include/asm/m5206sim.h b/arch/m68k/include/asm/m5206sim.h
index b50061aaf8f0..9c384e294af9 100644
--- a/arch/m68k/include/asm/m5206sim.h
+++ b/arch/m68k/include/asm/m5206sim.h
@@ -89,11 +89,18 @@
89#define MCFSIM_PADAT (MCF_MBAR + 0x1c9) /* Parallel Port Value (r/w) */ 89#define MCFSIM_PADAT (MCF_MBAR + 0x1c9) /* Parallel Port Value (r/w) */
90 90
91/* 91/*
92 * Define system peripheral IRQ usage.
93 */
94#define MCF_IRQ_TIMER 30 /* Timer0, Level 6 */
95#define MCF_IRQ_PROFILER 31 /* Timer1, Level 7 */
96
97/*
92 * Generic GPIO 98 * Generic GPIO
93 */ 99 */
94#define MCFGPIO_PIN_MAX 8 100#define MCFGPIO_PIN_MAX 8
95#define MCFGPIO_IRQ_VECBASE -1 101#define MCFGPIO_IRQ_VECBASE -1
96#define MCFGPIO_IRQ_MAX -1 102#define MCFGPIO_IRQ_MAX -1
103
97/* 104/*
98 * Some symbol defines for the Parallel Port Pin Assignment Register 105 * Some symbol defines for the Parallel Port Pin Assignment Register
99 */ 106 */
@@ -117,11 +124,5 @@
117#define MCFSIM_DMA2ICR MCFSIM_ICR15 /* DMA 2 ICR */ 124#define MCFSIM_DMA2ICR MCFSIM_ICR15 /* DMA 2 ICR */
118#endif 125#endif
119 126
120/*
121 * Let the common interrupt handler code know that the ColdFire 5206*
122 * family of CPU's only has a 16bit sized IMR register.
123 */
124#define MCFSIM_IMR_IS_16BITS
125
126/****************************************************************************/ 127/****************************************************************************/
127#endif /* m5206sim_h */ 128#endif /* m5206sim_h */