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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /arch/m68k/fpsp040/x_fline.S
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
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diff --git a/arch/m68k/fpsp040/x_fline.S b/arch/m68k/fpsp040/x_fline.S
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1|
2| x_fline.sa 3.3 1/10/91
3|
4| fpsp_fline --- FPSP handler for fline exception
5|
6| First determine if the exception is one of the unimplemented
7| floating point instructions. If so, let fpsp_unimp handle it.
8| Next, determine if the instruction is an fmovecr with a non-zero
9| <ea> field. If so, handle here and return. Otherwise, it
10| must be a real F-line exception.
11|
12
13| Copyright (C) Motorola, Inc. 1990
14| All Rights Reserved
15|
16| THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
17| The copyright notice above does not evidence any
18| actual or intended publication of such source code.
19
20X_FLINE: |idnt 2,1 | Motorola 040 Floating Point Software Package
21
22 |section 8
23
24#include "fpsp.h"
25
26 |xref real_fline
27 |xref fpsp_unimp
28 |xref uni_2
29 |xref mem_read
30 |xref fpsp_fmt_error
31
32 .global fpsp_fline
33fpsp_fline:
34|
35| check for unimplemented vector first. Use EXC_VEC-4 because
36| the equate is valid only after a 'link a6' has pushed one more
37| long onto the stack.
38|
39 cmpw #UNIMP_VEC,EXC_VEC-4(%a7)
40 beql fpsp_unimp
41
42|
43| fmovecr with non-zero <ea> handling here
44|
45 subl #4,%a7 |4 accounts for 2-word difference
46| ;between six word frame (unimp) and
47| ;four word frame
48 link %a6,#-LOCAL_SIZE
49 fsave -(%a7)
50 moveml %d0-%d1/%a0-%a1,USER_DA(%a6)
51 moveal EXC_PC+4(%a6),%a0 |get address of fline instruction
52 leal L_SCR1(%a6),%a1 |use L_SCR1 as scratch
53 movel #4,%d0
54 addl #4,%a6 |to offset the sub.l #4,a7 above so that
55| ;a6 can point correctly to the stack frame
56| ;before branching to mem_read
57 bsrl mem_read
58 subl #4,%a6
59 movel L_SCR1(%a6),%d0 |d0 contains the fline and command word
60 bfextu %d0{#4:#3},%d1 |extract coprocessor id
61 cmpib #1,%d1 |check if cpid=1
62 bne not_mvcr |exit if not
63 bfextu %d0{#16:#6},%d1
64 cmpib #0x17,%d1 |check if it is an FMOVECR encoding
65 bne not_mvcr
66| ;if an FMOVECR instruction, fix stack
67| ;and go to FPSP_UNIMP
68fix_stack:
69 cmpib #VER_40,(%a7) |test for orig unimp frame
70 bnes ck_rev
71 subl #UNIMP_40_SIZE-4,%a7 |emulate an orig fsave
72 moveb #VER_40,(%a7)
73 moveb #UNIMP_40_SIZE-4,1(%a7)
74 clrw 2(%a7)
75 bras fix_con
76ck_rev:
77 cmpib #VER_41,(%a7) |test for rev unimp frame
78 bnel fpsp_fmt_error |if not $40 or $41, exit with error
79 subl #UNIMP_41_SIZE-4,%a7 |emulate a rev fsave
80 moveb #VER_41,(%a7)
81 moveb #UNIMP_41_SIZE-4,1(%a7)
82 clrw 2(%a7)
83fix_con:
84 movew EXC_SR+4(%a6),EXC_SR(%a6) |move stacked sr to new position
85 movel EXC_PC+4(%a6),EXC_PC(%a6) |move stacked pc to new position
86 fmovel EXC_PC(%a6),%FPIAR |point FPIAR to fline inst
87 movel #4,%d1
88 addl %d1,EXC_PC(%a6) |increment stacked pc value to next inst
89 movew #0x202c,EXC_VEC(%a6) |reformat vector to unimp
90 clrl EXC_EA(%a6) |clear the EXC_EA field
91 movew %d0,CMDREG1B(%a6) |move the lower word into CMDREG1B
92 clrl E_BYTE(%a6)
93 bsetb #UFLAG,T_BYTE(%a6)
94 moveml USER_DA(%a6),%d0-%d1/%a0-%a1 |restore data registers
95 bral uni_2
96
97not_mvcr:
98 moveml USER_DA(%a6),%d0-%d1/%a0-%a1 |restore data registers
99 frestore (%a7)+
100 unlk %a6
101 addl #4,%a7
102 bral real_fline
103
104 |end