diff options
author | Adrian Bunk <bunk@kernel.org> | 2008-10-13 15:58:59 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-10-14 13:23:27 -0400 |
commit | 29c8a24672e1cdfee99c15b870c57eb30ae69daf (patch) | |
tree | 26f67aaca31d878339a99d89e0036d912bdef449 /arch/m68k/atari | |
parent | 7477fb6fbc339469ea945e007f3f7b3bb13b25f7 (diff) |
m68k: Remove the broken Hades support
This patch removes the Hades support that was marked as BROKEN 5 years ago.
Signed-off-by: Adrian Bunk <bunk@kernel.org>
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/m68k/atari')
-rw-r--r-- | arch/m68k/atari/Makefile | 3 | ||||
-rw-r--r-- | arch/m68k/atari/ataints.c | 6 | ||||
-rw-r--r-- | arch/m68k/atari/config.c | 37 | ||||
-rw-r--r-- | arch/m68k/atari/hades-pci.c | 440 |
4 files changed, 14 insertions, 472 deletions
diff --git a/arch/m68k/atari/Makefile b/arch/m68k/atari/Makefile index 2cd905efe63a..0cac723306f9 100644 --- a/arch/m68k/atari/Makefile +++ b/arch/m68k/atari/Makefile | |||
@@ -5,7 +5,4 @@ | |||
5 | obj-y := config.o time.o debug.o ataints.o stdma.o \ | 5 | obj-y := config.o time.o debug.o ataints.o stdma.o \ |
6 | atasound.o stram.o | 6 | atasound.o stram.o |
7 | 7 | ||
8 | ifeq ($(CONFIG_PCI),y) | ||
9 | obj-$(CONFIG_HADES) += hades-pci.o | ||
10 | endif | ||
11 | obj-$(CONFIG_ATARI_KBD_CORE) += atakeyb.o | 8 | obj-$(CONFIG_ATARI_KBD_CORE) += atakeyb.o |
diff --git a/arch/m68k/atari/ataints.c b/arch/m68k/atari/ataints.c index b45593a60bdd..dba4afabb444 100644 --- a/arch/m68k/atari/ataints.c +++ b/arch/m68k/atari/ataints.c | |||
@@ -407,10 +407,8 @@ void __init atari_init_IRQ(void) | |||
407 | * gets overruns) | 407 | * gets overruns) |
408 | */ | 408 | */ |
409 | 409 | ||
410 | if (!MACH_IS_HADES) { | 410 | vectors[VEC_INT2] = falcon_hblhandler; |
411 | vectors[VEC_INT2] = falcon_hblhandler; | 411 | vectors[VEC_INT4] = falcon_hblhandler; |
412 | vectors[VEC_INT4] = falcon_hblhandler; | ||
413 | } | ||
414 | } | 412 | } |
415 | 413 | ||
416 | if (ATARIHW_PRESENT(PCM_8BIT) && ATARIHW_PRESENT(MICROWIRE)) { | 414 | if (ATARIHW_PRESENT(PCM_8BIT) && ATARIHW_PRESENT(MICROWIRE)) { |
diff --git a/arch/m68k/atari/config.c b/arch/m68k/atari/config.c index 5945e1505558..af031855f796 100644 --- a/arch/m68k/atari/config.c +++ b/arch/m68k/atari/config.c | |||
@@ -231,7 +231,7 @@ void __init config_atari(void) | |||
231 | */ | 231 | */ |
232 | 232 | ||
233 | printk("Atari hardware found: "); | 233 | printk("Atari hardware found: "); |
234 | if (MACH_IS_MEDUSA || MACH_IS_HADES) { | 234 | if (MACH_IS_MEDUSA) { |
235 | /* There's no Atari video hardware on the Medusa, but all the | 235 | /* There's no Atari video hardware on the Medusa, but all the |
236 | * addresses below generate a DTACK so no bus error occurs! */ | 236 | * addresses below generate a DTACK so no bus error occurs! */ |
237 | } else if (hwreg_present(f030_xreg)) { | 237 | } else if (hwreg_present(f030_xreg)) { |
@@ -269,10 +269,6 @@ void __init config_atari(void) | |||
269 | ATARIHW_SET(SCSI_DMA); | 269 | ATARIHW_SET(SCSI_DMA); |
270 | printk("TT_SCSI_DMA "); | 270 | printk("TT_SCSI_DMA "); |
271 | } | 271 | } |
272 | if (!MACH_IS_HADES && hwreg_present(&st_dma.dma_hi)) { | ||
273 | ATARIHW_SET(STND_DMA); | ||
274 | printk("STND_DMA "); | ||
275 | } | ||
276 | /* | 272 | /* |
277 | * The ST-DMA address registers aren't readable | 273 | * The ST-DMA address registers aren't readable |
278 | * on all Medusas, so the test below may fail | 274 | * on all Medusas, so the test below may fail |
@@ -294,12 +290,11 @@ void __init config_atari(void) | |||
294 | ATARIHW_SET(YM_2149); | 290 | ATARIHW_SET(YM_2149); |
295 | printk("YM2149 "); | 291 | printk("YM2149 "); |
296 | } | 292 | } |
297 | if (!MACH_IS_MEDUSA && !MACH_IS_HADES && | 293 | if (!MACH_IS_MEDUSA && hwreg_present(&tt_dmasnd.ctrl)) { |
298 | hwreg_present(&tt_dmasnd.ctrl)) { | ||
299 | ATARIHW_SET(PCM_8BIT); | 294 | ATARIHW_SET(PCM_8BIT); |
300 | printk("PCM "); | 295 | printk("PCM "); |
301 | } | 296 | } |
302 | if (!MACH_IS_HADES && hwreg_present(&falcon_codec.unused5)) { | 297 | if (hwreg_present(&falcon_codec.unused5)) { |
303 | ATARIHW_SET(CODEC); | 298 | ATARIHW_SET(CODEC); |
304 | printk("CODEC "); | 299 | printk("CODEC "); |
305 | } | 300 | } |
@@ -313,7 +308,7 @@ void __init config_atari(void) | |||
313 | (tt_scc_dma.dma_ctrl = 0x01, (tt_scc_dma.dma_ctrl & 1) == 1) && | 308 | (tt_scc_dma.dma_ctrl = 0x01, (tt_scc_dma.dma_ctrl & 1) == 1) && |
314 | (tt_scc_dma.dma_ctrl = 0x00, (tt_scc_dma.dma_ctrl & 1) == 0) | 309 | (tt_scc_dma.dma_ctrl = 0x00, (tt_scc_dma.dma_ctrl & 1) == 0) |
315 | #else | 310 | #else |
316 | !MACH_IS_MEDUSA && !MACH_IS_HADES | 311 | !MACH_IS_MEDUSA |
317 | #endif | 312 | #endif |
318 | ) { | 313 | ) { |
319 | ATARIHW_SET(SCC_DMA); | 314 | ATARIHW_SET(SCC_DMA); |
@@ -327,10 +322,7 @@ void __init config_atari(void) | |||
327 | ATARIHW_SET(ST_ESCC); | 322 | ATARIHW_SET(ST_ESCC); |
328 | printk("ST_ESCC "); | 323 | printk("ST_ESCC "); |
329 | } | 324 | } |
330 | if (MACH_IS_HADES) { | 325 | if (hwreg_present(&tt_scu.sys_mask)) { |
331 | ATARIHW_SET(VME); | ||
332 | printk("VME "); | ||
333 | } else if (hwreg_present(&tt_scu.sys_mask)) { | ||
334 | ATARIHW_SET(SCU); | 326 | ATARIHW_SET(SCU); |
335 | /* Assume a VME bus if there's a SCU */ | 327 | /* Assume a VME bus if there's a SCU */ |
336 | ATARIHW_SET(VME); | 328 | ATARIHW_SET(VME); |
@@ -340,7 +332,7 @@ void __init config_atari(void) | |||
340 | ATARIHW_SET(ANALOG_JOY); | 332 | ATARIHW_SET(ANALOG_JOY); |
341 | printk("ANALOG_JOY "); | 333 | printk("ANALOG_JOY "); |
342 | } | 334 | } |
343 | if (!MACH_IS_HADES && hwreg_present(blitter.halftone)) { | 335 | if (hwreg_present(blitter.halftone)) { |
344 | ATARIHW_SET(BLITTER); | 336 | ATARIHW_SET(BLITTER); |
345 | printk("BLITTER "); | 337 | printk("BLITTER "); |
346 | } | 338 | } |
@@ -349,8 +341,7 @@ void __init config_atari(void) | |||
349 | printk("IDE "); | 341 | printk("IDE "); |
350 | } | 342 | } |
351 | #if 1 /* This maybe wrong */ | 343 | #if 1 /* This maybe wrong */ |
352 | if (!MACH_IS_MEDUSA && !MACH_IS_HADES && | 344 | if (!MACH_IS_MEDUSA && hwreg_present(&tt_microwire.data) && |
353 | hwreg_present(&tt_microwire.data) && | ||
354 | hwreg_present(&tt_microwire.mask) && | 345 | hwreg_present(&tt_microwire.mask) && |
355 | (tt_microwire.mask = 0x7ff, | 346 | (tt_microwire.mask = 0x7ff, |
356 | udelay(1), | 347 | udelay(1), |
@@ -369,19 +360,18 @@ void __init config_atari(void) | |||
369 | mach_hwclk = atari_tt_hwclk; | 360 | mach_hwclk = atari_tt_hwclk; |
370 | mach_set_clock_mmss = atari_tt_set_clock_mmss; | 361 | mach_set_clock_mmss = atari_tt_set_clock_mmss; |
371 | } | 362 | } |
372 | if (!MACH_IS_HADES && hwreg_present(&mste_rtc.sec_ones)) { | 363 | if (hwreg_present(&mste_rtc.sec_ones)) { |
373 | ATARIHW_SET(MSTE_CLK); | 364 | ATARIHW_SET(MSTE_CLK); |
374 | printk("MSTE_CLK "); | 365 | printk("MSTE_CLK "); |
375 | mach_hwclk = atari_mste_hwclk; | 366 | mach_hwclk = atari_mste_hwclk; |
376 | mach_set_clock_mmss = atari_mste_set_clock_mmss; | 367 | mach_set_clock_mmss = atari_mste_set_clock_mmss; |
377 | } | 368 | } |
378 | if (!MACH_IS_MEDUSA && !MACH_IS_HADES && | 369 | if (!MACH_IS_MEDUSA && hwreg_present(&dma_wd.fdc_speed) && |
379 | hwreg_present(&dma_wd.fdc_speed) && | ||
380 | hwreg_write(&dma_wd.fdc_speed, 0)) { | 370 | hwreg_write(&dma_wd.fdc_speed, 0)) { |
381 | ATARIHW_SET(FDCSPEED); | 371 | ATARIHW_SET(FDCSPEED); |
382 | printk("FDC_SPEED "); | 372 | printk("FDC_SPEED "); |
383 | } | 373 | } |
384 | if (!MACH_IS_HADES && !ATARIHW_PRESENT(ST_SCSI)) { | 374 | if (!ATARIHW_PRESENT(ST_SCSI)) { |
385 | ATARIHW_SET(ACSI); | 375 | ATARIHW_SET(ACSI); |
386 | printk("ACSI "); | 376 | printk("ACSI "); |
387 | } | 377 | } |
@@ -449,7 +439,7 @@ void __init config_atari(void) | |||
449 | * 0xFFxxxxxx -> 0x00xxxxxx, so that the first 16MB is accessible | 439 | * 0xFFxxxxxx -> 0x00xxxxxx, so that the first 16MB is accessible |
450 | * in the last 16MB of the address space. | 440 | * in the last 16MB of the address space. |
451 | */ | 441 | */ |
452 | tos_version = (MACH_IS_MEDUSA || MACH_IS_HADES) ? | 442 | tos_version = (MACH_IS_MEDUSA) ? |
453 | 0xfff : *(unsigned short *)0xff000002; | 443 | 0xfff : *(unsigned short *)0xff000002; |
454 | atari_rtc_year_offset = (tos_version < 0x306) ? 70 : 68; | 444 | atari_rtc_year_offset = (tos_version < 0x306) ? 70 : 68; |
455 | } | 445 | } |
@@ -511,8 +501,7 @@ static void atari_reset(void) | |||
511 | * On the Medusa, phys. 0x4 may contain garbage because it's no | 501 | * On the Medusa, phys. 0x4 may contain garbage because it's no |
512 | * ROM. See above for explanation why we cannot use PTOV(4). | 502 | * ROM. See above for explanation why we cannot use PTOV(4). |
513 | */ | 503 | */ |
514 | reset_addr = MACH_IS_HADES ? 0x7fe00030 : | 504 | reset_addr = MACH_IS_MEDUSA || MACH_IS_AB40 ? 0xe00030 : |
515 | MACH_IS_MEDUSA || MACH_IS_AB40 ? 0xe00030 : | ||
516 | *(unsigned long *) 0xff000004; | 505 | *(unsigned long *) 0xff000004; |
517 | 506 | ||
518 | /* reset ACIA for switch off OverScan, if it's active */ | 507 | /* reset ACIA for switch off OverScan, if it's active */ |
@@ -606,8 +595,6 @@ static void atari_get_model(char *model) | |||
606 | if (MACH_IS_MEDUSA) | 595 | if (MACH_IS_MEDUSA) |
607 | /* Medusa has TT _MCH cookie */ | 596 | /* Medusa has TT _MCH cookie */ |
608 | strcat(model, "Medusa"); | 597 | strcat(model, "Medusa"); |
609 | else if (MACH_IS_HADES) | ||
610 | strcat(model, "Hades"); | ||
611 | else | 598 | else |
612 | strcat(model, "TT"); | 599 | strcat(model, "TT"); |
613 | break; | 600 | break; |
diff --git a/arch/m68k/atari/hades-pci.c b/arch/m68k/atari/hades-pci.c deleted file mode 100644 index 2bbabc008708..000000000000 --- a/arch/m68k/atari/hades-pci.c +++ /dev/null | |||
@@ -1,440 +0,0 @@ | |||
1 | /* | ||
2 | * hades-pci.c - Hardware specific PCI BIOS functions the Hades Atari clone. | ||
3 | * | ||
4 | * Written by Wout Klaren. | ||
5 | */ | ||
6 | |||
7 | #include <linux/init.h> | ||
8 | #include <linux/kernel.h> | ||
9 | #include <asm/io.h> | ||
10 | |||
11 | #if 0 | ||
12 | # define DBG_DEVS(args) printk args | ||
13 | #else | ||
14 | # define DBG_DEVS(args) | ||
15 | #endif | ||
16 | |||
17 | #if defined(CONFIG_PCI) && defined(CONFIG_HADES) | ||
18 | |||
19 | #include <linux/slab.h> | ||
20 | #include <linux/mm.h> | ||
21 | #include <linux/pci.h> | ||
22 | |||
23 | #include <asm/atarihw.h> | ||
24 | #include <asm/atariints.h> | ||
25 | #include <asm/byteorder.h> | ||
26 | #include <asm/pci.h> | ||
27 | |||
28 | #define HADES_MEM_BASE 0x80000000 | ||
29 | #define HADES_MEM_SIZE 0x20000000 | ||
30 | #define HADES_CONFIG_BASE 0xA0000000 | ||
31 | #define HADES_CONFIG_SIZE 0x10000000 | ||
32 | #define HADES_IO_BASE 0xB0000000 | ||
33 | #define HADES_IO_SIZE 0x10000000 | ||
34 | #define HADES_VIRT_IO_SIZE 0x00010000 /* Only 64k is remapped and actually used. */ | ||
35 | |||
36 | #define N_SLOTS 4 /* Number of PCI slots. */ | ||
37 | |||
38 | static const char pci_mem_name[] = "PCI memory space"; | ||
39 | static const char pci_io_name[] = "PCI I/O space"; | ||
40 | static const char pci_config_name[] = "PCI config space"; | ||
41 | |||
42 | static struct resource config_space = { | ||
43 | .name = pci_config_name, | ||
44 | .start = HADES_CONFIG_BASE, | ||
45 | .end = HADES_CONFIG_BASE + HADES_CONFIG_SIZE - 1 | ||
46 | }; | ||
47 | static struct resource io_space = { | ||
48 | .name = pci_io_name, | ||
49 | .start = HADES_IO_BASE, | ||
50 | .end = HADES_IO_BASE + HADES_IO_SIZE - 1 | ||
51 | }; | ||
52 | |||
53 | static const unsigned long pci_conf_base_phys[] = { | ||
54 | 0xA0080000, 0xA0040000, 0xA0020000, 0xA0010000 | ||
55 | }; | ||
56 | static unsigned long pci_conf_base_virt[N_SLOTS]; | ||
57 | static unsigned long pci_io_base_virt; | ||
58 | |||
59 | /* | ||
60 | * static void *mk_conf_addr(unsigned char bus, unsigned char device_fn, | ||
61 | * unsigned char where) | ||
62 | * | ||
63 | * Calculate the address of the PCI configuration area of the given | ||
64 | * device. | ||
65 | * | ||
66 | * BUG: boards with multiple functions are probably not correctly | ||
67 | * supported. | ||
68 | */ | ||
69 | |||
70 | static void *mk_conf_addr(struct pci_dev *dev, int where) | ||
71 | { | ||
72 | int device = dev->devfn >> 3, function = dev->devfn & 7; | ||
73 | void *result; | ||
74 | |||
75 | DBG_DEVS(("mk_conf_addr(bus=%d ,device_fn=0x%x, where=0x%x, pci_addr=0x%p)\n", | ||
76 | dev->bus->number, dev->devfn, where, pci_addr)); | ||
77 | |||
78 | if (device > 3) | ||
79 | { | ||
80 | DBG_DEVS(("mk_conf_addr: device (%d) > 3, returning NULL\n", device)); | ||
81 | return NULL; | ||
82 | } | ||
83 | |||
84 | if (dev->bus->number != 0) | ||
85 | { | ||
86 | DBG_DEVS(("mk_conf_addr: bus (%d) > 0, returning NULL\n", device)); | ||
87 | return NULL; | ||
88 | } | ||
89 | |||
90 | result = (void *) (pci_conf_base_virt[device] | (function << 8) | (where)); | ||
91 | DBG_DEVS(("mk_conf_addr: returning pci_addr 0x%lx\n", (unsigned long) result)); | ||
92 | return result; | ||
93 | } | ||
94 | |||
95 | static int hades_read_config_byte(struct pci_dev *dev, int where, u8 *value) | ||
96 | { | ||
97 | volatile unsigned char *pci_addr; | ||
98 | |||
99 | *value = 0xff; | ||
100 | |||
101 | if ((pci_addr = (unsigned char *) mk_conf_addr(dev, where)) == NULL) | ||
102 | return PCIBIOS_DEVICE_NOT_FOUND; | ||
103 | |||
104 | *value = *pci_addr; | ||
105 | |||
106 | return PCIBIOS_SUCCESSFUL; | ||
107 | } | ||
108 | |||
109 | static int hades_read_config_word(struct pci_dev *dev, int where, u16 *value) | ||
110 | { | ||
111 | volatile unsigned short *pci_addr; | ||
112 | |||
113 | *value = 0xffff; | ||
114 | |||
115 | if (where & 0x1) | ||
116 | return PCIBIOS_BAD_REGISTER_NUMBER; | ||
117 | |||
118 | if ((pci_addr = (unsigned short *) mk_conf_addr(dev, where)) == NULL) | ||
119 | return PCIBIOS_DEVICE_NOT_FOUND; | ||
120 | |||
121 | *value = le16_to_cpu(*pci_addr); | ||
122 | |||
123 | return PCIBIOS_SUCCESSFUL; | ||
124 | } | ||
125 | |||
126 | static int hades_read_config_dword(struct pci_dev *dev, int where, u32 *value) | ||
127 | { | ||
128 | volatile unsigned int *pci_addr; | ||
129 | unsigned char header_type; | ||
130 | int result; | ||
131 | |||
132 | *value = 0xffffffff; | ||
133 | |||
134 | if (where & 0x3) | ||
135 | return PCIBIOS_BAD_REGISTER_NUMBER; | ||
136 | |||
137 | if ((pci_addr = (unsigned int *) mk_conf_addr(dev, where)) == NULL) | ||
138 | return PCIBIOS_DEVICE_NOT_FOUND; | ||
139 | |||
140 | *value = le32_to_cpu(*pci_addr); | ||
141 | |||
142 | /* | ||
143 | * Check if the value is an address on the bus. If true, add the | ||
144 | * base address of the PCI memory or PCI I/O area on the Hades. | ||
145 | */ | ||
146 | |||
147 | if ((result = hades_read_config_byte(dev, PCI_HEADER_TYPE, | ||
148 | &header_type)) != PCIBIOS_SUCCESSFUL) | ||
149 | return result; | ||
150 | |||
151 | if (((where >= PCI_BASE_ADDRESS_0) && (where <= PCI_BASE_ADDRESS_1)) || | ||
152 | ((header_type != PCI_HEADER_TYPE_BRIDGE) && ((where >= PCI_BASE_ADDRESS_2) && | ||
153 | (where <= PCI_BASE_ADDRESS_5)))) | ||
154 | { | ||
155 | if ((*value & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO) | ||
156 | { | ||
157 | /* | ||
158 | * Base address register that contains an I/O address. If the | ||
159 | * address is valid on the Hades (0 <= *value < HADES_VIRT_IO_SIZE), | ||
160 | * add 'pci_io_base_virt' to the value. | ||
161 | */ | ||
162 | |||
163 | if (*value < HADES_VIRT_IO_SIZE) | ||
164 | *value += pci_io_base_virt; | ||
165 | } | ||
166 | else | ||
167 | { | ||
168 | /* | ||
169 | * Base address register that contains an memory address. If the | ||
170 | * address is valid on the Hades (0 <= *value < HADES_MEM_SIZE), | ||
171 | * add HADES_MEM_BASE to the value. | ||
172 | */ | ||
173 | |||
174 | if (*value == 0) | ||
175 | { | ||
176 | /* | ||
177 | * Base address is 0. Test if this base | ||
178 | * address register is used. | ||
179 | */ | ||
180 | |||
181 | *pci_addr = 0xffffffff; | ||
182 | if (*pci_addr != 0) | ||
183 | { | ||
184 | *pci_addr = *value; | ||
185 | if (*value < HADES_MEM_SIZE) | ||
186 | *value += HADES_MEM_BASE; | ||
187 | } | ||
188 | } | ||
189 | else | ||
190 | { | ||
191 | if (*value < HADES_MEM_SIZE) | ||
192 | *value += HADES_MEM_BASE; | ||
193 | } | ||
194 | } | ||
195 | } | ||
196 | |||
197 | return PCIBIOS_SUCCESSFUL; | ||
198 | } | ||
199 | |||
200 | static int hades_write_config_byte(struct pci_dev *dev, int where, u8 value) | ||
201 | { | ||
202 | volatile unsigned char *pci_addr; | ||
203 | |||
204 | if ((pci_addr = (unsigned char *) mk_conf_addr(dev, where)) == NULL) | ||
205 | return PCIBIOS_DEVICE_NOT_FOUND; | ||
206 | |||
207 | *pci_addr = value; | ||
208 | |||
209 | return PCIBIOS_SUCCESSFUL; | ||
210 | } | ||
211 | |||
212 | static int hades_write_config_word(struct pci_dev *dev, int where, u16 value) | ||
213 | { | ||
214 | volatile unsigned short *pci_addr; | ||
215 | |||
216 | if ((pci_addr = (unsigned short *) mk_conf_addr(dev, where)) == NULL) | ||
217 | return PCIBIOS_DEVICE_NOT_FOUND; | ||
218 | |||
219 | *pci_addr = cpu_to_le16(value); | ||
220 | |||
221 | return PCIBIOS_SUCCESSFUL; | ||
222 | } | ||
223 | |||
224 | static int hades_write_config_dword(struct pci_dev *dev, int where, u32 value) | ||
225 | { | ||
226 | volatile unsigned int *pci_addr; | ||
227 | unsigned char header_type; | ||
228 | int result; | ||
229 | |||
230 | if ((pci_addr = (unsigned int *) mk_conf_addr(dev, where)) == NULL) | ||
231 | return PCIBIOS_DEVICE_NOT_FOUND; | ||
232 | |||
233 | /* | ||
234 | * Check if the value is an address on the bus. If true, subtract the | ||
235 | * base address of the PCI memory or PCI I/O area on the Hades. | ||
236 | */ | ||
237 | |||
238 | if ((result = hades_read_config_byte(dev, PCI_HEADER_TYPE, | ||
239 | &header_type)) != PCIBIOS_SUCCESSFUL) | ||
240 | return result; | ||
241 | |||
242 | if (((where >= PCI_BASE_ADDRESS_0) && (where <= PCI_BASE_ADDRESS_1)) || | ||
243 | ((header_type != PCI_HEADER_TYPE_BRIDGE) && ((where >= PCI_BASE_ADDRESS_2) && | ||
244 | (where <= PCI_BASE_ADDRESS_5)))) | ||
245 | { | ||
246 | if ((value & PCI_BASE_ADDRESS_SPACE) == | ||
247 | PCI_BASE_ADDRESS_SPACE_IO) | ||
248 | { | ||
249 | /* | ||
250 | * I/O address. Check if the address is valid address on | ||
251 | * the Hades (pci_io_base_virt <= value < pci_io_base_virt + | ||
252 | * HADES_VIRT_IO_SIZE) or if the value is 0xffffffff. If not | ||
253 | * true do not write the base address register. If it is a | ||
254 | * valid base address subtract 'pci_io_base_virt' from the value. | ||
255 | */ | ||
256 | |||
257 | if ((value >= pci_io_base_virt) && (value < (pci_io_base_virt + | ||
258 | HADES_VIRT_IO_SIZE))) | ||
259 | value -= pci_io_base_virt; | ||
260 | else | ||
261 | { | ||
262 | if (value != 0xffffffff) | ||
263 | return PCIBIOS_SET_FAILED; | ||
264 | } | ||
265 | } | ||
266 | else | ||
267 | { | ||
268 | /* | ||
269 | * Memory address. Check if the address is valid address on | ||
270 | * the Hades (HADES_MEM_BASE <= value < HADES_MEM_BASE + HADES_MEM_SIZE) or | ||
271 | * if the value is 0xffffffff. If not true do not write | ||
272 | * the base address register. If it is a valid base address | ||
273 | * subtract HADES_MEM_BASE from the value. | ||
274 | */ | ||
275 | |||
276 | if ((value >= HADES_MEM_BASE) && (value < (HADES_MEM_BASE + HADES_MEM_SIZE))) | ||
277 | value -= HADES_MEM_BASE; | ||
278 | else | ||
279 | { | ||
280 | if (value != 0xffffffff) | ||
281 | return PCIBIOS_SET_FAILED; | ||
282 | } | ||
283 | } | ||
284 | } | ||
285 | |||
286 | *pci_addr = cpu_to_le32(value); | ||
287 | |||
288 | return PCIBIOS_SUCCESSFUL; | ||
289 | } | ||
290 | |||
291 | /* | ||
292 | * static inline void hades_fixup(void) | ||
293 | * | ||
294 | * Assign IRQ numbers as used by Linux to the interrupt pins | ||
295 | * of the PCI cards. | ||
296 | */ | ||
297 | |||
298 | static void __init hades_fixup(int pci_modify) | ||
299 | { | ||
300 | char irq_tab[4] = { | ||
301 | [0] = IRQ_TT_MFP_IO0, /* Slot 0. */ | ||
302 | [1] = IRQ_TT_MFP_IO1, /* Slot 1. */ | ||
303 | [2] = IRQ_TT_MFP_SCC, /* Slot 2. */ | ||
304 | [3] = IRQ_TT_MFP_SCSIDMA /* Slot 3. */ | ||
305 | }; | ||
306 | struct pci_dev *dev = NULL; | ||
307 | unsigned char slot; | ||
308 | |||
309 | /* | ||
310 | * Go through all devices, fixing up irqs as we see fit: | ||
311 | */ | ||
312 | |||
313 | while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) | ||
314 | { | ||
315 | if (dev->class >> 16 != PCI_BASE_CLASS_BRIDGE) | ||
316 | { | ||
317 | slot = PCI_SLOT(dev->devfn); /* Determine slot number. */ | ||
318 | dev->irq = irq_tab[slot]; | ||
319 | if (pci_modify) | ||
320 | pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq); | ||
321 | } | ||
322 | } | ||
323 | } | ||
324 | |||
325 | /* | ||
326 | * static void hades_conf_device(struct pci_dev *dev) | ||
327 | * | ||
328 | * Machine dependent Configure the given device. | ||
329 | * | ||
330 | * Parameters: | ||
331 | * | ||
332 | * dev - the pci device. | ||
333 | */ | ||
334 | |||
335 | static void __init hades_conf_device(struct pci_dev *dev) | ||
336 | { | ||
337 | pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 0); | ||
338 | } | ||
339 | |||
340 | static struct pci_ops hades_pci_ops = { | ||
341 | .read_byte = hades_read_config_byte, | ||
342 | .read_word = hades_read_config_word, | ||
343 | .read_dword = hades_read_config_dword, | ||
344 | .write_byte = hades_write_config_byte, | ||
345 | .write_word = hades_write_config_word, | ||
346 | .write_dword = hades_write_config_dword | ||
347 | }; | ||
348 | |||
349 | /* | ||
350 | * struct pci_bus_info *init_hades_pci(void) | ||
351 | * | ||
352 | * Machine specific initialisation: | ||
353 | * | ||
354 | * - Allocate and initialise a 'pci_bus_info' structure | ||
355 | * - Initialise hardware | ||
356 | * | ||
357 | * Result: pointer to 'pci_bus_info' structure. | ||
358 | */ | ||
359 | |||
360 | struct pci_bus_info * __init init_hades_pci(void) | ||
361 | { | ||
362 | struct pci_bus_info *bus; | ||
363 | int i; | ||
364 | |||
365 | /* | ||
366 | * Remap I/O and configuration space. | ||
367 | */ | ||
368 | |||
369 | pci_io_base_virt = (unsigned long) ioremap(HADES_IO_BASE, HADES_VIRT_IO_SIZE); | ||
370 | |||
371 | for (i = 0; i < N_SLOTS; i++) | ||
372 | pci_conf_base_virt[i] = (unsigned long) ioremap(pci_conf_base_phys[i], 0x10000); | ||
373 | |||
374 | /* | ||
375 | * Allocate memory for bus info structure. | ||
376 | */ | ||
377 | |||
378 | bus = kzalloc(sizeof(struct pci_bus_info), GFP_KERNEL); | ||
379 | if (unlikely(!bus)) | ||
380 | goto iounmap_base_virt; | ||
381 | |||
382 | /* | ||
383 | * Claim resources. The m68k has no separate I/O space, both | ||
384 | * PCI memory space and PCI I/O space are in memory space. Therefore | ||
385 | * the I/O resources are requested in memory space as well. | ||
386 | */ | ||
387 | |||
388 | if (unlikely(request_resource(&iomem_resource, &config_space) != 0)) | ||
389 | goto free_bus; | ||
390 | |||
391 | if (unlikely(request_resource(&iomem_resource, &io_space) != 0)) | ||
392 | goto release_config_space; | ||
393 | |||
394 | bus->mem_space.start = HADES_MEM_BASE; | ||
395 | bus->mem_space.end = HADES_MEM_BASE + HADES_MEM_SIZE - 1; | ||
396 | bus->mem_space.name = pci_mem_name; | ||
397 | #if 1 | ||
398 | if (unlikely(request_resource(&iomem_resource, &bus->mem_space) != 0)) | ||
399 | goto release_io_space; | ||
400 | #endif | ||
401 | bus->io_space.start = pci_io_base_virt; | ||
402 | bus->io_space.end = pci_io_base_virt + HADES_VIRT_IO_SIZE - 1; | ||
403 | bus->io_space.name = pci_io_name; | ||
404 | #if 1 | ||
405 | if (unlikely(request_resource(&ioport_resource, &bus->io_space) != 0)) | ||
406 | goto release_bus_mem_space; | ||
407 | #endif | ||
408 | /* | ||
409 | * Set hardware dependent functions. | ||
410 | */ | ||
411 | |||
412 | bus->m68k_pci_ops = &hades_pci_ops; | ||
413 | bus->fixup = hades_fixup; | ||
414 | bus->conf_device = hades_conf_device; | ||
415 | |||
416 | /* | ||
417 | * Select high to low edge for PCI interrupts. | ||
418 | */ | ||
419 | |||
420 | tt_mfp.active_edge &= ~0x27; | ||
421 | |||
422 | return bus; | ||
423 | |||
424 | release_bus_mem_space: | ||
425 | release_resource(&bus->mem_space); | ||
426 | release_io_space: | ||
427 | release_resource(&io_space); | ||
428 | release_config_space: | ||
429 | release_resource(&config_space); | ||
430 | free_bus: | ||
431 | kfree(bus); | ||
432 | iounmap_base_virt: | ||
433 | iounmap((void *)pci_io_base_virt); | ||
434 | |||
435 | for (i = 0; i < N_SLOTS; i++) | ||
436 | iounmap((void *)pci_conf_base_virt[i]); | ||
437 | |||
438 | return NULL; | ||
439 | } | ||
440 | #endif | ||