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authorHirokazu Takata <takata@linux-m32r.org>2007-08-01 08:10:11 -0400
committerHirokazu Takata <takata@linux-m32r.org>2007-09-02 22:30:18 -0400
commitef64cf605daa9c36d950ba94cc115b0aed130dbc (patch)
treed847f04d7c86bfb4c2190f29c3c97da1e77af49f /arch/m32r/platforms
parent3264f976d3188bea80819793c13a3220b8a4867c (diff)
m32r: Move dot.gdbinit files
Move dot.gdbinit files from arch/m32r/{platforms}/dot.gdbinit* to arch/m32r/platforms/{platform}/. Signed-off-by: Hirokazu Takata <takata@linux-m32r.org>
Diffstat (limited to 'arch/m32r/platforms')
-rw-r--r--arch/m32r/platforms/m32700ut/dot.gdbinit_200MHz_16MB249
-rw-r--r--arch/m32r/platforms/m32700ut/dot.gdbinit_300MHz_32MB249
-rw-r--r--arch/m32r/platforms/m32700ut/dot.gdbinit_400MHz_32MB249
-rw-r--r--arch/m32r/platforms/mappi/dot.gdbinit242
-rw-r--r--arch/m32r/platforms/mappi/dot.gdbinit.nommu245
-rw-r--r--arch/m32r/platforms/mappi/dot.gdbinit.smp344
-rw-r--r--arch/m32r/platforms/mappi2/dot.gdbinit.vdec2233
-rw-r--r--arch/m32r/platforms/mappi3/dot.gdbinit224
-rw-r--r--arch/m32r/platforms/oaks32r/dot.gdbinit.nommu154
-rw-r--r--arch/m32r/platforms/opsput/dot.gdbinit218
10 files changed, 2407 insertions, 0 deletions
diff --git a/arch/m32r/platforms/m32700ut/dot.gdbinit_200MHz_16MB b/arch/m32r/platforms/m32700ut/dot.gdbinit_200MHz_16MB
new file mode 100644
index 000000000000..525dab46982b
--- /dev/null
+++ b/arch/m32r/platforms/m32700ut/dot.gdbinit_200MHz_16MB
@@ -0,0 +1,249 @@
1# .gdbinit file
2# $Id: dot.gdbinit_200MHz_16MB,v 1.2 2004/10/20 03:02:27 fujiwara Exp $
3#-----
4# NOTE: this file is generated by a script, "gen_gdbinit.pl".
5# (Please type "gen_gdbinit.pl --help" and check the help message).
6# $ Id: gen_gdbinit.pl,v 1.12 2004/07/26 09:56:10 takata Exp $
7#-----
8# target platform: m32700ut
9
10# setting
11set width 0d70
12set radix 0d16
13
14debug_chaos
15
16# clk xin:cpu:bif:bus=25:200:50:50
17define clock_init
18 set *(unsigned long *)0x00ef4008 = 0x00000000
19 set *(unsigned long *)0x00ef4004 = 0
20 shell sleep 0.1
21 # NOTE: Please change the master clock source from PLL-clock to Xin-clock
22 # and switch off PLL, before resetting the clock gear ratio.
23
24 set *(unsigned long *)0x00ef4024 = 2
25 set *(unsigned long *)0x00ef4020 = 2
26 set *(unsigned long *)0x00ef4010 = 0
27 set *(unsigned long *)0x00ef4014 = 0
28 set *(unsigned long *)0x00ef4004 = 3
29 shell sleep 0.1
30 set *(unsigned long *)0x00ef4008 = 0x00000200
31end
32
33# Initialize SDRAM controller
34define sdram_init
35 # SDIR0
36 set *(unsigned long *)0x00ef6008 = 0x00000182
37 # SDIR1
38 set *(unsigned long *)0x00ef600c = 0x00000001
39 # Initialize wait
40 shell sleep 0.1
41 # Ch0-MOD
42 set *(unsigned long *)0x00ef602c = 0x00000020
43 # Ch0-TR
44 set *(unsigned long *)0x00ef6028 = 0x00041302
45 # Ch0-ADR (size:16MB)
46 set *(unsigned long *)0x00ef6020 = 0x08000002
47 # AutoRef On
48 set *(unsigned long *)0x00ef6004 = 0x00010517
49 # Access enable
50 set *(unsigned long *)0x00ef6024 = 0x00000001
51end
52document sdram_init
53 SDRAM controller initialization
54 0x08000000 - 0x08ffffff (16MB)
55end
56
57# Initialize BSEL3 for UT-CFC
58define cfc_init
59 set $sfrbase = 0xa0ef0000
60# too fast
61# set *(unsigned long *)($sfrbase + 0x5300) = 0x0b0b8000
62# set *(unsigned long *)($sfrbase + 0x5304) = 0x00102204
63# set *(unsigned long *)($sfrbase + 0x5300) = 0x1f1f8000
64# set *(unsigned long *)($sfrbase + 0x5300) = 0x1f1f1fdf
65# set *(unsigned long *)($sfrbase + 0x5304) = 0x0013220f
66# set *(unsigned long *)($sfrbase + 0x5304) = 0x0013330f
67end
68document cfc_init
69 CF controller initialization
70end
71
72# MMU enable
73define mmu_enable
74 set $evb=0x88000000
75 set *(unsigned long *)0xffff0024=1
76end
77
78# MMU disable
79define mmu_disable
80 set $evb=0
81 set *(unsigned long *)0xffff0024=0
82end
83
84# Show TLB entries
85define show_tlb_entries
86 set $i = 0
87 set $addr = $arg0
88 set $nr_entries = $arg1
89 use_mon_code
90 while ($i < $nr_entries)
91 set $tlb_tag = *(unsigned long*)$addr
92 set $tlb_data = *(unsigned long*)($addr + 4)
93 printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data
94 set $i = $i + 1
95 set $addr = $addr + 8
96 end
97 use_debug_dma
98end
99define itlb
100 set $itlb=0xfe000000
101 show_tlb_entries $itlb 0d32
102end
103define dtlb
104 set $dtlb=0xfe000800
105 show_tlb_entries $dtlb 0d32
106end
107
108# Initialize TLB entries
109define init_tlb_entries
110 set $i = 0
111 set $addr = $arg0
112 set $nr_entries = $arg1
113 use_mon_code
114 while ($i < $nr_entries)
115 set *(unsigned long *)($addr + 0x4) = 0
116 set $i = $i + 1
117 set $addr = $addr + 8
118 end
119 use_debug_dma
120end
121define tlb_init
122 set $itlb=0xfe000000
123 init_tlb_entries $itlb 0d32
124 set $dtlb=0xfe000800
125 init_tlb_entries $dtlb 0d32
126end
127
128# Show current task structure
129define show_current
130 set $current = $spi & 0xffffe000
131 printf "$current=0x%08lX\n",$current
132 print *(struct task_struct *)$current
133end
134
135# Show user assigned task structure
136define show_task
137 set = $arg0 & 0xffffe000
138 printf "$task=0x%08lX\n",$task
139 print *(struct task_struct *)$task
140end
141document show_task
142 Show user assigned task structure
143 arg0 : task structure address
144end
145
146# Show M32R registers
147define show_regs
148 printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
149 printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7
150 printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11
151 printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
152 printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
153 printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch
154 printf "EVB[0x%08lX]\n",$evb
155end
156
157# Setup all
158define setup
159 use_mon_code
160 set *(unsigned int)0xfffffffc=0x60
161 shell sleep 0.1
162 clock_init
163 shell sleep 0.1
164 # SDRAM: 16MB
165 set *(unsigned long *)0x00ef6020 = 0x08000002
166 cfc_init
167 # USB
168 set *(unsigned short *)0xb0301000 = 0x100
169
170 set $evb=0x08000000
171end
172
173# Load modules
174define load_modules
175 use_debug_dma
176 load
177end
178
179# Set kernel parameters
180define set_kernel_parameters
181 set $param = (void*)0x08001000
182 # INITRD_START
183# set *(unsigned long *)($param + 0x0010) = 0x08300000
184 # INITRD_SIZE
185# set *(unsigned long *)($param + 0x0014) = 0x00000000
186 # M32R_CPUCLK
187 set *(unsigned long *)($param + 0x0018) = 0d200000000
188 # M32R_BUSCLK
189 set *(unsigned long *)($param + 0x001c) = 0d50000000
190
191 # M32R_TIMER_DIVIDE
192 set *(unsigned long *)($param + 0x0020) = 0d128
193
194 set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x console=tty1 root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/rootfs,rsize=1024,wsize=1024 nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 mem=16M \0"
195end
196
197# Boot
198define boot
199 set_kernel_parameters
200 set $fp = 0
201 set $pc = 0x08002000
202# set *(unsigned char *)0xffffffff = 0x03
203 si
204 c
205end
206
207# Set breakpoints
208define set_breakpoints
209 b *0x08000030
210end
211
212# Restart
213define restart
214 sdireset
215 sdireset
216 set $pc = 0
217 b *0x04001000
218 b *0x08001000
219 b *0x08002000
220 si
221 c
222 tlb_init
223 del
224 setup
225 load_modules
226 boot
227end
228
229define si
230 stepi
231 x/i $pc
232 show_reg
233end
234
235sdireset
236sdireset
237file vmlinux
238target m32rsdi
239set $pc = 0
240b *0x04001000
241b *0x08001000
242b *0x08002000
243c
244tlb_init
245del
246setup
247load_modules
248boot
249
diff --git a/arch/m32r/platforms/m32700ut/dot.gdbinit_300MHz_32MB b/arch/m32r/platforms/m32700ut/dot.gdbinit_300MHz_32MB
new file mode 100644
index 000000000000..aa503657a49b
--- /dev/null
+++ b/arch/m32r/platforms/m32700ut/dot.gdbinit_300MHz_32MB
@@ -0,0 +1,249 @@
1# .gdbinit file
2# $Id: dot.gdbinit_300MHz_32MB,v 1.2 2004/10/20 03:02:27 fujiwara Exp $
3#-----
4# NOTE: this file is generated by a script, "gen_gdbinit.pl".
5# (Please type "gen_gdbinit.pl --help" and check the help message).
6# $ Id: gen_gdbinit.pl,v 1.12 2004/07/26 09:56:10 takata Exp $
7#-----
8# target platform: m32700ut
9
10# setting
11set width 0d70
12set radix 0d16
13
14debug_chaos
15
16# clk xin:cpu:bif:bus=25:300:75:75
17define clock_init
18 set *(unsigned long *)0x00ef4008 = 0x00000000
19 set *(unsigned long *)0x00ef4004 = 0
20 shell sleep 0.1
21 # NOTE: Please change the master clock source from PLL-clock to Xin-clock
22 # and switch off PLL, before resetting the clock gear ratio.
23
24 set *(unsigned long *)0x00ef4024 = 2
25 set *(unsigned long *)0x00ef4020 = 2
26 set *(unsigned long *)0x00ef4010 = 0
27 set *(unsigned long *)0x00ef4014 = 0
28 set *(unsigned long *)0x00ef4004 = 5
29 shell sleep 0.1
30 set *(unsigned long *)0x00ef4008 = 0x00000200
31end
32
33# Initialize SDRAM controller
34define sdram_init
35 # SDIR0
36 set *(unsigned long *)0x00ef6008 = 0x00000182
37 # SDIR1
38 set *(unsigned long *)0x00ef600c = 0x00000001
39 # Initialize wait
40 shell sleep 0.1
41 # Ch0-MOD
42 set *(unsigned long *)0x00ef602c = 0x00000020
43 # Ch0-TR
44 set *(unsigned long *)0x00ef6028 = 0x00051502
45 # Ch0-ADR (size:32MB)
46 set *(unsigned long *)0x00ef6020 = 0x08000003
47 # AutoRef On
48 set *(unsigned long *)0x00ef6004 = 0x00010e24
49 # Access enable
50 set *(unsigned long *)0x00ef6024 = 0x00000001
51end
52document sdram_init
53 SDRAM controller initialization
54 0x08000000 - 0x09ffffff (32MB)
55end
56
57# Initialize BSEL3 for UT-CFC
58define cfc_init
59 set $sfrbase = 0xa0ef0000
60# too fast
61# set *(unsigned long *)($sfrbase + 0x5300) = 0x0b0b8000
62# set *(unsigned long *)($sfrbase + 0x5304) = 0x00102204
63# set *(unsigned long *)($sfrbase + 0x5300) = 0x1f1f8000
64# set *(unsigned long *)($sfrbase + 0x5300) = 0x1f1f1fdf
65# set *(unsigned long *)($sfrbase + 0x5304) = 0x0013220f
66# set *(unsigned long *)($sfrbase + 0x5304) = 0x0013330f
67end
68document cfc_init
69 CF controller initialization
70end
71
72# MMU enable
73define mmu_enable
74 set $evb=0x88000000
75 set *(unsigned long *)0xffff0024=1
76end
77
78# MMU disable
79define mmu_disable
80 set $evb=0
81 set *(unsigned long *)0xffff0024=0
82end
83
84# Show TLB entries
85define show_tlb_entries
86 set $i = 0
87 set $addr = $arg0
88 set $nr_entries = $arg1
89 use_mon_code
90 while ($i < $nr_entries)
91 set $tlb_tag = *(unsigned long*)$addr
92 set $tlb_data = *(unsigned long*)($addr + 4)
93 printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data
94 set $i = $i + 1
95 set $addr = $addr + 8
96 end
97 use_debug_dma
98end
99define itlb
100 set $itlb=0xfe000000
101 show_tlb_entries $itlb 0d32
102end
103define dtlb
104 set $dtlb=0xfe000800
105 show_tlb_entries $dtlb 0d32
106end
107
108# Initialize TLB entries
109define init_tlb_entries
110 set $i = 0
111 set $addr = $arg0
112 set $nr_entries = $arg1
113 use_mon_code
114 while ($i < $nr_entries)
115 set *(unsigned long *)($addr + 0x4) = 0
116 set $i = $i + 1
117 set $addr = $addr + 8
118 end
119 use_debug_dma
120end
121define tlb_init
122 set $itlb=0xfe000000
123 init_tlb_entries $itlb 0d32
124 set $dtlb=0xfe000800
125 init_tlb_entries $dtlb 0d32
126end
127
128# Show current task structure
129define show_current
130 set $current = $spi & 0xffffe000
131 printf "$current=0x%08lX\n",$current
132 print *(struct task_struct *)$current
133end
134
135# Show user assigned task structure
136define show_task
137 set = $arg0 & 0xffffe000
138 printf "$task=0x%08lX\n",$task
139 print *(struct task_struct *)$task
140end
141document show_task
142 Show user assigned task structure
143 arg0 : task structure address
144end
145
146# Show M32R registers
147define show_regs
148 printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
149 printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7
150 printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11
151 printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
152 printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
153 printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch
154 printf "EVB[0x%08lX]\n",$evb
155end
156
157# Setup all
158define setup
159 use_mon_code
160 set *(unsigned int)0xfffffffc=0x60
161 shell sleep 0.1
162 clock_init
163 shell sleep 0.1
164 # SDRAM: 32MB
165 set *(unsigned long *)0x00ef6020 = 0x08000003
166 cfc_init
167 # USB
168 set *(unsigned short *)0xb0301000 = 0x100
169
170 set $evb=0x08000000
171end
172
173# Load modules
174define load_modules
175 use_debug_dma
176 load
177end
178
179# Set kernel parameters
180define set_kernel_parameters
181 set $param = (void*)0x08001000
182 # INITRD_START
183# set *(unsigned long *)($param + 0x0010) = 0x08300000
184 # INITRD_SIZE
185# set *(unsigned long *)($param + 0x0014) = 0x00000000
186 # M32R_CPUCLK
187 set *(unsigned long *)($param + 0x0018) = 0d300000000
188 # M32R_BUSCLK
189 set *(unsigned long *)($param + 0x001c) = 0d75000000
190
191 # M32R_TIMER_DIVIDE
192 set *(unsigned long *)($param + 0x0020) = 0d128
193
194 set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x console=tty1 root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/rootfs,rsize=1024,wsize=1024 nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 mem=32M \0"
195end
196
197# Boot
198define boot
199 set_kernel_parameters
200 set $fp = 0
201 set $pc = 0x08002000
202# set *(unsigned char *)0xffffffff = 0x03
203 si
204 c
205end
206
207# Set breakpoints
208define set_breakpoints
209 b *0x08000030
210end
211
212# Restart
213define restart
214 sdireset
215 sdireset
216 set $pc = 0
217 b *0x04001000
218 b *0x08001000
219 b *0x08002000
220 si
221 c
222 tlb_init
223 del
224 setup
225 load_modules
226 boot
227end
228
229define si
230 stepi
231 x/i $pc
232 show_reg
233end
234
235sdireset
236sdireset
237file vmlinux
238target m32rsdi
239set $pc = 0
240b *0x04001000
241b *0x08001000
242b *0x08002000
243c
244tlb_init
245del
246setup
247load_modules
248boot
249
diff --git a/arch/m32r/platforms/m32700ut/dot.gdbinit_400MHz_32MB b/arch/m32r/platforms/m32700ut/dot.gdbinit_400MHz_32MB
new file mode 100644
index 000000000000..adc608aab2fe
--- /dev/null
+++ b/arch/m32r/platforms/m32700ut/dot.gdbinit_400MHz_32MB
@@ -0,0 +1,249 @@
1# .gdbinit file
2# $Id: dot.gdbinit_400MHz_32MB,v 1.1 2004/10/21 01:41:27 fujiwara Exp $
3#-----
4# NOTE: this file is generated by a script, "gen_gdbinit.pl".
5# (Please type "gen_gdbinit.pl --help" and check the help message).
6# $ Id: gen_gdbinit.pl,v 1.12 2004/07/26 09:56:10 takata Exp $
7#-----
8# target platform: m32700ut
9
10# setting
11set width 0d70
12set radix 0d16
13
14debug_chaos
15
16# clk xin:cpu:bif:bus=25:400:100:50
17define clock_init
18 set *(unsigned long *)0x00ef4008 = 0x00000000
19 set *(unsigned long *)0x00ef4004 = 0
20 shell sleep 0.1
21 # NOTE: Please change the master clock source from PLL-clock to Xin-clock
22 # and switch off PLL, before resetting the clock gear ratio.
23
24 set *(unsigned long *)0x00ef4024 = 3
25 set *(unsigned long *)0x00ef4020 = 2
26 set *(unsigned long *)0x00ef4010 = 0
27 set *(unsigned long *)0x00ef4014 = 0
28 set *(unsigned long *)0x00ef4004 = 7
29 shell sleep 0.1
30 set *(unsigned long *)0x00ef4008 = 0x00000200
31end
32
33# Initialize SDRAM controller
34define sdram_init
35 # SDIR0
36 set *(unsigned long *)0x00ef6008 = 0x00000182
37 # SDIR1
38 set *(unsigned long *)0x00ef600c = 0x00000001
39 # Initialize wait
40 shell sleep 0.1
41 # Ch0-MOD
42 set *(unsigned long *)0x00ef602c = 0x00000020
43 # Ch0-TR
44 set *(unsigned long *)0x00ef6028 = 0x00041302
45 # Ch0-ADR (size:32MB)
46 set *(unsigned long *)0x00ef6020 = 0x08000003
47 # AutoRef On
48 set *(unsigned long *)0x00ef6004 = 0x00010517
49 # Access enable
50 set *(unsigned long *)0x00ef6024 = 0x00000001
51end
52document sdram_init
53 SDRAM controller initialization
54 0x08000000 - 0x09ffffff (32MB)
55end
56
57# Initialize BSEL3 for UT-CFC
58define cfc_init
59 set $sfrbase = 0xa0ef0000
60# too fast
61# set *(unsigned long *)($sfrbase + 0x5300) = 0x0b0b8000
62# set *(unsigned long *)($sfrbase + 0x5304) = 0x00102204
63# set *(unsigned long *)($sfrbase + 0x5300) = 0x1f1f8000
64# set *(unsigned long *)($sfrbase + 0x5300) = 0x1f1f1fdf
65# set *(unsigned long *)($sfrbase + 0x5304) = 0x0013220f
66# set *(unsigned long *)($sfrbase + 0x5304) = 0x0013330f
67end
68document cfc_init
69 CF controller initialization
70end
71
72# MMU enable
73define mmu_enable
74 set $evb=0x88000000
75 set *(unsigned long *)0xffff0024=1
76end
77
78# MMU disable
79define mmu_disable
80 set $evb=0
81 set *(unsigned long *)0xffff0024=0
82end
83
84# Show TLB entries
85define show_tlb_entries
86 set $i = 0
87 set $addr = $arg0
88 set $nr_entries = $arg1
89 use_mon_code
90 while ($i < $nr_entries)
91 set $tlb_tag = *(unsigned long*)$addr
92 set $tlb_data = *(unsigned long*)($addr + 4)
93 printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data
94 set $i = $i + 1
95 set $addr = $addr + 8
96 end
97 use_debug_dma
98end
99define itlb
100 set $itlb=0xfe000000
101 show_tlb_entries $itlb 0d32
102end
103define dtlb
104 set $dtlb=0xfe000800
105 show_tlb_entries $dtlb 0d32
106end
107
108# Initialize TLB entries
109define init_tlb_entries
110 set $i = 0
111 set $addr = $arg0
112 set $nr_entries = $arg1
113 use_mon_code
114 while ($i < $nr_entries)
115 set *(unsigned long *)($addr + 0x4) = 0
116 set $i = $i + 1
117 set $addr = $addr + 8
118 end
119 use_debug_dma
120end
121define tlb_init
122 set $itlb=0xfe000000
123 init_tlb_entries $itlb 0d32
124 set $dtlb=0xfe000800
125 init_tlb_entries $dtlb 0d32
126end
127
128# Show current task structure
129define show_current
130 set $current = $spi & 0xffffe000
131 printf "$current=0x%08lX\n",$current
132 print *(struct task_struct *)$current
133end
134
135# Show user assigned task structure
136define show_task
137 set = $arg0 & 0xffffe000
138 printf "$task=0x%08lX\n",$task
139 print *(struct task_struct *)$task
140end
141document show_task
142 Show user assigned task structure
143 arg0 : task structure address
144end
145
146# Show M32R registers
147define show_regs
148 printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
149 printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7
150 printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11
151 printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
152 printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
153 printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch
154 printf "EVB[0x%08lX]\n",$evb
155end
156
157# Setup all
158define setup
159 use_mon_code
160 set *(unsigned int)0xfffffffc=0x60
161 shell sleep 0.1
162 clock_init
163 shell sleep 0.1
164 # SDRAM: 32MB
165 set *(unsigned long *)0x00ef6020 = 0x08000003
166 cfc_init
167 # USB
168 set *(unsigned short *)0xb0301000 = 0x100
169
170 set $evb=0x08000000
171end
172
173# Load modules
174define load_modules
175 use_debug_dma
176 load
177end
178
179# Set kernel parameters
180define set_kernel_parameters
181 set $param = (void*)0x08001000
182 # INITRD_START
183# set *(unsigned long *)($param + 0x0010) = 0x08300000
184 # INITRD_SIZE
185# set *(unsigned long *)($param + 0x0014) = 0x00000000
186 # M32R_CPUCLK
187 set *(unsigned long *)($param + 0x0018) = 0d400000000
188 # M32R_BUSCLK
189 set *(unsigned long *)($param + 0x001c) = 0d50000000
190
191 # M32R_TIMER_DIVIDE
192 set *(unsigned long *)($param + 0x0020) = 0d128
193
194 set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x console=tty1 root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/rootfs,rsize=1024,wsize=1024 nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 mem=32M \0"
195end
196
197# Boot
198define boot
199 set_kernel_parameters
200 set $fp = 0
201 set $pc = 0x08002000
202# set *(unsigned char *)0xffffffff = 0x03
203 si
204 c
205end
206
207# Set breakpoints
208define set_breakpoints
209 b *0x08000030
210end
211
212# Restart
213define restart
214 sdireset
215 sdireset
216 set $pc = 0
217 b *0x04001000
218 b *0x08001000
219 b *0x08002000
220 si
221 c
222 tlb_init
223 del
224 setup
225 load_modules
226 boot
227end
228
229define si
230 stepi
231 x/i $pc
232 show_reg
233end
234
235sdireset
236sdireset
237file vmlinux
238target m32rsdi
239set $pc = 0
240b *0x04001000
241b *0x08001000
242b *0x08002000
243c
244tlb_init
245del
246setup
247load_modules
248boot
249
diff --git a/arch/m32r/platforms/mappi/dot.gdbinit b/arch/m32r/platforms/mappi/dot.gdbinit
new file mode 100644
index 000000000000..7a1d293863eb
--- /dev/null
+++ b/arch/m32r/platforms/mappi/dot.gdbinit
@@ -0,0 +1,242 @@
1# .gdbinit file
2# $Id: dot.gdbinit.mappi,v 1.4 2004/10/20 02:24:37 takata Exp $
3#-----
4# NOTE: this file is generated by a script, "gen_gdbinit.pl".
5# (Please type "gen_gdbinit.pl --help" and check the help message).
6# $ Id: gen_gdbinit.pl,v 1.12 2004/07/26 09:56:10 takata Exp $
7#-----
8# target platform: mappi
9
10# setting
11set width 0d70
12set radix 0d16
13debug_chaos
14
15# clk xin:cpu:bif:bus=30:360:180:90
16define clock_init
17 set *(unsigned long *)0x00ef4024 = 2
18 set *(unsigned long *)0x00ef4020 = 1
19 set *(unsigned long *)0x00ef4010 = 0
20 set *(unsigned long *)0x00ef4014 = 0
21 set *(unsigned long *)0x00ef4004 = 5
22 shell sleep 0.1
23 set *(unsigned long *)0x00ef4008 = 0x00000200
24end
25
26# Initialize programmable ports
27define port_init
28 set $sfrbase = 0x00ef0000
29 set *(unsigned short *)0x00ef1060 = 0x5555
30 set *(unsigned short *)0x00ef1062 = 0x5555
31 set *(unsigned short *)0x00ef1064 = 0x5555
32 set *(unsigned short *)0x00ef1066 = 0x5555
33 set *(unsigned short *)0x00ef1068 = 0x5555
34 set *(unsigned short *)0x00ef106a = 0x0000
35 set *(unsigned short *)0x00ef106e = 0x5555
36 set *(unsigned short *)0x00ef1070 = 0x5555
37 # LED ON
38 set *(unsigned char *)($sfrbase + 0x1015) = 0xff
39 set *(unsigned char *)($sfrbase + 0x1085) = 0xff
40 shell sleep 0.1
41 # LED OFF
42 set *(unsigned char *)($sfrbase + 0x1085) = 0x00
43end
44document port_init
45 P5=LED(output), P6.b4=LAN_RESET(output)
46end
47
48# Initialize SDRAM controller
49define sdram_init
50 # SDIR0
51 set *(unsigned long *)0x00ef6008 = 0x00000182
52 # SDIR1
53 set *(unsigned long *)0x00ef600c = 0x00000001
54 # Initialize wait
55 shell sleep 0.1
56 # Ch0-MOD
57 set *(unsigned long *)0x00ef602c = 0x00000020
58 # Ch0-TR
59 set *(unsigned long *)0x00ef6028 = 0x00051502
60 # Ch0-ADR (size:64MB)
61 set *(unsigned long *)0x00ef6020 = 0x08000004
62 # AutoRef On
63 set *(unsigned long *)0x00ef6004 = 0x00010e2b
64 # Access enable
65 set *(unsigned long *)0x00ef6024 = 0x00000001
66end
67document sdram_init
68 SDRAM controller initialization
69 0x08000000 - 0x0bffffff (64MB)
70end
71
72# Initialize LAN controller
73define lanc_init
74 set $sfrbase = 0x00ef0000
75 # Set BSEL3 (BSEL3 for the Chaos's bselc)
76 set *(unsigned long *)($sfrbase + 0x5300) = 0x0a0a8040
77 set *(unsigned long *)($sfrbase + 0x5304) = 0x01120203
78 set *(unsigned long *)($sfrbase + 0x5308) = 0x00000001
79 # Reset (P5=LED,P6.b4=LAN_RESET)
80 set *(unsigned short *)($sfrbase + 0x106c) = 0x0000
81 set *(unsigned char *)($sfrbase + 0x1016) = 0xff
82 set *(unsigned char *)($sfrbase + 0x1086) = 0xff
83 shell sleep 0.1
84 # swivel: 0=normal, 4=reverse
85# set *(unsigned char *)($sfrbase + 0x1086) = 0x00
86 set *(unsigned char *)($sfrbase + 0x1086) = 0x04
87 set *(unsigned long *)(0x0c000330) = 0xffffffff
88 # Set mac address
89 set $lanc = (void*)0x0c000300
90 set *(unsigned long *)($lanc + 0x0000) = 0x00610010
91 set *(unsigned long *)($lanc + 0x0004) = 0x00200030
92 set *(unsigned long *)($lanc + 0x0008) = 0x00400050
93 set *(unsigned long *)($lanc + 0x000c) = 0x00600007
94end
95document lanc_init
96 LAN controller initialization
97 ex.) MAC address: 10 20 30 40 50 60
98end
99
100# LCD & CRT dual-head setting (8bpp)
101define dispc_init
102 set $sfrbase = 0x00ef0000
103 # BSEL4 Dispc
104 set *(unsigned long *)($sfrbase + 0x5400) = 0x0e0e8000
105 set *(unsigned long *)($sfrbase + 0x5404) = 0x0012220a
106end
107
108# MMU enable
109define mmu_enable
110 set $evb=0x88000000
111 set *(unsigned long *)0xffff0024=1
112end
113
114# MMU disable
115define mmu_disable
116 set $evb=0
117 set *(unsigned long *)0xffff0024=0
118end
119
120# Show TLB entries
121define show_tlb_entries
122 set $i = 0
123 set $addr = $arg0
124 set $nr_entries = $arg1
125 use_mon_code
126 while ($i < $nr_entries)
127 set $tlb_tag = *(unsigned long*)$addr
128 set $tlb_data = *(unsigned long*)($addr + 4)
129 printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data
130 set $i = $i + 1
131 set $addr = $addr + 8
132 end
133 use_debug_dma
134end
135define itlb
136 set $itlb=0xfe000000
137 show_tlb_entries $itlb 0d32
138end
139define dtlb
140 set $dtlb=0xfe000800
141 show_tlb_entries $dtlb 0d32
142end
143
144# Show current task structure
145define show_current
146 set $current = $spi & 0xffffe000
147 printf "$current=0x%08lX\n",$current
148 print *(struct task_struct *)$current
149end
150
151# Show user assigned task structure
152define show_task
153 set = $arg0 & 0xffffe000
154 printf "$task=0x%08lX\n",$task
155 print *(struct task_struct *)$task
156end
157document show_task
158 Show user assigned task structure
159 arg0 : task structure address
160end
161
162# Show M32R registers
163define show_regs
164 printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
165 printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7
166 printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11
167 printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
168 printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
169 printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch
170 printf "EVB[0x%08lX]\n",$evb
171end
172
173# Setup all
174define setup
175 use_mon_code
176 set *(unsigned int)0xfffffffc=0x60
177 shell sleep 0.1
178 clock_init
179 shell sleep 0.1
180 port_init
181 sdram_init
182 lanc_init
183 dispc_init
184 set $evb=0x08000000
185end
186
187# Load modules
188define load_modules
189 use_debug_dma
190 load
191end
192
193# Set kernel parameters
194define set_kernel_parameters
195 set $param = (void*)0x08001000
196 # INITRD_START
197# set *(unsigned long *)($param + 0x0010) = 0x08300000
198 # INITRD_SIZE
199# set *(unsigned long *)($param + 0x0014) = 0x00000000
200 # M32R_CPUCLK
201 set *(unsigned long *)($param + 0x0018) = 0d360000000
202 # M32R_BUSCLK
203 set *(unsigned long *)($param + 0x001c) = 0d90000000
204
205 # M32R_TIMER_DIVIDE
206 set *(unsigned long *)($param + 0x0020) = 0d128
207
208 set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x console=tty1 root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/rootfs nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 \0"
209end
210
211# Boot
212define boot
213 set_kernel_parameters
214 set $fp = 0
215 set $pc = 0x08002000
216 si
217 c
218end
219
220# Set breakpoints
221define set_breakpoints
222 b *0x08000030
223end
224
225# Restart
226define restart
227 sdireset
228 sdireset
229 setup
230 load_modules
231 boot
232end
233
234sdireset
235sdireset
236file vmlinux
237target m32rsdi
238setup
239#load_modules
240#set_breakpoints
241#boot
242
diff --git a/arch/m32r/platforms/mappi/dot.gdbinit.nommu b/arch/m32r/platforms/mappi/dot.gdbinit.nommu
new file mode 100644
index 000000000000..297536cf67cf
--- /dev/null
+++ b/arch/m32r/platforms/mappi/dot.gdbinit.nommu
@@ -0,0 +1,245 @@
1# .gdbinit file
2# $Id$
3#-----
4# NOTE: this file is generated by a script, "gen_gdbinit.pl".
5# (Please type "gen_gdbinit.pl --help" and check the help message).
6# $ Id: gen_gdbinit.pl,v 1.5 2004/01/23 08:23:25 takata Exp $
7#-----
8# target platform: mappi
9
10# setting
11set width 0d70
12set radix 0d16
13debug_chaos
14
15# clk xin:cpu:bif:bus=25:200:50:50
16define clock_init
17 set *(unsigned long *)0x00ef4024 = 2
18 set *(unsigned long *)0x00ef4020 = 2
19 set *(unsigned long *)0x00ef4010 = 0
20 set *(unsigned long *)0x00ef4014 = 0
21 set *(unsigned long *)0x00ef4004 = 3
22 shell sleep 0.1
23 set *(unsigned long *)0x00ef4008 = 0x00000200
24end
25
26# Initialize programmable ports
27define port_init
28 set $sfrbase = 0x00ef0000
29 set *(unsigned short *)0x00ef1060 = 0x5555
30 set *(unsigned short *)0x00ef1062 = 0x5555
31 set *(unsigned short *)0x00ef1064 = 0x5555
32 set *(unsigned short *)0x00ef1066 = 0x5555
33 set *(unsigned short *)0x00ef1068 = 0x5555
34 set *(unsigned short *)0x00ef106a = 0x0000
35 set *(unsigned short *)0x00ef106e = 0x5555
36 set *(unsigned short *)0x00ef1070 = 0x5555
37 # LED ON
38 set *(unsigned char *)($sfrbase + 0x1015) = 0xff
39 set *(unsigned char *)($sfrbase + 0x1085) = 0xff
40 shell sleep 0.1
41 # LED OFF
42 set *(unsigned char *)($sfrbase + 0x1085) = 0x00
43end
44document port_init
45 P5=LED(output), P6.b4=LAN_RESET(output)
46end
47
48# Initialize SDRAM controller
49define sdram_init
50 # SDIR0
51 set *(unsigned long *)0x00ef6008 = 0x00000182
52 # SDIR1
53 set *(unsigned long *)0x00ef600c = 0x00000001
54 # Initialize wait
55 shell sleep 0.1
56 # Ch0-MOD
57 set *(unsigned long *)0x00ef602c = 0x00000020
58 # Ch0-TR
59 set *(unsigned long *)0x00ef6028 = 0x00051502
60 # Ch0-ADR (size:64MB)
61 set *(unsigned long *)0x00ef6020 = 0x00000004
62 # AutoRef On
63 set *(unsigned long *)0x00ef6004 = 0x00010f05
64 # Access enable
65 set *(unsigned long *)0x00ef6024 = 0x00000001
66end
67document sdram_init
68 SDRAM controller initialization
69 0x08000000 - 0x0bffffff (64MB)
70end
71
72# Initialize LAN controller
73define lanc_init
74 set $sfrbase = 0x00ef0000
75 # Set BSEL3 (BSEL3 for the Chaos's bselc)
76 set *(unsigned long *)($sfrbase + 0x5300) = 0x07078040
77 set *(unsigned long *)($sfrbase + 0x5304) = 0x01110102
78 set *(unsigned long *)($sfrbase + 0x5308) = 0x00000001
79 # Reset (P5=LED,P6.b4=LAN_RESET)
80 set *(unsigned short *)($sfrbase + 0x106c) = 0x0000
81 set *(unsigned char *)($sfrbase + 0x1016) = 0xff
82 set *(unsigned char *)($sfrbase + 0x1086) = 0xff
83 shell sleep 0.1
84 # swivel: 0=normal, 4=reverse
85# set *(unsigned char *)($sfrbase + 0x1086) = 0x00
86 set *(unsigned char *)($sfrbase + 0x1086) = 0x04
87 set *(unsigned long *)(0x0c000330) = 0xffffffff
88 # Set mac address
89 set $lanc = (void*)0x0c000300
90 set *(unsigned long *)($lanc + 0x0000) = 0x00610010
91 set *(unsigned long *)($lanc + 0x0004) = 0x00200030
92 set *(unsigned long *)($lanc + 0x0008) = 0x00400050
93 set *(unsigned long *)($lanc + 0x000c) = 0x00600007
94end
95document lanc_init
96 LAN controller initialization
97 ex.) MAC address: 10 20 30 40 50 60
98end
99
100# LCD & CRT dual-head setting (8bpp)
101define dispc_init
102 set $sfrbase = 0x00ef0000
103 # BSEL4 Dispc
104 set *(unsigned long *)($sfrbase + 0x5400) = 0x06078000
105 set *(unsigned long *)($sfrbase + 0x5404) = 0x00101101
106end
107
108# MMU enable
109define mmu_enable
110 set $evb=0x88000000
111 set *(unsigned long *)0xffff0024=1
112end
113
114# MMU disable
115define mmu_disable
116 set $evb=0
117 set *(unsigned long *)0xffff0024=0
118end
119
120# Show TLB entries
121define show_tlb_entries
122 set $i = 0
123 set $addr = $arg0
124 set $nr_entries = $arg1
125 use_mon_code
126 while ($i < $nr_entries)
127 set $tlb_tag = *(unsigned long*)$addr
128 set $tlb_data = *(unsigned long*)($addr + 4)
129 printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data
130 set $i = $i + 1
131 set $addr = $addr + 8
132 end
133 use_debug_dma
134end
135define itlb
136 set $itlb=0xfe000000
137 show_tlb_entries $itlb 0d32
138end
139define dtlb
140 set $dtlb=0xfe000800
141 show_tlb_entries $dtlb 0d32
142end
143
144# Show current task structure
145define show_current
146 set $current = $spi & 0xffffe000
147 printf "$current=0x%08lX\n",$current
148 print *(struct task_struct *)$current
149end
150
151# Show user assigned task structure
152define show_task
153 set = $arg0 & 0xffffe000
154 printf "$task=0x%08lX\n",$task
155 print *(struct task_struct *)$task
156end
157document show_task
158 Show user assigned task structure
159 arg0 : task structure address
160end
161
162# Show M32R registers
163define show_regs
164 printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
165 printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7
166 printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11
167 printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
168 printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
169 printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch
170 printf "EVB[0x%08lX]\n",$evb
171end
172
173# Setup all
174define setup
175 use_mon_code
176 set *(unsigned int)0xfffffffc=0x60
177 shell sleep 0.1
178 clock_init
179 shell sleep 0.1
180 port_init
181 sdram_init
182 lanc_init
183 dispc_init
184 set $evb=0x00000000
185end
186
187# Load modules
188define load_modules
189 use_debug_dma
190 load
191end
192
193# Set kernel parameters
194define set_kernel_parameters
195 set $param = (void*)0x00001000
196 # INITRD_START
197 #set *(unsigned long *)($param + 0x0010) = 0x082a0000
198 # INITRD_SIZE
199 #set *(unsigned long *)($param + 0x0014) = 0x00000000
200 # M32R_CPUCLK
201 set *(unsigned long *)($param + 0x0018) = 0d200000000
202 # M32R_BUSCLK
203 set *(unsigned long *)($param + 0x001c) = 0d50000000
204
205 # M32R_TIMER_DIVIDE
206 set *(unsigned long *)($param + 0x0020) = 0d128
207
208 set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/root.bbox-httpd nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 \0"
209end
210
211# Boot
212define boot
213 set_kernel_parameters
214 set $fp = 0
215 set $pc=0x00002000
216 set *(long *)0xfffffff4=0x8080
217# b load_flat_binary
218# set *(unsigned char *)0x08001003=0x63
219# set *(unsigned char *)0x08001003=0x02
220 si
221# c
222end
223
224# Set breakpoints
225define set_breakpoints
226 b *0x08000030
227end
228
229# Restart
230define restart
231 sdireset
232 sdireset
233 setup
234 load_modules
235 boot
236end
237
238sdireset
239sdireset
240file vmlinux
241target m32rsdi
242setup
243load_modules
244boot
245
diff --git a/arch/m32r/platforms/mappi/dot.gdbinit.smp b/arch/m32r/platforms/mappi/dot.gdbinit.smp
new file mode 100644
index 000000000000..171489a440d9
--- /dev/null
+++ b/arch/m32r/platforms/mappi/dot.gdbinit.smp
@@ -0,0 +1,344 @@
1# .gdbinit file
2# $Id$
3
4# setting
5set width 0d70
6set radix 0d16
7debug_chaos
8
9# clk xin:cpu:bif:bus=1:4:2:1
10define clock_init_on
11 set *(unsigned long *)0x00ef4024 = 2
12 set *(unsigned long *)0x00ef4020 = 1
13 set *(unsigned long *)0x00ef4010 = 0
14 set *(unsigned long *)0x00ef4014 = 0
15 set *(unsigned long *)0x00ef4004 = 0x1
16 shell sleep 0.1
17 set *(unsigned long *)0x00ef4008 = 0x0200
18# set *(unsigned long *)0x00ef4008 = 0x0201
19end
20
21# clk xin:cpu:bif:bus=1:4:1:1
22define clock_init_on_1411
23 set *(unsigned long *)0x00ef4024 = 2
24 set *(unsigned long *)0x00ef4020 = 2
25 set *(unsigned long *)0x00ef4010 = 0
26 set *(unsigned long *)0x00ef4014 = 0
27 set *(unsigned long *)0x00ef4004 = 0x1
28 shell sleep 0.1
29 set *(unsigned long *)0x00ef4008 = 0x0200
30end
31
32# clk xin:cpu:bif:bus=1:4:2:1
33define clock_init_on_1421
34 set *(unsigned long *)0x00ef4024 = 2
35 set *(unsigned long *)0x00ef4020 = 1
36 set *(unsigned long *)0x00ef4010 = 0
37 set *(unsigned long *)0x00ef4014 = 0
38 set *(unsigned long *)0x00ef4004 = 0x1
39 shell sleep 0.1
40 set *(unsigned long *)0x00ef4008 = 0x0200
41end
42
43# clk xin:cpu:bif:bus=1:8:2:1
44define clock_init_on_1821
45 set *(unsigned long *)0x00ef4024 = 3
46 set *(unsigned long *)0x00ef4020 = 2
47 set *(unsigned long *)0x00ef4010 = 0
48 set *(unsigned long *)0x00ef4014 = 0
49 set *(unsigned long *)0x00ef4004 = 0x3
50 shell sleep 0.1
51 set *(unsigned long *)0x00ef4008 = 0x0200
52end
53
54# clk xin:cpu:bif:bus=1:8:4:1
55define clock_init_on_1841
56 set *(unsigned long *)0x00ef4024 = 3
57 set *(unsigned long *)0x00ef4020 = 1
58 set *(unsigned long *)0x00ef4010 = 0
59 set *(unsigned long *)0x00ef4014 = 0
60 set *(unsigned long *)0x00ef4004 = 0x3
61 shell sleep 0.1
62 set *(unsigned long *)0x00ef4008 = 0x0200
63end
64
65# clk xin:cpu:bif:bus=1:16:8:1
66define clock_init_on_11681
67 set *(unsigned long *)0x00ef4024 = 4
68 set *(unsigned long *)0x00ef4020 = 2
69 set *(unsigned long *)0x00ef4010 = 0
70 set *(unsigned long *)0x00ef4014 = 0
71 set *(unsigned long *)0x00ef4004 = 0x7
72 shell sleep 0.1
73 set *(unsigned long *)0x00ef4008 = 0x0200
74end
75
76# clk xin:cpu:bif:bus=1:1:1:1
77define clock_init_off
78 # CPU
79 set *(unsigned long *)0x00ef4010 = 0
80 set *(unsigned long *)0x00ef4014 = 0
81 # BIF
82 set *(unsigned long *)0x00ef4020 = 0
83 # BUS
84 set *(unsigned long *)0x00ef4024 = 0
85 # PLL
86 set *(unsigned long *)0x00ef4008 = 0x0000
87end
88
89# Initialize programmable ports
90define port_init
91 set $sfrbase = 0x00ef0000
92 set *(unsigned short *)0x00ef1060 = 0x5555
93 set *(unsigned short *)0x00ef1062 = 0x5555
94 set *(unsigned short *)0x00ef1064 = 0x5555
95 set *(unsigned short *)0x00ef1066 = 0x5555
96 set *(unsigned short *)0x00ef1068 = 0x5555
97 set *(unsigned short *)0x00ef106a = 0x0000
98 set *(unsigned short *)0x00ef106e = 0x5555
99 set *(unsigned short *)0x00ef1070 = 0x5555
100 # LED ON
101 set *(unsigned char *)($sfrbase + 0x1015) = 0xff
102 set *(unsigned char *)($sfrbase + 0x1085) = 0xff
103 shell sleep 0.1
104 # LED OFF
105 set *(unsigned char *)($sfrbase + 0x1085) = 0x00
106end
107document port_init
108 P5=LED(output), P6.b4=LAN_RESET(output)
109end
110
111# Initialize SDRAM controller for Mappi
112define sdram_init
113 # SDIR0
114 set *(unsigned long *)0x00ef6008 = 0x00000182
115 # SDIR1
116 set *(unsigned long *)0x00ef600c = 0x00000001
117 # Initialize wait
118 shell sleep 0.1
119 # Ch0-MOD
120 set *(unsigned long *)0x00ef602c = 0x00000020
121 # Ch0-TR
122 set *(unsigned long *)0x00ef6028 = 0x00010002
123 # Ch0-ADR
124 set *(unsigned long *)0x00ef6020 = 0x08000004
125 # AutoRef On
126 set *(unsigned long *)0x00ef6004 = 0x00010107
127 # Access enable
128 set *(unsigned long *)0x00ef6024 = 0x00000001
129end
130document sdram_init
131 Mappi SDRAM controller initialization
132 0x08000000 - 0x0bffffff (64MB)
133end
134
135# Initialize LAN controller for Mappi
136define lanc_init
137 set $sfrbase = 0x00ef0000
138 # Set BSEL3 (BSEL3 for the Chaos's bselc)
139# set *(unsigned long *)($sfrbase + 0x5300) = 0x01018040
140# set *(unsigned long *)($sfrbase + 0x5304) = 0x01011101
141 set *(unsigned long *)($sfrbase + 0x5300) = 0x04048000
142 set *(unsigned long *)($sfrbase + 0x5304) = 0x01011103
143 set *(unsigned long *)($sfrbase + 0x5308) = 0x00000001
144 # Reset (P5=LED,P6.b4=LAN_RESET)
145 set *(unsigned short *)($sfrbase + 0x106c) = 0x0000
146 set *(unsigned char *)($sfrbase + 0x1016) = 0xff
147 set *(unsigned char *)($sfrbase + 0x1086) = 0xff
148 shell sleep 0.1
149# set *(unsigned char *)($sfrbase + 0x1086) = 0x00
150 set *(unsigned char *)($sfrbase + 0x1086) = 0x04
151 set *(unsigned long *)(0x0c000330) = 0xffffffff
152 # Set mac address
153 set $lanc = (void*)0x0c000300
154 set *(unsigned long *)($lanc + 0x0000) = 0x00610010
155 set *(unsigned long *)($lanc + 0x0004) = 0x00200030
156 set *(unsigned long *)($lanc + 0x0008) = 0x00400050
157 set *(unsigned long *)($lanc + 0x000c) = 0x00600007
158end
159document lanc_init
160 Mappi LAN controller initialization
161 ex.) MAC address: 10 20 30 40 50 60
162end
163
164# LCD & CRT dual-head setting (8bpp)
165define dispc_init
166 set $sfrbase = 0x00ef0000
167 # BSEL4 Dispc
168 # 20MHz
169# set *(unsigned long *)($sfrbase + 0x5400) = 0x02028282
170# set *(unsigned long *)($sfrbase + 0x5404) = 0x00122202
171 # 40MHz
172 set *(unsigned long *)($sfrbase + 0x5400) = 0x04048000
173 set *(unsigned long *)($sfrbase + 0x5404) = 0x00101103
174end
175
176# MMU enable
177define mmu_enable
178 set $evb=0x88000000
179 set *(unsigned long *)0xffff0024=1
180end
181
182# MMU disable
183define mmu_disable
184 set $evb=0
185 set *(unsigned long *)0xffff0024=0
186end
187
188# Show TLB entries
189define show_tlb_entries
190 set $i = 0
191 set $addr = $arg0
192 use_mon_code
193 while ($i < 0d32 )
194 set $tlb_tag = *(unsigned long*)$addr
195 set $tlb_data = *(unsigned long*)($addr + 4)
196 printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data
197 set $i = $i + 1
198 set $addr = $addr + 8
199 end
200 use_debug_dma
201end
202define itlb
203 set $itlb=0xfe000000
204 show_tlb_entries $itlb
205end
206define dtlb
207 set $dtlb=0xfe000800
208 show_tlb_entries $dtlb
209end
210
211
212# Show current task structure
213define show_current
214 set $current = $spi & 0xffffe000
215 printf "$current=0x%08lX\n",$current
216 print *(struct task_struct *)$current
217end
218
219# Show user assigned task structure
220define show_task
221 set $task = $arg0 & 0xffffe000
222 printf "$task=0x%08lX\n",$task
223 print *(struct task_struct *)$task
224end
225document show_task
226 Show user assigned task structure
227 arg0 : task structure address
228end
229
230# Show M32R registers
231define show_regs
232 printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
233 printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7
234 printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11
235 printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$fp
236 printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
237 printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch
238 printf "EVB[0x%08lX]\n",$evb
239end
240
241
242# Setup all
243define setup
244 use_mon_code
245 set *(unsigned int)0xfffffffc=0x60
246 shell sleep 0.1
247# clock_init_on_1411
248 clock_init_on_1421
249# clock_init_on_1821
250# clock_init_on_1841
251# clock_init_on_11681
252# clock_init_off
253 shell sleep 0.1
254 port_init
255 sdram_init
256 lanc_init
257 dispc_init
258 set $evb=0x08000000
259end
260
261# Load modules
262define load_modules
263 use_debug_dma
264 load
265# load ramdisk_082a0000.mot
266# load romfs_082a0000.mot
267# use_mon_code
268end
269
270# Set kernel parameters
271define set_kernel_parameters
272 set $param = (void*)0x08001000
273 # INITRD_START
274# set *(unsigned long *)($param + 0x0010) = 0x082a0000
275 # INITRD_SIZE
276# set *(unsigned long *)($param + 0x0014) = 0x00000000
277 # M32R_CPUCLK
278 set *(unsigned long *)($param + 0x0018) = 0d160000000
279# set *(unsigned long *)($param + 0x0018) = 0d80000000
280# set *(unsigned long *)($param + 0x0018) = 0d40000000
281 # M32R_BUSCLK
282 set *(unsigned long *)($param + 0x001c) = 0d40000000
283
284 # M32R_TIMER_DIVIDE
285 set *(unsigned long *)($param + 0x0020) = 0d128
286
287 set {char[0x200]}($param + 0x100) = "console=tty1 console=ttyS0,115200n8x root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/root.x nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 \0"
288# set {char[0x200]}($param + 0x100) = "console=tty1 root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/root.x nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 \0"
289end
290
291# Boot
292define boot
293 set_kernel_parameters
294 set $pc=0x08002000
295 set *(unsigned char *)0x08001003=0x03
296 si
297 c
298end
299
300# Set breakpoints
301define set_breakpoints
302 b *0x08000030
303end
304
305## Boot MP
306define boot_mp
307 set_kernel_parameters
308 set *(unsigned long *)0x00f00000 = boot - 0x80000000
309 set *(unsigned long *)0x00eff2f8 = 0x2
310 x 0x00eff2f8
311
312 set $pc=0x08002000
313 si
314 c
315end
316document boot_mp
317 Boot BSP
318end
319
320## Boot UP
321define boot_up
322 set_kernel_parameters
323 set $pc=0x08002000
324 si
325 c
326end
327document boot_up
328 Boot BSP
329end
330
331# Restart
332define restart
333 sdireset
334 sdireset
335 setup
336 load_modules
337 boot_mp
338end
339
340sdireset
341sdireset
342file vmlinux
343target m32rsdi
344setup
diff --git a/arch/m32r/platforms/mappi2/dot.gdbinit.vdec2 b/arch/m32r/platforms/mappi2/dot.gdbinit.vdec2
new file mode 100644
index 000000000000..797a830bd4b7
--- /dev/null
+++ b/arch/m32r/platforms/mappi2/dot.gdbinit.vdec2
@@ -0,0 +1,233 @@
1# .gdbinit file
2# $Id: dot.gdbinit.vdec2,v 1.2 2004/11/11 02:03:15 takata Exp $
3
4# setting
5set width 0d70
6set radix 0d16
7use_debug_dma
8
9# Initialize SDRAM controller for Mappi
10define sdram_init
11 # SDIR0
12 set *(unsigned long *)0x00ef6008=0x00000182
13 # SDIR1
14 set *(unsigned long *)0x00ef600c=0x00000001
15 # Initialize wait
16 shell sleep 1
17 # Ch0-MOD
18 set *(unsigned long *)0x00ef602c=0x00000020
19 # Ch0-TR
20 set *(unsigned long *)0x00ef6028=0x00041302
21 # Ch0-ADR
22 set *(unsigned long *)0x00ef6020=0x08000004
23 # AutoRef On
24 set *(unsigned long *)0x00ef6004=0x00010705
25 # Access enable
26 set *(unsigned long *)0x00ef6024=0x00000001
27end
28document sdram_init
29 Mappi SDRAM controller initialization
30 0x08000000 - 0x0bffffff (64MB)
31end
32
33# Initialize SDRAM controller for Mappi
34define sdram_init2
35 # SDIR0
36 set *(unsigned long *)0x00ef6008=0x00000182
37 # Ch0-MOD
38 set *(unsigned long *)0x00ef602c=0x00000020
39 # Ch0-TR
40 set *(unsigned long *)0x00ef6028=0x00010002
41 # Ch0-ADR
42 set *(unsigned long *)0x00ef6020=0x08000004
43 # AutoRef On
44 set *(unsigned long *)0x00ef6004=0x00010107
45 # SDIR1
46 set *(unsigned long *)0x00ef600c=0x00000001
47 # Initialize wait
48 shell sleep 1
49 # Access enable
50 set *(unsigned long *)0x00ef6024=0x00000001
51 shell sleep 1
52end
53document sdram_init
54 Mappi SDRAM controller initialization
55 0x08000000 - 0x0bffffff (64MB)
56end
57
58# Initialize LAN controller for Mappi
59define lanc_init
60 # Set BSEL1 (BSEL3 for the Chaos's bselc)
61 #set *(unsigned long *)0x00ef5004 = 0x0fff330f
62 #set *(unsigned long *)0x00ef5004 = 0x01113301
63
64# set *(unsigned long *)0x00ef5004 = 0x02011101
65# set *(unsigned long *)0x00ef5004 = 0x04441104
66
67 # BSEL5
68# set *(unsigned long *)0x00ef5014 = 0x0ccc310c
69# set *(unsigned long *)0x00ef5014 = 0x0303310f
70# set *(unsigned long *)0x00ef5014 = 0x01011102 -> NG
71# set *(unsigned long *)0x00ef5014 = 0x03033103
72
73 set *(unsigned long *)0x00ef500c = 0x0b0b1304
74 set *(unsigned long *)0x00ef5010 = 0x03033302
75# set *(unsigned long *)0x00ef5018 = 0x02223302
76end
77
78# MMU enable
79define mmu_enable
80 set $evb=0x88000000
81 set *(unsigned long *)0xffff0024=1
82end
83
84# MMU disable
85define mmu_disable
86 set $evb=0
87 set *(unsigned long *)0xffff0024=0
88end
89
90# Show TLB entries
91define show_tlb_entries
92 set $i = 0
93 set $addr = $arg0
94 while ($i < 0d16 )
95 set $tlb_tag = *(unsigned long*)$addr
96 set $tlb_data = *(unsigned long*)($addr + 4)
97 printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data
98 set $i = $i + 1
99 set $addr = $addr + 8
100 end
101end
102define itlb
103 set $itlb=0xfe000000
104 show_tlb_entries $itlb
105end
106define dtlb
107 set $dtlb=0xfe000800
108 show_tlb_entries $dtlb
109end
110
111# Cache ON
112define set_cache_type
113 set $mctype = (void*)0xfffffff8
114# chaos
115# set *(unsigned long *)($mctype) = 0x0000c000
116# m32102 i-cache only
117 set *(unsigned long *)($mctype) = 0x00008000
118# m32102 d-cache only
119# set *(unsigned long *)($mctype) = 0x00004000
120end
121define cache_on
122 set $param = (void*)0x08001000
123 set *(unsigned long *)($param) = 0x60ff6102
124end
125
126
127# Show current task structure
128define show_current
129 set $current = $spi & 0xffffe000
130 printf "$current=0x%08lX\n",$current
131 print *(struct task_struct *)$current
132end
133
134# Show user assigned task structure
135define show_task
136 set $task = $arg0 & 0xffffe000
137 printf "$task=0x%08lX\n",$task
138 print *(struct task_struct *)$task
139end
140document show_task
141 Show user assigned task structure
142 arg0 : task structure address
143end
144
145# Show M32R registers
146define show_regs
147 printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
148 printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7
149 printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11
150 printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
151 printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
152 printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch
153 printf "EVB[0x%08lX]\n",$evb
154
155 set $mests = *(unsigned long *)0xffff000c
156 set $mdeva = *(unsigned long *)0xffff0010
157 printf "MESTS[0x%08lX] MDEVA[0x%08lX]\n",$mests,$mdeva
158end
159
160
161# Setup all
162define setup
163 sdram_init
164# lanc_init
165# dispc_init
166# set $evb=0x08000000
167end
168
169# Load modules
170define load_modules
171 use_debug_dma
172 load
173# load busybox.mot
174end
175
176# Set kernel parameters
177define set_kernel_parameters
178 set $param = (void*)0x08001000
179
180 ## MOUNT_ROOT_RDONLY
181 set {long}($param+0x00)=0
182 ## RAMDISK_FLAGS
183 #set {long}($param+0x04)=0
184 ## ORIG_ROOT_DEV
185 #set {long}($param+0x08)=0x00000100
186 ## LOADER_TYPE
187 #set {long}($param+0x0C)=0
188 ## INITRD_START
189 set {long}($param+0x10)=0x082a0000
190 ## INITRD_SIZE
191 set {long}($param+0x14)=0d6200000
192
193 # M32R_CPUCLK
194 set *(unsigned long *)($param + 0x0018) = 0d25000000
195 # M32R_BUSCLK
196 set *(unsigned long *)($param + 0x001c) = 0d25000000
197 # M32R_TIMER_DIVIDE
198 set *(unsigned long *)($param + 0x0020) = 0d128
199
200
201 set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/root.2.6 nfsaddrs=192.168.0.102:192.168.0.1:192.168.0.1:255.255.255.0:mappi: \0"
202
203
204end
205
206# Boot
207define boot
208 set_kernel_parameters
209 debug_chaos
210 set $pc=0x08002000
211 set $fp=0
212 del b
213 si
214end
215
216# Restart
217define restart
218 sdireset
219 sdireset
220 setup
221 load_modules
222 boot
223end
224
225sdireset
226sdireset
227file vmlinux
228target m32rsdi
229
230restart
231boot
232
233
diff --git a/arch/m32r/platforms/mappi3/dot.gdbinit b/arch/m32r/platforms/mappi3/dot.gdbinit
new file mode 100644
index 000000000000..89c22184e139
--- /dev/null
+++ b/arch/m32r/platforms/mappi3/dot.gdbinit
@@ -0,0 +1,224 @@
1# .gdbinit file
2# $Id: dot.gdbinit,v 1.1 2005/04/11 02:21:08 sakugawa Exp $
3
4# setting
5set width 0d70
6set radix 0d16
7use_debug_dma
8
9# Initialize SDRAM controller for Mappi
10define sdram_init
11 # SDIR0
12 set *(unsigned long *)0x00ef6008 = 0x00000182
13 # SDIR1
14 set *(unsigned long *)0x00ef600c = 0x00000001
15 # Initialize wait
16 shell sleep 0.1
17 # MOD
18 set *(unsigned long *)0x00ef602c = 0x00000020
19 set *(unsigned long *)0x00ef604c = 0x00000020
20 # TR
21 set *(unsigned long *)0x00ef6028 = 0x00051502
22 set *(unsigned long *)0x00ef6048 = 0x00051502
23 # ADR
24 set *(unsigned long *)0x00ef6020 = 0x08000004
25 set *(unsigned long *)0x00ef6040 = 0x0c000004
26 # AutoRef On
27 set *(unsigned long *)0x00ef6004 = 0x00010517
28 # Access enable
29 set *(unsigned long *)0x00ef6024 = 0x00000001
30 set *(unsigned long *)0x00ef6044 = 0x00000001
31end
32
33# Initialize LAN controller for Mappi
34define lanc_init
35 # Set BSEL4
36 #set *(unsigned long *)0x00ef5004 = 0x0fff330f
37 #set *(unsigned long *)0x00ef5004 = 0x01113301
38
39# set *(unsigned long *)0x00ef5004 = 0x02011101
40# set *(unsigned long *)0x00ef5004 = 0x04441104
41end
42
43define clock_init
44 set *(unsigned long *)0x00ef4010 = 2
45 set *(unsigned long *)0x00ef4014 = 2
46 set *(unsigned long *)0x00ef4020 = 3
47 set *(unsigned long *)0x00ef4024 = 3
48 set *(unsigned long *)0x00ef4004 = 0x7
49# shell sleep 0.1
50# set *(unsigned long *)0x00ef4004 = 0x5
51 shell sleep 0.1
52 set *(unsigned long *)0x00ef4008 = 0x0200
53end
54
55define port_init
56 set $sfrbase = 0x00ef0000
57 set *(unsigned short *)0x00ef1060 = 0x5555
58 set *(unsigned short *)0x00ef1062 = 0x5555
59 set *(unsigned short *)0x00ef1064 = 0x5555
60 set *(unsigned short *)0x00ef1066 = 0x5555
61 set *(unsigned short *)0x00ef1068 = 0x5555
62 set *(unsigned short *)0x00ef106a = 0x0000
63 set *(unsigned short *)0x00ef106e = 0x5555
64 set *(unsigned short *)0x00ef1070 = 0x5555
65end
66
67# MMU enable
68define mmu_enable
69 set $evb=0x88000000
70 set *(unsigned long *)0xffff0024=1
71end
72
73# MMU disable
74define mmu_disable
75 set $evb=0
76 set *(unsigned long *)0xffff0024=0
77end
78
79# Show TLB entries
80define show_tlb_entries
81 set $i = 0
82 set $addr = $arg0
83 while ($i < 0d16 )
84 set $tlb_tag = *(unsigned long*)$addr
85 set $tlb_data = *(unsigned long*)($addr + 4)
86 printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data
87 set $i = $i + 1
88 set $addr = $addr + 8
89 end
90end
91define itlb
92 set $itlb=0xfe000000
93 show_tlb_entries $itlb
94end
95define dtlb
96 set $dtlb=0xfe000800
97 show_tlb_entries $dtlb
98end
99
100# Cache ON
101define set_cache_type
102 set $mctype = (void*)0xfffffff8
103# chaos
104# set *(unsigned long *)($mctype) = 0x0000c000
105# m32102 i-cache only
106 set *(unsigned long *)($mctype) = 0x00008000
107# m32102 d-cache only
108# set *(unsigned long *)($mctype) = 0x00004000
109end
110define cache_on
111 set $param = (void*)0x08001000
112 set *(unsigned long *)($param) = 0x60ff6102
113end
114
115
116# Show current task structure
117define show_current
118 set $current = $spi & 0xffffe000
119 printf "$current=0x%08lX\n",$current
120 print *(struct task_struct *)$current
121end
122
123# Show user assigned task structure
124define show_task
125 set $task = $arg0 & 0xffffe000
126 printf "$task=0x%08lX\n",$task
127 print *(struct task_struct *)$task
128end
129document show_task
130 Show user assigned task structure
131 arg0 : task structure address
132end
133
134# Show M32R registers
135define show_regs
136 printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
137 printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7
138 printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11
139 printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
140 printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
141 printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch
142 printf "EVB[0x%08lX]\n",$evb
143
144 set $mests = *(unsigned long *)0xffff000c
145 set $mdeva = *(unsigned long *)0xffff0010
146 printf "MESTS[0x%08lX] MDEVA[0x%08lX]\n",$mests,$mdeva
147end
148
149
150# Setup all
151define setup
152 clock_init
153 shell sleep 0.1
154 port_init
155 sdram_init
156# lanc_init
157# dispc_init
158# set $evb=0x08000000
159end
160
161# Load modules
162define load_modules
163 use_debug_dma
164 load
165# load busybox.mot
166end
167
168# Set kernel parameters
169define set_kernel_parameters
170 set $param = (void*)0x08001000
171
172 ## MOUNT_ROOT_RDONLY
173 set {long}($param+0x00)=0
174 ## RAMDISK_FLAGS
175 #set {long}($param+0x04)=0
176 ## ORIG_ROOT_DEV
177 #set {long}($param+0x08)=0x00000100
178 ## LOADER_TYPE
179 #set {long}($param+0x0C)=0
180 ## INITRD_START
181 set {long}($param+0x10)=0x082a0000
182 ## INITRD_SIZE
183 set {long}($param+0x14)=0d6200000
184
185 # M32R_CPUCLK
186 set *(unsigned long *)($param + 0x0018) = 0d100000000
187 # M32R_BUSCLK
188 set *(unsigned long *)($param + 0x001c) = 0d50000000
189 # M32R_TIMER_DIVIDE
190 set *(unsigned long *)($param + 0x0020) = 0d128
191
192
193 set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/root.2.6_04 nfsaddrs=192.168.0.102:192.168.0.1:192.168.0.1:255.255.255.0:mappi: \0"
194
195
196end
197
198# Boot
199define boot
200 set_kernel_parameters
201 debug_chaos
202 set *(unsigned long *)0x00f00000=0x08002000
203 set $pc=0x08002000
204 set $fp=0
205 del b
206 si
207end
208
209# Restart
210define restart
211 sdireset
212 sdireset
213 setup
214 load_modules
215 boot
216end
217
218sdireset
219sdireset
220file vmlinux
221target m32rsdi
222
223restart
224boot
diff --git a/arch/m32r/platforms/oaks32r/dot.gdbinit.nommu b/arch/m32r/platforms/oaks32r/dot.gdbinit.nommu
new file mode 100644
index 000000000000..d481d972b802
--- /dev/null
+++ b/arch/m32r/platforms/oaks32r/dot.gdbinit.nommu
@@ -0,0 +1,154 @@
1# .gdbinit file
2# $Id: dot.gdbinit.oaks32r,v 1.4 2004/10/20 02:24:37 takata Exp $
3#-----
4# NOTE: this file is generated by a script, "gen_gdbinit.pl".
5# (Please type "gen_gdbinit.pl --help" and check the help message).
6# $ Id: gen_gdbinit.pl,v 1.12 2004/07/26 09:56:10 takata Exp $
7#-----
8# target platform: oaks32r
9
10# setting
11set width 0d70
12set radix 0d16
13
14# clk xin:cpu:bus=16:66:33
15define clock_init
16 set *(unsigned long *)0x00ef4008 = 1
17 shell sleep 0.1
18 set *(unsigned long *)0x00ef4000 = 0x00020100
19end
20
21# Initialize programmable ports
22define port_init
23 set *(unsigned long *)0x00ef1000 = 0x1
24 set *(unsigned long *)0x00ef1060 = 0x01400001
25 set *(unsigned long *)0x00ef1064 = 0x00015555
26 set *(unsigned long *)0x00ef1068 = 0x55555050
27 set *(unsigned long *)0x00ef106c = 0x05150040
28end
29
30# Initialize SDRAM controller
31define sdram_init
32 set *(unsigned long *)0x00ef6008 = 0x00000182
33 set *(unsigned long *)0x00ef600c = 0x00000001
34 shell sleep 0.1
35 set *(unsigned long *)0x00ef602c = 0x00000010
36 set *(unsigned long *)0x00ef6028 = 0x00000300
37 set *(unsigned long *)0x00ef6048 = 0x00000001
38 set *(unsigned long *)0x00ef6020 = 0x01000041
39 set *(unsigned long *)0x00ef6004 = 0x00010117
40 set *(unsigned long *)0x00ef6010 = 0x00000001
41 set *(unsigned long *)0x00ef6024 = 0x00000001
42end
43document sdram_init
44 SDRAM controller initialization
45 0x01000000 - 0x017fffff (8MB)
46end
47
48# Initialize LAN controller
49define lanc_init
50 set *(unsigned long *)0x00ef5008 = 0x03031303
51 #RST DRV (P64)
52 set *(unsigned char *)0x00ef1046 = 0x08
53 set *(unsigned char *)0x00ef1026 = 0xff
54 set *(unsigned char *)0x00ef1026 = 0x00
55 set *(unsigned short *)0x02000630 = 0xffff
56end
57
58# Show current task structure
59define show_current
60 set $current = $spi & 0xffffe000
61 printf "$current=0x%08lX\n",$current
62 print *(struct task_struct *)$current
63end
64
65# Show user assigned task structure
66define show_task
67 set = $arg0 & 0xffffe000
68 printf "$task=0x%08lX\n",$task
69 print *(struct task_struct *)$task
70end
71document show_task
72 Show user assigned task structure
73 arg0 : task structure address
74end
75
76# Show M32R registers
77define show_regs
78 printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
79 printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7
80 printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11
81 printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
82 printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
83 printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch
84end
85
86# Setup all
87define setup
88 use_mon_code
89 set *(unsigned int)0xfffffffc=0x60
90 shell sleep 0.1
91 clock_init
92 shell sleep 0.1
93 port_init
94 sdram_init
95 lanc_init
96end
97
98# Load modules
99define load_modules
100 use_debug_dma
101 load
102end
103
104# Set kernel parameters
105define set_kernel_parameters
106 set $param = (void*)0x01001000
107 # INITRD_START
108# set *(unsigned long *)($param + 0x0010) = 0x00000000
109 # INITRD_SIZE
110# set *(unsigned long *)($param + 0x0014) = 0x00000000
111 # M32R_CPUCLK
112 set *(unsigned long *)($param + 0x0018) = 0d66666667
113 # M32R_BUSCLK
114 set *(unsigned long *)($param + 0x001c) = 0d33333333
115
116 # M32R_TIMER_DIVIDE
117 set *(unsigned long *)($param + 0x0020) = 0d128
118
119 set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/rootfs nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 \0"
120end
121
122# Boot
123define boot
124 set_kernel_parameters
125 set $fp = 0
126 set $pc = 0x01002000
127 si
128 c
129end
130
131# Set breakpoints
132define set_breakpoints
133 b *0x00000020
134 b *0x00000030
135end
136
137# Restart
138define restart
139 sdireset
140 sdireset
141 setup
142 load_modules
143 boot
144end
145
146sdireset
147sdireset
148file vmlinux
149target m32rsdi
150setup
151#load_modules
152#set_breakpoints
153#boot
154
diff --git a/arch/m32r/platforms/opsput/dot.gdbinit b/arch/m32r/platforms/opsput/dot.gdbinit
new file mode 100644
index 000000000000..b7e6c6640857
--- /dev/null
+++ b/arch/m32r/platforms/opsput/dot.gdbinit
@@ -0,0 +1,218 @@
1# .gdbinit file
2# $Id: dot.gdbinit,v 1.1 2004/07/27 06:54:20 sakugawa Exp $
3
4# setting
5set width 0d70
6set radix 0d16
7set height 0
8debug_chaos
9
10# clk xin:cpu:bus=1:8:1
11define clock_init_on_181
12 set *(unsigned long *)0x00ef400c = 0x2
13 set *(unsigned long *)0x00ef4004 = 0x1
14 shell sleep 0.1
15 set *(unsigned long *)0x00ef4000 = 0x101
16end
17# clk xin:cpu:bus=1:8:2
18define clock_init_on_182
19 set *(unsigned long *)0x00ef400c = 0x1
20 set *(unsigned long *)0x00ef4004 = 0x1
21 shell sleep 0.1
22 set *(unsigned long *)0x00ef4000 = 0x101
23end
24
25# clk xin:cpu:bus=1:8:4
26define clock_init_on_184
27 set *(unsigned long *)0x00ef400c = 0x0
28 set *(unsigned long *)0x00ef4004 = 0x1
29 shell sleep 0.1
30 set *(unsigned long *)0x00ef4000 = 0x101
31end
32
33# clk xin:cpu:bus=1:1:1
34define clock_init_off
35 shell sleep 0.1
36 set *(unsigned long *)0x00ef4000 = 0x0
37 shell sleep 0.1
38 set *(unsigned long *)0x00ef4004 = 0x0
39 shell sleep 0.1
40 set *(unsigned long *)0x00ef400c = 0x0
41end
42
43define tlb_init
44 set $tlbbase = 0xfe000000
45 set *(unsigned long *)($tlbbase + 0x04) = 0x0
46 set *(unsigned long *)($tlbbase + 0x0c) = 0x0
47 set *(unsigned long *)($tlbbase + 0x14) = 0x0
48 set *(unsigned long *)($tlbbase + 0x1c) = 0x0
49 set *(unsigned long *)($tlbbase + 0x24) = 0x0
50 set *(unsigned long *)($tlbbase + 0x2c) = 0x0
51 set *(unsigned long *)($tlbbase + 0x34) = 0x0
52 set *(unsigned long *)($tlbbase + 0x3c) = 0x0
53 set *(unsigned long *)($tlbbase + 0x44) = 0x0
54 set *(unsigned long *)($tlbbase + 0x4c) = 0x0
55 set *(unsigned long *)($tlbbase + 0x54) = 0x0
56 set *(unsigned long *)($tlbbase + 0x5c) = 0x0
57 set *(unsigned long *)($tlbbase + 0x64) = 0x0
58 set *(unsigned long *)($tlbbase + 0x6c) = 0x0
59 set *(unsigned long *)($tlbbase + 0x74) = 0x0
60 set *(unsigned long *)($tlbbase + 0x7c) = 0x0
61 set *(unsigned long *)($tlbbase + 0x84) = 0x0
62 set *(unsigned long *)($tlbbase + 0x8c) = 0x0
63 set *(unsigned long *)($tlbbase + 0x94) = 0x0
64 set *(unsigned long *)($tlbbase + 0x9c) = 0x0
65 set *(unsigned long *)($tlbbase + 0xa4) = 0x0
66 set *(unsigned long *)($tlbbase + 0xac) = 0x0
67 set *(unsigned long *)($tlbbase + 0xb4) = 0x0
68 set *(unsigned long *)($tlbbase + 0xbc) = 0x0
69 set *(unsigned long *)($tlbbase + 0xc4) = 0x0
70 set *(unsigned long *)($tlbbase + 0xcc) = 0x0
71 set *(unsigned long *)($tlbbase + 0xd4) = 0x0
72 set *(unsigned long *)($tlbbase + 0xdc) = 0x0
73 set *(unsigned long *)($tlbbase + 0xe4) = 0x0
74 set *(unsigned long *)($tlbbase + 0xec) = 0x0
75 set *(unsigned long *)($tlbbase + 0xf4) = 0x0
76 set *(unsigned long *)($tlbbase + 0xfc) = 0x0
77 set $tlbbase = 0xfe000800
78 set *(unsigned long *)($tlbbase + 0x04) = 0x0
79 set *(unsigned long *)($tlbbase + 0x0c) = 0x0
80 set *(unsigned long *)($tlbbase + 0x14) = 0x0
81 set *(unsigned long *)($tlbbase + 0x1c) = 0x0
82 set *(unsigned long *)($tlbbase + 0x24) = 0x0
83 set *(unsigned long *)($tlbbase + 0x2c) = 0x0
84 set *(unsigned long *)($tlbbase + 0x34) = 0x0
85 set *(unsigned long *)($tlbbase + 0x3c) = 0x0
86 set *(unsigned long *)($tlbbase + 0x44) = 0x0
87 set *(unsigned long *)($tlbbase + 0x4c) = 0x0
88 set *(unsigned long *)($tlbbase + 0x54) = 0x0
89 set *(unsigned long *)($tlbbase + 0x5c) = 0x0
90 set *(unsigned long *)($tlbbase + 0x64) = 0x0
91 set *(unsigned long *)($tlbbase + 0x6c) = 0x0
92 set *(unsigned long *)($tlbbase + 0x74) = 0x0
93 set *(unsigned long *)($tlbbase + 0x7c) = 0x0
94 set *(unsigned long *)($tlbbase + 0x84) = 0x0
95 set *(unsigned long *)($tlbbase + 0x8c) = 0x0
96 set *(unsigned long *)($tlbbase + 0x94) = 0x0
97 set *(unsigned long *)($tlbbase + 0x9c) = 0x0
98 set *(unsigned long *)($tlbbase + 0xa4) = 0x0
99 set *(unsigned long *)($tlbbase + 0xac) = 0x0
100 set *(unsigned long *)($tlbbase + 0xb4) = 0x0
101 set *(unsigned long *)($tlbbase + 0xbc) = 0x0
102 set *(unsigned long *)($tlbbase + 0xc4) = 0x0
103 set *(unsigned long *)($tlbbase + 0xcc) = 0x0
104 set *(unsigned long *)($tlbbase + 0xd4) = 0x0
105 set *(unsigned long *)($tlbbase + 0xdc) = 0x0
106 set *(unsigned long *)($tlbbase + 0xe4) = 0x0
107 set *(unsigned long *)($tlbbase + 0xec) = 0x0
108 set *(unsigned long *)($tlbbase + 0xf4) = 0x0
109 set *(unsigned long *)($tlbbase + 0xfc) = 0x0
110end
111
112define load_modules
113 use_debug_dma
114 load
115end
116
117# Set kernel parameters
118define set_kernel_parameters
119 set $param = (void*)0x88001000
120 # INITRD_START
121# set *(unsigned long *)($param + 0x0010) = 0x08300000
122 # INITRD_SIZE
123# set *(unsigned long *)($param + 0x0014) = 0x00400000
124 # M32R_CPUCLK
125 set *(unsigned long *)($param + 0x0018) = 0d200000000
126 # M32R_BUSCLK
127 set *(unsigned long *)($param + 0x001c) = 0d50000000
128# set *(unsigned long *)($param + 0x001c) = 0d25000000
129
130 # M32R_TIMER_DIVIDE
131 set *(unsigned long *)($param + 0x0020) = 0d128
132
133 set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x console=tty1 \
134 root=/dev/nfsroot \
135 nfsroot=192.168.0.1:/project/m32r-linux/export/root.2.6 \
136 nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 \
137 mem=16m \0"
138end
139
140define boot
141 set_kernel_parameters
142 set $pc=0x88002000
143 set $fp=0
144 set $evb=0x88000000
145 si
146 c
147end
148
149# Show TLB entries
150define show_tlb_entries
151 set $i = 0
152 set $addr = $arg0
153 use_mon_code
154 while ($i < 0d32 )
155 set $tlb_tag = *(unsigned long*)$addr
156 set $tlb_data = *(unsigned long*)($addr + 4)
157 printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data
158 set $i = $i + 1
159 set $addr = $addr + 8
160 end
161# use_debug_dma
162end
163define itlb
164 set $itlb=0xfe000000
165 show_tlb_entries $itlb
166end
167define dtlb
168 set $dtlb=0xfe000800
169 show_tlb_entries $dtlb
170end
171
172define show_regs
173 printf " R0[%08lx] R1[%08lx] R2[%08lx] R3[%08lx]\n",$r0,$r1,$r2,$r3
174 printf " R4[%08lx] R5[%08lx] R6[%08lx] R7[%08lx]\n",$r4,$r5,$r6,$r7
175 printf " R8[%08lx] R9[%08lx] R10[%08lx] R11[%08lx]\n",$r8,$r9,$r10,$r11
176 printf "R12[%08lx] FP[%08lx] LR[%08lx] SP[%08lx]\n",$r12,$fp,$lr,$sp
177 printf "PSW[%08lx] CBR[%08lx] SPI[%08lx] SPU[%08lx]\n",$psw,$cbr,$spi,$spu
178 printf "BPC[%08lx] PC[%08lx] ACCL[%08lx] ACCH[%08lx]\n",$bpc,$pc,$accl,$acch
179 printf "EVB[%08lx]\n",$evb
180end
181
182define restart
183 sdireset
184 sdireset
185 en 1
186 set $pc=0x0
187 c
188 tlb_init
189 setup
190 load_modules
191 boot
192end
193
194define setup
195 debug_chaos
196# Clock
197# shell sleep 0.1
198# clock_init_off
199# shell sleep 1
200# clock_init_on_182
201# shell sleep 0.1
202# SDRAM
203 set *(unsigned long *)0xa0ef6004 = 0x0001053f
204 set *(unsigned long *)0xa0ef6028 = 0x00031102
205end
206
207sdireset
208sdireset
209file vmlinux
210target m32rsdi
211set $pc=0x0
212b *0x30000
213c
214dis 1
215setup
216tlb_init
217load_modules
218boot
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-07 09:36:10 -0400