diff options
author | Hirokazu Takata <takata@linux-m32r.org> | 2007-05-11 01:22:26 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-05-11 11:29:33 -0400 |
commit | 0d4f64681695b0e389f7121eb647b27c602990bc (patch) | |
tree | 73ba274b97da70c99cf553f22c93c9d85abc0b83 /arch/m32r/mm | |
parent | 43c09ce7927912c7867617cba0a265beea38a154 (diff) |
m32r: fix tme_handler to check _PAGE_PRESENT bit
Fix the tlb-miss handler (tme_handler) to check _PAGE_PRESENT bit
in order to handle file-mapped or swapped-out pages correctly.
This patch is required to fix unexpected page errors for m32r.
Signed-off-by: Hitoshi Yamamoto <hitoshiy@linux-m32r.org>
Signed-off-by: Hirokazu Takata <takata@linux-m32r.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/m32r/mm')
-rw-r--r-- | arch/m32r/mm/mmu.S | 22 |
1 files changed, 13 insertions, 9 deletions
diff --git a/arch/m32r/mm/mmu.S b/arch/m32r/mm/mmu.S index 8bb74b10dca7..49a6d16a3d58 100644 --- a/arch/m32r/mm/mmu.S +++ b/arch/m32r/mm/mmu.S | |||
@@ -163,7 +163,8 @@ ENTRY(tme_handler) | |||
163 | 163 | ||
164 | ; pte_data = (unsigned long)pte_val(*pte); | 164 | ; pte_data = (unsigned long)pte_val(*pte); |
165 | ld r2, @r3 ; r2: pte data | 165 | ld r2, @r3 ; r2: pte data |
166 | or3 r2, r2, #2 ; _PAGE_PRESENT(=2) | 166 | and3 r3, r2, #2 ; _PAGE_PRESENT(=2) check |
167 | beqz r3, 3f | ||
167 | 168 | ||
168 | .fillinsn | 169 | .fillinsn |
169 | 5: | 170 | 5: |
@@ -264,11 +265,8 @@ ENTRY(tme_handler) | |||
264 | ; | 265 | ; |
265 | and3 r1, r1, #0xeff | 266 | and3 r1, r1, #0xeff |
266 | ldi r4, #611 ; _KERNPG_TABLE(=611) | 267 | ldi r4, #611 ; _KERNPG_TABLE(=611) |
267 | beq r1, r4, 4f ; !pmd_bad(*pmd) ? | 268 | bne r1, r4, 3f ; !pmd_bad(*pmd) ? |
268 | .fillinsn | 269 | |
269 | 3: | ||
270 | ldi r1, #0 ; r1: pte_data = 0 | ||
271 | bra 5f | ||
272 | .fillinsn | 270 | .fillinsn |
273 | 4: | 271 | 4: |
274 | ; pte = pte_offset(pmd, address); | 272 | ; pte = pte_offset(pmd, address); |
@@ -282,8 +280,10 @@ ENTRY(tme_handler) | |||
282 | add r4, r3 ; r4: pte | 280 | add r4, r3 ; r4: pte |
283 | ; pte_data = (unsigned long)pte_val(*pte); | 281 | ; pte_data = (unsigned long)pte_val(*pte); |
284 | ld r1, @r4 ; r1: pte_data | 282 | ld r1, @r4 ; r1: pte_data |
285 | .fillinsn | 283 | and3 r3, r1, #2 ; _PAGE_PRESENT(=2) check |
284 | beqz r3, 3f | ||
286 | 285 | ||
286 | .fillinsn | ||
287 | ;; set tlb | 287 | ;; set tlb |
288 | ; r0: address, r1: pte_data, r2: entry | 288 | ; r0: address, r1: pte_data, r2: entry |
289 | ; r3,r4: (free) | 289 | ; r3,r4: (free) |
@@ -295,8 +295,7 @@ ENTRY(tme_handler) | |||
295 | and3 r4, r4, #(MMU_CONTEXT_ASID_MASK) | 295 | and3 r4, r4, #(MMU_CONTEXT_ASID_MASK) |
296 | or r3, r4 | 296 | or r3, r4 |
297 | st r3, @r2 | 297 | st r3, @r2 |
298 | or3 r4, r1, #2 ; _PAGE_PRESENT(=2) | 298 | st r1, @(4,r2) ; set_tlb_data(entry, pte_data); |
299 | st r4, @(4,r2) ; set_tlb_data(entry, pte_data); | ||
300 | 299 | ||
301 | ld r4, @sp+ | 300 | ld r4, @sp+ |
302 | ld r3, @sp+ | 301 | ld r3, @sp+ |
@@ -306,6 +305,11 @@ ENTRY(tme_handler) | |||
306 | ld sp, @sp+ | 305 | ld sp, @sp+ |
307 | rte | 306 | rte |
308 | 307 | ||
308 | .fillinsn | ||
309 | 3: | ||
310 | ldi r1, #2 ; r1: pte_data = 0 | _PAGE_PRESENT(=2) | ||
311 | bra 5b | ||
312 | |||
309 | #else | 313 | #else |
310 | #error unknown isa configuration | 314 | #error unknown isa configuration |
311 | #endif | 315 | #endif |