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authorHirokazu Takata <takata@linux-m32r.org>2007-08-01 08:09:31 -0400
committerHirokazu Takata <takata@linux-m32r.org>2007-09-02 22:30:18 -0400
commit3264f976d3188bea80819793c13a3220b8a4867c (patch)
treee451b9179430ddbbe1102050ebf391433248c1e1 /arch/m32r/kernel
parente6a7ba7efddbb393b726453eae8601ef02b9a610 (diff)
m32r: Rearrange platform-dependent codes
Rearrange platform-dependent codes from arch/m32r/kernel/*.c to arch/m32r/platforms/{platform}/. Signed-off-by: Hirokazu Takata <takata@linux-m32r.org>
Diffstat (limited to 'arch/m32r/kernel')
-rw-r--r--arch/m32r/kernel/Makefile8
-rw-r--r--arch/m32r/kernel/io_m32104ut.c297
-rw-r--r--arch/m32r/kernel/io_m32700ut.c395
-rw-r--r--arch/m32r/kernel/io_mappi.c325
-rw-r--r--arch/m32r/kernel/io_mappi2.c383
-rw-r--r--arch/m32r/kernel/io_mappi3.c405
-rw-r--r--arch/m32r/kernel/io_oaks32r.c228
-rw-r--r--arch/m32r/kernel/io_opsput.c395
-rw-r--r--arch/m32r/kernel/io_usrv.c225
-rw-r--r--arch/m32r/kernel/setup_m32104ut.c155
-rw-r--r--arch/m32r/kernel/setup_m32700ut.c518
-rw-r--r--arch/m32r/kernel/setup_mappi.c201
-rw-r--r--arch/m32r/kernel/setup_mappi2.c201
-rw-r--r--arch/m32r/kernel/setup_mappi3.c251
-rw-r--r--arch/m32r/kernel/setup_oaks32r.c135
-rw-r--r--arch/m32r/kernel/setup_opsput.c519
-rw-r--r--arch/m32r/kernel/setup_usrv.c249
17 files changed, 0 insertions, 4890 deletions
diff --git a/arch/m32r/kernel/Makefile b/arch/m32r/kernel/Makefile
index 5a2fa886906f..e97e26e87c9e 100644
--- a/arch/m32r/kernel/Makefile
+++ b/arch/m32r/kernel/Makefile
@@ -8,14 +8,6 @@ obj-y := process.o entry.o traps.o align.o irq.o setup.o time.o \
8 m32r_ksyms.o sys_m32r.o semaphore.o signal.o ptrace.o 8 m32r_ksyms.o sys_m32r.o semaphore.o signal.o ptrace.o
9 9
10obj-$(CONFIG_SMP) += smp.o smpboot.o 10obj-$(CONFIG_SMP) += smp.o smpboot.o
11obj-$(CONFIG_PLAT_MAPPI) += setup_mappi.o io_mappi.o
12obj-$(CONFIG_PLAT_MAPPI2) += setup_mappi2.o io_mappi2.o
13obj-$(CONFIG_PLAT_MAPPI3) += setup_mappi3.o io_mappi3.o
14obj-$(CONFIG_PLAT_USRV) += setup_usrv.o io_usrv.o
15obj-$(CONFIG_PLAT_M32700UT) += setup_m32700ut.o io_m32700ut.o
16obj-$(CONFIG_PLAT_OPSPUT) += setup_opsput.o io_opsput.o
17obj-$(CONFIG_MODULES) += module.o 11obj-$(CONFIG_MODULES) += module.o
18obj-$(CONFIG_PLAT_OAKS32R) += setup_oaks32r.o io_oaks32r.o
19obj-$(CONFIG_PLAT_M32104UT) += setup_m32104ut.o io_m32104ut.o
20 12
21EXTRA_AFLAGS := -traditional 13EXTRA_AFLAGS := -traditional
diff --git a/arch/m32r/kernel/io_m32104ut.c b/arch/m32r/kernel/io_m32104ut.c
deleted file mode 100644
index 2189eca30b56..000000000000
--- a/arch/m32r/kernel/io_m32104ut.c
+++ /dev/null
@@ -1,297 +0,0 @@
1/*
2 * linux/arch/m32r/kernel/io_m32104ut.c
3 *
4 * Typical I/O routines for M32104UT board.
5 *
6 * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
7 * Hitoshi Yamamoto, Mamoru Sakugawa,
8 * Naoto Sugai, Hayato Fujiwara
9 */
10
11#include <asm/m32r.h>
12#include <asm/page.h>
13#include <asm/io.h>
14#include <asm/byteorder.h>
15
16#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
17#include <linux/types.h>
18
19#define M32R_PCC_IOMAP_SIZE 0x1000
20
21#define M32R_PCC_IOSTART0 0x1000
22#define M32R_PCC_IOEND0 (M32R_PCC_IOSTART0 + M32R_PCC_IOMAP_SIZE - 1)
23
24extern void pcc_ioread_byte(int, unsigned long, void *, size_t, size_t, int);
25extern void pcc_ioread_word(int, unsigned long, void *, size_t, size_t, int);
26extern void pcc_iowrite_byte(int, unsigned long, void *, size_t, size_t, int);
27extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int);
28#endif /* CONFIG_PCMCIA && CONFIG_M32R_CFC */
29
30#define PORT2ADDR(port) _port2addr(port)
31
32static inline void *_port2addr(unsigned long port)
33{
34 return (void *)(port | NONCACHE_OFFSET);
35}
36
37#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
38static inline void *__port2addr_ata(unsigned long port)
39{
40 static int dummy_reg;
41
42 switch (port) {
43 case 0x1f0: return (void *)(0x0c002000 | NONCACHE_OFFSET);
44 case 0x1f1: return (void *)(0x0c012800 | NONCACHE_OFFSET);
45 case 0x1f2: return (void *)(0x0c012002 | NONCACHE_OFFSET);
46 case 0x1f3: return (void *)(0x0c012802 | NONCACHE_OFFSET);
47 case 0x1f4: return (void *)(0x0c012004 | NONCACHE_OFFSET);
48 case 0x1f5: return (void *)(0x0c012804 | NONCACHE_OFFSET);
49 case 0x1f6: return (void *)(0x0c012006 | NONCACHE_OFFSET);
50 case 0x1f7: return (void *)(0x0c012806 | NONCACHE_OFFSET);
51 case 0x3f6: return (void *)(0x0c01200e | NONCACHE_OFFSET);
52 default: return (void *)&dummy_reg;
53 }
54}
55#endif
56
57/*
58 * M32104T-LAN is located in the extended bus space
59 * from 0x01000000 to 0x01ffffff on physical address.
60 * The base address of LAN controller(LAN91C111) is 0x300.
61 */
62#define LAN_IOSTART (0x300 | NONCACHE_OFFSET)
63#define LAN_IOEND (0x320 | NONCACHE_OFFSET)
64static inline void *_port2addr_ne(unsigned long port)
65{
66 return (void *)(port + NONCACHE_OFFSET + 0x01000000);
67}
68
69static inline void delay(void)
70{
71 __asm__ __volatile__ ("push r0; \n\t pop r0;" : : :"memory");
72}
73
74/*
75 * NIC I/O function
76 */
77
78#define PORT2ADDR_NE(port) _port2addr_ne(port)
79
80static inline unsigned char _ne_inb(void *portp)
81{
82 return *(volatile unsigned char *)portp;
83}
84
85static inline unsigned short _ne_inw(void *portp)
86{
87 return (unsigned short)le16_to_cpu(*(volatile unsigned short *)portp);
88}
89
90static inline void _ne_insb(void *portp, void *addr, unsigned long count)
91{
92 unsigned char *buf = (unsigned char *)addr;
93
94 while (count--)
95 *buf++ = _ne_inb(portp);
96}
97
98static inline void _ne_outb(unsigned char b, void *portp)
99{
100 *(volatile unsigned char *)portp = b;
101}
102
103static inline void _ne_outw(unsigned short w, void *portp)
104{
105 *(volatile unsigned short *)portp = cpu_to_le16(w);
106}
107
108unsigned char _inb(unsigned long port)
109{
110 if (port >= LAN_IOSTART && port < LAN_IOEND)
111 return _ne_inb(PORT2ADDR_NE(port));
112
113 return *(volatile unsigned char *)PORT2ADDR(port);
114}
115
116unsigned short _inw(unsigned long port)
117{
118 if (port >= LAN_IOSTART && port < LAN_IOEND)
119 return _ne_inw(PORT2ADDR_NE(port));
120
121 return *(volatile unsigned short *)PORT2ADDR(port);
122}
123
124unsigned long _inl(unsigned long port)
125{
126 return *(volatile unsigned long *)PORT2ADDR(port);
127}
128
129unsigned char _inb_p(unsigned long port)
130{
131 unsigned char v = _inb(port);
132 delay();
133 return (v);
134}
135
136unsigned short _inw_p(unsigned long port)
137{
138 unsigned short v = _inw(port);
139 delay();
140 return (v);
141}
142
143unsigned long _inl_p(unsigned long port)
144{
145 unsigned long v = _inl(port);
146 delay();
147 return (v);
148}
149
150void _outb(unsigned char b, unsigned long port)
151{
152 if (port >= LAN_IOSTART && port < LAN_IOEND)
153 _ne_outb(b, PORT2ADDR_NE(port));
154 else
155 *(volatile unsigned char *)PORT2ADDR(port) = b;
156}
157
158void _outw(unsigned short w, unsigned long port)
159{
160 if (port >= LAN_IOSTART && port < LAN_IOEND)
161 _ne_outw(w, PORT2ADDR_NE(port));
162 else
163 *(volatile unsigned short *)PORT2ADDR(port) = w;
164}
165
166void _outl(unsigned long l, unsigned long port)
167{
168 *(volatile unsigned long *)PORT2ADDR(port) = l;
169}
170
171void _outb_p(unsigned char b, unsigned long port)
172{
173 _outb(b, port);
174 delay();
175}
176
177void _outw_p(unsigned short w, unsigned long port)
178{
179 _outw(w, port);
180 delay();
181}
182
183void _outl_p(unsigned long l, unsigned long port)
184{
185 _outl(l, port);
186 delay();
187}
188
189void _insb(unsigned int port, void *addr, unsigned long count)
190{
191 if (port >= LAN_IOSTART && port < LAN_IOEND)
192 _ne_insb(PORT2ADDR_NE(port), addr, count);
193 else {
194 unsigned char *buf = addr;
195 unsigned char *portp = PORT2ADDR(port);
196 while (count--)
197 *buf++ = *(volatile unsigned char *)portp;
198 }
199}
200
201void _insw(unsigned int port, void *addr, unsigned long count)
202{
203 unsigned short *buf = addr;
204 unsigned short *portp;
205
206 if (port >= LAN_IOSTART && port < LAN_IOEND) {
207 /*
208 * This portion is only used by smc91111.c to read data
209 * from the DATA_REG. Do not swap the data.
210 */
211 portp = PORT2ADDR_NE(port);
212 while (count--)
213 *buf++ = *(volatile unsigned short *)portp;
214#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
215 } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
216 pcc_ioread_word(9, port, (void *)addr, sizeof(unsigned short),
217 count, 1);
218#endif
219#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
220 } else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
221 portp = __port2addr_ata(port);
222 while (count--)
223 *buf++ = *(volatile unsigned short *)portp;
224#endif
225 } else {
226 portp = PORT2ADDR(port);
227 while (count--)
228 *buf++ = *(volatile unsigned short *)portp;
229 }
230}
231
232void _insl(unsigned int port, void *addr, unsigned long count)
233{
234 unsigned long *buf = addr;
235 unsigned long *portp;
236
237 portp = PORT2ADDR(port);
238 while (count--)
239 *buf++ = *(volatile unsigned long *)portp;
240}
241
242void _outsb(unsigned int port, const void *addr, unsigned long count)
243{
244 const unsigned char *buf = addr;
245 unsigned char *portp;
246
247 if (port >= LAN_IOSTART && port < LAN_IOEND) {
248 portp = PORT2ADDR_NE(port);
249 while (count--)
250 _ne_outb(*buf++, portp);
251 } else {
252 portp = PORT2ADDR(port);
253 while (count--)
254 *(volatile unsigned char *)portp = *buf++;
255 }
256}
257
258void _outsw(unsigned int port, const void *addr, unsigned long count)
259{
260 const unsigned short *buf = addr;
261 unsigned short *portp;
262
263 if (port >= LAN_IOSTART && port < LAN_IOEND) {
264 /*
265 * This portion is only used by smc91111.c to write data
266 * into the DATA_REG. Do not swap the data.
267 */
268 portp = PORT2ADDR_NE(port);
269 while (count--)
270 *(volatile unsigned short *)portp = *buf++;
271#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
272 } else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
273 portp = __port2addr_ata(port);
274 while (count--)
275 *(volatile unsigned short *)portp = *buf++;
276#endif
277#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
278 } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
279 pcc_iowrite_word(9, port, (void *)addr, sizeof(unsigned short),
280 count, 1);
281#endif
282 } else {
283 portp = PORT2ADDR(port);
284 while (count--)
285 *(volatile unsigned short *)portp = *buf++;
286 }
287}
288
289void _outsl(unsigned int port, const void *addr, unsigned long count)
290{
291 const unsigned long *buf = addr;
292 unsigned char *portp;
293
294 portp = PORT2ADDR(port);
295 while (count--)
296 *(volatile unsigned long *)portp = *buf++;
297}
diff --git a/arch/m32r/kernel/io_m32700ut.c b/arch/m32r/kernel/io_m32700ut.c
deleted file mode 100644
index 5898f4031a0c..000000000000
--- a/arch/m32r/kernel/io_m32700ut.c
+++ /dev/null
@@ -1,395 +0,0 @@
1/*
2 * linux/arch/m32r/kernel/io_m32700ut.c
3 *
4 * Typical I/O routines for M32700UT board.
5 *
6 * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
7 * Hitoshi Yamamoto, Takeo Takahashi
8 *
9 * This file is subject to the terms and conditions of the GNU General
10 * Public License. See the file "COPYING" in the main directory of this
11 * archive for more details.
12 */
13
14#include <asm/m32r.h>
15#include <asm/page.h>
16#include <asm/io.h>
17#include <asm/byteorder.h>
18
19#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
20#include <linux/types.h>
21
22#define M32R_PCC_IOMAP_SIZE 0x1000
23
24#define M32R_PCC_IOSTART0 0x1000
25#define M32R_PCC_IOEND0 (M32R_PCC_IOSTART0 + M32R_PCC_IOMAP_SIZE - 1)
26
27extern void pcc_ioread_byte(int, unsigned long, void *, size_t, size_t, int);
28extern void pcc_ioread_word(int, unsigned long, void *, size_t, size_t, int);
29extern void pcc_iowrite_byte(int, unsigned long, void *, size_t, size_t, int);
30extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int);
31#endif /* CONFIG_PCMCIA && CONFIG_M32R_CFC */
32
33#define PORT2ADDR(port) _port2addr(port)
34#define PORT2ADDR_USB(port) _port2addr_usb(port)
35
36static inline void *_port2addr(unsigned long port)
37{
38 return (void *)(port | NONCACHE_OFFSET);
39}
40
41#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
42static inline void *__port2addr_ata(unsigned long port)
43{
44 static int dummy_reg;
45
46 switch (port) {
47 case 0x1f0: return (void *)(0x0c002000 | NONCACHE_OFFSET);
48 case 0x1f1: return (void *)(0x0c012800 | NONCACHE_OFFSET);
49 case 0x1f2: return (void *)(0x0c012002 | NONCACHE_OFFSET);
50 case 0x1f3: return (void *)(0x0c012802 | NONCACHE_OFFSET);
51 case 0x1f4: return (void *)(0x0c012004 | NONCACHE_OFFSET);
52 case 0x1f5: return (void *)(0x0c012804 | NONCACHE_OFFSET);
53 case 0x1f6: return (void *)(0x0c012006 | NONCACHE_OFFSET);
54 case 0x1f7: return (void *)(0x0c012806 | NONCACHE_OFFSET);
55 case 0x3f6: return (void *)(0x0c01200e | NONCACHE_OFFSET);
56 default: return (void *)&dummy_reg;
57 }
58}
59#endif
60
61/*
62 * M32700UT-LAN is located in the extended bus space
63 * from 0x10000000 to 0x13ffffff on physical address.
64 * The base address of LAN controller(LAN91C111) is 0x300.
65 */
66#define LAN_IOSTART (0x300 | NONCACHE_OFFSET)
67#define LAN_IOEND (0x320 | NONCACHE_OFFSET)
68static inline void *_port2addr_ne(unsigned long port)
69{
70 return (void *)(port + 0x10000000);
71}
72static inline void *_port2addr_usb(unsigned long port)
73{
74 return (void *)((port & 0x0f) + NONCACHE_OFFSET + 0x10303000);
75}
76
77static inline void delay(void)
78{
79 __asm__ __volatile__ ("push r0; \n\t pop r0;" : : :"memory");
80}
81
82/*
83 * NIC I/O function
84 */
85
86#define PORT2ADDR_NE(port) _port2addr_ne(port)
87
88static inline unsigned char _ne_inb(void *portp)
89{
90 return *(volatile unsigned char *)portp;
91}
92
93static inline unsigned short _ne_inw(void *portp)
94{
95 return (unsigned short)le16_to_cpu(*(volatile unsigned short *)portp);
96}
97
98static inline void _ne_insb(void *portp, void *addr, unsigned long count)
99{
100 unsigned char *buf = (unsigned char *)addr;
101
102 while (count--)
103 *buf++ = _ne_inb(portp);
104}
105
106static inline void _ne_outb(unsigned char b, void *portp)
107{
108 *(volatile unsigned char *)portp = b;
109}
110
111static inline void _ne_outw(unsigned short w, void *portp)
112{
113 *(volatile unsigned short *)portp = cpu_to_le16(w);
114}
115
116unsigned char _inb(unsigned long port)
117{
118 if (port >= LAN_IOSTART && port < LAN_IOEND)
119 return _ne_inb(PORT2ADDR_NE(port));
120
121#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
122 else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
123 return *(volatile unsigned char *)__port2addr_ata(port);
124 }
125#endif
126#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
127 else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
128 unsigned char b;
129 pcc_ioread_byte(0, port, &b, sizeof(b), 1, 0);
130 return b;
131 } else
132#endif
133
134 return *(volatile unsigned char *)PORT2ADDR(port);
135}
136
137unsigned short _inw(unsigned long port)
138{
139 if (port >= LAN_IOSTART && port < LAN_IOEND)
140 return _ne_inw(PORT2ADDR_NE(port));
141#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
142 else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
143 return *(volatile unsigned short *)__port2addr_ata(port);
144 }
145#endif
146#if defined(CONFIG_USB)
147 else if(port >= 0x340 && port < 0x3a0)
148 return *(volatile unsigned short *)PORT2ADDR_USB(port);
149#endif
150#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
151 else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
152 unsigned short w;
153 pcc_ioread_word(0, port, &w, sizeof(w), 1, 0);
154 return w;
155 } else
156#endif
157 return *(volatile unsigned short *)PORT2ADDR(port);
158}
159
160unsigned long _inl(unsigned long port)
161{
162#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
163 if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
164 unsigned long l;
165 pcc_ioread_word(0, port, &l, sizeof(l), 1, 0);
166 return l;
167 } else
168#endif
169 return *(volatile unsigned long *)PORT2ADDR(port);
170}
171
172unsigned char _inb_p(unsigned long port)
173{
174 unsigned char v = _inb(port);
175 delay();
176 return (v);
177}
178
179unsigned short _inw_p(unsigned long port)
180{
181 unsigned short v = _inw(port);
182 delay();
183 return (v);
184}
185
186unsigned long _inl_p(unsigned long port)
187{
188 unsigned long v = _inl(port);
189 delay();
190 return (v);
191}
192
193void _outb(unsigned char b, unsigned long port)
194{
195 if (port >= LAN_IOSTART && port < LAN_IOEND)
196 _ne_outb(b, PORT2ADDR_NE(port));
197 else
198#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
199 if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
200 *(volatile unsigned char *)__port2addr_ata(port) = b;
201 } else
202#endif
203#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
204 if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
205 pcc_iowrite_byte(0, port, &b, sizeof(b), 1, 0);
206 } else
207#endif
208 *(volatile unsigned char *)PORT2ADDR(port) = b;
209}
210
211void _outw(unsigned short w, unsigned long port)
212{
213 if (port >= LAN_IOSTART && port < LAN_IOEND)
214 _ne_outw(w, PORT2ADDR_NE(port));
215 else
216#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
217 if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
218 *(volatile unsigned short *)__port2addr_ata(port) = w;
219 } else
220#endif
221#if defined(CONFIG_USB)
222 if(port >= 0x340 && port < 0x3a0)
223 *(volatile unsigned short *)PORT2ADDR_USB(port) = w;
224 else
225#endif
226#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
227 if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
228 pcc_iowrite_word(0, port, &w, sizeof(w), 1, 0);
229 } else
230#endif
231 *(volatile unsigned short *)PORT2ADDR(port) = w;
232}
233
234void _outl(unsigned long l, unsigned long port)
235{
236#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
237 if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
238 pcc_iowrite_word(0, port, &l, sizeof(l), 1, 0);
239 } else
240#endif
241 *(volatile unsigned long *)PORT2ADDR(port) = l;
242}
243
244void _outb_p(unsigned char b, unsigned long port)
245{
246 _outb(b, port);
247 delay();
248}
249
250void _outw_p(unsigned short w, unsigned long port)
251{
252 _outw(w, port);
253 delay();
254}
255
256void _outl_p(unsigned long l, unsigned long port)
257{
258 _outl(l, port);
259 delay();
260}
261
262void _insb(unsigned int port, void *addr, unsigned long count)
263{
264 if (port >= LAN_IOSTART && port < LAN_IOEND)
265 _ne_insb(PORT2ADDR_NE(port), addr, count);
266#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
267 else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
268 unsigned char *buf = addr;
269 unsigned char *portp = __port2addr_ata(port);
270 while (count--)
271 *buf++ = *(volatile unsigned char *)portp;
272 }
273#endif
274#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
275 else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
276 pcc_ioread_byte(0, port, (void *)addr, sizeof(unsigned char),
277 count, 1);
278 }
279#endif
280 else {
281 unsigned char *buf = addr;
282 unsigned char *portp = PORT2ADDR(port);
283 while (count--)
284 *buf++ = *(volatile unsigned char *)portp;
285 }
286}
287
288void _insw(unsigned int port, void *addr, unsigned long count)
289{
290 unsigned short *buf = addr;
291 unsigned short *portp;
292
293 if (port >= LAN_IOSTART && port < LAN_IOEND) {
294 /*
295 * This portion is only used by smc91111.c to read data
296 * from the DATA_REG. Do not swap the data.
297 */
298 portp = PORT2ADDR_NE(port);
299 while (count--)
300 *buf++ = *(volatile unsigned short *)portp;
301#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
302 } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
303 pcc_ioread_word(9, port, (void *)addr, sizeof(unsigned short),
304 count, 1);
305#endif
306#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
307 } else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
308 portp = __port2addr_ata(port);
309 while (count--)
310 *buf++ = *(volatile unsigned short *)portp;
311#endif
312 } else {
313 portp = PORT2ADDR(port);
314 while (count--)
315 *buf++ = *(volatile unsigned short *)portp;
316 }
317}
318
319void _insl(unsigned int port, void *addr, unsigned long count)
320{
321 unsigned long *buf = addr;
322 unsigned long *portp;
323
324 portp = PORT2ADDR(port);
325 while (count--)
326 *buf++ = *(volatile unsigned long *)portp;
327}
328
329void _outsb(unsigned int port, const void *addr, unsigned long count)
330{
331 const unsigned char *buf = addr;
332 unsigned char *portp;
333
334 if (port >= LAN_IOSTART && port < LAN_IOEND) {
335 portp = PORT2ADDR_NE(port);
336 while (count--)
337 _ne_outb(*buf++, portp);
338#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
339 } else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
340 portp = __port2addr_ata(port);
341 while (count--)
342 *(volatile unsigned char *)portp = *buf++;
343#endif
344#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
345 } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
346 pcc_iowrite_byte(0, port, (void *)addr, sizeof(unsigned char),
347 count, 1);
348#endif
349 } else {
350 portp = PORT2ADDR(port);
351 while (count--)
352 *(volatile unsigned char *)portp = *buf++;
353 }
354}
355
356void _outsw(unsigned int port, const void *addr, unsigned long count)
357{
358 const unsigned short *buf = addr;
359 unsigned short *portp;
360
361 if (port >= LAN_IOSTART && port < LAN_IOEND) {
362 /*
363 * This portion is only used by smc91111.c to write data
364 * into the DATA_REG. Do not swap the data.
365 */
366 portp = PORT2ADDR_NE(port);
367 while (count--)
368 *(volatile unsigned short *)portp = *buf++;
369#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
370 } else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
371 portp = __port2addr_ata(port);
372 while (count--)
373 *(volatile unsigned short *)portp = *buf++;
374#endif
375#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
376 } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
377 pcc_iowrite_word(9, port, (void *)addr, sizeof(unsigned short),
378 count, 1);
379#endif
380 } else {
381 portp = PORT2ADDR(port);
382 while (count--)
383 *(volatile unsigned short *)portp = *buf++;
384 }
385}
386
387void _outsl(unsigned int port, const void *addr, unsigned long count)
388{
389 const unsigned long *buf = addr;
390 unsigned char *portp;
391
392 portp = PORT2ADDR(port);
393 while (count--)
394 *(volatile unsigned long *)portp = *buf++;
395}
diff --git a/arch/m32r/kernel/io_mappi.c b/arch/m32r/kernel/io_mappi.c
deleted file mode 100644
index 31396789ab1b..000000000000
--- a/arch/m32r/kernel/io_mappi.c
+++ /dev/null
@@ -1,325 +0,0 @@
1/*
2 * linux/arch/m32r/kernel/io_mappi.c
3 *
4 * Typical I/O routines for Mappi board.
5 *
6 * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
7 * Hitoshi Yamamoto
8 */
9
10#include <asm/m32r.h>
11#include <asm/page.h>
12#include <asm/io.h>
13#include <asm/byteorder.h>
14
15#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
16#include <linux/types.h>
17
18#define M32R_PCC_IOMAP_SIZE 0x1000
19
20#define M32R_PCC_IOSTART0 0x1000
21#define M32R_PCC_IOEND0 (M32R_PCC_IOSTART0 + M32R_PCC_IOMAP_SIZE - 1)
22#define M32R_PCC_IOSTART1 0x2000
23#define M32R_PCC_IOEND1 (M32R_PCC_IOSTART1 + M32R_PCC_IOMAP_SIZE - 1)
24
25extern void pcc_ioread(int, unsigned long, void *, size_t, size_t, int);
26extern void pcc_iowrite(int, unsigned long, void *, size_t, size_t, int);
27#endif /* CONFIG_PCMCIA && CONFIG_M32R_PCC */
28
29#define PORT2ADDR(port) _port2addr(port)
30
31static inline void *_port2addr(unsigned long port)
32{
33 return (void *)(port | NONCACHE_OFFSET);
34}
35
36static inline void *_port2addr_ne(unsigned long port)
37{
38 return (void *)((port<<1) + NONCACHE_OFFSET + 0x0C000000);
39}
40
41static inline void delay(void)
42{
43 __asm__ __volatile__ ("push r0; \n\t pop r0;" : : :"memory");
44}
45
46/*
47 * NIC I/O function
48 */
49
50#define PORT2ADDR_NE(port) _port2addr_ne(port)
51
52static inline unsigned char _ne_inb(void *portp)
53{
54 return (unsigned char) *(volatile unsigned short *)portp;
55}
56
57static inline unsigned short _ne_inw(void *portp)
58{
59 unsigned short tmp;
60
61 tmp = *(volatile unsigned short *)portp;
62 return le16_to_cpu(tmp);
63}
64
65static inline void _ne_outb(unsigned char b, void *portp)
66{
67 *(volatile unsigned short *)portp = (unsigned short)b;
68}
69
70static inline void _ne_outw(unsigned short w, void *portp)
71{
72 *(volatile unsigned short *)portp = cpu_to_le16(w);
73}
74
75unsigned char _inb(unsigned long port)
76{
77 if (port >= 0x300 && port < 0x320)
78 return _ne_inb(PORT2ADDR_NE(port));
79 else
80#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
81 if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
82 unsigned char b;
83 pcc_ioread(0, port, &b, sizeof(b), 1, 0);
84 return b;
85 } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
86 unsigned char b;
87 pcc_ioread(1, port, &b, sizeof(b), 1, 0);
88 return b;
89 } else
90#endif
91
92 return *(volatile unsigned char *)PORT2ADDR(port);
93}
94
95unsigned short _inw(unsigned long port)
96{
97 if (port >= 0x300 && port < 0x320)
98 return _ne_inw(PORT2ADDR_NE(port));
99 else
100#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
101 if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
102 unsigned short w;
103 pcc_ioread(0, port, &w, sizeof(w), 1, 0);
104 return w;
105 } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
106 unsigned short w;
107 pcc_ioread(1, port, &w, sizeof(w), 1, 0);
108 return w;
109 } else
110#endif
111 return *(volatile unsigned short *)PORT2ADDR(port);
112}
113
114unsigned long _inl(unsigned long port)
115{
116#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
117 if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
118 unsigned long l;
119 pcc_ioread(0, port, &l, sizeof(l), 1, 0);
120 return l;
121 } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
122 unsigned short l;
123 pcc_ioread(1, port, &l, sizeof(l), 1, 0);
124 return l;
125 } else
126#endif
127 return *(volatile unsigned long *)PORT2ADDR(port);
128}
129
130unsigned char _inb_p(unsigned long port)
131{
132 unsigned char v = _inb(port);
133 delay();
134 return (v);
135}
136
137unsigned short _inw_p(unsigned long port)
138{
139 unsigned short v = _inw(port);
140 delay();
141 return (v);
142}
143
144unsigned long _inl_p(unsigned long port)
145{
146 unsigned long v = _inl(port);
147 delay();
148 return (v);
149}
150
151void _outb(unsigned char b, unsigned long port)
152{
153 if (port >= 0x300 && port < 0x320)
154 _ne_outb(b, PORT2ADDR_NE(port));
155 else
156#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
157 if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
158 pcc_iowrite(0, port, &b, sizeof(b), 1, 0);
159 } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
160 pcc_iowrite(1, port, &b, sizeof(b), 1, 0);
161 } else
162#endif
163 *(volatile unsigned char *)PORT2ADDR(port) = b;
164}
165
166void _outw(unsigned short w, unsigned long port)
167{
168 if (port >= 0x300 && port < 0x320)
169 _ne_outw(w, PORT2ADDR_NE(port));
170 else
171#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
172 if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
173 pcc_iowrite(0, port, &w, sizeof(w), 1, 0);
174 } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
175 pcc_iowrite(1, port, &w, sizeof(w), 1, 0);
176 } else
177#endif
178 *(volatile unsigned short *)PORT2ADDR(port) = w;
179}
180
181void _outl(unsigned long l, unsigned long port)
182{
183#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
184 if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
185 pcc_iowrite(0, port, &l, sizeof(l), 1, 0);
186 } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
187 pcc_iowrite(1, port, &l, sizeof(l), 1, 0);
188 } else
189#endif
190 *(volatile unsigned long *)PORT2ADDR(port) = l;
191}
192
193void _outb_p(unsigned char b, unsigned long port)
194{
195 _outb(b, port);
196 delay();
197}
198
199void _outw_p(unsigned short w, unsigned long port)
200{
201 _outw(w, port);
202 delay();
203}
204
205void _outl_p(unsigned long l, unsigned long port)
206{
207 _outl(l, port);
208 delay();
209}
210
211void _insb(unsigned int port, void *addr, unsigned long count)
212{
213 unsigned short *buf = addr;
214 unsigned short *portp;
215
216 if (port >= 0x300 && port < 0x320){
217 portp = PORT2ADDR_NE(port);
218 while (count--)
219 *buf++ = *(volatile unsigned char *)portp;
220#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
221 } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
222 pcc_ioread(0, port, (void *)addr, sizeof(unsigned char),
223 count, 1);
224 } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
225 pcc_ioread(1, port, (void *)addr, sizeof(unsigned char),
226 count, 1);
227#endif
228 } else {
229 portp = PORT2ADDR(port);
230 while (count--)
231 *buf++ = *(volatile unsigned char *)portp;
232 }
233}
234
235void _insw(unsigned int port, void *addr, unsigned long count)
236{
237 unsigned short *buf = addr;
238 unsigned short *portp;
239
240 if (port >= 0x300 && port < 0x320) {
241 portp = PORT2ADDR_NE(port);
242 while (count--)
243 *buf++ = _ne_inw(portp);
244#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
245 } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
246 pcc_ioread(0, port, (void *)addr, sizeof(unsigned short),
247 count, 1);
248 } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
249 pcc_ioread(1, port, (void *)addr, sizeof(unsigned short),
250 count, 1);
251#endif
252 } else {
253 portp = PORT2ADDR(port);
254 while (count--)
255 *buf++ = *(volatile unsigned short *)portp;
256 }
257}
258
259void _insl(unsigned int port, void *addr, unsigned long count)
260{
261 unsigned long *buf = addr;
262 unsigned long *portp;
263
264 portp = PORT2ADDR(port);
265 while (count--)
266 *buf++ = *(volatile unsigned long *)portp;
267}
268
269void _outsb(unsigned int port, const void *addr, unsigned long count)
270{
271 const unsigned char *buf = addr;
272 unsigned char *portp;
273
274 if (port >= 0x300 && port < 0x320) {
275 portp = PORT2ADDR_NE(port);
276 while (count--)
277 _ne_outb(*buf++, portp);
278#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
279 } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
280 pcc_iowrite(0, port, (void *)addr, sizeof(unsigned char),
281 count, 1);
282 } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
283 pcc_iowrite(1, port, (void *)addr, sizeof(unsigned char),
284 count, 1);
285#endif
286 } else {
287 portp = PORT2ADDR(port);
288 while (count--)
289 *(volatile unsigned char *)portp = *buf++;
290 }
291}
292
293void _outsw(unsigned int port, const void *addr, unsigned long count)
294{
295 const unsigned short *buf = addr;
296 unsigned short *portp;
297
298 if (port >= 0x300 && port < 0x320) {
299 portp = PORT2ADDR_NE(port);
300 while (count--)
301 _ne_outw(*buf++, portp);
302#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
303 } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
304 pcc_iowrite(0, port, (void *)addr, sizeof(unsigned short),
305 count, 1);
306 } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
307 pcc_iowrite(1, port, (void *)addr, sizeof(unsigned short),
308 count, 1);
309#endif
310 } else {
311 portp = PORT2ADDR(port);
312 while (count--)
313 *(volatile unsigned short *)portp = *buf++;
314 }
315}
316
317void _outsl(unsigned int port, const void *addr, unsigned long count)
318{
319 const unsigned long *buf = addr;
320 unsigned char *portp;
321
322 portp = PORT2ADDR(port);
323 while (count--)
324 *(volatile unsigned long *)portp = *buf++;
325}
diff --git a/arch/m32r/kernel/io_mappi2.c b/arch/m32r/kernel/io_mappi2.c
deleted file mode 100644
index ecc6aa88f9ac..000000000000
--- a/arch/m32r/kernel/io_mappi2.c
+++ /dev/null
@@ -1,383 +0,0 @@
1/*
2 * linux/arch/m32r/kernel/io_mappi2.c
3 *
4 * Typical I/O routines for Mappi2 board.
5 *
6 * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
7 * Hitoshi Yamamoto, Mamoru Sakugawa
8 */
9
10#include <asm/m32r.h>
11#include <asm/page.h>
12#include <asm/io.h>
13#include <asm/byteorder.h>
14
15#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
16#include <linux/types.h>
17
18#define M32R_PCC_IOMAP_SIZE 0x1000
19
20#define M32R_PCC_IOSTART0 0x1000
21#define M32R_PCC_IOEND0 (M32R_PCC_IOSTART0 + M32R_PCC_IOMAP_SIZE - 1)
22
23extern void pcc_ioread_byte(int, unsigned long, void *, size_t, size_t, int);
24extern void pcc_ioread_word(int, unsigned long, void *, size_t, size_t, int);
25extern void pcc_iowrite_byte(int, unsigned long, void *, size_t, size_t, int);
26extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int);
27#endif /* CONFIG_PCMCIA && CONFIG_M32R_CFC */
28
29#define PORT2ADDR(port) _port2addr(port)
30#define PORT2ADDR_NE(port) _port2addr_ne(port)
31#define PORT2ADDR_USB(port) _port2addr_usb(port)
32
33static inline void *_port2addr(unsigned long port)
34{
35 return (void *)(port | NONCACHE_OFFSET);
36}
37
38#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
39static inline void *__port2addr_ata(unsigned long port)
40{
41 static int dummy_reg;
42
43 switch (port) {
44 case 0x1f0: return (void *)(0x0c002000 | NONCACHE_OFFSET);
45 case 0x1f1: return (void *)(0x0c012800 | NONCACHE_OFFSET);
46 case 0x1f2: return (void *)(0x0c012002 | NONCACHE_OFFSET);
47 case 0x1f3: return (void *)(0x0c012802 | NONCACHE_OFFSET);
48 case 0x1f4: return (void *)(0x0c012004 | NONCACHE_OFFSET);
49 case 0x1f5: return (void *)(0x0c012804 | NONCACHE_OFFSET);
50 case 0x1f6: return (void *)(0x0c012006 | NONCACHE_OFFSET);
51 case 0x1f7: return (void *)(0x0c012806 | NONCACHE_OFFSET);
52 case 0x3f6: return (void *)(0x0c01200e | NONCACHE_OFFSET);
53 default: return (void *)&dummy_reg;
54 }
55}
56#endif
57
58#define LAN_IOSTART (0x300 | NONCACHE_OFFSET)
59#define LAN_IOEND (0x320 | NONCACHE_OFFSET)
60#ifdef CONFIG_CHIP_OPSP
61static inline void *_port2addr_ne(unsigned long port)
62{
63 return (void *)(port + 0x10000000);
64}
65#else
66static inline void *_port2addr_ne(unsigned long port)
67{
68 return (void *)(port + 0x04000000);
69}
70#endif
71static inline void *_port2addr_usb(unsigned long port)
72{
73 return (void *)(port + NONCACHE_OFFSET + 0x14000000);
74}
75static inline void delay(void)
76{
77 __asm__ __volatile__ ("push r0; \n\t pop r0;" : : :"memory");
78}
79
80/*
81 * NIC I/O function
82 */
83
84static inline unsigned char _ne_inb(void *portp)
85{
86 return (unsigned char) *(volatile unsigned char *)portp;
87}
88
89static inline unsigned short _ne_inw(void *portp)
90{
91 return (unsigned short)le16_to_cpu(*(volatile unsigned short *)portp);
92}
93
94static inline void _ne_insb(void *portp, void * addr, unsigned long count)
95{
96 unsigned char *buf = addr;
97
98 while (count--)
99 *buf++ = *(volatile unsigned char *)portp;
100}
101
102static inline void _ne_outb(unsigned char b, void *portp)
103{
104 *(volatile unsigned char *)portp = (unsigned char)b;
105}
106
107static inline void _ne_outw(unsigned short w, void *portp)
108{
109 *(volatile unsigned short *)portp = cpu_to_le16(w);
110}
111
112unsigned char _inb(unsigned long port)
113{
114 if (port >= LAN_IOSTART && port < LAN_IOEND)
115 return _ne_inb(PORT2ADDR_NE(port));
116#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
117 else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
118 return *(volatile unsigned char *)__port2addr_ata(port);
119 }
120#endif
121#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
122 else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
123 unsigned char b;
124 pcc_ioread_byte(0, port, &b, sizeof(b), 1, 0);
125 return b;
126 } else
127#endif
128
129 return *(volatile unsigned char *)PORT2ADDR(port);
130}
131
132unsigned short _inw(unsigned long port)
133{
134 if (port >= LAN_IOSTART && port < LAN_IOEND)
135 return _ne_inw(PORT2ADDR_NE(port));
136#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
137 else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
138 return *(volatile unsigned short *)__port2addr_ata(port);
139 }
140#endif
141#if defined(CONFIG_USB)
142 else if (port >= 0x340 && port < 0x3a0)
143 return *(volatile unsigned short *)PORT2ADDR_USB(port);
144#endif
145
146#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
147 else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
148 unsigned short w;
149 pcc_ioread_word(0, port, &w, sizeof(w), 1, 0);
150 return w;
151 } else
152#endif
153 return *(volatile unsigned short *)PORT2ADDR(port);
154}
155
156unsigned long _inl(unsigned long port)
157{
158#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
159 if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
160 unsigned long l;
161 pcc_ioread_word(0, port, &l, sizeof(l), 1, 0);
162 return l;
163 } else
164#endif
165 return *(volatile unsigned long *)PORT2ADDR(port);
166}
167
168unsigned char _inb_p(unsigned long port)
169{
170 unsigned char v = _inb(port);
171 delay();
172 return (v);
173}
174
175unsigned short _inw_p(unsigned long port)
176{
177 unsigned short v = _inw(port);
178 delay();
179 return (v);
180}
181
182unsigned long _inl_p(unsigned long port)
183{
184 unsigned long v = _inl(port);
185 delay();
186 return (v);
187}
188
189void _outb(unsigned char b, unsigned long port)
190{
191 if (port >= LAN_IOSTART && port < LAN_IOEND)
192 _ne_outb(b, PORT2ADDR_NE(port));
193 else
194#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
195 if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
196 *(volatile unsigned char *)__port2addr_ata(port) = b;
197 } else
198#endif
199#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
200 if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
201 pcc_iowrite_byte(0, port, &b, sizeof(b), 1, 0);
202 } else
203#endif
204 *(volatile unsigned char *)PORT2ADDR(port) = b;
205}
206
207void _outw(unsigned short w, unsigned long port)
208{
209 if (port >= LAN_IOSTART && port < LAN_IOEND)
210 _ne_outw(w, PORT2ADDR_NE(port));
211 else
212#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
213 if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
214 *(volatile unsigned short *)__port2addr_ata(port) = w;
215 } else
216#endif
217#if defined(CONFIG_USB)
218 if (port >= 0x340 && port < 0x3a0)
219 *(volatile unsigned short *)PORT2ADDR_USB(port) = w;
220 else
221#endif
222#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
223 if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
224 pcc_iowrite_word(0, port, &w, sizeof(w), 1, 0);
225 } else
226#endif
227 *(volatile unsigned short *)PORT2ADDR(port) = w;
228}
229
230void _outl(unsigned long l, unsigned long port)
231{
232#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
233 if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
234 pcc_iowrite_word(0, port, &l, sizeof(l), 1, 0);
235 } else
236#endif
237 *(volatile unsigned long *)PORT2ADDR(port) = l;
238}
239
240void _outb_p(unsigned char b, unsigned long port)
241{
242 _outb(b, port);
243 delay();
244}
245
246void _outw_p(unsigned short w, unsigned long port)
247{
248 _outw(w, port);
249 delay();
250}
251
252void _outl_p(unsigned long l, unsigned long port)
253{
254 _outl(l, port);
255 delay();
256}
257
258void _insb(unsigned int port, void * addr, unsigned long count)
259{
260 if (port >= LAN_IOSTART && port < LAN_IOEND)
261 _ne_insb(PORT2ADDR_NE(port), addr, count);
262#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
263 else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
264 unsigned char *buf = addr;
265 unsigned char *portp = __port2addr_ata(port);
266 while (count--)
267 *buf++ = *(volatile unsigned char *)portp;
268 }
269#endif
270#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
271 else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
272 pcc_ioread_byte(0, port, (void *)addr, sizeof(unsigned char),
273 count, 1);
274 }
275#endif
276 else {
277 unsigned char *buf = addr;
278 unsigned char *portp = PORT2ADDR(port);
279 while (count--)
280 *buf++ = *(volatile unsigned char *)portp;
281 }
282}
283
284void _insw(unsigned int port, void * addr, unsigned long count)
285{
286 unsigned short *buf = addr;
287 unsigned short *portp;
288
289 if (port >= LAN_IOSTART && port < LAN_IOEND) {
290 portp = PORT2ADDR_NE(port);
291 while (count--)
292 *buf++ = *(volatile unsigned short *)portp;
293#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
294 } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
295 pcc_ioread_word(9, port, (void *)addr, sizeof(unsigned short),
296 count, 1);
297#endif
298#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
299 } else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
300 portp = __port2addr_ata(port);
301 while (count--)
302 *buf++ = *(volatile unsigned short *)portp;
303#endif
304 } else {
305 portp = PORT2ADDR(port);
306 while (count--)
307 *buf++ = *(volatile unsigned short *)portp;
308 }
309}
310
311void _insl(unsigned int port, void * addr, unsigned long count)
312{
313 unsigned long *buf = addr;
314 unsigned long *portp;
315
316 portp = PORT2ADDR(port);
317 while (count--)
318 *buf++ = *(volatile unsigned long *)portp;
319}
320
321void _outsb(unsigned int port, const void * addr, unsigned long count)
322{
323 const unsigned char *buf = addr;
324 unsigned char *portp;
325
326 if (port >= LAN_IOSTART && port < LAN_IOEND) {
327 portp = PORT2ADDR_NE(port);
328 while (count--)
329 _ne_outb(*buf++, portp);
330#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
331 } else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
332 portp = __port2addr_ata(port);
333 while (count--)
334 *(volatile unsigned char *)portp = *buf++;
335#endif
336#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
337 } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
338 pcc_iowrite_byte(0, port, (void *)addr, sizeof(unsigned char),
339 count, 1);
340#endif
341 } else {
342 portp = PORT2ADDR(port);
343 while (count--)
344 *(volatile unsigned char *)portp = *buf++;
345 }
346}
347
348void _outsw(unsigned int port, const void * addr, unsigned long count)
349{
350 const unsigned short *buf = addr;
351 unsigned short *portp;
352
353 if (port >= LAN_IOSTART && port < LAN_IOEND) {
354 portp = PORT2ADDR_NE(port);
355 while (count--)
356 *(volatile unsigned short *)portp = *buf++;
357#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
358 } else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
359 portp = __port2addr_ata(port);
360 while (count--)
361 *(volatile unsigned short *)portp = *buf++;
362#endif
363#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
364 } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
365 pcc_iowrite_word(9, port, (void *)addr, sizeof(unsigned short),
366 count, 1);
367#endif
368 } else {
369 portp = PORT2ADDR(port);
370 while (count--)
371 *(volatile unsigned short *)portp = *buf++;
372 }
373}
374
375void _outsl(unsigned int port, const void * addr, unsigned long count)
376{
377 const unsigned long *buf = addr;
378 unsigned char *portp;
379
380 portp = PORT2ADDR(port);
381 while (count--)
382 *(volatile unsigned long *)portp = *buf++;
383}
diff --git a/arch/m32r/kernel/io_mappi3.c b/arch/m32r/kernel/io_mappi3.c
deleted file mode 100644
index a13b5f6b07e9..000000000000
--- a/arch/m32r/kernel/io_mappi3.c
+++ /dev/null
@@ -1,405 +0,0 @@
1/*
2 * linux/arch/m32r/kernel/io_mappi3.c
3 *
4 * Typical I/O routines for Mappi3 board.
5 *
6 * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
7 * Hitoshi Yamamoto, Mamoru Sakugawa
8 */
9
10#include <asm/m32r.h>
11#include <asm/page.h>
12#include <asm/io.h>
13#include <asm/byteorder.h>
14
15#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
16#include <linux/types.h>
17
18#define M32R_PCC_IOMAP_SIZE 0x1000
19
20#define M32R_PCC_IOSTART0 0x1000
21#define M32R_PCC_IOEND0 (M32R_PCC_IOSTART0 + M32R_PCC_IOMAP_SIZE - 1)
22
23extern void pcc_ioread_byte(int, unsigned long, void *, size_t, size_t, int);
24extern void pcc_ioread_word(int, unsigned long, void *, size_t, size_t, int);
25extern void pcc_iowrite_byte(int, unsigned long, void *, size_t, size_t, int);
26extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int);
27#endif /* CONFIG_PCMCIA && CONFIG_M32R_CFC */
28
29#define PORT2ADDR(port) _port2addr(port)
30#define PORT2ADDR_NE(port) _port2addr_ne(port)
31#define PORT2ADDR_USB(port) _port2addr_usb(port)
32
33static inline void *_port2addr(unsigned long port)
34{
35 return (void *)(port | NONCACHE_OFFSET);
36}
37
38#if defined(CONFIG_IDE)
39static inline void *__port2addr_ata(unsigned long port)
40{
41 static int dummy_reg;
42
43 switch (port) {
44 /* IDE0 CF */
45 case 0x1f0: return (void *)(0x14002000 | NONCACHE_OFFSET);
46 case 0x1f1: return (void *)(0x14012800 | NONCACHE_OFFSET);
47 case 0x1f2: return (void *)(0x14012002 | NONCACHE_OFFSET);
48 case 0x1f3: return (void *)(0x14012802 | NONCACHE_OFFSET);
49 case 0x1f4: return (void *)(0x14012004 | NONCACHE_OFFSET);
50 case 0x1f5: return (void *)(0x14012804 | NONCACHE_OFFSET);
51 case 0x1f6: return (void *)(0x14012006 | NONCACHE_OFFSET);
52 case 0x1f7: return (void *)(0x14012806 | NONCACHE_OFFSET);
53 case 0x3f6: return (void *)(0x1401200e | NONCACHE_OFFSET);
54 /* IDE1 IDE */
55 case 0x170: /* Data 16bit */
56 return (void *)(0x14810000 | NONCACHE_OFFSET);
57 case 0x171: /* Features / Error */
58 return (void *)(0x14810002 | NONCACHE_OFFSET);
59 case 0x172: /* Sector count */
60 return (void *)(0x14810004 | NONCACHE_OFFSET);
61 case 0x173: /* Sector number */
62 return (void *)(0x14810006 | NONCACHE_OFFSET);
63 case 0x174: /* Cylinder low */
64 return (void *)(0x14810008 | NONCACHE_OFFSET);
65 case 0x175: /* Cylinder high */
66 return (void *)(0x1481000a | NONCACHE_OFFSET);
67 case 0x176: /* Device head */
68 return (void *)(0x1481000c | NONCACHE_OFFSET);
69 case 0x177: /* Command */
70 return (void *)(0x1481000e | NONCACHE_OFFSET);
71 case 0x376: /* Device control / Alt status */
72 return (void *)(0x1480800c | NONCACHE_OFFSET);
73
74 default: return (void *)&dummy_reg;
75 }
76}
77#endif
78
79#define LAN_IOSTART (0x300 | NONCACHE_OFFSET)
80#define LAN_IOEND (0x320 | NONCACHE_OFFSET)
81static inline void *_port2addr_ne(unsigned long port)
82{
83 return (void *)(port + 0x10000000);
84}
85
86static inline void *_port2addr_usb(unsigned long port)
87{
88 return (void *)(port + NONCACHE_OFFSET + 0x12000000);
89}
90static inline void delay(void)
91{
92 __asm__ __volatile__ ("push r0; \n\t pop r0;" : : :"memory");
93}
94
95/*
96 * NIC I/O function
97 */
98
99static inline unsigned char _ne_inb(void *portp)
100{
101 return (unsigned char) *(volatile unsigned char *)portp;
102}
103
104static inline unsigned short _ne_inw(void *portp)
105{
106 return (unsigned short)le16_to_cpu(*(volatile unsigned short *)portp);
107}
108
109static inline void _ne_insb(void *portp, void * addr, unsigned long count)
110{
111 unsigned char *buf = addr;
112
113 while (count--)
114 *buf++ = *(volatile unsigned char *)portp;
115}
116
117static inline void _ne_outb(unsigned char b, void *portp)
118{
119 *(volatile unsigned char *)portp = (unsigned char)b;
120}
121
122static inline void _ne_outw(unsigned short w, void *portp)
123{
124 *(volatile unsigned short *)portp = cpu_to_le16(w);
125}
126
127unsigned char _inb(unsigned long port)
128{
129 if (port >= LAN_IOSTART && port < LAN_IOEND)
130 return _ne_inb(PORT2ADDR_NE(port));
131#if defined(CONFIG_IDE)
132 else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
133 ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
134 return *(volatile unsigned char *)__port2addr_ata(port);
135 }
136#endif
137#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
138 else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
139 unsigned char b;
140 pcc_ioread_byte(0, port, &b, sizeof(b), 1, 0);
141 return b;
142 } else
143#endif
144 return *(volatile unsigned char *)PORT2ADDR(port);
145}
146
147unsigned short _inw(unsigned long port)
148{
149 if (port >= LAN_IOSTART && port < LAN_IOEND)
150 return _ne_inw(PORT2ADDR_NE(port));
151#if defined(CONFIG_IDE)
152 else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
153 ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
154 return *(volatile unsigned short *)__port2addr_ata(port);
155 }
156#endif
157#if defined(CONFIG_USB)
158 else if (port >= 0x340 && port < 0x3a0)
159 return *(volatile unsigned short *)PORT2ADDR_USB(port);
160#endif
161
162#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
163 else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
164 unsigned short w;
165 pcc_ioread_word(0, port, &w, sizeof(w), 1, 0);
166 return w;
167 } else
168#endif
169 return *(volatile unsigned short *)PORT2ADDR(port);
170}
171
172unsigned long _inl(unsigned long port)
173{
174#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
175 if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
176 unsigned long l;
177 pcc_ioread_word(0, port, &l, sizeof(l), 1, 0);
178 return l;
179 } else
180#endif
181 return *(volatile unsigned long *)PORT2ADDR(port);
182}
183
184unsigned char _inb_p(unsigned long port)
185{
186 unsigned char v = _inb(port);
187 delay();
188 return (v);
189}
190
191unsigned short _inw_p(unsigned long port)
192{
193 unsigned short v = _inw(port);
194 delay();
195 return (v);
196}
197
198unsigned long _inl_p(unsigned long port)
199{
200 unsigned long v = _inl(port);
201 delay();
202 return (v);
203}
204
205void _outb(unsigned char b, unsigned long port)
206{
207 if (port >= LAN_IOSTART && port < LAN_IOEND)
208 _ne_outb(b, PORT2ADDR_NE(port));
209 else
210#if defined(CONFIG_IDE)
211 if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
212 ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
213 *(volatile unsigned char *)__port2addr_ata(port) = b;
214 } else
215#endif
216#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
217 if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
218 pcc_iowrite_byte(0, port, &b, sizeof(b), 1, 0);
219 } else
220#endif
221 *(volatile unsigned char *)PORT2ADDR(port) = b;
222}
223
224void _outw(unsigned short w, unsigned long port)
225{
226 if (port >= LAN_IOSTART && port < LAN_IOEND)
227 _ne_outw(w, PORT2ADDR_NE(port));
228 else
229#if defined(CONFIG_IDE)
230 if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
231 ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
232 *(volatile unsigned short *)__port2addr_ata(port) = w;
233 } else
234#endif
235#if defined(CONFIG_USB)
236 if (port >= 0x340 && port < 0x3a0)
237 *(volatile unsigned short *)PORT2ADDR_USB(port) = w;
238 else
239#endif
240#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
241 if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
242 pcc_iowrite_word(0, port, &w, sizeof(w), 1, 0);
243 } else
244#endif
245 *(volatile unsigned short *)PORT2ADDR(port) = w;
246}
247
248void _outl(unsigned long l, unsigned long port)
249{
250#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
251 if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
252 pcc_iowrite_word(0, port, &l, sizeof(l), 1, 0);
253 } else
254#endif
255 *(volatile unsigned long *)PORT2ADDR(port) = l;
256}
257
258void _outb_p(unsigned char b, unsigned long port)
259{
260 _outb(b, port);
261 delay();
262}
263
264void _outw_p(unsigned short w, unsigned long port)
265{
266 _outw(w, port);
267 delay();
268}
269
270void _outl_p(unsigned long l, unsigned long port)
271{
272 _outl(l, port);
273 delay();
274}
275
276void _insb(unsigned int port, void * addr, unsigned long count)
277{
278 if (port >= LAN_IOSTART && port < LAN_IOEND)
279 _ne_insb(PORT2ADDR_NE(port), addr, count);
280#if defined(CONFIG_IDE)
281 else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
282 ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
283 unsigned char *buf = addr;
284 unsigned char *portp = __port2addr_ata(port);
285 while (count--)
286 *buf++ = *(volatile unsigned char *)portp;
287 }
288#endif
289#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
290 else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
291 pcc_ioread_byte(0, port, (void *)addr, sizeof(unsigned char),
292 count, 1);
293 }
294#endif
295 else {
296 unsigned char *buf = addr;
297 unsigned char *portp = PORT2ADDR(port);
298 while (count--)
299 *buf++ = *(volatile unsigned char *)portp;
300 }
301}
302
303void _insw(unsigned int port, void * addr, unsigned long count)
304{
305 unsigned short *buf = addr;
306 unsigned short *portp;
307
308 if (port >= LAN_IOSTART && port < LAN_IOEND) {
309 portp = PORT2ADDR_NE(port);
310 while (count--)
311 *buf++ = *(volatile unsigned short *)portp;
312#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
313 } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
314 pcc_ioread_word(9, port, (void *)addr, sizeof(unsigned short),
315 count, 1);
316#endif
317#if defined(CONFIG_IDE)
318 } else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
319 ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
320 portp = __port2addr_ata(port);
321 while (count--)
322 *buf++ = *(volatile unsigned short *)portp;
323#endif
324 } else {
325 portp = PORT2ADDR(port);
326 while (count--)
327 *buf++ = *(volatile unsigned short *)portp;
328 }
329}
330
331void _insl(unsigned int port, void * addr, unsigned long count)
332{
333 unsigned long *buf = addr;
334 unsigned long *portp;
335
336 portp = PORT2ADDR(port);
337 while (count--)
338 *buf++ = *(volatile unsigned long *)portp;
339}
340
341void _outsb(unsigned int port, const void * addr, unsigned long count)
342{
343 const unsigned char *buf = addr;
344 unsigned char *portp;
345
346 if (port >= LAN_IOSTART && port < LAN_IOEND) {
347 portp = PORT2ADDR_NE(port);
348 while (count--)
349 _ne_outb(*buf++, portp);
350#if defined(CONFIG_IDE)
351 } else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
352 ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
353 portp = __port2addr_ata(port);
354 while (count--)
355 *(volatile unsigned char *)portp = *buf++;
356#endif
357#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
358 } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
359 pcc_iowrite_byte(0, port, (void *)addr, sizeof(unsigned char),
360 count, 1);
361#endif
362 } else {
363 portp = PORT2ADDR(port);
364 while (count--)
365 *(volatile unsigned char *)portp = *buf++;
366 }
367}
368
369void _outsw(unsigned int port, const void * addr, unsigned long count)
370{
371 const unsigned short *buf = addr;
372 unsigned short *portp;
373
374 if (port >= LAN_IOSTART && port < LAN_IOEND) {
375 portp = PORT2ADDR_NE(port);
376 while (count--)
377 *(volatile unsigned short *)portp = *buf++;
378#if defined(CONFIG_IDE)
379 } else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
380 ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
381 portp = __port2addr_ata(port);
382 while (count--)
383 *(volatile unsigned short *)portp = *buf++;
384#endif
385#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
386 } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
387 pcc_iowrite_word(9, port, (void *)addr, sizeof(unsigned short),
388 count, 1);
389#endif
390 } else {
391 portp = PORT2ADDR(port);
392 while (count--)
393 *(volatile unsigned short *)portp = *buf++;
394 }
395}
396
397void _outsl(unsigned int port, const void * addr, unsigned long count)
398{
399 const unsigned long *buf = addr;
400 unsigned char *portp;
401
402 portp = PORT2ADDR(port);
403 while (count--)
404 *(volatile unsigned long *)portp = *buf++;
405}
diff --git a/arch/m32r/kernel/io_oaks32r.c b/arch/m32r/kernel/io_oaks32r.c
deleted file mode 100644
index 068bf47060f8..000000000000
--- a/arch/m32r/kernel/io_oaks32r.c
+++ /dev/null
@@ -1,228 +0,0 @@
1/*
2 * linux/arch/m32r/kernel/io_oaks32r.c
3 *
4 * Typical I/O routines for OAKS32R board.
5 *
6 * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
7 * Hitoshi Yamamoto, Mamoru Sakugawa
8 */
9
10#include <asm/m32r.h>
11#include <asm/page.h>
12#include <asm/io.h>
13
14#define PORT2ADDR(port) _port2addr(port)
15
16static inline void *_port2addr(unsigned long port)
17{
18 return (void *)(port | NONCACHE_OFFSET);
19}
20
21static inline void *_port2addr_ne(unsigned long port)
22{
23 return (void *)((port<<1) + NONCACHE_OFFSET + 0x02000000);
24}
25
26static inline void delay(void)
27{
28 __asm__ __volatile__ ("push r0; \n\t pop r0;" : : :"memory");
29}
30
31/*
32 * NIC I/O function
33 */
34
35#define PORT2ADDR_NE(port) _port2addr_ne(port)
36
37static inline unsigned char _ne_inb(void *portp)
38{
39 return *(volatile unsigned char *)(portp+1);
40}
41
42static inline unsigned short _ne_inw(void *portp)
43{
44 unsigned short tmp;
45
46 tmp = *(unsigned short *)(portp) & 0xff;
47 tmp |= *(unsigned short *)(portp+2) << 8;
48 return tmp;
49}
50
51static inline void _ne_insb(void *portp, void *addr, unsigned long count)
52{
53 unsigned char *buf = addr;
54 while (count--)
55 *buf++ = *(volatile unsigned char *)(portp+1);
56}
57
58static inline void _ne_outb(unsigned char b, void *portp)
59{
60 *(volatile unsigned char *)(portp+1) = b;
61}
62
63static inline void _ne_outw(unsigned short w, void *portp)
64{
65 *(volatile unsigned short *)portp = (w >> 8);
66 *(volatile unsigned short *)(portp+2) = (w & 0xff);
67}
68
69unsigned char _inb(unsigned long port)
70{
71 if (port >= 0x300 && port < 0x320)
72 return _ne_inb(PORT2ADDR_NE(port));
73
74 return *(volatile unsigned char *)PORT2ADDR(port);
75}
76
77unsigned short _inw(unsigned long port)
78{
79 if (port >= 0x300 && port < 0x320)
80 return _ne_inw(PORT2ADDR_NE(port));
81
82 return *(volatile unsigned short *)PORT2ADDR(port);
83}
84
85unsigned long _inl(unsigned long port)
86{
87 return *(volatile unsigned long *)PORT2ADDR(port);
88}
89
90unsigned char _inb_p(unsigned long port)
91{
92 unsigned char v = _inb(port);
93 delay();
94 return (v);
95}
96
97unsigned short _inw_p(unsigned long port)
98{
99 unsigned short v = _inw(port);
100 delay();
101 return (v);
102}
103
104unsigned long _inl_p(unsigned long port)
105{
106 unsigned long v = _inl(port);
107 delay();
108 return (v);
109}
110
111void _outb(unsigned char b, unsigned long port)
112{
113 if (port >= 0x300 && port < 0x320)
114 _ne_outb(b, PORT2ADDR_NE(port));
115 else
116 *(volatile unsigned char *)PORT2ADDR(port) = b;
117}
118
119void _outw(unsigned short w, unsigned long port)
120{
121 if (port >= 0x300 && port < 0x320)
122 _ne_outw(w, PORT2ADDR_NE(port));
123 else
124 *(volatile unsigned short *)PORT2ADDR(port) = w;
125}
126
127void _outl(unsigned long l, unsigned long port)
128{
129 *(volatile unsigned long *)PORT2ADDR(port) = l;
130}
131
132void _outb_p(unsigned char b, unsigned long port)
133{
134 _outb(b, port);
135 delay();
136}
137
138void _outw_p(unsigned short w, unsigned long port)
139{
140 _outw(w, port);
141 delay();
142}
143
144void _outl_p(unsigned long l, unsigned long port)
145{
146 _outl(l, port);
147 delay();
148}
149
150void _insb(unsigned int port, void *addr, unsigned long count)
151{
152 if (port >= 0x300 && port < 0x320)
153 _ne_insb(PORT2ADDR_NE(port), addr, count);
154 else {
155 unsigned char *buf = addr;
156 unsigned char *portp = PORT2ADDR(port);
157 while (count--)
158 *buf++ = *(volatile unsigned char *)portp;
159 }
160}
161
162void _insw(unsigned int port, void *addr, unsigned long count)
163{
164 unsigned short *buf = addr;
165 unsigned short *portp;
166
167 if (port >= 0x300 && port < 0x320) {
168 portp = PORT2ADDR_NE(port);
169 while (count--)
170 *buf++ = _ne_inw(portp);
171 } else {
172 portp = PORT2ADDR(port);
173 while (count--)
174 *buf++ = *(volatile unsigned short *)portp;
175 }
176}
177
178void _insl(unsigned int port, void *addr, unsigned long count)
179{
180 unsigned long *buf = addr;
181 unsigned long *portp;
182
183 portp = PORT2ADDR(port);
184 while (count--)
185 *buf++ = *(volatile unsigned long *)portp;
186}
187
188void _outsb(unsigned int port, const void *addr, unsigned long count)
189{
190 const unsigned char *buf = addr;
191 unsigned char *portp;
192
193 if (port >= 0x300 && port < 0x320) {
194 portp = PORT2ADDR_NE(port);
195 while (count--)
196 _ne_outb(*buf++, portp);
197 } else {
198 portp = PORT2ADDR(port);
199 while (count--)
200 *(volatile unsigned char *)portp = *buf++;
201 }
202}
203
204void _outsw(unsigned int port, const void *addr, unsigned long count)
205{
206 const unsigned short *buf = addr;
207 unsigned short *portp;
208
209 if (port >= 0x300 && port < 0x320) {
210 portp = PORT2ADDR_NE(port);
211 while (count--)
212 _ne_outw(*buf++, portp);
213 } else {
214 portp = PORT2ADDR(port);
215 while (count--)
216 *(volatile unsigned short *)portp = *buf++;
217 }
218}
219
220void _outsl(unsigned int port, const void *addr, unsigned long count)
221{
222 const unsigned long *buf = addr;
223 unsigned char *portp;
224
225 portp = PORT2ADDR(port);
226 while (count--)
227 *(volatile unsigned long *)portp = *buf++;
228}
diff --git a/arch/m32r/kernel/io_opsput.c b/arch/m32r/kernel/io_opsput.c
deleted file mode 100644
index 3cbb1f717e50..000000000000
--- a/arch/m32r/kernel/io_opsput.c
+++ /dev/null
@@ -1,395 +0,0 @@
1/*
2 * linux/arch/m32r/kernel/io_opsput.c
3 *
4 * Typical I/O routines for OPSPUT board.
5 *
6 * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
7 * Hitoshi Yamamoto, Takeo Takahashi
8 *
9 * This file is subject to the terms and conditions of the GNU General
10 * Public License. See the file "COPYING" in the main directory of this
11 * archive for more details.
12 */
13
14#include <asm/m32r.h>
15#include <asm/page.h>
16#include <asm/io.h>
17#include <asm/byteorder.h>
18
19#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
20#include <linux/types.h>
21
22#define M32R_PCC_IOMAP_SIZE 0x1000
23
24#define M32R_PCC_IOSTART0 0x1000
25#define M32R_PCC_IOEND0 (M32R_PCC_IOSTART0 + M32R_PCC_IOMAP_SIZE - 1)
26
27extern void pcc_ioread_byte(int, unsigned long, void *, size_t, size_t, int);
28extern void pcc_ioread_word(int, unsigned long, void *, size_t, size_t, int);
29extern void pcc_iowrite_byte(int, unsigned long, void *, size_t, size_t, int);
30extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int);
31#endif /* CONFIG_PCMCIA && CONFIG_M32R_CFC */
32
33#define PORT2ADDR(port) _port2addr(port)
34#define PORT2ADDR_USB(port) _port2addr_usb(port)
35
36static inline void *_port2addr(unsigned long port)
37{
38 return (void *)(port | NONCACHE_OFFSET);
39}
40
41#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
42static inline void *__port2addr_ata(unsigned long port)
43{
44 static int dummy_reg;
45
46 switch (port) {
47 case 0x1f0: return (void *)(0x0c002000 | NONCACHE_OFFSET);
48 case 0x1f1: return (void *)(0x0c012800 | NONCACHE_OFFSET);
49 case 0x1f2: return (void *)(0x0c012002 | NONCACHE_OFFSET);
50 case 0x1f3: return (void *)(0x0c012802 | NONCACHE_OFFSET);
51 case 0x1f4: return (void *)(0x0c012004 | NONCACHE_OFFSET);
52 case 0x1f5: return (void *)(0x0c012804 | NONCACHE_OFFSET);
53 case 0x1f6: return (void *)(0x0c012006 | NONCACHE_OFFSET);
54 case 0x1f7: return (void *)(0x0c012806 | NONCACHE_OFFSET);
55 case 0x3f6: return (void *)(0x0c01200e | NONCACHE_OFFSET);
56 default: return (void *)&dummy_reg;
57 }
58}
59#endif
60
61/*
62 * OPSPUT-LAN is located in the extended bus space
63 * from 0x10000000 to 0x13ffffff on physical address.
64 * The base address of LAN controller(LAN91C111) is 0x300.
65 */
66#define LAN_IOSTART (0x300 | NONCACHE_OFFSET)
67#define LAN_IOEND (0x320 | NONCACHE_OFFSET)
68static inline void *_port2addr_ne(unsigned long port)
69{
70 return (void *)(port + 0x10000000);
71}
72static inline void *_port2addr_usb(unsigned long port)
73{
74 return (void *)((port & 0x0f) + NONCACHE_OFFSET + 0x10303000);
75}
76
77static inline void delay(void)
78{
79 __asm__ __volatile__ ("push r0; \n\t pop r0;" : : :"memory");
80}
81
82/*
83 * NIC I/O function
84 */
85
86#define PORT2ADDR_NE(port) _port2addr_ne(port)
87
88static inline unsigned char _ne_inb(void *portp)
89{
90 return *(volatile unsigned char *)portp;
91}
92
93static inline unsigned short _ne_inw(void *portp)
94{
95 return (unsigned short)le16_to_cpu(*(volatile unsigned short *)portp);
96}
97
98static inline void _ne_insb(void *portp, void *addr, unsigned long count)
99{
100 unsigned char *buf = (unsigned char *)addr;
101
102 while (count--)
103 *buf++ = _ne_inb(portp);
104}
105
106static inline void _ne_outb(unsigned char b, void *portp)
107{
108 *(volatile unsigned char *)portp = b;
109}
110
111static inline void _ne_outw(unsigned short w, void *portp)
112{
113 *(volatile unsigned short *)portp = cpu_to_le16(w);
114}
115
116unsigned char _inb(unsigned long port)
117{
118 if (port >= LAN_IOSTART && port < LAN_IOEND)
119 return _ne_inb(PORT2ADDR_NE(port));
120
121#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
122 else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
123 return *(volatile unsigned char *)__port2addr_ata(port);
124 }
125#endif
126#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
127 else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
128 unsigned char b;
129 pcc_ioread_byte(0, port, &b, sizeof(b), 1, 0);
130 return b;
131 } else
132#endif
133
134 return *(volatile unsigned char *)PORT2ADDR(port);
135}
136
137unsigned short _inw(unsigned long port)
138{
139 if (port >= LAN_IOSTART && port < LAN_IOEND)
140 return _ne_inw(PORT2ADDR_NE(port));
141#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
142 else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
143 return *(volatile unsigned short *)__port2addr_ata(port);
144 }
145#endif
146#if defined(CONFIG_USB)
147 else if(port >= 0x340 && port < 0x3a0)
148 return *(volatile unsigned short *)PORT2ADDR_USB(port);
149#endif
150#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
151 else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
152 unsigned short w;
153 pcc_ioread_word(0, port, &w, sizeof(w), 1, 0);
154 return w;
155 } else
156#endif
157 return *(volatile unsigned short *)PORT2ADDR(port);
158}
159
160unsigned long _inl(unsigned long port)
161{
162#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
163 if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
164 unsigned long l;
165 pcc_ioread_word(0, port, &l, sizeof(l), 1, 0);
166 return l;
167 } else
168#endif
169 return *(volatile unsigned long *)PORT2ADDR(port);
170}
171
172unsigned char _inb_p(unsigned long port)
173{
174 unsigned char v = _inb(port);
175 delay();
176 return (v);
177}
178
179unsigned short _inw_p(unsigned long port)
180{
181 unsigned short v = _inw(port);
182 delay();
183 return (v);
184}
185
186unsigned long _inl_p(unsigned long port)
187{
188 unsigned long v = _inl(port);
189 delay();
190 return (v);
191}
192
193void _outb(unsigned char b, unsigned long port)
194{
195 if (port >= LAN_IOSTART && port < LAN_IOEND)
196 _ne_outb(b, PORT2ADDR_NE(port));
197 else
198#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
199 if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
200 *(volatile unsigned char *)__port2addr_ata(port) = b;
201 } else
202#endif
203#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
204 if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
205 pcc_iowrite_byte(0, port, &b, sizeof(b), 1, 0);
206 } else
207#endif
208 *(volatile unsigned char *)PORT2ADDR(port) = b;
209}
210
211void _outw(unsigned short w, unsigned long port)
212{
213 if (port >= LAN_IOSTART && port < LAN_IOEND)
214 _ne_outw(w, PORT2ADDR_NE(port));
215 else
216#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
217 if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
218 *(volatile unsigned short *)__port2addr_ata(port) = w;
219 } else
220#endif
221#if defined(CONFIG_USB)
222 if(port >= 0x340 && port < 0x3a0)
223 *(volatile unsigned short *)PORT2ADDR_USB(port) = w;
224 else
225#endif
226#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
227 if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
228 pcc_iowrite_word(0, port, &w, sizeof(w), 1, 0);
229 } else
230#endif
231 *(volatile unsigned short *)PORT2ADDR(port) = w;
232}
233
234void _outl(unsigned long l, unsigned long port)
235{
236#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
237 if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
238 pcc_iowrite_word(0, port, &l, sizeof(l), 1, 0);
239 } else
240#endif
241 *(volatile unsigned long *)PORT2ADDR(port) = l;
242}
243
244void _outb_p(unsigned char b, unsigned long port)
245{
246 _outb(b, port);
247 delay();
248}
249
250void _outw_p(unsigned short w, unsigned long port)
251{
252 _outw(w, port);
253 delay();
254}
255
256void _outl_p(unsigned long l, unsigned long port)
257{
258 _outl(l, port);
259 delay();
260}
261
262void _insb(unsigned int port, void *addr, unsigned long count)
263{
264 if (port >= LAN_IOSTART && port < LAN_IOEND)
265 _ne_insb(PORT2ADDR_NE(port), addr, count);
266#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
267 else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
268 unsigned char *buf = addr;
269 unsigned char *portp = __port2addr_ata(port);
270 while (count--)
271 *buf++ = *(volatile unsigned char *)portp;
272 }
273#endif
274#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
275 else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
276 pcc_ioread_byte(0, port, (void *)addr, sizeof(unsigned char),
277 count, 1);
278 }
279#endif
280 else {
281 unsigned char *buf = addr;
282 unsigned char *portp = PORT2ADDR(port);
283 while (count--)
284 *buf++ = *(volatile unsigned char *)portp;
285 }
286}
287
288void _insw(unsigned int port, void *addr, unsigned long count)
289{
290 unsigned short *buf = addr;
291 unsigned short *portp;
292
293 if (port >= LAN_IOSTART && port < LAN_IOEND) {
294 /*
295 * This portion is only used by smc91111.c to read data
296 * from the DATA_REG. Do not swap the data.
297 */
298 portp = PORT2ADDR_NE(port);
299 while (count--)
300 *buf++ = *(volatile unsigned short *)portp;
301#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
302 } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
303 pcc_ioread_word(9, port, (void *)addr, sizeof(unsigned short),
304 count, 1);
305#endif
306#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
307 } else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
308 portp = __port2addr_ata(port);
309 while (count--)
310 *buf++ = *(volatile unsigned short *)portp;
311#endif
312 } else {
313 portp = PORT2ADDR(port);
314 while (count--)
315 *buf++ = *(volatile unsigned short *)portp;
316 }
317}
318
319void _insl(unsigned int port, void *addr, unsigned long count)
320{
321 unsigned long *buf = addr;
322 unsigned long *portp;
323
324 portp = PORT2ADDR(port);
325 while (count--)
326 *buf++ = *(volatile unsigned long *)portp;
327}
328
329void _outsb(unsigned int port, const void *addr, unsigned long count)
330{
331 const unsigned char *buf = addr;
332 unsigned char *portp;
333
334 if (port >= LAN_IOSTART && port < LAN_IOEND) {
335 portp = PORT2ADDR_NE(port);
336 while (count--)
337 _ne_outb(*buf++, portp);
338#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
339 } else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
340 portp = __port2addr_ata(port);
341 while (count--)
342 *(volatile unsigned char *)portp = *buf++;
343#endif
344#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
345 } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
346 pcc_iowrite_byte(0, port, (void *)addr, sizeof(unsigned char),
347 count, 1);
348#endif
349 } else {
350 portp = PORT2ADDR(port);
351 while (count--)
352 *(volatile unsigned char *)portp = *buf++;
353 }
354}
355
356void _outsw(unsigned int port, const void *addr, unsigned long count)
357{
358 const unsigned short *buf = addr;
359 unsigned short *portp;
360
361 if (port >= LAN_IOSTART && port < LAN_IOEND) {
362 /*
363 * This portion is only used by smc91111.c to write data
364 * into the DATA_REG. Do not swap the data.
365 */
366 portp = PORT2ADDR_NE(port);
367 while (count--)
368 *(volatile unsigned short *)portp = *buf++;
369#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
370 } else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
371 portp = __port2addr_ata(port);
372 while (count--)
373 *(volatile unsigned short *)portp = *buf++;
374#endif
375#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
376 } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
377 pcc_iowrite_word(9, port, (void *)addr, sizeof(unsigned short),
378 count, 1);
379#endif
380 } else {
381 portp = PORT2ADDR(port);
382 while (count--)
383 *(volatile unsigned short *)portp = *buf++;
384 }
385}
386
387void _outsl(unsigned int port, const void *addr, unsigned long count)
388{
389 const unsigned long *buf = addr;
390 unsigned char *portp;
391
392 portp = PORT2ADDR(port);
393 while (count--)
394 *(volatile unsigned long *)portp = *buf++;
395}
diff --git a/arch/m32r/kernel/io_usrv.c b/arch/m32r/kernel/io_usrv.c
deleted file mode 100644
index a8c0e2eceb4d..000000000000
--- a/arch/m32r/kernel/io_usrv.c
+++ /dev/null
@@ -1,225 +0,0 @@
1/*
2 * linux/arch/m32r/kernel/io_usrv.c
3 *
4 * Typical I/O routines for uServer board.
5 *
6 * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
7 * Hitoshi Yamamoto, Takeo Takahashi
8 *
9 * This file is subject to the terms and conditions of the GNU General
10 * Public License. See the file "COPYING" in the main directory of this
11 * archive for more details.
12 *
13 */
14
15#include <asm/m32r.h>
16#include <asm/page.h>
17#include <asm/io.h>
18
19#include <linux/types.h>
20#include "../drivers/m32r_cfc.h"
21
22extern void pcc_ioread_byte(int, unsigned long, void *, size_t, size_t, int);
23extern void pcc_ioread_word(int, unsigned long, void *, size_t, size_t, int);
24extern void pcc_iowrite_byte(int, unsigned long, void *, size_t, size_t, int);
25extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int);
26#define CFC_IOSTART CFC_IOPORT_BASE
27#define CFC_IOEND (CFC_IOSTART + (M32R_PCC_MAPSIZE * M32R_MAX_PCC) - 1)
28
29#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
30#define UART0_REGSTART 0x04c20000
31#define UART1_REGSTART 0x04c20100
32#define UART_IOMAP_SIZE 8
33#define UART0_IOSTART 0x3f8
34#define UART0_IOEND (UART0_IOSTART + UART_IOMAP_SIZE - 1)
35#define UART1_IOSTART 0x2f8
36#define UART1_IOEND (UART1_IOSTART + UART_IOMAP_SIZE - 1)
37#endif /* CONFIG_SERIAL_8250 || CONFIG_SERIAL_8250_MODULE */
38
39#define PORT2ADDR(port) _port2addr(port)
40
41static inline void *_port2addr(unsigned long port)
42{
43#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
44 if (port >= UART0_IOSTART && port <= UART0_IOEND)
45 port = ((port - UART0_IOSTART) << 1) + UART0_REGSTART;
46 else if (port >= UART1_IOSTART && port <= UART1_IOEND)
47 port = ((port - UART1_IOSTART) << 1) + UART1_REGSTART;
48#endif /* CONFIG_SERIAL_8250 || CONFIG_SERIAL_8250_MODULE */
49 return (void *)(port | (NONCACHE_OFFSET));
50}
51
52static inline void delay(void)
53{
54 __asm__ __volatile__ ("push r0; \n\t pop r0;" : : :"memory");
55}
56
57unsigned char _inb(unsigned long port)
58{
59 if (port >= CFC_IOSTART && port <= CFC_IOEND) {
60 unsigned char b;
61 pcc_ioread_byte(0, port, &b, sizeof(b), 1, 0);
62 return b;
63 } else
64 return *(volatile unsigned char *)PORT2ADDR(port);
65}
66
67unsigned short _inw(unsigned long port)
68{
69 if (port >= CFC_IOSTART && port <= CFC_IOEND) {
70 unsigned short w;
71 pcc_ioread_word(0, port, &w, sizeof(w), 1, 0);
72 return w;
73 } else
74 return *(volatile unsigned short *)PORT2ADDR(port);
75}
76
77unsigned long _inl(unsigned long port)
78{
79 if (port >= CFC_IOSTART && port <= CFC_IOEND) {
80 unsigned long l;
81 pcc_ioread_word(0, port, &l, sizeof(l), 1, 0);
82 return l;
83 } else
84 return *(volatile unsigned long *)PORT2ADDR(port);
85}
86
87unsigned char _inb_p(unsigned long port)
88{
89 unsigned char v = _inb(port);
90 delay();
91 return v;
92}
93
94unsigned short _inw_p(unsigned long port)
95{
96 unsigned short v = _inw(port);
97 delay();
98 return v;
99}
100
101unsigned long _inl_p(unsigned long port)
102{
103 unsigned long v = _inl(port);
104 delay();
105 return v;
106}
107
108void _outb(unsigned char b, unsigned long port)
109{
110 if (port >= CFC_IOSTART && port <= CFC_IOEND)
111 pcc_iowrite_byte(0, port, &b, sizeof(b), 1, 0);
112 else
113 *(volatile unsigned char *)PORT2ADDR(port) = b;
114}
115
116void _outw(unsigned short w, unsigned long port)
117{
118 if (port >= CFC_IOSTART && port <= CFC_IOEND)
119 pcc_iowrite_word(0, port, &w, sizeof(w), 1, 0);
120 else
121 *(volatile unsigned short *)PORT2ADDR(port) = w;
122}
123
124void _outl(unsigned long l, unsigned long port)
125{
126 if (port >= CFC_IOSTART && port <= CFC_IOEND)
127 pcc_iowrite_word(0, port, &l, sizeof(l), 1, 0);
128 else
129 *(volatile unsigned long *)PORT2ADDR(port) = l;
130}
131
132void _outb_p(unsigned char b, unsigned long port)
133{
134 _outb(b, port);
135 delay();
136}
137
138void _outw_p(unsigned short w, unsigned long port)
139{
140 _outw(w, port);
141 delay();
142}
143
144void _outl_p(unsigned long l, unsigned long port)
145{
146 _outl(l, port);
147 delay();
148}
149
150void _insb(unsigned int port, void * addr, unsigned long count)
151{
152 if (port >= CFC_IOSTART && port <= CFC_IOEND)
153 pcc_ioread_byte(0, port, addr, sizeof(unsigned char), count, 1);
154 else {
155 unsigned char *buf = addr;
156 unsigned char *portp = PORT2ADDR(port);
157 while (count--)
158 *buf++ = *(volatile unsigned char *)portp;
159 }
160}
161
162void _insw(unsigned int port, void * addr, unsigned long count)
163{
164 unsigned short *buf = addr;
165 unsigned short *portp;
166
167 if (port >= CFC_IOSTART && port <= CFC_IOEND)
168 pcc_ioread_word(0, port, addr, sizeof(unsigned short), count,
169 1);
170 else {
171 portp = PORT2ADDR(port);
172 while (count--)
173 *buf++ = *(volatile unsigned short *)portp;
174 }
175}
176
177void _insl(unsigned int port, void * addr, unsigned long count)
178{
179 unsigned long *buf = addr;
180 unsigned long *portp;
181
182 portp = PORT2ADDR(port);
183 while (count--)
184 *buf++ = *(volatile unsigned long *)portp;
185}
186
187void _outsb(unsigned int port, const void * addr, unsigned long count)
188{
189 const unsigned char *buf = addr;
190 unsigned char *portp;
191
192 if (port >= CFC_IOSTART && port <= CFC_IOEND)
193 pcc_iowrite_byte(0, port, (void *)addr, sizeof(unsigned char),
194 count, 1);
195 else {
196 portp = PORT2ADDR(port);
197 while (count--)
198 *(volatile unsigned char *)portp = *buf++;
199 }
200}
201
202void _outsw(unsigned int port, const void * addr, unsigned long count)
203{
204 const unsigned short *buf = addr;
205 unsigned short *portp;
206
207 if (port >= CFC_IOSTART && port <= CFC_IOEND)
208 pcc_iowrite_word(0, port, (void *)addr, sizeof(unsigned short),
209 count, 1);
210 else {
211 portp = PORT2ADDR(port);
212 while (count--)
213 *(volatile unsigned short *)portp = *buf++;
214 }
215}
216
217void _outsl(unsigned int port, const void * addr, unsigned long count)
218{
219 const unsigned long *buf = addr;
220 unsigned char *portp;
221
222 portp = PORT2ADDR(port);
223 while (count--)
224 *(volatile unsigned long *)portp = *buf++;
225}
diff --git a/arch/m32r/kernel/setup_m32104ut.c b/arch/m32r/kernel/setup_m32104ut.c
deleted file mode 100644
index 1692b321f476..000000000000
--- a/arch/m32r/kernel/setup_m32104ut.c
+++ /dev/null
@@ -1,155 +0,0 @@
1/*
2 * linux/arch/m32r/kernel/setup_m32104ut.c
3 *
4 * Setup routines for M32104UT Board
5 *
6 * Copyright (c) 2002-2005 Hiroyuki Kondo, Hirokazu Takata,
7 * Hitoshi Yamamoto, Mamoru Sakugawa,
8 * Naoto Sugai, Hayato Fujiwara
9 */
10
11#include <linux/irq.h>
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/device.h>
15
16#include <asm/system.h>
17#include <asm/m32r.h>
18#include <asm/io.h>
19
20#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
21
22icu_data_t icu_data[NR_IRQS];
23
24static void disable_m32104ut_irq(unsigned int irq)
25{
26 unsigned long port, data;
27
28 port = irq2port(irq);
29 data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
30 outl(data, port);
31}
32
33static void enable_m32104ut_irq(unsigned int irq)
34{
35 unsigned long port, data;
36
37 port = irq2port(irq);
38 data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
39 outl(data, port);
40}
41
42static void mask_and_ack_m32104ut(unsigned int irq)
43{
44 disable_m32104ut_irq(irq);
45}
46
47static void end_m32104ut_irq(unsigned int irq)
48{
49 enable_m32104ut_irq(irq);
50}
51
52static unsigned int startup_m32104ut_irq(unsigned int irq)
53{
54 enable_m32104ut_irq(irq);
55 return (0);
56}
57
58static void shutdown_m32104ut_irq(unsigned int irq)
59{
60 unsigned long port;
61
62 port = irq2port(irq);
63 outl(M32R_ICUCR_ILEVEL7, port);
64}
65
66static struct hw_interrupt_type m32104ut_irq_type =
67{
68 .typename = "M32104UT-IRQ",
69 .startup = startup_m32104ut_irq,
70 .shutdown = shutdown_m32104ut_irq,
71 .enable = enable_m32104ut_irq,
72 .disable = disable_m32104ut_irq,
73 .ack = mask_and_ack_m32104ut,
74 .end = end_m32104ut_irq
75};
76
77void __init init_IRQ(void)
78{
79 static int once = 0;
80
81 if (once)
82 return;
83 else
84 once++;
85
86#if defined(CONFIG_SMC91X)
87 /* INT#0: LAN controller on M32104UT-LAN (SMC91C111)*/
88 irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
89 irq_desc[M32R_IRQ_INT0].chip = &m32104ut_irq_type;
90 irq_desc[M32R_IRQ_INT0].action = 0;
91 irq_desc[M32R_IRQ_INT0].depth = 1;
92 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD11; /* "H" level sense */
93 disable_m32104ut_irq(M32R_IRQ_INT0);
94#endif /* CONFIG_SMC91X */
95
96 /* MFT2 : system timer */
97 irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
98 irq_desc[M32R_IRQ_MFT2].chip = &m32104ut_irq_type;
99 irq_desc[M32R_IRQ_MFT2].action = 0;
100 irq_desc[M32R_IRQ_MFT2].depth = 1;
101 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
102 disable_m32104ut_irq(M32R_IRQ_MFT2);
103
104#ifdef CONFIG_SERIAL_M32R_SIO
105 /* SIO0_R : uart receive data */
106 irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
107 irq_desc[M32R_IRQ_SIO0_R].chip = &m32104ut_irq_type;
108 irq_desc[M32R_IRQ_SIO0_R].action = 0;
109 irq_desc[M32R_IRQ_SIO0_R].depth = 1;
110 icu_data[M32R_IRQ_SIO0_R].icucr = M32R_ICUCR_IEN;
111 disable_m32104ut_irq(M32R_IRQ_SIO0_R);
112
113 /* SIO0_S : uart send data */
114 irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
115 irq_desc[M32R_IRQ_SIO0_S].chip = &m32104ut_irq_type;
116 irq_desc[M32R_IRQ_SIO0_S].action = 0;
117 irq_desc[M32R_IRQ_SIO0_S].depth = 1;
118 icu_data[M32R_IRQ_SIO0_S].icucr = M32R_ICUCR_IEN;
119 disable_m32104ut_irq(M32R_IRQ_SIO0_S);
120#endif /* CONFIG_SERIAL_M32R_SIO */
121}
122
123#if defined(CONFIG_SMC91X)
124
125#define LAN_IOSTART 0x300
126#define LAN_IOEND 0x320
127static struct resource smc91x_resources[] = {
128 [0] = {
129 .start = (LAN_IOSTART),
130 .end = (LAN_IOEND),
131 .flags = IORESOURCE_MEM,
132 },
133 [1] = {
134 .start = M32R_IRQ_INT0,
135 .end = M32R_IRQ_INT0,
136 .flags = IORESOURCE_IRQ,
137 }
138};
139
140static struct platform_device smc91x_device = {
141 .name = "smc91x",
142 .id = 0,
143 .num_resources = ARRAY_SIZE(smc91x_resources),
144 .resource = smc91x_resources,
145};
146#endif
147
148static int __init platform_init(void)
149{
150#if defined(CONFIG_SMC91X)
151 platform_device_register(&smc91x_device);
152#endif
153 return 0;
154}
155arch_initcall(platform_init);
diff --git a/arch/m32r/kernel/setup_m32700ut.c b/arch/m32r/kernel/setup_m32700ut.c
deleted file mode 100644
index 7efc145c74c2..000000000000
--- a/arch/m32r/kernel/setup_m32700ut.c
+++ /dev/null
@@ -1,518 +0,0 @@
1/*
2 * linux/arch/m32r/kernel/setup_m32700ut.c
3 *
4 * Setup routines for Renesas M32700UT Board
5 *
6 * Copyright (c) 2002-2005 Hiroyuki Kondo, Hirokazu Takata,
7 * Hitoshi Yamamoto, Takeo Takahashi
8 *
9 * This file is subject to the terms and conditions of the GNU General
10 * Public License. See the file "COPYING" in the main directory of this
11 * archive for more details.
12 */
13
14#include <linux/irq.h>
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/platform_device.h>
18
19#include <asm/system.h>
20#include <asm/m32r.h>
21#include <asm/io.h>
22
23/*
24 * M32700 Interrupt Control Unit (Level 1)
25 */
26#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
27
28icu_data_t icu_data[M32700UT_NUM_CPU_IRQ];
29
30static void disable_m32700ut_irq(unsigned int irq)
31{
32 unsigned long port, data;
33
34 port = irq2port(irq);
35 data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
36 outl(data, port);
37}
38
39static void enable_m32700ut_irq(unsigned int irq)
40{
41 unsigned long port, data;
42
43 port = irq2port(irq);
44 data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
45 outl(data, port);
46}
47
48static void mask_and_ack_m32700ut(unsigned int irq)
49{
50 disable_m32700ut_irq(irq);
51}
52
53static void end_m32700ut_irq(unsigned int irq)
54{
55 enable_m32700ut_irq(irq);
56}
57
58static unsigned int startup_m32700ut_irq(unsigned int irq)
59{
60 enable_m32700ut_irq(irq);
61 return (0);
62}
63
64static void shutdown_m32700ut_irq(unsigned int irq)
65{
66 unsigned long port;
67
68 port = irq2port(irq);
69 outl(M32R_ICUCR_ILEVEL7, port);
70}
71
72static struct hw_interrupt_type m32700ut_irq_type =
73{
74 .typename = "M32700UT-IRQ",
75 .startup = startup_m32700ut_irq,
76 .shutdown = shutdown_m32700ut_irq,
77 .enable = enable_m32700ut_irq,
78 .disable = disable_m32700ut_irq,
79 .ack = mask_and_ack_m32700ut,
80 .end = end_m32700ut_irq
81};
82
83/*
84 * Interrupt Control Unit of PLD on M32700UT (Level 2)
85 */
86#define irq2pldirq(x) ((x) - M32700UT_PLD_IRQ_BASE)
87#define pldirq2port(x) (unsigned long)((int)PLD_ICUCR1 + \
88 (((x) - 1) * sizeof(unsigned short)))
89
90typedef struct {
91 unsigned short icucr; /* ICU Control Register */
92} pld_icu_data_t;
93
94static pld_icu_data_t pld_icu_data[M32700UT_NUM_PLD_IRQ];
95
96static void disable_m32700ut_pld_irq(unsigned int irq)
97{
98 unsigned long port, data;
99 unsigned int pldirq;
100
101 pldirq = irq2pldirq(irq);
102// disable_m32700ut_irq(M32R_IRQ_INT1);
103 port = pldirq2port(pldirq);
104 data = pld_icu_data[pldirq].icucr|PLD_ICUCR_ILEVEL7;
105 outw(data, port);
106}
107
108static void enable_m32700ut_pld_irq(unsigned int irq)
109{
110 unsigned long port, data;
111 unsigned int pldirq;
112
113 pldirq = irq2pldirq(irq);
114// enable_m32700ut_irq(M32R_IRQ_INT1);
115 port = pldirq2port(pldirq);
116 data = pld_icu_data[pldirq].icucr|PLD_ICUCR_IEN|PLD_ICUCR_ILEVEL6;
117 outw(data, port);
118}
119
120static void mask_and_ack_m32700ut_pld(unsigned int irq)
121{
122 disable_m32700ut_pld_irq(irq);
123// mask_and_ack_m32700ut(M32R_IRQ_INT1);
124}
125
126static void end_m32700ut_pld_irq(unsigned int irq)
127{
128 enable_m32700ut_pld_irq(irq);
129 end_m32700ut_irq(M32R_IRQ_INT1);
130}
131
132static unsigned int startup_m32700ut_pld_irq(unsigned int irq)
133{
134 enable_m32700ut_pld_irq(irq);
135 return (0);
136}
137
138static void shutdown_m32700ut_pld_irq(unsigned int irq)
139{
140 unsigned long port;
141 unsigned int pldirq;
142
143 pldirq = irq2pldirq(irq);
144// shutdown_m32700ut_irq(M32R_IRQ_INT1);
145 port = pldirq2port(pldirq);
146 outw(PLD_ICUCR_ILEVEL7, port);
147}
148
149static struct hw_interrupt_type m32700ut_pld_irq_type =
150{
151 .typename = "M32700UT-PLD-IRQ",
152 .startup = startup_m32700ut_pld_irq,
153 .shutdown = shutdown_m32700ut_pld_irq,
154 .enable = enable_m32700ut_pld_irq,
155 .disable = disable_m32700ut_pld_irq,
156 .ack = mask_and_ack_m32700ut_pld,
157 .end = end_m32700ut_pld_irq
158};
159
160/*
161 * Interrupt Control Unit of PLD on M32700UT-LAN (Level 2)
162 */
163#define irq2lanpldirq(x) ((x) - M32700UT_LAN_PLD_IRQ_BASE)
164#define lanpldirq2port(x) (unsigned long)((int)M32700UT_LAN_ICUCR1 + \
165 (((x) - 1) * sizeof(unsigned short)))
166
167static pld_icu_data_t lanpld_icu_data[M32700UT_NUM_LAN_PLD_IRQ];
168
169static void disable_m32700ut_lanpld_irq(unsigned int irq)
170{
171 unsigned long port, data;
172 unsigned int pldirq;
173
174 pldirq = irq2lanpldirq(irq);
175 port = lanpldirq2port(pldirq);
176 data = lanpld_icu_data[pldirq].icucr|PLD_ICUCR_ILEVEL7;
177 outw(data, port);
178}
179
180static void enable_m32700ut_lanpld_irq(unsigned int irq)
181{
182 unsigned long port, data;
183 unsigned int pldirq;
184
185 pldirq = irq2lanpldirq(irq);
186 port = lanpldirq2port(pldirq);
187 data = lanpld_icu_data[pldirq].icucr|PLD_ICUCR_IEN|PLD_ICUCR_ILEVEL6;
188 outw(data, port);
189}
190
191static void mask_and_ack_m32700ut_lanpld(unsigned int irq)
192{
193 disable_m32700ut_lanpld_irq(irq);
194}
195
196static void end_m32700ut_lanpld_irq(unsigned int irq)
197{
198 enable_m32700ut_lanpld_irq(irq);
199 end_m32700ut_irq(M32R_IRQ_INT0);
200}
201
202static unsigned int startup_m32700ut_lanpld_irq(unsigned int irq)
203{
204 enable_m32700ut_lanpld_irq(irq);
205 return (0);
206}
207
208static void shutdown_m32700ut_lanpld_irq(unsigned int irq)
209{
210 unsigned long port;
211 unsigned int pldirq;
212
213 pldirq = irq2lanpldirq(irq);
214 port = lanpldirq2port(pldirq);
215 outw(PLD_ICUCR_ILEVEL7, port);
216}
217
218static struct hw_interrupt_type m32700ut_lanpld_irq_type =
219{
220 .typename = "M32700UT-PLD-LAN-IRQ",
221 .startup = startup_m32700ut_lanpld_irq,
222 .shutdown = shutdown_m32700ut_lanpld_irq,
223 .enable = enable_m32700ut_lanpld_irq,
224 .disable = disable_m32700ut_lanpld_irq,
225 .ack = mask_and_ack_m32700ut_lanpld,
226 .end = end_m32700ut_lanpld_irq
227};
228
229/*
230 * Interrupt Control Unit of PLD on M32700UT-LCD (Level 2)
231 */
232#define irq2lcdpldirq(x) ((x) - M32700UT_LCD_PLD_IRQ_BASE)
233#define lcdpldirq2port(x) (unsigned long)((int)M32700UT_LCD_ICUCR1 + \
234 (((x) - 1) * sizeof(unsigned short)))
235
236static pld_icu_data_t lcdpld_icu_data[M32700UT_NUM_LCD_PLD_IRQ];
237
238static void disable_m32700ut_lcdpld_irq(unsigned int irq)
239{
240 unsigned long port, data;
241 unsigned int pldirq;
242
243 pldirq = irq2lcdpldirq(irq);
244 port = lcdpldirq2port(pldirq);
245 data = lcdpld_icu_data[pldirq].icucr|PLD_ICUCR_ILEVEL7;
246 outw(data, port);
247}
248
249static void enable_m32700ut_lcdpld_irq(unsigned int irq)
250{
251 unsigned long port, data;
252 unsigned int pldirq;
253
254 pldirq = irq2lcdpldirq(irq);
255 port = lcdpldirq2port(pldirq);
256 data = lcdpld_icu_data[pldirq].icucr|PLD_ICUCR_IEN|PLD_ICUCR_ILEVEL6;
257 outw(data, port);
258}
259
260static void mask_and_ack_m32700ut_lcdpld(unsigned int irq)
261{
262 disable_m32700ut_lcdpld_irq(irq);
263}
264
265static void end_m32700ut_lcdpld_irq(unsigned int irq)
266{
267 enable_m32700ut_lcdpld_irq(irq);
268 end_m32700ut_irq(M32R_IRQ_INT2);
269}
270
271static unsigned int startup_m32700ut_lcdpld_irq(unsigned int irq)
272{
273 enable_m32700ut_lcdpld_irq(irq);
274 return (0);
275}
276
277static void shutdown_m32700ut_lcdpld_irq(unsigned int irq)
278{
279 unsigned long port;
280 unsigned int pldirq;
281
282 pldirq = irq2lcdpldirq(irq);
283 port = lcdpldirq2port(pldirq);
284 outw(PLD_ICUCR_ILEVEL7, port);
285}
286
287static struct hw_interrupt_type m32700ut_lcdpld_irq_type =
288{
289 .typename = "M32700UT-PLD-LCD-IRQ",
290 .startup = startup_m32700ut_lcdpld_irq,
291 .shutdown = shutdown_m32700ut_lcdpld_irq,
292 .enable = enable_m32700ut_lcdpld_irq,
293 .disable = disable_m32700ut_lcdpld_irq,
294 .ack = mask_and_ack_m32700ut_lcdpld,
295 .end = end_m32700ut_lcdpld_irq
296};
297
298void __init init_IRQ(void)
299{
300#if defined(CONFIG_SMC91X)
301 /* INT#0: LAN controller on M32700UT-LAN (SMC91C111)*/
302 irq_desc[M32700UT_LAN_IRQ_LAN].status = IRQ_DISABLED;
303 irq_desc[M32700UT_LAN_IRQ_LAN].chip = &m32700ut_lanpld_irq_type;
304 irq_desc[M32700UT_LAN_IRQ_LAN].action = 0;
305 irq_desc[M32700UT_LAN_IRQ_LAN].depth = 1; /* disable nested irq */
306 lanpld_icu_data[irq2lanpldirq(M32700UT_LAN_IRQ_LAN)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* "H" edge sense */
307 disable_m32700ut_lanpld_irq(M32700UT_LAN_IRQ_LAN);
308#endif /* CONFIG_SMC91X */
309
310 /* MFT2 : system timer */
311 irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
312 irq_desc[M32R_IRQ_MFT2].chip = &m32700ut_irq_type;
313 irq_desc[M32R_IRQ_MFT2].action = 0;
314 irq_desc[M32R_IRQ_MFT2].depth = 1;
315 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
316 disable_m32700ut_irq(M32R_IRQ_MFT2);
317
318 /* SIO0 : receive */
319 irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
320 irq_desc[M32R_IRQ_SIO0_R].chip = &m32700ut_irq_type;
321 irq_desc[M32R_IRQ_SIO0_R].action = 0;
322 irq_desc[M32R_IRQ_SIO0_R].depth = 1;
323 icu_data[M32R_IRQ_SIO0_R].icucr = 0;
324 disable_m32700ut_irq(M32R_IRQ_SIO0_R);
325
326 /* SIO0 : send */
327 irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
328 irq_desc[M32R_IRQ_SIO0_S].chip = &m32700ut_irq_type;
329 irq_desc[M32R_IRQ_SIO0_S].action = 0;
330 irq_desc[M32R_IRQ_SIO0_S].depth = 1;
331 icu_data[M32R_IRQ_SIO0_S].icucr = 0;
332 disable_m32700ut_irq(M32R_IRQ_SIO0_S);
333
334 /* SIO1 : receive */
335 irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
336 irq_desc[M32R_IRQ_SIO1_R].chip = &m32700ut_irq_type;
337 irq_desc[M32R_IRQ_SIO1_R].action = 0;
338 irq_desc[M32R_IRQ_SIO1_R].depth = 1;
339 icu_data[M32R_IRQ_SIO1_R].icucr = 0;
340 disable_m32700ut_irq(M32R_IRQ_SIO1_R);
341
342 /* SIO1 : send */
343 irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
344 irq_desc[M32R_IRQ_SIO1_S].chip = &m32700ut_irq_type;
345 irq_desc[M32R_IRQ_SIO1_S].action = 0;
346 irq_desc[M32R_IRQ_SIO1_S].depth = 1;
347 icu_data[M32R_IRQ_SIO1_S].icucr = 0;
348 disable_m32700ut_irq(M32R_IRQ_SIO1_S);
349
350 /* DMA1 : */
351 irq_desc[M32R_IRQ_DMA1].status = IRQ_DISABLED;
352 irq_desc[M32R_IRQ_DMA1].chip = &m32700ut_irq_type;
353 irq_desc[M32R_IRQ_DMA1].action = 0;
354 irq_desc[M32R_IRQ_DMA1].depth = 1;
355 icu_data[M32R_IRQ_DMA1].icucr = 0;
356 disable_m32700ut_irq(M32R_IRQ_DMA1);
357
358#ifdef CONFIG_SERIAL_M32R_PLDSIO
359 /* INT#1: SIO0 Receive on PLD */
360 irq_desc[PLD_IRQ_SIO0_RCV].status = IRQ_DISABLED;
361 irq_desc[PLD_IRQ_SIO0_RCV].chip = &m32700ut_pld_irq_type;
362 irq_desc[PLD_IRQ_SIO0_RCV].action = 0;
363 irq_desc[PLD_IRQ_SIO0_RCV].depth = 1; /* disable nested irq */
364 pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_RCV)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
365 disable_m32700ut_pld_irq(PLD_IRQ_SIO0_RCV);
366
367 /* INT#1: SIO0 Send on PLD */
368 irq_desc[PLD_IRQ_SIO0_SND].status = IRQ_DISABLED;
369 irq_desc[PLD_IRQ_SIO0_SND].chip = &m32700ut_pld_irq_type;
370 irq_desc[PLD_IRQ_SIO0_SND].action = 0;
371 irq_desc[PLD_IRQ_SIO0_SND].depth = 1; /* disable nested irq */
372 pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_SND)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
373 disable_m32700ut_pld_irq(PLD_IRQ_SIO0_SND);
374#endif /* CONFIG_SERIAL_M32R_PLDSIO */
375
376 /* INT#1: CFC IREQ on PLD */
377 irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
378 irq_desc[PLD_IRQ_CFIREQ].chip = &m32700ut_pld_irq_type;
379 irq_desc[PLD_IRQ_CFIREQ].action = 0;
380 irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */
381 pld_icu_data[irq2pldirq(PLD_IRQ_CFIREQ)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* 'L' level sense */
382 disable_m32700ut_pld_irq(PLD_IRQ_CFIREQ);
383
384 /* INT#1: CFC Insert on PLD */
385 irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
386 irq_desc[PLD_IRQ_CFC_INSERT].chip = &m32700ut_pld_irq_type;
387 irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
388 irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
389 pld_icu_data[irq2pldirq(PLD_IRQ_CFC_INSERT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD00; /* 'L' edge sense */
390 disable_m32700ut_pld_irq(PLD_IRQ_CFC_INSERT);
391
392 /* INT#1: CFC Eject on PLD */
393 irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED;
394 irq_desc[PLD_IRQ_CFC_EJECT].chip = &m32700ut_pld_irq_type;
395 irq_desc[PLD_IRQ_CFC_EJECT].action = 0;
396 irq_desc[PLD_IRQ_CFC_EJECT].depth = 1; /* disable nested irq */
397 pld_icu_data[irq2pldirq(PLD_IRQ_CFC_EJECT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* 'H' edge sense */
398 disable_m32700ut_pld_irq(PLD_IRQ_CFC_EJECT);
399
400 /*
401 * INT0# is used for LAN, DIO
402 * We enable it here.
403 */
404 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD11;
405 enable_m32700ut_irq(M32R_IRQ_INT0);
406
407 /*
408 * INT1# is used for UART, MMC, CF Controller in FPGA.
409 * We enable it here.
410 */
411 icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD11;
412 enable_m32700ut_irq(M32R_IRQ_INT1);
413
414#if defined(CONFIG_USB)
415 outw(USBCR_OTGS, USBCR); /* USBCR: non-OTG */
416
417 irq_desc[M32700UT_LCD_IRQ_USB_INT1].status = IRQ_DISABLED;
418 irq_desc[M32700UT_LCD_IRQ_USB_INT1].chip = &m32700ut_lcdpld_irq_type;
419 irq_desc[M32700UT_LCD_IRQ_USB_INT1].action = 0;
420 irq_desc[M32700UT_LCD_IRQ_USB_INT1].depth = 1;
421 lcdpld_icu_data[irq2lcdpldirq(M32700UT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* "L" level sense */
422 disable_m32700ut_lcdpld_irq(M32700UT_LCD_IRQ_USB_INT1);
423#endif
424 /*
425 * INT2# is used for BAT, USB, AUDIO
426 * We enable it here.
427 */
428 icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
429 enable_m32700ut_irq(M32R_IRQ_INT2);
430
431#if defined(CONFIG_VIDEO_M32R_AR)
432 /*
433 * INT3# is used for AR
434 */
435 irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED;
436 irq_desc[M32R_IRQ_INT3].chip = &m32700ut_irq_type;
437 irq_desc[M32R_IRQ_INT3].action = 0;
438 irq_desc[M32R_IRQ_INT3].depth = 1;
439 icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
440 disable_m32700ut_irq(M32R_IRQ_INT3);
441#endif /* CONFIG_VIDEO_M32R_AR */
442}
443
444#if defined(CONFIG_SMC91X)
445
446#define LAN_IOSTART 0x300
447#define LAN_IOEND 0x320
448static struct resource smc91x_resources[] = {
449 [0] = {
450 .start = (LAN_IOSTART),
451 .end = (LAN_IOEND),
452 .flags = IORESOURCE_MEM,
453 },
454 [1] = {
455 .start = M32700UT_LAN_IRQ_LAN,
456 .end = M32700UT_LAN_IRQ_LAN,
457 .flags = IORESOURCE_IRQ,
458 }
459};
460
461static struct platform_device smc91x_device = {
462 .name = "smc91x",
463 .id = 0,
464 .num_resources = ARRAY_SIZE(smc91x_resources),
465 .resource = smc91x_resources,
466};
467#endif
468
469#if defined(CONFIG_FB_S1D13XXX)
470
471#include <video/s1d13xxxfb.h>
472#include <asm/s1d13806.h>
473
474static struct s1d13xxxfb_pdata s1d13xxxfb_data = {
475 .initregs = s1d13xxxfb_initregs,
476 .initregssize = ARRAY_SIZE(s1d13xxxfb_initregs),
477 .platform_init_video = NULL,
478#ifdef CONFIG_PM
479 .platform_suspend_video = NULL,
480 .platform_resume_video = NULL,
481#endif
482};
483
484static struct resource s1d13xxxfb_resources[] = {
485 [0] = {
486 .start = 0x10600000UL,
487 .end = 0x1073FFFFUL,
488 .flags = IORESOURCE_MEM,
489 },
490 [1] = {
491 .start = 0x10400000UL,
492 .end = 0x104001FFUL,
493 .flags = IORESOURCE_MEM,
494 }
495};
496
497static struct platform_device s1d13xxxfb_device = {
498 .name = S1D_DEVICENAME,
499 .id = 0,
500 .dev = {
501 .platform_data = &s1d13xxxfb_data,
502 },
503 .num_resources = ARRAY_SIZE(s1d13xxxfb_resources),
504 .resource = s1d13xxxfb_resources,
505};
506#endif
507
508static int __init platform_init(void)
509{
510#if defined(CONFIG_SMC91X)
511 platform_device_register(&smc91x_device);
512#endif
513#if defined(CONFIG_FB_S1D13XXX)
514 platform_device_register(&s1d13xxxfb_device);
515#endif
516 return 0;
517}
518arch_initcall(platform_init);
diff --git a/arch/m32r/kernel/setup_mappi.c b/arch/m32r/kernel/setup_mappi.c
deleted file mode 100644
index fe73c9ec611f..000000000000
--- a/arch/m32r/kernel/setup_mappi.c
+++ /dev/null
@@ -1,201 +0,0 @@
1/*
2 * linux/arch/m32r/kernel/setup_mappi.c
3 *
4 * Setup routines for Renesas MAPPI Board
5 *
6 * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
7 * Hitoshi Yamamoto
8 */
9
10#include <linux/irq.h>
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14
15#include <asm/system.h>
16#include <asm/m32r.h>
17#include <asm/io.h>
18
19#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
20
21icu_data_t icu_data[NR_IRQS];
22
23static void disable_mappi_irq(unsigned int irq)
24{
25 unsigned long port, data;
26
27 port = irq2port(irq);
28 data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
29 outl(data, port);
30}
31
32static void enable_mappi_irq(unsigned int irq)
33{
34 unsigned long port, data;
35
36 port = irq2port(irq);
37 data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
38 outl(data, port);
39}
40
41static void mask_and_ack_mappi(unsigned int irq)
42{
43 disable_mappi_irq(irq);
44}
45
46static void end_mappi_irq(unsigned int irq)
47{
48 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
49 enable_mappi_irq(irq);
50}
51
52static unsigned int startup_mappi_irq(unsigned int irq)
53{
54 enable_mappi_irq(irq);
55 return (0);
56}
57
58static void shutdown_mappi_irq(unsigned int irq)
59{
60 unsigned long port;
61
62 port = irq2port(irq);
63 outl(M32R_ICUCR_ILEVEL7, port);
64}
65
66static struct hw_interrupt_type mappi_irq_type =
67{
68 .typename = "MAPPI-IRQ",
69 .startup = startup_mappi_irq,
70 .shutdown = shutdown_mappi_irq,
71 .enable = enable_mappi_irq,
72 .disable = disable_mappi_irq,
73 .ack = mask_and_ack_mappi,
74 .end = end_mappi_irq
75};
76
77void __init init_IRQ(void)
78{
79 static int once = 0;
80
81 if (once)
82 return;
83 else
84 once++;
85
86#ifdef CONFIG_NE2000
87 /* INT0 : LAN controller (RTL8019AS) */
88 irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
89 irq_desc[M32R_IRQ_INT0].chip = &mappi_irq_type;
90 irq_desc[M32R_IRQ_INT0].action = NULL;
91 irq_desc[M32R_IRQ_INT0].depth = 1;
92 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD11;
93 disable_mappi_irq(M32R_IRQ_INT0);
94#endif /* CONFIG_M32R_NE2000 */
95
96 /* MFT2 : system timer */
97 irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
98 irq_desc[M32R_IRQ_MFT2].chip = &mappi_irq_type;
99 irq_desc[M32R_IRQ_MFT2].action = NULL;
100 irq_desc[M32R_IRQ_MFT2].depth = 1;
101 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
102 disable_mappi_irq(M32R_IRQ_MFT2);
103
104#ifdef CONFIG_SERIAL_M32R_SIO
105 /* SIO0_R : uart receive data */
106 irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
107 irq_desc[M32R_IRQ_SIO0_R].chip = &mappi_irq_type;
108 irq_desc[M32R_IRQ_SIO0_R].action = NULL;
109 irq_desc[M32R_IRQ_SIO0_R].depth = 1;
110 icu_data[M32R_IRQ_SIO0_R].icucr = 0;
111 disable_mappi_irq(M32R_IRQ_SIO0_R);
112
113 /* SIO0_S : uart send data */
114 irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
115 irq_desc[M32R_IRQ_SIO0_S].chip = &mappi_irq_type;
116 irq_desc[M32R_IRQ_SIO0_S].action = NULL;
117 irq_desc[M32R_IRQ_SIO0_S].depth = 1;
118 icu_data[M32R_IRQ_SIO0_S].icucr = 0;
119 disable_mappi_irq(M32R_IRQ_SIO0_S);
120
121 /* SIO1_R : uart receive data */
122 irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
123 irq_desc[M32R_IRQ_SIO1_R].chip = &mappi_irq_type;
124 irq_desc[M32R_IRQ_SIO1_R].action = NULL;
125 irq_desc[M32R_IRQ_SIO1_R].depth = 1;
126 icu_data[M32R_IRQ_SIO1_R].icucr = 0;
127 disable_mappi_irq(M32R_IRQ_SIO1_R);
128
129 /* SIO1_S : uart send data */
130 irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
131 irq_desc[M32R_IRQ_SIO1_S].chip = &mappi_irq_type;
132 irq_desc[M32R_IRQ_SIO1_S].action = NULL;
133 irq_desc[M32R_IRQ_SIO1_S].depth = 1;
134 icu_data[M32R_IRQ_SIO1_S].icucr = 0;
135 disable_mappi_irq(M32R_IRQ_SIO1_S);
136#endif /* CONFIG_SERIAL_M32R_SIO */
137
138#if defined(CONFIG_M32R_PCC)
139 /* INT1 : pccard0 interrupt */
140 irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED;
141 irq_desc[M32R_IRQ_INT1].chip = &mappi_irq_type;
142 irq_desc[M32R_IRQ_INT1].action = NULL;
143 irq_desc[M32R_IRQ_INT1].depth = 1;
144 icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
145 disable_mappi_irq(M32R_IRQ_INT1);
146
147 /* INT2 : pccard1 interrupt */
148 irq_desc[M32R_IRQ_INT2].status = IRQ_DISABLED;
149 irq_desc[M32R_IRQ_INT2].chip = &mappi_irq_type;
150 irq_desc[M32R_IRQ_INT2].action = NULL;
151 irq_desc[M32R_IRQ_INT2].depth = 1;
152 icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
153 disable_mappi_irq(M32R_IRQ_INT2);
154#endif /* CONFIG_M32RPCC */
155}
156
157#if defined(CONFIG_FB_S1D13XXX)
158
159#include <video/s1d13xxxfb.h>
160#include <asm/s1d13806.h>
161
162static struct s1d13xxxfb_pdata s1d13xxxfb_data = {
163 .initregs = s1d13xxxfb_initregs,
164 .initregssize = ARRAY_SIZE(s1d13xxxfb_initregs),
165 .platform_init_video = NULL,
166#ifdef CONFIG_PM
167 .platform_suspend_video = NULL,
168 .platform_resume_video = NULL,
169#endif
170};
171
172static struct resource s1d13xxxfb_resources[] = {
173 [0] = {
174 .start = 0x10200000UL,
175 .end = 0x1033FFFFUL,
176 .flags = IORESOURCE_MEM,
177 },
178 [1] = {
179 .start = 0x10000000UL,
180 .end = 0x100001FFUL,
181 .flags = IORESOURCE_MEM,
182 }
183};
184
185static struct platform_device s1d13xxxfb_device = {
186 .name = S1D_DEVICENAME,
187 .id = 0,
188 .dev = {
189 .platform_data = &s1d13xxxfb_data,
190 },
191 .num_resources = ARRAY_SIZE(s1d13xxxfb_resources),
192 .resource = s1d13xxxfb_resources,
193};
194
195static int __init platform_init(void)
196{
197 platform_device_register(&s1d13xxxfb_device);
198 return 0;
199}
200arch_initcall(platform_init);
201#endif
diff --git a/arch/m32r/kernel/setup_mappi2.c b/arch/m32r/kernel/setup_mappi2.c
deleted file mode 100644
index 55abb2102750..000000000000
--- a/arch/m32r/kernel/setup_mappi2.c
+++ /dev/null
@@ -1,201 +0,0 @@
1/*
2 * linux/arch/m32r/kernel/setup_mappi2.c
3 *
4 * Setup routines for Renesas MAPPI-II(M3A-ZA36) Board
5 *
6 * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
7 * Hitoshi Yamamoto, Mamoru Sakugawa
8 */
9
10#include <linux/irq.h>
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14
15#include <asm/system.h>
16#include <asm/m32r.h>
17#include <asm/io.h>
18
19#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
20
21icu_data_t icu_data[NR_IRQS];
22
23static void disable_mappi2_irq(unsigned int irq)
24{
25 unsigned long port, data;
26
27 if ((irq == 0) ||(irq >= NR_IRQS)) {
28 printk("bad irq 0x%08x\n", irq);
29 return;
30 }
31 port = irq2port(irq);
32 data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
33 outl(data, port);
34}
35
36static void enable_mappi2_irq(unsigned int irq)
37{
38 unsigned long port, data;
39
40 if ((irq == 0) ||(irq >= NR_IRQS)) {
41 printk("bad irq 0x%08x\n", irq);
42 return;
43 }
44 port = irq2port(irq);
45 data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
46 outl(data, port);
47}
48
49static void mask_and_ack_mappi2(unsigned int irq)
50{
51 disable_mappi2_irq(irq);
52}
53
54static void end_mappi2_irq(unsigned int irq)
55{
56 enable_mappi2_irq(irq);
57}
58
59static unsigned int startup_mappi2_irq(unsigned int irq)
60{
61 enable_mappi2_irq(irq);
62 return (0);
63}
64
65static void shutdown_mappi2_irq(unsigned int irq)
66{
67 unsigned long port;
68
69 port = irq2port(irq);
70 outl(M32R_ICUCR_ILEVEL7, port);
71}
72
73static struct hw_interrupt_type mappi2_irq_type =
74{
75 .typename = "MAPPI2-IRQ",
76 .startup = startup_mappi2_irq,
77 .shutdown = shutdown_mappi2_irq,
78 .enable = enable_mappi2_irq,
79 .disable = disable_mappi2_irq,
80 .ack = mask_and_ack_mappi2,
81 .end = end_mappi2_irq
82};
83
84void __init init_IRQ(void)
85{
86#if defined(CONFIG_SMC91X)
87 /* INT0 : LAN controller (SMC91111) */
88 irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
89 irq_desc[M32R_IRQ_INT0].chip = &mappi2_irq_type;
90 irq_desc[M32R_IRQ_INT0].action = 0;
91 irq_desc[M32R_IRQ_INT0].depth = 1;
92 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
93 disable_mappi2_irq(M32R_IRQ_INT0);
94#endif /* CONFIG_SMC91X */
95
96 /* MFT2 : system timer */
97 irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
98 irq_desc[M32R_IRQ_MFT2].chip = &mappi2_irq_type;
99 irq_desc[M32R_IRQ_MFT2].action = 0;
100 irq_desc[M32R_IRQ_MFT2].depth = 1;
101 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
102 disable_mappi2_irq(M32R_IRQ_MFT2);
103
104#ifdef CONFIG_SERIAL_M32R_SIO
105 /* SIO0_R : uart receive data */
106 irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
107 irq_desc[M32R_IRQ_SIO0_R].chip = &mappi2_irq_type;
108 irq_desc[M32R_IRQ_SIO0_R].action = 0;
109 irq_desc[M32R_IRQ_SIO0_R].depth = 1;
110 icu_data[M32R_IRQ_SIO0_R].icucr = 0;
111 disable_mappi2_irq(M32R_IRQ_SIO0_R);
112
113 /* SIO0_S : uart send data */
114 irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
115 irq_desc[M32R_IRQ_SIO0_S].chip = &mappi2_irq_type;
116 irq_desc[M32R_IRQ_SIO0_S].action = 0;
117 irq_desc[M32R_IRQ_SIO0_S].depth = 1;
118 icu_data[M32R_IRQ_SIO0_S].icucr = 0;
119 disable_mappi2_irq(M32R_IRQ_SIO0_S);
120 /* SIO1_R : uart receive data */
121 irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
122 irq_desc[M32R_IRQ_SIO1_R].chip = &mappi2_irq_type;
123 irq_desc[M32R_IRQ_SIO1_R].action = 0;
124 irq_desc[M32R_IRQ_SIO1_R].depth = 1;
125 icu_data[M32R_IRQ_SIO1_R].icucr = 0;
126 disable_mappi2_irq(M32R_IRQ_SIO1_R);
127
128 /* SIO1_S : uart send data */
129 irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
130 irq_desc[M32R_IRQ_SIO1_S].chip = &mappi2_irq_type;
131 irq_desc[M32R_IRQ_SIO1_S].action = 0;
132 irq_desc[M32R_IRQ_SIO1_S].depth = 1;
133 icu_data[M32R_IRQ_SIO1_S].icucr = 0;
134 disable_mappi2_irq(M32R_IRQ_SIO1_S);
135#endif /* CONFIG_M32R_USE_DBG_CONSOLE */
136
137#if defined(CONFIG_USB)
138 /* INT1 : USB Host controller interrupt */
139 irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED;
140 irq_desc[M32R_IRQ_INT1].chip = &mappi2_irq_type;
141 irq_desc[M32R_IRQ_INT1].action = 0;
142 irq_desc[M32R_IRQ_INT1].depth = 1;
143 icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
144 disable_mappi2_irq(M32R_IRQ_INT1);
145#endif /* CONFIG_USB */
146
147 /* ICUCR40: CFC IREQ */
148 irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
149 irq_desc[PLD_IRQ_CFIREQ].chip = &mappi2_irq_type;
150 irq_desc[PLD_IRQ_CFIREQ].action = 0;
151 irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */
152 icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
153 disable_mappi2_irq(PLD_IRQ_CFIREQ);
154
155#if defined(CONFIG_M32R_CFC)
156 /* ICUCR41: CFC Insert */
157 irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
158 irq_desc[PLD_IRQ_CFC_INSERT].chip = &mappi2_irq_type;
159 irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
160 irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
161 icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
162 disable_mappi2_irq(PLD_IRQ_CFC_INSERT);
163
164 /* ICUCR42: CFC Eject */
165 irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED;
166 irq_desc[PLD_IRQ_CFC_EJECT].chip = &mappi2_irq_type;
167 irq_desc[PLD_IRQ_CFC_EJECT].action = 0;
168 irq_desc[PLD_IRQ_CFC_EJECT].depth = 1; /* disable nested irq */
169 icu_data[PLD_IRQ_CFC_EJECT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
170 disable_mappi2_irq(PLD_IRQ_CFC_EJECT);
171#endif /* CONFIG_MAPPI2_CFC */
172}
173
174#define LAN_IOSTART 0x300
175#define LAN_IOEND 0x320
176static struct resource smc91x_resources[] = {
177 [0] = {
178 .start = (LAN_IOSTART),
179 .end = (LAN_IOEND),
180 .flags = IORESOURCE_MEM,
181 },
182 [1] = {
183 .start = M32R_IRQ_INT0,
184 .end = M32R_IRQ_INT0,
185 .flags = IORESOURCE_IRQ,
186 }
187};
188
189static struct platform_device smc91x_device = {
190 .name = "smc91x",
191 .id = 0,
192 .num_resources = ARRAY_SIZE(smc91x_resources),
193 .resource = smc91x_resources,
194};
195
196static int __init platform_init(void)
197{
198 platform_device_register(&smc91x_device);
199 return 0;
200}
201arch_initcall(platform_init);
diff --git a/arch/m32r/kernel/setup_mappi3.c b/arch/m32r/kernel/setup_mappi3.c
deleted file mode 100644
index 93dc010c7fc3..000000000000
--- a/arch/m32r/kernel/setup_mappi3.c
+++ /dev/null
@@ -1,251 +0,0 @@
1/*
2 * linux/arch/m32r/kernel/setup_mappi3.c
3 *
4 * Setup routines for Renesas MAPPI-III(M3A-2170) Board
5 *
6 * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
7 * Hitoshi Yamamoto, Mamoru Sakugawa
8 */
9
10#include <linux/irq.h>
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14
15#include <asm/system.h>
16#include <asm/m32r.h>
17#include <asm/io.h>
18
19#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
20
21icu_data_t icu_data[NR_IRQS];
22
23static void disable_mappi3_irq(unsigned int irq)
24{
25 unsigned long port, data;
26
27 if ((irq == 0) ||(irq >= NR_IRQS)) {
28 printk("bad irq 0x%08x\n", irq);
29 return;
30 }
31 port = irq2port(irq);
32 data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
33 outl(data, port);
34}
35
36static void enable_mappi3_irq(unsigned int irq)
37{
38 unsigned long port, data;
39
40 if ((irq == 0) ||(irq >= NR_IRQS)) {
41 printk("bad irq 0x%08x\n", irq);
42 return;
43 }
44 port = irq2port(irq);
45 data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
46 outl(data, port);
47}
48
49static void mask_and_ack_mappi3(unsigned int irq)
50{
51 disable_mappi3_irq(irq);
52}
53
54static void end_mappi3_irq(unsigned int irq)
55{
56 enable_mappi3_irq(irq);
57}
58
59static unsigned int startup_mappi3_irq(unsigned int irq)
60{
61 enable_mappi3_irq(irq);
62 return (0);
63}
64
65static void shutdown_mappi3_irq(unsigned int irq)
66{
67 unsigned long port;
68
69 port = irq2port(irq);
70 outl(M32R_ICUCR_ILEVEL7, port);
71}
72
73static struct hw_interrupt_type mappi3_irq_type =
74{
75 .typename = "MAPPI3-IRQ",
76 .startup = startup_mappi3_irq,
77 .shutdown = shutdown_mappi3_irq,
78 .enable = enable_mappi3_irq,
79 .disable = disable_mappi3_irq,
80 .ack = mask_and_ack_mappi3,
81 .end = end_mappi3_irq
82};
83
84void __init init_IRQ(void)
85{
86#if defined(CONFIG_SMC91X)
87 /* INT0 : LAN controller (SMC91111) */
88 irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
89 irq_desc[M32R_IRQ_INT0].chip = &mappi3_irq_type;
90 irq_desc[M32R_IRQ_INT0].action = 0;
91 irq_desc[M32R_IRQ_INT0].depth = 1;
92 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
93 disable_mappi3_irq(M32R_IRQ_INT0);
94#endif /* CONFIG_SMC91X */
95
96 /* MFT2 : system timer */
97 irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
98 irq_desc[M32R_IRQ_MFT2].chip = &mappi3_irq_type;
99 irq_desc[M32R_IRQ_MFT2].action = 0;
100 irq_desc[M32R_IRQ_MFT2].depth = 1;
101 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
102 disable_mappi3_irq(M32R_IRQ_MFT2);
103
104#ifdef CONFIG_SERIAL_M32R_SIO
105 /* SIO0_R : uart receive data */
106 irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
107 irq_desc[M32R_IRQ_SIO0_R].chip = &mappi3_irq_type;
108 irq_desc[M32R_IRQ_SIO0_R].action = 0;
109 irq_desc[M32R_IRQ_SIO0_R].depth = 1;
110 icu_data[M32R_IRQ_SIO0_R].icucr = 0;
111 disable_mappi3_irq(M32R_IRQ_SIO0_R);
112
113 /* SIO0_S : uart send data */
114 irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
115 irq_desc[M32R_IRQ_SIO0_S].chip = &mappi3_irq_type;
116 irq_desc[M32R_IRQ_SIO0_S].action = 0;
117 irq_desc[M32R_IRQ_SIO0_S].depth = 1;
118 icu_data[M32R_IRQ_SIO0_S].icucr = 0;
119 disable_mappi3_irq(M32R_IRQ_SIO0_S);
120 /* SIO1_R : uart receive data */
121 irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
122 irq_desc[M32R_IRQ_SIO1_R].chip = &mappi3_irq_type;
123 irq_desc[M32R_IRQ_SIO1_R].action = 0;
124 irq_desc[M32R_IRQ_SIO1_R].depth = 1;
125 icu_data[M32R_IRQ_SIO1_R].icucr = 0;
126 disable_mappi3_irq(M32R_IRQ_SIO1_R);
127
128 /* SIO1_S : uart send data */
129 irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
130 irq_desc[M32R_IRQ_SIO1_S].chip = &mappi3_irq_type;
131 irq_desc[M32R_IRQ_SIO1_S].action = 0;
132 irq_desc[M32R_IRQ_SIO1_S].depth = 1;
133 icu_data[M32R_IRQ_SIO1_S].icucr = 0;
134 disable_mappi3_irq(M32R_IRQ_SIO1_S);
135#endif /* CONFIG_M32R_USE_DBG_CONSOLE */
136
137#if defined(CONFIG_USB)
138 /* INT1 : USB Host controller interrupt */
139 irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED;
140 irq_desc[M32R_IRQ_INT1].chip = &mappi3_irq_type;
141 irq_desc[M32R_IRQ_INT1].action = 0;
142 irq_desc[M32R_IRQ_INT1].depth = 1;
143 icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
144 disable_mappi3_irq(M32R_IRQ_INT1);
145#endif /* CONFIG_USB */
146
147 /* CFC IREQ */
148 irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
149 irq_desc[PLD_IRQ_CFIREQ].chip = &mappi3_irq_type;
150 irq_desc[PLD_IRQ_CFIREQ].action = 0;
151 irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */
152 icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
153 disable_mappi3_irq(PLD_IRQ_CFIREQ);
154
155#if defined(CONFIG_M32R_CFC)
156 /* ICUCR41: CFC Insert & eject */
157 irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
158 irq_desc[PLD_IRQ_CFC_INSERT].chip = &mappi3_irq_type;
159 irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
160 irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
161 icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
162 disable_mappi3_irq(PLD_IRQ_CFC_INSERT);
163
164#endif /* CONFIG_M32R_CFC */
165
166 /* IDE IREQ */
167 irq_desc[PLD_IRQ_IDEIREQ].status = IRQ_DISABLED;
168 irq_desc[PLD_IRQ_IDEIREQ].chip = &mappi3_irq_type;
169 irq_desc[PLD_IRQ_IDEIREQ].action = 0;
170 irq_desc[PLD_IRQ_IDEIREQ].depth = 1; /* disable nested irq */
171 icu_data[PLD_IRQ_IDEIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
172 disable_mappi3_irq(PLD_IRQ_IDEIREQ);
173
174}
175
176#if defined(CONFIG_SMC91X)
177
178#define LAN_IOSTART 0x300
179#define LAN_IOEND 0x320
180static struct resource smc91x_resources[] = {
181 [0] = {
182 .start = (LAN_IOSTART),
183 .end = (LAN_IOEND),
184 .flags = IORESOURCE_MEM,
185 },
186 [1] = {
187 .start = M32R_IRQ_INT0,
188 .end = M32R_IRQ_INT0,
189 .flags = IORESOURCE_IRQ,
190 }
191};
192
193static struct platform_device smc91x_device = {
194 .name = "smc91x",
195 .id = 0,
196 .num_resources = ARRAY_SIZE(smc91x_resources),
197 .resource = smc91x_resources,
198};
199
200#endif
201
202#if defined(CONFIG_FB_S1D13XXX)
203
204#include <video/s1d13xxxfb.h>
205#include <asm/s1d13806.h>
206
207static struct s1d13xxxfb_pdata s1d13xxxfb_data = {
208 .initregs = s1d13xxxfb_initregs,
209 .initregssize = ARRAY_SIZE(s1d13xxxfb_initregs),
210 .platform_init_video = NULL,
211#ifdef CONFIG_PM
212 .platform_suspend_video = NULL,
213 .platform_resume_video = NULL,
214#endif
215};
216
217static struct resource s1d13xxxfb_resources[] = {
218 [0] = {
219 .start = 0x1d600000UL,
220 .end = 0x1d73FFFFUL,
221 .flags = IORESOURCE_MEM,
222 },
223 [1] = {
224 .start = 0x1d400000UL,
225 .end = 0x1d4001FFUL,
226 .flags = IORESOURCE_MEM,
227 }
228};
229
230static struct platform_device s1d13xxxfb_device = {
231 .name = S1D_DEVICENAME,
232 .id = 0,
233 .dev = {
234 .platform_data = &s1d13xxxfb_data,
235 },
236 .num_resources = ARRAY_SIZE(s1d13xxxfb_resources),
237 .resource = s1d13xxxfb_resources,
238};
239#endif
240
241static int __init platform_init(void)
242{
243#if defined(CONFIG_SMC91X)
244 platform_device_register(&smc91x_device);
245#endif
246#if defined(CONFIG_FB_S1D13XXX)
247 platform_device_register(&s1d13xxxfb_device);
248#endif
249 return 0;
250}
251arch_initcall(platform_init);
diff --git a/arch/m32r/kernel/setup_oaks32r.c b/arch/m32r/kernel/setup_oaks32r.c
deleted file mode 100644
index cd62598e3cea..000000000000
--- a/arch/m32r/kernel/setup_oaks32r.c
+++ /dev/null
@@ -1,135 +0,0 @@
1/*
2 * linux/arch/m32r/kernel/setup_oaks32r.c
3 *
4 * Setup routines for OAKS32R Board
5 *
6 * Copyright (c) 2002-2005 Hiroyuki Kondo, Hirokazu Takata,
7 * Hitoshi Yamamoto, Mamoru Sakugawa
8 */
9
10#include <linux/irq.h>
11#include <linux/kernel.h>
12#include <linux/init.h>
13
14#include <asm/system.h>
15#include <asm/m32r.h>
16#include <asm/io.h>
17
18#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
19
20icu_data_t icu_data[NR_IRQS];
21
22static void disable_oaks32r_irq(unsigned int irq)
23{
24 unsigned long port, data;
25
26 port = irq2port(irq);
27 data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
28 outl(data, port);
29}
30
31static void enable_oaks32r_irq(unsigned int irq)
32{
33 unsigned long port, data;
34
35 port = irq2port(irq);
36 data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
37 outl(data, port);
38}
39
40static void mask_and_ack_mappi(unsigned int irq)
41{
42 disable_oaks32r_irq(irq);
43}
44
45static void end_oaks32r_irq(unsigned int irq)
46{
47 enable_oaks32r_irq(irq);
48}
49
50static unsigned int startup_oaks32r_irq(unsigned int irq)
51{
52 enable_oaks32r_irq(irq);
53 return (0);
54}
55
56static void shutdown_oaks32r_irq(unsigned int irq)
57{
58 unsigned long port;
59
60 port = irq2port(irq);
61 outl(M32R_ICUCR_ILEVEL7, port);
62}
63
64static struct hw_interrupt_type oaks32r_irq_type =
65{
66 .typename = "OAKS32R-IRQ",
67 .startup = startup_oaks32r_irq,
68 .shutdown = shutdown_oaks32r_irq,
69 .enable = enable_oaks32r_irq,
70 .disable = disable_oaks32r_irq,
71 .ack = mask_and_ack_mappi,
72 .end = end_oaks32r_irq
73};
74
75void __init init_IRQ(void)
76{
77 static int once = 0;
78
79 if (once)
80 return;
81 else
82 once++;
83
84#ifdef CONFIG_NE2000
85 /* INT3 : LAN controller (RTL8019AS) */
86 irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED;
87 irq_desc[M32R_IRQ_INT3].chip = &oaks32r_irq_type;
88 irq_desc[M32R_IRQ_INT3].action = 0;
89 irq_desc[M32R_IRQ_INT3].depth = 1;
90 icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
91 disable_oaks32r_irq(M32R_IRQ_INT3);
92#endif /* CONFIG_M32R_NE2000 */
93
94 /* MFT2 : system timer */
95 irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
96 irq_desc[M32R_IRQ_MFT2].chip = &oaks32r_irq_type;
97 irq_desc[M32R_IRQ_MFT2].action = 0;
98 irq_desc[M32R_IRQ_MFT2].depth = 1;
99 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
100 disable_oaks32r_irq(M32R_IRQ_MFT2);
101
102#ifdef CONFIG_SERIAL_M32R_SIO
103 /* SIO0_R : uart receive data */
104 irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
105 irq_desc[M32R_IRQ_SIO0_R].chip = &oaks32r_irq_type;
106 irq_desc[M32R_IRQ_SIO0_R].action = 0;
107 irq_desc[M32R_IRQ_SIO0_R].depth = 1;
108 icu_data[M32R_IRQ_SIO0_R].icucr = 0;
109 disable_oaks32r_irq(M32R_IRQ_SIO0_R);
110
111 /* SIO0_S : uart send data */
112 irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
113 irq_desc[M32R_IRQ_SIO0_S].chip = &oaks32r_irq_type;
114 irq_desc[M32R_IRQ_SIO0_S].action = 0;
115 irq_desc[M32R_IRQ_SIO0_S].depth = 1;
116 icu_data[M32R_IRQ_SIO0_S].icucr = 0;
117 disable_oaks32r_irq(M32R_IRQ_SIO0_S);
118
119 /* SIO1_R : uart receive data */
120 irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
121 irq_desc[M32R_IRQ_SIO1_R].chip = &oaks32r_irq_type;
122 irq_desc[M32R_IRQ_SIO1_R].action = 0;
123 irq_desc[M32R_IRQ_SIO1_R].depth = 1;
124 icu_data[M32R_IRQ_SIO1_R].icucr = 0;
125 disable_oaks32r_irq(M32R_IRQ_SIO1_R);
126
127 /* SIO1_S : uart send data */
128 irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
129 irq_desc[M32R_IRQ_SIO1_S].chip = &oaks32r_irq_type;
130 irq_desc[M32R_IRQ_SIO1_S].action = 0;
131 irq_desc[M32R_IRQ_SIO1_S].depth = 1;
132 icu_data[M32R_IRQ_SIO1_S].icucr = 0;
133 disable_oaks32r_irq(M32R_IRQ_SIO1_S);
134#endif /* CONFIG_SERIAL_M32R_SIO */
135}
diff --git a/arch/m32r/kernel/setup_opsput.c b/arch/m32r/kernel/setup_opsput.c
deleted file mode 100644
index 62d6b71de45f..000000000000
--- a/arch/m32r/kernel/setup_opsput.c
+++ /dev/null
@@ -1,519 +0,0 @@
1/*
2 * linux/arch/m32r/kernel/setup_opsput.c
3 *
4 * Setup routines for Renesas OPSPUT Board
5 *
6 * Copyright (c) 2002-2005
7 * Hiroyuki Kondo, Hirokazu Takata,
8 * Hitoshi Yamamoto, Takeo Takahashi, Mamoru Sakugawa
9 *
10 * This file is subject to the terms and conditions of the GNU General
11 * Public License. See the file "COPYING" in the main directory of this
12 * archive for more details.
13 */
14
15#include <linux/irq.h>
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/platform_device.h>
19
20#include <asm/system.h>
21#include <asm/m32r.h>
22#include <asm/io.h>
23
24/*
25 * OPSP Interrupt Control Unit (Level 1)
26 */
27#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
28
29icu_data_t icu_data[OPSPUT_NUM_CPU_IRQ];
30
31static void disable_opsput_irq(unsigned int irq)
32{
33 unsigned long port, data;
34
35 port = irq2port(irq);
36 data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
37 outl(data, port);
38}
39
40static void enable_opsput_irq(unsigned int irq)
41{
42 unsigned long port, data;
43
44 port = irq2port(irq);
45 data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
46 outl(data, port);
47}
48
49static void mask_and_ack_opsput(unsigned int irq)
50{
51 disable_opsput_irq(irq);
52}
53
54static void end_opsput_irq(unsigned int irq)
55{
56 enable_opsput_irq(irq);
57}
58
59static unsigned int startup_opsput_irq(unsigned int irq)
60{
61 enable_opsput_irq(irq);
62 return (0);
63}
64
65static void shutdown_opsput_irq(unsigned int irq)
66{
67 unsigned long port;
68
69 port = irq2port(irq);
70 outl(M32R_ICUCR_ILEVEL7, port);
71}
72
73static struct hw_interrupt_type opsput_irq_type =
74{
75 .typename = "OPSPUT-IRQ",
76 .startup = startup_opsput_irq,
77 .shutdown = shutdown_opsput_irq,
78 .enable = enable_opsput_irq,
79 .disable = disable_opsput_irq,
80 .ack = mask_and_ack_opsput,
81 .end = end_opsput_irq
82};
83
84/*
85 * Interrupt Control Unit of PLD on OPSPUT (Level 2)
86 */
87#define irq2pldirq(x) ((x) - OPSPUT_PLD_IRQ_BASE)
88#define pldirq2port(x) (unsigned long)((int)PLD_ICUCR1 + \
89 (((x) - 1) * sizeof(unsigned short)))
90
91typedef struct {
92 unsigned short icucr; /* ICU Control Register */
93} pld_icu_data_t;
94
95static pld_icu_data_t pld_icu_data[OPSPUT_NUM_PLD_IRQ];
96
97static void disable_opsput_pld_irq(unsigned int irq)
98{
99 unsigned long port, data;
100 unsigned int pldirq;
101
102 pldirq = irq2pldirq(irq);
103// disable_opsput_irq(M32R_IRQ_INT1);
104 port = pldirq2port(pldirq);
105 data = pld_icu_data[pldirq].icucr|PLD_ICUCR_ILEVEL7;
106 outw(data, port);
107}
108
109static void enable_opsput_pld_irq(unsigned int irq)
110{
111 unsigned long port, data;
112 unsigned int pldirq;
113
114 pldirq = irq2pldirq(irq);
115// enable_opsput_irq(M32R_IRQ_INT1);
116 port = pldirq2port(pldirq);
117 data = pld_icu_data[pldirq].icucr|PLD_ICUCR_IEN|PLD_ICUCR_ILEVEL6;
118 outw(data, port);
119}
120
121static void mask_and_ack_opsput_pld(unsigned int irq)
122{
123 disable_opsput_pld_irq(irq);
124// mask_and_ack_opsput(M32R_IRQ_INT1);
125}
126
127static void end_opsput_pld_irq(unsigned int irq)
128{
129 enable_opsput_pld_irq(irq);
130 end_opsput_irq(M32R_IRQ_INT1);
131}
132
133static unsigned int startup_opsput_pld_irq(unsigned int irq)
134{
135 enable_opsput_pld_irq(irq);
136 return (0);
137}
138
139static void shutdown_opsput_pld_irq(unsigned int irq)
140{
141 unsigned long port;
142 unsigned int pldirq;
143
144 pldirq = irq2pldirq(irq);
145// shutdown_opsput_irq(M32R_IRQ_INT1);
146 port = pldirq2port(pldirq);
147 outw(PLD_ICUCR_ILEVEL7, port);
148}
149
150static struct hw_interrupt_type opsput_pld_irq_type =
151{
152 .typename = "OPSPUT-PLD-IRQ",
153 .startup = startup_opsput_pld_irq,
154 .shutdown = shutdown_opsput_pld_irq,
155 .enable = enable_opsput_pld_irq,
156 .disable = disable_opsput_pld_irq,
157 .ack = mask_and_ack_opsput_pld,
158 .end = end_opsput_pld_irq
159};
160
161/*
162 * Interrupt Control Unit of PLD on OPSPUT-LAN (Level 2)
163 */
164#define irq2lanpldirq(x) ((x) - OPSPUT_LAN_PLD_IRQ_BASE)
165#define lanpldirq2port(x) (unsigned long)((int)OPSPUT_LAN_ICUCR1 + \
166 (((x) - 1) * sizeof(unsigned short)))
167
168static pld_icu_data_t lanpld_icu_data[OPSPUT_NUM_LAN_PLD_IRQ];
169
170static void disable_opsput_lanpld_irq(unsigned int irq)
171{
172 unsigned long port, data;
173 unsigned int pldirq;
174
175 pldirq = irq2lanpldirq(irq);
176 port = lanpldirq2port(pldirq);
177 data = lanpld_icu_data[pldirq].icucr|PLD_ICUCR_ILEVEL7;
178 outw(data, port);
179}
180
181static void enable_opsput_lanpld_irq(unsigned int irq)
182{
183 unsigned long port, data;
184 unsigned int pldirq;
185
186 pldirq = irq2lanpldirq(irq);
187 port = lanpldirq2port(pldirq);
188 data = lanpld_icu_data[pldirq].icucr|PLD_ICUCR_IEN|PLD_ICUCR_ILEVEL6;
189 outw(data, port);
190}
191
192static void mask_and_ack_opsput_lanpld(unsigned int irq)
193{
194 disable_opsput_lanpld_irq(irq);
195}
196
197static void end_opsput_lanpld_irq(unsigned int irq)
198{
199 enable_opsput_lanpld_irq(irq);
200 end_opsput_irq(M32R_IRQ_INT0);
201}
202
203static unsigned int startup_opsput_lanpld_irq(unsigned int irq)
204{
205 enable_opsput_lanpld_irq(irq);
206 return (0);
207}
208
209static void shutdown_opsput_lanpld_irq(unsigned int irq)
210{
211 unsigned long port;
212 unsigned int pldirq;
213
214 pldirq = irq2lanpldirq(irq);
215 port = lanpldirq2port(pldirq);
216 outw(PLD_ICUCR_ILEVEL7, port);
217}
218
219static struct hw_interrupt_type opsput_lanpld_irq_type =
220{
221 .typename = "OPSPUT-PLD-LAN-IRQ",
222 .startup = startup_opsput_lanpld_irq,
223 .shutdown = shutdown_opsput_lanpld_irq,
224 .enable = enable_opsput_lanpld_irq,
225 .disable = disable_opsput_lanpld_irq,
226 .ack = mask_and_ack_opsput_lanpld,
227 .end = end_opsput_lanpld_irq
228};
229
230/*
231 * Interrupt Control Unit of PLD on OPSPUT-LCD (Level 2)
232 */
233#define irq2lcdpldirq(x) ((x) - OPSPUT_LCD_PLD_IRQ_BASE)
234#define lcdpldirq2port(x) (unsigned long)((int)OPSPUT_LCD_ICUCR1 + \
235 (((x) - 1) * sizeof(unsigned short)))
236
237static pld_icu_data_t lcdpld_icu_data[OPSPUT_NUM_LCD_PLD_IRQ];
238
239static void disable_opsput_lcdpld_irq(unsigned int irq)
240{
241 unsigned long port, data;
242 unsigned int pldirq;
243
244 pldirq = irq2lcdpldirq(irq);
245 port = lcdpldirq2port(pldirq);
246 data = lcdpld_icu_data[pldirq].icucr|PLD_ICUCR_ILEVEL7;
247 outw(data, port);
248}
249
250static void enable_opsput_lcdpld_irq(unsigned int irq)
251{
252 unsigned long port, data;
253 unsigned int pldirq;
254
255 pldirq = irq2lcdpldirq(irq);
256 port = lcdpldirq2port(pldirq);
257 data = lcdpld_icu_data[pldirq].icucr|PLD_ICUCR_IEN|PLD_ICUCR_ILEVEL6;
258 outw(data, port);
259}
260
261static void mask_and_ack_opsput_lcdpld(unsigned int irq)
262{
263 disable_opsput_lcdpld_irq(irq);
264}
265
266static void end_opsput_lcdpld_irq(unsigned int irq)
267{
268 enable_opsput_lcdpld_irq(irq);
269 end_opsput_irq(M32R_IRQ_INT2);
270}
271
272static unsigned int startup_opsput_lcdpld_irq(unsigned int irq)
273{
274 enable_opsput_lcdpld_irq(irq);
275 return (0);
276}
277
278static void shutdown_opsput_lcdpld_irq(unsigned int irq)
279{
280 unsigned long port;
281 unsigned int pldirq;
282
283 pldirq = irq2lcdpldirq(irq);
284 port = lcdpldirq2port(pldirq);
285 outw(PLD_ICUCR_ILEVEL7, port);
286}
287
288static struct hw_interrupt_type opsput_lcdpld_irq_type =
289{
290 "OPSPUT-PLD-LCD-IRQ",
291 startup_opsput_lcdpld_irq,
292 shutdown_opsput_lcdpld_irq,
293 enable_opsput_lcdpld_irq,
294 disable_opsput_lcdpld_irq,
295 mask_and_ack_opsput_lcdpld,
296 end_opsput_lcdpld_irq
297};
298
299void __init init_IRQ(void)
300{
301#if defined(CONFIG_SMC91X)
302 /* INT#0: LAN controller on OPSPUT-LAN (SMC91C111)*/
303 irq_desc[OPSPUT_LAN_IRQ_LAN].status = IRQ_DISABLED;
304 irq_desc[OPSPUT_LAN_IRQ_LAN].chip = &opsput_lanpld_irq_type;
305 irq_desc[OPSPUT_LAN_IRQ_LAN].action = 0;
306 irq_desc[OPSPUT_LAN_IRQ_LAN].depth = 1; /* disable nested irq */
307 lanpld_icu_data[irq2lanpldirq(OPSPUT_LAN_IRQ_LAN)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* "H" edge sense */
308 disable_opsput_lanpld_irq(OPSPUT_LAN_IRQ_LAN);
309#endif /* CONFIG_SMC91X */
310
311 /* MFT2 : system timer */
312 irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
313 irq_desc[M32R_IRQ_MFT2].chip = &opsput_irq_type;
314 irq_desc[M32R_IRQ_MFT2].action = 0;
315 irq_desc[M32R_IRQ_MFT2].depth = 1;
316 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
317 disable_opsput_irq(M32R_IRQ_MFT2);
318
319 /* SIO0 : receive */
320 irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
321 irq_desc[M32R_IRQ_SIO0_R].chip = &opsput_irq_type;
322 irq_desc[M32R_IRQ_SIO0_R].action = 0;
323 irq_desc[M32R_IRQ_SIO0_R].depth = 1;
324 icu_data[M32R_IRQ_SIO0_R].icucr = 0;
325 disable_opsput_irq(M32R_IRQ_SIO0_R);
326
327 /* SIO0 : send */
328 irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
329 irq_desc[M32R_IRQ_SIO0_S].chip = &opsput_irq_type;
330 irq_desc[M32R_IRQ_SIO0_S].action = 0;
331 irq_desc[M32R_IRQ_SIO0_S].depth = 1;
332 icu_data[M32R_IRQ_SIO0_S].icucr = 0;
333 disable_opsput_irq(M32R_IRQ_SIO0_S);
334
335 /* SIO1 : receive */
336 irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
337 irq_desc[M32R_IRQ_SIO1_R].chip = &opsput_irq_type;
338 irq_desc[M32R_IRQ_SIO1_R].action = 0;
339 irq_desc[M32R_IRQ_SIO1_R].depth = 1;
340 icu_data[M32R_IRQ_SIO1_R].icucr = 0;
341 disable_opsput_irq(M32R_IRQ_SIO1_R);
342
343 /* SIO1 : send */
344 irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
345 irq_desc[M32R_IRQ_SIO1_S].chip = &opsput_irq_type;
346 irq_desc[M32R_IRQ_SIO1_S].action = 0;
347 irq_desc[M32R_IRQ_SIO1_S].depth = 1;
348 icu_data[M32R_IRQ_SIO1_S].icucr = 0;
349 disable_opsput_irq(M32R_IRQ_SIO1_S);
350
351 /* DMA1 : */
352 irq_desc[M32R_IRQ_DMA1].status = IRQ_DISABLED;
353 irq_desc[M32R_IRQ_DMA1].chip = &opsput_irq_type;
354 irq_desc[M32R_IRQ_DMA1].action = 0;
355 irq_desc[M32R_IRQ_DMA1].depth = 1;
356 icu_data[M32R_IRQ_DMA1].icucr = 0;
357 disable_opsput_irq(M32R_IRQ_DMA1);
358
359#ifdef CONFIG_SERIAL_M32R_PLDSIO
360 /* INT#1: SIO0 Receive on PLD */
361 irq_desc[PLD_IRQ_SIO0_RCV].status = IRQ_DISABLED;
362 irq_desc[PLD_IRQ_SIO0_RCV].chip = &opsput_pld_irq_type;
363 irq_desc[PLD_IRQ_SIO0_RCV].action = 0;
364 irq_desc[PLD_IRQ_SIO0_RCV].depth = 1; /* disable nested irq */
365 pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_RCV)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
366 disable_opsput_pld_irq(PLD_IRQ_SIO0_RCV);
367
368 /* INT#1: SIO0 Send on PLD */
369 irq_desc[PLD_IRQ_SIO0_SND].status = IRQ_DISABLED;
370 irq_desc[PLD_IRQ_SIO0_SND].chip = &opsput_pld_irq_type;
371 irq_desc[PLD_IRQ_SIO0_SND].action = 0;
372 irq_desc[PLD_IRQ_SIO0_SND].depth = 1; /* disable nested irq */
373 pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_SND)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
374 disable_opsput_pld_irq(PLD_IRQ_SIO0_SND);
375#endif /* CONFIG_SERIAL_M32R_PLDSIO */
376
377 /* INT#1: CFC IREQ on PLD */
378 irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
379 irq_desc[PLD_IRQ_CFIREQ].chip = &opsput_pld_irq_type;
380 irq_desc[PLD_IRQ_CFIREQ].action = 0;
381 irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */
382 pld_icu_data[irq2pldirq(PLD_IRQ_CFIREQ)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* 'L' level sense */
383 disable_opsput_pld_irq(PLD_IRQ_CFIREQ);
384
385 /* INT#1: CFC Insert on PLD */
386 irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
387 irq_desc[PLD_IRQ_CFC_INSERT].chip = &opsput_pld_irq_type;
388 irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
389 irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
390 pld_icu_data[irq2pldirq(PLD_IRQ_CFC_INSERT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD00; /* 'L' edge sense */
391 disable_opsput_pld_irq(PLD_IRQ_CFC_INSERT);
392
393 /* INT#1: CFC Eject on PLD */
394 irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED;
395 irq_desc[PLD_IRQ_CFC_EJECT].chip = &opsput_pld_irq_type;
396 irq_desc[PLD_IRQ_CFC_EJECT].action = 0;
397 irq_desc[PLD_IRQ_CFC_EJECT].depth = 1; /* disable nested irq */
398 pld_icu_data[irq2pldirq(PLD_IRQ_CFC_EJECT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* 'H' edge sense */
399 disable_opsput_pld_irq(PLD_IRQ_CFC_EJECT);
400
401 /*
402 * INT0# is used for LAN, DIO
403 * We enable it here.
404 */
405 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD11;
406 enable_opsput_irq(M32R_IRQ_INT0);
407
408 /*
409 * INT1# is used for UART, MMC, CF Controller in FPGA.
410 * We enable it here.
411 */
412 icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD11;
413 enable_opsput_irq(M32R_IRQ_INT1);
414
415#if defined(CONFIG_USB)
416 outw(USBCR_OTGS, USBCR); /* USBCR: non-OTG */
417
418 irq_desc[OPSPUT_LCD_IRQ_USB_INT1].status = IRQ_DISABLED;
419 irq_desc[OPSPUT_LCD_IRQ_USB_INT1].chip = &opsput_lcdpld_irq_type;
420 irq_desc[OPSPUT_LCD_IRQ_USB_INT1].action = 0;
421 irq_desc[OPSPUT_LCD_IRQ_USB_INT1].depth = 1;
422 lcdpld_icu_data[irq2lcdpldirq(OPSPUT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* "L" level sense */
423 disable_opsput_lcdpld_irq(OPSPUT_LCD_IRQ_USB_INT1);
424#endif
425 /*
426 * INT2# is used for BAT, USB, AUDIO
427 * We enable it here.
428 */
429 icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
430 enable_opsput_irq(M32R_IRQ_INT2);
431
432#if defined(CONFIG_VIDEO_M32R_AR)
433 /*
434 * INT3# is used for AR
435 */
436 irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED;
437 irq_desc[M32R_IRQ_INT3].chip = &opsput_irq_type;
438 irq_desc[M32R_IRQ_INT3].action = 0;
439 irq_desc[M32R_IRQ_INT3].depth = 1;
440 icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
441 disable_opsput_irq(M32R_IRQ_INT3);
442#endif /* CONFIG_VIDEO_M32R_AR */
443}
444
445#if defined(CONFIG_SMC91X)
446
447#define LAN_IOSTART 0x300
448#define LAN_IOEND 0x320
449static struct resource smc91x_resources[] = {
450 [0] = {
451 .start = (LAN_IOSTART),
452 .end = (LAN_IOEND),
453 .flags = IORESOURCE_MEM,
454 },
455 [1] = {
456 .start = OPSPUT_LAN_IRQ_LAN,
457 .end = OPSPUT_LAN_IRQ_LAN,
458 .flags = IORESOURCE_IRQ,
459 }
460};
461
462static struct platform_device smc91x_device = {
463 .name = "smc91x",
464 .id = 0,
465 .num_resources = ARRAY_SIZE(smc91x_resources),
466 .resource = smc91x_resources,
467};
468#endif
469
470#if defined(CONFIG_FB_S1D13XXX)
471
472#include <video/s1d13xxxfb.h>
473#include <asm/s1d13806.h>
474
475static struct s1d13xxxfb_pdata s1d13xxxfb_data = {
476 .initregs = s1d13xxxfb_initregs,
477 .initregssize = ARRAY_SIZE(s1d13xxxfb_initregs),
478 .platform_init_video = NULL,
479#ifdef CONFIG_PM
480 .platform_suspend_video = NULL,
481 .platform_resume_video = NULL,
482#endif
483};
484
485static struct resource s1d13xxxfb_resources[] = {
486 [0] = {
487 .start = 0x10600000UL,
488 .end = 0x1073FFFFUL,
489 .flags = IORESOURCE_MEM,
490 },
491 [1] = {
492 .start = 0x10400000UL,
493 .end = 0x104001FFUL,
494 .flags = IORESOURCE_MEM,
495 }
496};
497
498static struct platform_device s1d13xxxfb_device = {
499 .name = S1D_DEVICENAME,
500 .id = 0,
501 .dev = {
502 .platform_data = &s1d13xxxfb_data,
503 },
504 .num_resources = ARRAY_SIZE(s1d13xxxfb_resources),
505 .resource = s1d13xxxfb_resources,
506};
507#endif
508
509static int __init platform_init(void)
510{
511#if defined(CONFIG_SMC91X)
512 platform_device_register(&smc91x_device);
513#endif
514#if defined(CONFIG_FB_S1D13XXX)
515 platform_device_register(&s1d13xxxfb_device);
516#endif
517 return 0;
518}
519arch_initcall(platform_init);
diff --git a/arch/m32r/kernel/setup_usrv.c b/arch/m32r/kernel/setup_usrv.c
deleted file mode 100644
index f5b4b5ac31e7..000000000000
--- a/arch/m32r/kernel/setup_usrv.c
+++ /dev/null
@@ -1,249 +0,0 @@
1/*
2 * linux/arch/m32r/kernel/setup_usrv.c
3 *
4 * Setup routines for MITSUBISHI uServer
5 *
6 * Copyright (c) 2001, 2002, 2003 Hiroyuki Kondo, Hirokazu Takata,
7 * Hitoshi Yamamoto
8 */
9
10#include <linux/irq.h>
11#include <linux/kernel.h>
12#include <linux/init.h>
13
14#include <asm/system.h>
15#include <asm/m32r.h>
16#include <asm/io.h>
17
18#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
19
20icu_data_t icu_data[M32700UT_NUM_CPU_IRQ];
21
22static void disable_mappi_irq(unsigned int irq)
23{
24 unsigned long port, data;
25
26 port = irq2port(irq);
27 data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
28 outl(data, port);
29}
30
31static void enable_mappi_irq(unsigned int irq)
32{
33 unsigned long port, data;
34
35 port = irq2port(irq);
36 data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
37 outl(data, port);
38}
39
40static void mask_and_ack_mappi(unsigned int irq)
41{
42 disable_mappi_irq(irq);
43}
44
45static void end_mappi_irq(unsigned int irq)
46{
47 enable_mappi_irq(irq);
48}
49
50static unsigned int startup_mappi_irq(unsigned int irq)
51{
52 enable_mappi_irq(irq);
53 return 0;
54}
55
56static void shutdown_mappi_irq(unsigned int irq)
57{
58 unsigned long port;
59
60 port = irq2port(irq);
61 outl(M32R_ICUCR_ILEVEL7, port);
62}
63
64static struct hw_interrupt_type mappi_irq_type =
65{
66 .typename = "M32700-IRQ",
67 .startup = startup_mappi_irq,
68 .shutdown = shutdown_mappi_irq,
69 .enable = enable_mappi_irq,
70 .disable = disable_mappi_irq,
71 .ack = mask_and_ack_mappi,
72 .end = end_mappi_irq
73};
74
75/*
76 * Interrupt Control Unit of PLD on M32700UT (Level 2)
77 */
78#define irq2pldirq(x) ((x) - M32700UT_PLD_IRQ_BASE)
79#define pldirq2port(x) (unsigned long)((int)PLD_ICUCR1 + \
80 (((x) - 1) * sizeof(unsigned short)))
81
82typedef struct {
83 unsigned short icucr; /* ICU Control Register */
84} pld_icu_data_t;
85
86static pld_icu_data_t pld_icu_data[M32700UT_NUM_PLD_IRQ];
87
88static void disable_m32700ut_pld_irq(unsigned int irq)
89{
90 unsigned long port, data;
91 unsigned int pldirq;
92
93 pldirq = irq2pldirq(irq);
94 port = pldirq2port(pldirq);
95 data = pld_icu_data[pldirq].icucr|PLD_ICUCR_ILEVEL7;
96 outw(data, port);
97}
98
99static void enable_m32700ut_pld_irq(unsigned int irq)
100{
101 unsigned long port, data;
102 unsigned int pldirq;
103
104 pldirq = irq2pldirq(irq);
105 port = pldirq2port(pldirq);
106 data = pld_icu_data[pldirq].icucr|PLD_ICUCR_IEN|PLD_ICUCR_ILEVEL6;
107 outw(data, port);
108}
109
110static void mask_and_ack_m32700ut_pld(unsigned int irq)
111{
112 disable_m32700ut_pld_irq(irq);
113}
114
115static void end_m32700ut_pld_irq(unsigned int irq)
116{
117 enable_m32700ut_pld_irq(irq);
118 end_mappi_irq(M32R_IRQ_INT1);
119}
120
121static unsigned int startup_m32700ut_pld_irq(unsigned int irq)
122{
123 enable_m32700ut_pld_irq(irq);
124 return 0;
125}
126
127static void shutdown_m32700ut_pld_irq(unsigned int irq)
128{
129 unsigned long port;
130 unsigned int pldirq;
131
132 pldirq = irq2pldirq(irq);
133 port = pldirq2port(pldirq);
134 outw(PLD_ICUCR_ILEVEL7, port);
135}
136
137static struct hw_interrupt_type m32700ut_pld_irq_type =
138{
139 .typename = "USRV-PLD-IRQ",
140 .startup = startup_m32700ut_pld_irq,
141 .shutdown = shutdown_m32700ut_pld_irq,
142 .enable = enable_m32700ut_pld_irq,
143 .disable = disable_m32700ut_pld_irq,
144 .ack = mask_and_ack_m32700ut_pld,
145 .end = end_m32700ut_pld_irq
146};
147
148void __init init_IRQ(void)
149{
150 static int once = 0;
151 int i;
152
153 if (once)
154 return;
155 else
156 once++;
157
158 /* MFT2 : system timer */
159 irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
160 irq_desc[M32R_IRQ_MFT2].chip = &mappi_irq_type;
161 irq_desc[M32R_IRQ_MFT2].action = 0;
162 irq_desc[M32R_IRQ_MFT2].depth = 1;
163 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
164 disable_mappi_irq(M32R_IRQ_MFT2);
165
166#if defined(CONFIG_SERIAL_M32R_SIO)
167 /* SIO0_R : uart receive data */
168 irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
169 irq_desc[M32R_IRQ_SIO0_R].chip = &mappi_irq_type;
170 irq_desc[M32R_IRQ_SIO0_R].action = 0;
171 irq_desc[M32R_IRQ_SIO0_R].depth = 1;
172 icu_data[M32R_IRQ_SIO0_R].icucr = 0;
173 disable_mappi_irq(M32R_IRQ_SIO0_R);
174
175 /* SIO0_S : uart send data */
176 irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
177 irq_desc[M32R_IRQ_SIO0_S].chip = &mappi_irq_type;
178 irq_desc[M32R_IRQ_SIO0_S].action = 0;
179 irq_desc[M32R_IRQ_SIO0_S].depth = 1;
180 icu_data[M32R_IRQ_SIO0_S].icucr = 0;
181 disable_mappi_irq(M32R_IRQ_SIO0_S);
182
183 /* SIO1_R : uart receive data */
184 irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
185 irq_desc[M32R_IRQ_SIO1_R].chip = &mappi_irq_type;
186 irq_desc[M32R_IRQ_SIO1_R].action = 0;
187 irq_desc[M32R_IRQ_SIO1_R].depth = 1;
188 icu_data[M32R_IRQ_SIO1_R].icucr = 0;
189 disable_mappi_irq(M32R_IRQ_SIO1_R);
190
191 /* SIO1_S : uart send data */
192 irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
193 irq_desc[M32R_IRQ_SIO1_S].chip = &mappi_irq_type;
194 irq_desc[M32R_IRQ_SIO1_S].action = 0;
195 irq_desc[M32R_IRQ_SIO1_S].depth = 1;
196 icu_data[M32R_IRQ_SIO1_S].icucr = 0;
197 disable_mappi_irq(M32R_IRQ_SIO1_S);
198#endif /* CONFIG_SERIAL_M32R_SIO */
199
200 /* INT#67-#71: CFC#0 IREQ on PLD */
201 for (i = 0 ; i < CONFIG_CFC_NUM ; i++ ) {
202 irq_desc[PLD_IRQ_CF0 + i].status = IRQ_DISABLED;
203 irq_desc[PLD_IRQ_CF0 + i].chip = &m32700ut_pld_irq_type;
204 irq_desc[PLD_IRQ_CF0 + i].action = 0;
205 irq_desc[PLD_IRQ_CF0 + i].depth = 1; /* disable nested irq */
206 pld_icu_data[irq2pldirq(PLD_IRQ_CF0 + i)].icucr
207 = PLD_ICUCR_ISMOD01; /* 'L' level sense */
208 disable_m32700ut_pld_irq(PLD_IRQ_CF0 + i);
209 }
210
211#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
212 /* INT#76: 16552D#0 IREQ on PLD */
213 irq_desc[PLD_IRQ_UART0].status = IRQ_DISABLED;
214 irq_desc[PLD_IRQ_UART0].chip = &m32700ut_pld_irq_type;
215 irq_desc[PLD_IRQ_UART0].action = 0;
216 irq_desc[PLD_IRQ_UART0].depth = 1; /* disable nested irq */
217 pld_icu_data[irq2pldirq(PLD_IRQ_UART0)].icucr
218 = PLD_ICUCR_ISMOD03; /* 'H' level sense */
219 disable_m32700ut_pld_irq(PLD_IRQ_UART0);
220
221 /* INT#77: 16552D#1 IREQ on PLD */
222 irq_desc[PLD_IRQ_UART1].status = IRQ_DISABLED;
223 irq_desc[PLD_IRQ_UART1].chip = &m32700ut_pld_irq_type;
224 irq_desc[PLD_IRQ_UART1].action = 0;
225 irq_desc[PLD_IRQ_UART1].depth = 1; /* disable nested irq */
226 pld_icu_data[irq2pldirq(PLD_IRQ_UART1)].icucr
227 = PLD_ICUCR_ISMOD03; /* 'H' level sense */
228 disable_m32700ut_pld_irq(PLD_IRQ_UART1);
229#endif /* CONFIG_SERIAL_8250 || CONFIG_SERIAL_8250_MODULE */
230
231#if defined(CONFIG_IDC_AK4524) || defined(CONFIG_IDC_AK4524_MODULE)
232 /* INT#80: AK4524 IREQ on PLD */
233 irq_desc[PLD_IRQ_SNDINT].status = IRQ_DISABLED;
234 irq_desc[PLD_IRQ_SNDINT].chip = &m32700ut_pld_irq_type;
235 irq_desc[PLD_IRQ_SNDINT].action = 0;
236 irq_desc[PLD_IRQ_SNDINT].depth = 1; /* disable nested irq */
237 pld_icu_data[irq2pldirq(PLD_IRQ_SNDINT)].icucr
238 = PLD_ICUCR_ISMOD01; /* 'L' level sense */
239 disable_m32700ut_pld_irq(PLD_IRQ_SNDINT);
240#endif /* CONFIG_IDC_AK4524 || CONFIG_IDC_AK4524_MODULE */
241
242 /*
243 * INT1# is used for UART, MMC, CF Controller in FPGA.
244 * We enable it here.
245 */
246 icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD11;
247 enable_mappi_irq(M32R_IRQ_INT1);
248}
249
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-18 21:08:46 -0500