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authorHirokazu Takata <takata@linux-m32r.org>2005-06-21 20:16:10 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-06-21 22:07:30 -0400
commit2368086344c3d67b0f4aecac39d620fb9b8795c3 (patch)
treeaa55003e311abf6049acd23f5ff7f8bfd24eca4c /arch/m32r/kernel/setup_mappi3.c
parentd4c477ca5448f19afaaf6c0cfd655009ea9e614d (diff)
[PATCH] m32r: Support M3A-2170(Mappi-III) platform
This patchset is for supporting a new m32r platform, M3A-2170(Mappi-III) evaluation board. An M32R chip multiprocessor is equipped on the board. http://http://www.linux-m32r.org/eng/platform/platform.html * arch/m32r/Kconfig: Support Mappi-III platform. * arch/m32r/kernel/Makefile: ditto. * arch/m32r/kernel/io_mappi3.c: ditto. * arch/m32r/kernel/setup.c: ditto. * arch/m32r/kernel/setup_mappi3.c: ditto. * include/asm-m32r/m32102.h: ditto. * include/asm-m32r/m32r.h: ditto. * include/asm-m32r/mappi3/mappi3_pld.h: ditto. * include/asm-m32r/ide.h: CF support for Mappi-III. * arch/m32r/kernel/setup_mappi3.c: ditto. * arch/m32r/mappi3/defconfig.smp: A default config file for Mappi-III. * arch/m32r/mappi3/dot.gdbinit: A default .gdbinit file for Mappi-III. * arch/m32r/boot/compressed/m32r_sio.c: Modified for Mappi-III - At boot time, m32r-g00ff bootloader makes MMU off for Mappi-III, on the contrary it makes MMU on for Mappi-II. * arch/m32r/kernel/io_mappi2.c: Update comments. * arch/m32r/kernel/setup_mappi2.c: ditto. Signed-off-by: Mamoru Sakugawa <sakugawa@linux-m32r.org> Signed-off-by: Hirokazu Takata <takata@linux-m32r.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/m32r/kernel/setup_mappi3.c')
-rw-r--r--arch/m32r/kernel/setup_mappi3.c208
1 files changed, 208 insertions, 0 deletions
diff --git a/arch/m32r/kernel/setup_mappi3.c b/arch/m32r/kernel/setup_mappi3.c
new file mode 100644
index 000000000000..72b5b7609cea
--- /dev/null
+++ b/arch/m32r/kernel/setup_mappi3.c
@@ -0,0 +1,208 @@
1/*
2 * linux/arch/m32r/kernel/setup_mappi3.c
3 *
4 * Setup routines for Renesas MAPPI-III(M3A-2170) Board
5 *
6 * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
7 * Hitoshi Yamamoto, Mamoru Sakugawa
8 */
9
10#include <linux/config.h>
11#include <linux/irq.h>
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/device.h>
15
16#include <asm/system.h>
17#include <asm/m32r.h>
18#include <asm/io.h>
19
20#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
21
22#ifndef CONFIG_SMP
23typedef struct {
24 unsigned long icucr; /* ICU Control Register */
25} icu_data_t;
26#endif /* CONFIG_SMP */
27
28icu_data_t icu_data[NR_IRQS];
29
30static void disable_mappi3_irq(unsigned int irq)
31{
32 unsigned long port, data;
33
34 if ((irq == 0) ||(irq >= NR_IRQS)) {
35 printk("bad irq 0x%08x\n", irq);
36 return;
37 }
38 port = irq2port(irq);
39 data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
40 outl(data, port);
41}
42
43static void enable_mappi3_irq(unsigned int irq)
44{
45 unsigned long port, data;
46
47 if ((irq == 0) ||(irq >= NR_IRQS)) {
48 printk("bad irq 0x%08x\n", irq);
49 return;
50 }
51 port = irq2port(irq);
52 data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
53 outl(data, port);
54}
55
56static void mask_and_ack_mappi3(unsigned int irq)
57{
58 disable_mappi3_irq(irq);
59}
60
61static void end_mappi3_irq(unsigned int irq)
62{
63 enable_mappi3_irq(irq);
64}
65
66static unsigned int startup_mappi3_irq(unsigned int irq)
67{
68 enable_mappi3_irq(irq);
69 return (0);
70}
71
72static void shutdown_mappi3_irq(unsigned int irq)
73{
74 unsigned long port;
75
76 port = irq2port(irq);
77 outl(M32R_ICUCR_ILEVEL7, port);
78}
79
80static struct hw_interrupt_type mappi3_irq_type =
81{
82 "MAPPI3-IRQ",
83 startup_mappi3_irq,
84 shutdown_mappi3_irq,
85 enable_mappi3_irq,
86 disable_mappi3_irq,
87 mask_and_ack_mappi3,
88 end_mappi3_irq
89};
90
91void __init init_IRQ(void)
92{
93#if defined(CONFIG_SMC91X)
94 /* INT0 : LAN controller (SMC91111) */
95 irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
96 irq_desc[M32R_IRQ_INT0].handler = &mappi3_irq_type;
97 irq_desc[M32R_IRQ_INT0].action = 0;
98 irq_desc[M32R_IRQ_INT0].depth = 1;
99 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
100 disable_mappi3_irq(M32R_IRQ_INT0);
101#endif /* CONFIG_SMC91X */
102
103 /* MFT2 : system timer */
104 irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
105 irq_desc[M32R_IRQ_MFT2].handler = &mappi3_irq_type;
106 irq_desc[M32R_IRQ_MFT2].action = 0;
107 irq_desc[M32R_IRQ_MFT2].depth = 1;
108 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
109 disable_mappi3_irq(M32R_IRQ_MFT2);
110
111#ifdef CONFIG_SERIAL_M32R_SIO
112 /* SIO0_R : uart receive data */
113 irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
114 irq_desc[M32R_IRQ_SIO0_R].handler = &mappi3_irq_type;
115 irq_desc[M32R_IRQ_SIO0_R].action = 0;
116 irq_desc[M32R_IRQ_SIO0_R].depth = 1;
117 icu_data[M32R_IRQ_SIO0_R].icucr = 0;
118 disable_mappi3_irq(M32R_IRQ_SIO0_R);
119
120 /* SIO0_S : uart send data */
121 irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
122 irq_desc[M32R_IRQ_SIO0_S].handler = &mappi3_irq_type;
123 irq_desc[M32R_IRQ_SIO0_S].action = 0;
124 irq_desc[M32R_IRQ_SIO0_S].depth = 1;
125 icu_data[M32R_IRQ_SIO0_S].icucr = 0;
126 disable_mappi3_irq(M32R_IRQ_SIO0_S);
127 /* SIO1_R : uart receive data */
128 irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
129 irq_desc[M32R_IRQ_SIO1_R].handler = &mappi3_irq_type;
130 irq_desc[M32R_IRQ_SIO1_R].action = 0;
131 irq_desc[M32R_IRQ_SIO1_R].depth = 1;
132 icu_data[M32R_IRQ_SIO1_R].icucr = 0;
133 disable_mappi3_irq(M32R_IRQ_SIO1_R);
134
135 /* SIO1_S : uart send data */
136 irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
137 irq_desc[M32R_IRQ_SIO1_S].handler = &mappi3_irq_type;
138 irq_desc[M32R_IRQ_SIO1_S].action = 0;
139 irq_desc[M32R_IRQ_SIO1_S].depth = 1;
140 icu_data[M32R_IRQ_SIO1_S].icucr = 0;
141 disable_mappi3_irq(M32R_IRQ_SIO1_S);
142#endif /* CONFIG_M32R_USE_DBG_CONSOLE */
143
144#if defined(CONFIG_USB)
145 /* INT1 : USB Host controller interrupt */
146 irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED;
147 irq_desc[M32R_IRQ_INT1].handler = &mappi3_irq_type;
148 irq_desc[M32R_IRQ_INT1].action = 0;
149 irq_desc[M32R_IRQ_INT1].depth = 1;
150 icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
151 disable_mappi3_irq(M32R_IRQ_INT1);
152#endif /* CONFIG_USB */
153
154 /* ICUCR40: CFC IREQ */
155 irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
156 irq_desc[PLD_IRQ_CFIREQ].handler = &mappi3_irq_type;
157 irq_desc[PLD_IRQ_CFIREQ].action = 0;
158 irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */
159 icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
160 disable_mappi3_irq(PLD_IRQ_CFIREQ);
161
162#if defined(CONFIG_M32R_CFC)
163 /* ICUCR41: CFC Insert */
164 irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
165 irq_desc[PLD_IRQ_CFC_INSERT].handler = &mappi3_irq_type;
166 irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
167 irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
168 icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
169 disable_mappi3_irq(PLD_IRQ_CFC_INSERT);
170
171 /* ICUCR42: CFC Eject */
172 irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED;
173 irq_desc[PLD_IRQ_CFC_EJECT].handler = &mappi3_irq_type;
174 irq_desc[PLD_IRQ_CFC_EJECT].action = 0;
175 irq_desc[PLD_IRQ_CFC_EJECT].depth = 1; /* disable nested irq */
176 icu_data[PLD_IRQ_CFC_EJECT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
177 disable_mappi3_irq(PLD_IRQ_CFC_EJECT);
178#endif /* CONFIG_M32R_CFC */
179}
180
181#define LAN_IOSTART 0x300
182#define LAN_IOEND 0x320
183static struct resource smc91x_resources[] = {
184 [0] = {
185 .start = (LAN_IOSTART),
186 .end = (LAN_IOEND),
187 .flags = IORESOURCE_MEM,
188 },
189 [1] = {
190 .start = M32R_IRQ_INT0,
191 .end = M32R_IRQ_INT0,
192 .flags = IORESOURCE_IRQ,
193 }
194};
195
196static struct platform_device smc91x_device = {
197 .name = "smc91x",
198 .id = 0,
199 .num_resources = ARRAY_SIZE(smc91x_resources),
200 .resource = smc91x_resources,
201};
202
203static int __init platform_init(void)
204{
205 platform_device_register(&smc91x_device);
206 return 0;
207}
208arch_initcall(platform_init);