diff options
author | Al Viro <viro@ftp.linux.org.uk> | 2006-10-11 12:24:35 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-10-11 14:17:06 -0400 |
commit | 12ea59e8109d7192ecb2ac994588e24b11ab0428 (patch) | |
tree | c1e889ea9d8a15d06fbad1ded70ad8de2bb2b050 /arch/m32r/kernel/setup_mappi.c | |
parent | 870e75a2930a1db02c7a5c09a13edcb4e3b07838 (diff) |
[PATCH] m32r: NULL noise removal
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/m32r/kernel/setup_mappi.c')
-rw-r--r-- | arch/m32r/kernel/setup_mappi.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/m32r/kernel/setup_mappi.c b/arch/m32r/kernel/setup_mappi.c index 67dbbdc9d111..6b2d77da0683 100644 --- a/arch/m32r/kernel/setup_mappi.c +++ b/arch/m32r/kernel/setup_mappi.c | |||
@@ -86,7 +86,7 @@ void __init init_IRQ(void) | |||
86 | /* INT0 : LAN controller (RTL8019AS) */ | 86 | /* INT0 : LAN controller (RTL8019AS) */ |
87 | irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED; | 87 | irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED; |
88 | irq_desc[M32R_IRQ_INT0].chip = &mappi_irq_type; | 88 | irq_desc[M32R_IRQ_INT0].chip = &mappi_irq_type; |
89 | irq_desc[M32R_IRQ_INT0].action = 0; | 89 | irq_desc[M32R_IRQ_INT0].action = NULL; |
90 | irq_desc[M32R_IRQ_INT0].depth = 1; | 90 | irq_desc[M32R_IRQ_INT0].depth = 1; |
91 | icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; | 91 | icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; |
92 | disable_mappi_irq(M32R_IRQ_INT0); | 92 | disable_mappi_irq(M32R_IRQ_INT0); |
@@ -95,7 +95,7 @@ void __init init_IRQ(void) | |||
95 | /* MFT2 : system timer */ | 95 | /* MFT2 : system timer */ |
96 | irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; | 96 | irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; |
97 | irq_desc[M32R_IRQ_MFT2].chip = &mappi_irq_type; | 97 | irq_desc[M32R_IRQ_MFT2].chip = &mappi_irq_type; |
98 | irq_desc[M32R_IRQ_MFT2].action = 0; | 98 | irq_desc[M32R_IRQ_MFT2].action = NULL; |
99 | irq_desc[M32R_IRQ_MFT2].depth = 1; | 99 | irq_desc[M32R_IRQ_MFT2].depth = 1; |
100 | icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; | 100 | icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; |
101 | disable_mappi_irq(M32R_IRQ_MFT2); | 101 | disable_mappi_irq(M32R_IRQ_MFT2); |
@@ -104,7 +104,7 @@ void __init init_IRQ(void) | |||
104 | /* SIO0_R : uart receive data */ | 104 | /* SIO0_R : uart receive data */ |
105 | irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; | 105 | irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; |
106 | irq_desc[M32R_IRQ_SIO0_R].chip = &mappi_irq_type; | 106 | irq_desc[M32R_IRQ_SIO0_R].chip = &mappi_irq_type; |
107 | irq_desc[M32R_IRQ_SIO0_R].action = 0; | 107 | irq_desc[M32R_IRQ_SIO0_R].action = NULL; |
108 | irq_desc[M32R_IRQ_SIO0_R].depth = 1; | 108 | irq_desc[M32R_IRQ_SIO0_R].depth = 1; |
109 | icu_data[M32R_IRQ_SIO0_R].icucr = 0; | 109 | icu_data[M32R_IRQ_SIO0_R].icucr = 0; |
110 | disable_mappi_irq(M32R_IRQ_SIO0_R); | 110 | disable_mappi_irq(M32R_IRQ_SIO0_R); |
@@ -112,7 +112,7 @@ void __init init_IRQ(void) | |||
112 | /* SIO0_S : uart send data */ | 112 | /* SIO0_S : uart send data */ |
113 | irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; | 113 | irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; |
114 | irq_desc[M32R_IRQ_SIO0_S].chip = &mappi_irq_type; | 114 | irq_desc[M32R_IRQ_SIO0_S].chip = &mappi_irq_type; |
115 | irq_desc[M32R_IRQ_SIO0_S].action = 0; | 115 | irq_desc[M32R_IRQ_SIO0_S].action = NULL; |
116 | irq_desc[M32R_IRQ_SIO0_S].depth = 1; | 116 | irq_desc[M32R_IRQ_SIO0_S].depth = 1; |
117 | icu_data[M32R_IRQ_SIO0_S].icucr = 0; | 117 | icu_data[M32R_IRQ_SIO0_S].icucr = 0; |
118 | disable_mappi_irq(M32R_IRQ_SIO0_S); | 118 | disable_mappi_irq(M32R_IRQ_SIO0_S); |
@@ -120,7 +120,7 @@ void __init init_IRQ(void) | |||
120 | /* SIO1_R : uart receive data */ | 120 | /* SIO1_R : uart receive data */ |
121 | irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED; | 121 | irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED; |
122 | irq_desc[M32R_IRQ_SIO1_R].chip = &mappi_irq_type; | 122 | irq_desc[M32R_IRQ_SIO1_R].chip = &mappi_irq_type; |
123 | irq_desc[M32R_IRQ_SIO1_R].action = 0; | 123 | irq_desc[M32R_IRQ_SIO1_R].action = NULL; |
124 | irq_desc[M32R_IRQ_SIO1_R].depth = 1; | 124 | irq_desc[M32R_IRQ_SIO1_R].depth = 1; |
125 | icu_data[M32R_IRQ_SIO1_R].icucr = 0; | 125 | icu_data[M32R_IRQ_SIO1_R].icucr = 0; |
126 | disable_mappi_irq(M32R_IRQ_SIO1_R); | 126 | disable_mappi_irq(M32R_IRQ_SIO1_R); |
@@ -128,7 +128,7 @@ void __init init_IRQ(void) | |||
128 | /* SIO1_S : uart send data */ | 128 | /* SIO1_S : uart send data */ |
129 | irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED; | 129 | irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED; |
130 | irq_desc[M32R_IRQ_SIO1_S].chip = &mappi_irq_type; | 130 | irq_desc[M32R_IRQ_SIO1_S].chip = &mappi_irq_type; |
131 | irq_desc[M32R_IRQ_SIO1_S].action = 0; | 131 | irq_desc[M32R_IRQ_SIO1_S].action = NULL; |
132 | irq_desc[M32R_IRQ_SIO1_S].depth = 1; | 132 | irq_desc[M32R_IRQ_SIO1_S].depth = 1; |
133 | icu_data[M32R_IRQ_SIO1_S].icucr = 0; | 133 | icu_data[M32R_IRQ_SIO1_S].icucr = 0; |
134 | disable_mappi_irq(M32R_IRQ_SIO1_S); | 134 | disable_mappi_irq(M32R_IRQ_SIO1_S); |
@@ -138,7 +138,7 @@ void __init init_IRQ(void) | |||
138 | /* INT1 : pccard0 interrupt */ | 138 | /* INT1 : pccard0 interrupt */ |
139 | irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED; | 139 | irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED; |
140 | irq_desc[M32R_IRQ_INT1].chip = &mappi_irq_type; | 140 | irq_desc[M32R_IRQ_INT1].chip = &mappi_irq_type; |
141 | irq_desc[M32R_IRQ_INT1].action = 0; | 141 | irq_desc[M32R_IRQ_INT1].action = NULL; |
142 | irq_desc[M32R_IRQ_INT1].depth = 1; | 142 | irq_desc[M32R_IRQ_INT1].depth = 1; |
143 | icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00; | 143 | icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00; |
144 | disable_mappi_irq(M32R_IRQ_INT1); | 144 | disable_mappi_irq(M32R_IRQ_INT1); |
@@ -146,7 +146,7 @@ void __init init_IRQ(void) | |||
146 | /* INT2 : pccard1 interrupt */ | 146 | /* INT2 : pccard1 interrupt */ |
147 | irq_desc[M32R_IRQ_INT2].status = IRQ_DISABLED; | 147 | irq_desc[M32R_IRQ_INT2].status = IRQ_DISABLED; |
148 | irq_desc[M32R_IRQ_INT2].chip = &mappi_irq_type; | 148 | irq_desc[M32R_IRQ_INT2].chip = &mappi_irq_type; |
149 | irq_desc[M32R_IRQ_INT2].action = 0; | 149 | irq_desc[M32R_IRQ_INT2].action = NULL; |
150 | irq_desc[M32R_IRQ_INT2].depth = 1; | 150 | irq_desc[M32R_IRQ_INT2].depth = 1; |
151 | icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00; | 151 | icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00; |
152 | disable_mappi_irq(M32R_IRQ_INT2); | 152 | disable_mappi_irq(M32R_IRQ_INT2); |