diff options
| author | Hirokazu Takata <takata@linux-m32r.org> | 2006-01-06 03:18:43 -0500 |
|---|---|---|
| committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-01-06 11:33:44 -0500 |
| commit | 46ea178b7a5162405bf70954d769165cf2161309 (patch) | |
| tree | d757c796068a38ffa8c2b793233805c9b0120cde /arch/m32r/kernel/io_m32700ut.c | |
| parent | 1b5b776aa5730cbda9cba84ba0f8ccd53a775797 (diff) | |
[PATCH] m32r: Update _port2addr to use NONCACHE_OFFSET
Modify _port2addr*() routines in arch/m32r/kernel/io_*.c to use
NONCACHE_OFFSET instead of hard-coding of a constant address.
This modification is also required to support an M3A-ZA36 FPGA eva board in
case an MMU-less synthesizable m32r core is used.
Signed-off-by: Hirokazu Takata <takata@linux-m32r.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/m32r/kernel/io_m32700ut.c')
| -rw-r--r-- | arch/m32r/kernel/io_m32700ut.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/arch/m32r/kernel/io_m32700ut.c b/arch/m32r/kernel/io_m32700ut.c index eda9f963c1eb..939932d6cc00 100644 --- a/arch/m32r/kernel/io_m32700ut.c +++ b/arch/m32r/kernel/io_m32700ut.c | |||
| @@ -36,7 +36,7 @@ extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int); | |||
| 36 | 36 | ||
| 37 | static inline void *_port2addr(unsigned long port) | 37 | static inline void *_port2addr(unsigned long port) |
| 38 | { | 38 | { |
| 39 | return (void *)(port + NONCACHE_OFFSET); | 39 | return (void *)(port | NONCACHE_OFFSET); |
| 40 | } | 40 | } |
| 41 | 41 | ||
| 42 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) | 42 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) |
| @@ -45,15 +45,15 @@ static inline void *__port2addr_ata(unsigned long port) | |||
| 45 | static int dummy_reg; | 45 | static int dummy_reg; |
| 46 | 46 | ||
| 47 | switch (port) { | 47 | switch (port) { |
| 48 | case 0x1f0: return (void *)0xac002000; | 48 | case 0x1f0: return (void *)(0x0c002000 | NONCACHE_OFFSET); |
| 49 | case 0x1f1: return (void *)0xac012800; | 49 | case 0x1f1: return (void *)(0x0c012800 | NONCACHE_OFFSET); |
| 50 | case 0x1f2: return (void *)0xac012002; | 50 | case 0x1f2: return (void *)(0x0c012002 | NONCACHE_OFFSET); |
| 51 | case 0x1f3: return (void *)0xac012802; | 51 | case 0x1f3: return (void *)(0x0c012802 | NONCACHE_OFFSET); |
| 52 | case 0x1f4: return (void *)0xac012004; | 52 | case 0x1f4: return (void *)(0x0c012004 | NONCACHE_OFFSET); |
| 53 | case 0x1f5: return (void *)0xac012804; | 53 | case 0x1f5: return (void *)(0x0c012804 | NONCACHE_OFFSET); |
| 54 | case 0x1f6: return (void *)0xac012006; | 54 | case 0x1f6: return (void *)(0x0c012006 | NONCACHE_OFFSET); |
| 55 | case 0x1f7: return (void *)0xac012806; | 55 | case 0x1f7: return (void *)(0x0c012806 | NONCACHE_OFFSET); |
| 56 | case 0x3f6: return (void *)0xac01200e; | 56 | case 0x3f6: return (void *)(0x0c01200e | NONCACHE_OFFSET); |
| 57 | default: return (void *)&dummy_reg; | 57 | default: return (void *)&dummy_reg; |
| 58 | } | 58 | } |
| 59 | } | 59 | } |
| @@ -64,8 +64,8 @@ static inline void *__port2addr_ata(unsigned long port) | |||
| 64 | * from 0x10000000 to 0x13ffffff on physical address. | 64 | * from 0x10000000 to 0x13ffffff on physical address. |
| 65 | * The base address of LAN controller(LAN91C111) is 0x300. | 65 | * The base address of LAN controller(LAN91C111) is 0x300. |
| 66 | */ | 66 | */ |
| 67 | #define LAN_IOSTART 0xa0000300 | 67 | #define LAN_IOSTART (0x300 | NONCACHE_OFFSET) |
| 68 | #define LAN_IOEND 0xa0000320 | 68 | #define LAN_IOEND (0x320 | NONCACHE_OFFSET) |
| 69 | static inline void *_port2addr_ne(unsigned long port) | 69 | static inline void *_port2addr_ne(unsigned long port) |
| 70 | { | 70 | { |
| 71 | return (void *)(port + 0x10000000); | 71 | return (void *)(port + 0x10000000); |
