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authorHirokazu Takata <takata@linux-m32r.org>2006-01-06 03:18:43 -0500
committerLinus Torvalds <torvalds@g5.osdl.org>2006-01-06 11:33:44 -0500
commit46ea178b7a5162405bf70954d769165cf2161309 (patch)
treed757c796068a38ffa8c2b793233805c9b0120cde /arch/m32r/kernel/io_m32104ut.c
parent1b5b776aa5730cbda9cba84ba0f8ccd53a775797 (diff)
[PATCH] m32r: Update _port2addr to use NONCACHE_OFFSET
Modify _port2addr*() routines in arch/m32r/kernel/io_*.c to use NONCACHE_OFFSET instead of hard-coding of a constant address. This modification is also required to support an M3A-ZA36 FPGA eva board in case an MMU-less synthesizable m32r core is used. Signed-off-by: Hirokazu Takata <takata@linux-m32r.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/m32r/kernel/io_m32104ut.c')
-rw-r--r--arch/m32r/kernel/io_m32104ut.c24
1 files changed, 12 insertions, 12 deletions
diff --git a/arch/m32r/kernel/io_m32104ut.c b/arch/m32r/kernel/io_m32104ut.c
index 3df4215f1643..d26adab9586c 100644
--- a/arch/m32r/kernel/io_m32104ut.c
+++ b/arch/m32r/kernel/io_m32104ut.c
@@ -32,7 +32,7 @@ extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int);
32 32
33static inline void *_port2addr(unsigned long port) 33static inline void *_port2addr(unsigned long port)
34{ 34{
35 return (void *)(port + NONCACHE_OFFSET); 35 return (void *)(port | NONCACHE_OFFSET);
36} 36}
37 37
38#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) 38#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
@@ -41,15 +41,15 @@ static inline void *__port2addr_ata(unsigned long port)
41 static int dummy_reg; 41 static int dummy_reg;
42 42
43 switch (port) { 43 switch (port) {
44 case 0x1f0: return (void *)0xac002000; 44 case 0x1f0: return (void *)(0x0c002000 | NONCACHE_OFFSET);
45 case 0x1f1: return (void *)0xac012800; 45 case 0x1f1: return (void *)(0x0c012800 | NONCACHE_OFFSET);
46 case 0x1f2: return (void *)0xac012002; 46 case 0x1f2: return (void *)(0x0c012002 | NONCACHE_OFFSET);
47 case 0x1f3: return (void *)0xac012802; 47 case 0x1f3: return (void *)(0x0c012802 | NONCACHE_OFFSET);
48 case 0x1f4: return (void *)0xac012004; 48 case 0x1f4: return (void *)(0x0c012004 | NONCACHE_OFFSET);
49 case 0x1f5: return (void *)0xac012804; 49 case 0x1f5: return (void *)(0x0c012804 | NONCACHE_OFFSET);
50 case 0x1f6: return (void *)0xac012006; 50 case 0x1f6: return (void *)(0x0c012006 | NONCACHE_OFFSET);
51 case 0x1f7: return (void *)0xac012806; 51 case 0x1f7: return (void *)(0x0c012806 | NONCACHE_OFFSET);
52 case 0x3f6: return (void *)0xac01200e; 52 case 0x3f6: return (void *)(0x0c01200e | NONCACHE_OFFSET);
53 default: return (void *)&dummy_reg; 53 default: return (void *)&dummy_reg;
54 } 54 }
55} 55}
@@ -60,8 +60,8 @@ static inline void *__port2addr_ata(unsigned long port)
60 * from 0x01000000 to 0x01ffffff on physical address. 60 * from 0x01000000 to 0x01ffffff on physical address.
61 * The base address of LAN controller(LAN91C111) is 0x300. 61 * The base address of LAN controller(LAN91C111) is 0x300.
62 */ 62 */
63#define LAN_IOSTART 0x300 63#define LAN_IOSTART (0x300 | NONCACHE_OFFSET)
64#define LAN_IOEND 0x320 64#define LAN_IOEND (0x320 | NONCACHE_OFFSET)
65static inline void *_port2addr_ne(unsigned long port) 65static inline void *_port2addr_ne(unsigned long port)
66{ 66{
67 return (void *)(port + NONCACHE_OFFSET + 0x01000000); 67 return (void *)(port + NONCACHE_OFFSET + 0x01000000);