diff options
author | David Howells <dhowells@redhat.com> | 2012-03-28 13:30:02 -0400 |
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committer | David Howells <dhowells@redhat.com> | 2012-03-28 13:30:02 -0400 |
commit | c9034c3a1d67486284b3b569595a4bd377aaf8cc (patch) | |
tree | 3411246adeaf5e7fdaa8a110a92d4afa0f87078c /arch/m32r/include/asm/dcache_clear.h | |
parent | c140d87995b68b428f70635c2e4071e4e8b3256e (diff) |
Disintegrate asm/system.h for M32R
Disintegrate asm/system.h for M32R.
Signed-off-by: David Howells <dhowells@redhat.com>
cc: linux-m32r@ml.linux-m32r.org
Diffstat (limited to 'arch/m32r/include/asm/dcache_clear.h')
-rw-r--r-- | arch/m32r/include/asm/dcache_clear.h | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/arch/m32r/include/asm/dcache_clear.h b/arch/m32r/include/asm/dcache_clear.h new file mode 100644 index 000000000000..a0ae06c2e9e7 --- /dev/null +++ b/arch/m32r/include/asm/dcache_clear.h | |||
@@ -0,0 +1,29 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2001 Hiroyuki Kondo, Hirokazu Takata, and Hitoshi Yamamoto | ||
7 | * Copyright (C) 2004, 2006 Hirokazu Takata <takata at linux-m32r.org> | ||
8 | */ | ||
9 | #ifndef _ASM_M32R_DCACHE_CLEAR_H | ||
10 | #define _ASM_M32R_DCACHE_CLEAR_H | ||
11 | |||
12 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
13 | #define DCACHE_CLEAR(reg0, reg1, addr) \ | ||
14 | "seth "reg1", #high(dcache_dummy); \n\t" \ | ||
15 | "or3 "reg1", "reg1", #low(dcache_dummy); \n\t" \ | ||
16 | "lock "reg0", @"reg1"; \n\t" \ | ||
17 | "add3 "reg0", "addr", #0x1000; \n\t" \ | ||
18 | "ld "reg0", @"reg0"; \n\t" \ | ||
19 | "add3 "reg0", "addr", #0x2000; \n\t" \ | ||
20 | "ld "reg0", @"reg0"; \n\t" \ | ||
21 | "unlock "reg0", @"reg1"; \n\t" | ||
22 | /* FIXME: This workaround code cannot handle kernel modules | ||
23 | * correctly under SMP environment. | ||
24 | */ | ||
25 | #else /* CONFIG_CHIP_M32700_TS1 */ | ||
26 | #define DCACHE_CLEAR(reg0, reg1, addr) | ||
27 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
28 | |||
29 | #endif /* _ASM_M32R_DCACHE_CLEAR_H */ | ||