[PATCH] m32r: Support M32104UT target platform

This patch is for supporting a new target platform, Renesas M32104UT
evaluation board.

The M32104UT is an eval board based on an uT-Engine specification.  This board
has an MMU-less M32R family processor, M32104.
http://www-wa0.personal-media.co.jp/pmc/archive/te/te_m32104_e.pdf

This board is one of the most popular M32R platform, so we have ported
Linux/M32R to it.

Signed-off-by: Naoto Sugai <Sugai.Naoto@ak.MitsubishiElectric.co.jp>
Signed-off-by: Hirokazu Takata <takata@linux-m32r.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

2 files changed, 14 insertions, 0 deletions

diff --git a/arch/m32r/boot/compressed/head.S b/arch/m32r/boot/compressed/head.S
index 07cfd6ad1ae4..234d8b1e0ac1 100644
--- a/arch/m32r/boot/compressed/head.S
+++ b/arch/m32r/boot/compressed/head.S
@@ -143,6 +143,11 @@ startup:
         ldi     r0, -2
         ldi     r1, 0x0100      ; invalidate
         stb     r1, @r0
+#elif defined(CONFIG_CHIP_M32104)
+        /* Cache flush */
+        ldi     r0, -2
+        ldi     r1, 0x0700      ; invalidate i-cache, copy back d-cache
+        sth     r1, @r0
 #else
 #error "put your cache flush function, please"
 #endif
diff --git a/arch/m32r/boot/setup.S b/arch/m32r/boot/setup.S
index 5d256434b4ad..742669fab8a9 100644
--- a/arch/m32r/boot/setup.S
+++ b/arch/m32r/boot/setup.S
@@ -80,6 +80,10 @@ ENTRY(boot)
         ldi     r1, #0x101              ; cache on (with invalidation)
 ;       ldi     r1, #0x00               ; cache off
         st      r1, @r0
+#elif defined(CONFIG_CHIP_M32104)
+        ldi     r0, #-4              ;LDIMM     (r0, M32R_MCCR)
+        ldi     r1, #0x703              ; cache on (with invalidation)
+        st      r1, @r0
 #else
 #error unknown chip configuration
 #endif
@@ -115,10 +119,15 @@ mmu_on:
         st      r1, @(MATM_offset,r0)           ; Set MATM (T bit ON)
         ld      r0, @(MATM_offset,r0)           ; Check
 #else
+#if defined(CONFIG_CHIP_M32700)
         seth    r0,#high(M32R_MCDCAR)
         or3     r0,r0,#low(M32R_MCDCAR)
         ld24    r1,#0x8080
         st      r1,@r0
+#elif defined(CONFIG_CHIP_M32104)
+        LDIMM   (r2, eit_vector)                ; set EVB(cr5)
+        mvtc    r2, cr5
+#endif
 #endif  /* CONFIG_MMU */
         jmp     r13
         nop