aboutsummaryrefslogtreecommitdiffstats
path: root/arch/ia64
diff options
context:
space:
mode:
authorTony Luck <tony.luck@intel.com>2010-10-07 19:23:34 -0400
committerTony Luck <tony.luck@intel.com>2010-10-07 19:23:34 -0400
commitc75f2aa13f5b268aba369b5dc566088b5194377c (patch)
treebf8fc2834f65aa22be1ab8e2c574bd598185c27c /arch/ia64
parent4de0a7594823d04361281e34e59f2c1108899f3e (diff)
[IA64] Cannot use register_percpu_irq() from ia64_mca_init()
This is called before early_irq_init() which will clobber any registrations made too early. Move the calls to ia64_mca_late_init(). Signed-off-by: Tony Luck <tomy.luck@intel.com>
Diffstat (limited to 'arch/ia64')
-rw-r--r--arch/ia64/kernel/mca.c38
1 files changed, 19 insertions, 19 deletions
diff --git a/arch/ia64/kernel/mca.c b/arch/ia64/kernel/mca.c
index a0220dc5ff42..1753f6a30d55 100644
--- a/arch/ia64/kernel/mca.c
+++ b/arch/ia64/kernel/mca.c
@@ -2055,25 +2055,6 @@ ia64_mca_init(void)
2055 2055
2056 IA64_MCA_DEBUG("%s: registered OS INIT handler with SAL\n", __func__); 2056 IA64_MCA_DEBUG("%s: registered OS INIT handler with SAL\n", __func__);
2057 2057
2058 /*
2059 * Configure the CMCI/P vector and handler. Interrupts for CMC are
2060 * per-processor, so AP CMC interrupts are setup in smp_callin() (smpboot.c).
2061 */
2062 register_percpu_irq(IA64_CMC_VECTOR, &cmci_irqaction);
2063 register_percpu_irq(IA64_CMCP_VECTOR, &cmcp_irqaction);
2064 ia64_mca_cmc_vector_setup(); /* Setup vector on BSP */
2065
2066 /* Setup the MCA rendezvous interrupt vector */
2067 register_percpu_irq(IA64_MCA_RENDEZ_VECTOR, &mca_rdzv_irqaction);
2068
2069 /* Setup the MCA wakeup interrupt vector */
2070 register_percpu_irq(IA64_MCA_WAKEUP_VECTOR, &mca_wkup_irqaction);
2071
2072#ifdef CONFIG_ACPI
2073 /* Setup the CPEI/P handler */
2074 register_percpu_irq(IA64_CPEP_VECTOR, &mca_cpep_irqaction);
2075#endif
2076
2077 /* Initialize the areas set aside by the OS to buffer the 2058 /* Initialize the areas set aside by the OS to buffer the
2078 * platform/processor error states for MCA/INIT/CMC 2059 * platform/processor error states for MCA/INIT/CMC
2079 * handling. 2060 * handling.
@@ -2103,6 +2084,25 @@ ia64_mca_late_init(void)
2103 if (!mca_init) 2084 if (!mca_init)
2104 return 0; 2085 return 0;
2105 2086
2087 /*
2088 * Configure the CMCI/P vector and handler. Interrupts for CMC are
2089 * per-processor, so AP CMC interrupts are setup in smp_callin() (smpboot.c).
2090 */
2091 register_percpu_irq(IA64_CMC_VECTOR, &cmci_irqaction);
2092 register_percpu_irq(IA64_CMCP_VECTOR, &cmcp_irqaction);
2093 ia64_mca_cmc_vector_setup(); /* Setup vector on BSP */
2094
2095 /* Setup the MCA rendezvous interrupt vector */
2096 register_percpu_irq(IA64_MCA_RENDEZ_VECTOR, &mca_rdzv_irqaction);
2097
2098 /* Setup the MCA wakeup interrupt vector */
2099 register_percpu_irq(IA64_MCA_WAKEUP_VECTOR, &mca_wkup_irqaction);
2100
2101#ifdef CONFIG_ACPI
2102 /* Setup the CPEI/P handler */
2103 register_percpu_irq(IA64_CPEP_VECTOR, &mca_cpep_irqaction);
2104#endif
2105
2106 register_hotcpu_notifier(&mca_cpu_notifier); 2106 register_hotcpu_notifier(&mca_cpu_notifier);
2107 2107
2108 /* Setup the CMCI/P vector and handler */ 2108 /* Setup the CMCI/P vector and handler */