diff options
author | Thomas Gleixner <tglx@linutronix.de> | 2011-02-04 14:31:21 -0500 |
---|---|---|
committer | Thomas Gleixner <tglx@linutronix.de> | 2011-03-29 08:48:02 -0400 |
commit | 8fac171f72efb2e62f34ffeca22820823e60cdb0 (patch) | |
tree | 0413f74f0ec7b0eacab5e62da4c9bff4909b9142 /arch/ia64 | |
parent | 5c217b60fed39ed2ac6a2e8b788df4a74fa68878 (diff) |
ia64: Convert iosapic to new irq_chip functions
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/ia64')
-rw-r--r-- | arch/ia64/kernel/iosapic.c | 70 |
1 files changed, 38 insertions, 32 deletions
diff --git a/arch/ia64/kernel/iosapic.c b/arch/ia64/kernel/iosapic.c index d21f9af8170e..e3954556eedb 100644 --- a/arch/ia64/kernel/iosapic.c +++ b/arch/ia64/kernel/iosapic.c | |||
@@ -257,7 +257,7 @@ set_rte (unsigned int gsi, unsigned int irq, unsigned int dest, int mask) | |||
257 | } | 257 | } |
258 | 258 | ||
259 | static void | 259 | static void |
260 | nop (unsigned int irq) | 260 | nop (struct irq_data *data) |
261 | { | 261 | { |
262 | /* do nothing... */ | 262 | /* do nothing... */ |
263 | } | 263 | } |
@@ -287,8 +287,9 @@ kexec_disable_iosapic(void) | |||
287 | #endif | 287 | #endif |
288 | 288 | ||
289 | static void | 289 | static void |
290 | mask_irq (unsigned int irq) | 290 | mask_irq (struct irq_data *data) |
291 | { | 291 | { |
292 | unsigned int irq = data->irq; | ||
292 | u32 low32; | 293 | u32 low32; |
293 | int rte_index; | 294 | int rte_index; |
294 | struct iosapic_rte_info *rte; | 295 | struct iosapic_rte_info *rte; |
@@ -305,8 +306,9 @@ mask_irq (unsigned int irq) | |||
305 | } | 306 | } |
306 | 307 | ||
307 | static void | 308 | static void |
308 | unmask_irq (unsigned int irq) | 309 | unmask_irq (struct irq_data *data) |
309 | { | 310 | { |
311 | unsigned int irq = data->irq; | ||
310 | u32 low32; | 312 | u32 low32; |
311 | int rte_index; | 313 | int rte_index; |
312 | struct iosapic_rte_info *rte; | 314 | struct iosapic_rte_info *rte; |
@@ -323,9 +325,11 @@ unmask_irq (unsigned int irq) | |||
323 | 325 | ||
324 | 326 | ||
325 | static int | 327 | static int |
326 | iosapic_set_affinity(unsigned int irq, const struct cpumask *mask) | 328 | iosapic_set_affinity(struct irq_data *data, const struct cpumask *mask, |
329 | bool force) | ||
327 | { | 330 | { |
328 | #ifdef CONFIG_SMP | 331 | #ifdef CONFIG_SMP |
332 | unsigned int irq = data->irq; | ||
329 | u32 high32, low32; | 333 | u32 high32, low32; |
330 | int cpu, dest, rte_index; | 334 | int cpu, dest, rte_index; |
331 | int redir = (irq & IA64_IRQ_REDIRECTED) ? 1 : 0; | 335 | int redir = (irq & IA64_IRQ_REDIRECTED) ? 1 : 0; |
@@ -379,15 +383,16 @@ iosapic_set_affinity(unsigned int irq, const struct cpumask *mask) | |||
379 | */ | 383 | */ |
380 | 384 | ||
381 | static unsigned int | 385 | static unsigned int |
382 | iosapic_startup_level_irq (unsigned int irq) | 386 | iosapic_startup_level_irq (struct irq_data *data) |
383 | { | 387 | { |
384 | unmask_irq(irq); | 388 | unmask_irq(data); |
385 | return 0; | 389 | return 0; |
386 | } | 390 | } |
387 | 391 | ||
388 | static void | 392 | static void |
389 | iosapic_unmask_level_irq (unsigned int irq) | 393 | iosapic_unmask_level_irq (struct irq_data *data) |
390 | { | 394 | { |
395 | unsigned int irq = data->irq; | ||
391 | ia64_vector vec = irq_to_vector(irq); | 396 | ia64_vector vec = irq_to_vector(irq); |
392 | struct iosapic_rte_info *rte; | 397 | struct iosapic_rte_info *rte; |
393 | int do_unmask_irq = 0; | 398 | int do_unmask_irq = 0; |
@@ -395,16 +400,16 @@ iosapic_unmask_level_irq (unsigned int irq) | |||
395 | irq_complete_move(irq); | 400 | irq_complete_move(irq); |
396 | if (unlikely(irq_desc[irq].status & IRQ_MOVE_PENDING)) { | 401 | if (unlikely(irq_desc[irq].status & IRQ_MOVE_PENDING)) { |
397 | do_unmask_irq = 1; | 402 | do_unmask_irq = 1; |
398 | mask_irq(irq); | 403 | mask_irq(data); |
399 | } else | 404 | } else |
400 | unmask_irq(irq); | 405 | unmask_irq(data); |
401 | 406 | ||
402 | list_for_each_entry(rte, &iosapic_intr_info[irq].rtes, rte_list) | 407 | list_for_each_entry(rte, &iosapic_intr_info[irq].rtes, rte_list) |
403 | iosapic_eoi(rte->iosapic->addr, vec); | 408 | iosapic_eoi(rte->iosapic->addr, vec); |
404 | 409 | ||
405 | if (unlikely(do_unmask_irq)) { | 410 | if (unlikely(do_unmask_irq)) { |
406 | move_masked_irq(irq); | 411 | move_masked_irq(irq); |
407 | unmask_irq(irq); | 412 | unmask_irq(data); |
408 | } | 413 | } |
409 | } | 414 | } |
410 | 415 | ||
@@ -414,15 +419,15 @@ iosapic_unmask_level_irq (unsigned int irq) | |||
414 | #define iosapic_ack_level_irq nop | 419 | #define iosapic_ack_level_irq nop |
415 | 420 | ||
416 | static struct irq_chip irq_type_iosapic_level = { | 421 | static struct irq_chip irq_type_iosapic_level = { |
417 | .name = "IO-SAPIC-level", | 422 | .name = "IO-SAPIC-level", |
418 | .startup = iosapic_startup_level_irq, | 423 | .irq_startup = iosapic_startup_level_irq, |
419 | .shutdown = iosapic_shutdown_level_irq, | 424 | .irq_shutdown = iosapic_shutdown_level_irq, |
420 | .enable = iosapic_enable_level_irq, | 425 | .irq_enable = iosapic_enable_level_irq, |
421 | .disable = iosapic_disable_level_irq, | 426 | .irq_disable = iosapic_disable_level_irq, |
422 | .ack = iosapic_ack_level_irq, | 427 | .irq_ack = iosapic_ack_level_irq, |
423 | .mask = mask_irq, | 428 | .irq_mask = mask_irq, |
424 | .unmask = iosapic_unmask_level_irq, | 429 | .irq_unmask = iosapic_unmask_level_irq, |
425 | .set_affinity = iosapic_set_affinity | 430 | .irq_set_affinity = iosapic_set_affinity |
426 | }; | 431 | }; |
427 | 432 | ||
428 | /* | 433 | /* |
@@ -430,9 +435,9 @@ static struct irq_chip irq_type_iosapic_level = { | |||
430 | */ | 435 | */ |
431 | 436 | ||
432 | static unsigned int | 437 | static unsigned int |
433 | iosapic_startup_edge_irq (unsigned int irq) | 438 | iosapic_startup_edge_irq (struct irq_data *data) |
434 | { | 439 | { |
435 | unmask_irq(irq); | 440 | unmask_irq(data); |
436 | /* | 441 | /* |
437 | * IOSAPIC simply drops interrupts pended while the | 442 | * IOSAPIC simply drops interrupts pended while the |
438 | * corresponding pin was masked, so we can't know if an | 443 | * corresponding pin was masked, so we can't know if an |
@@ -442,8 +447,9 @@ iosapic_startup_edge_irq (unsigned int irq) | |||
442 | } | 447 | } |
443 | 448 | ||
444 | static void | 449 | static void |
445 | iosapic_ack_edge_irq (unsigned int irq) | 450 | iosapic_ack_edge_irq (struct irq_data *data) |
446 | { | 451 | { |
452 | unsigned int irq = data->irq; | ||
447 | struct irq_desc *idesc = irq_desc + irq; | 453 | struct irq_desc *idesc = irq_desc + irq; |
448 | 454 | ||
449 | irq_complete_move(irq); | 455 | irq_complete_move(irq); |
@@ -455,22 +461,22 @@ iosapic_ack_edge_irq (unsigned int irq) | |||
455 | */ | 461 | */ |
456 | if ((idesc->status & (IRQ_PENDING|IRQ_DISABLED)) == | 462 | if ((idesc->status & (IRQ_PENDING|IRQ_DISABLED)) == |
457 | (IRQ_PENDING|IRQ_DISABLED)) | 463 | (IRQ_PENDING|IRQ_DISABLED)) |
458 | mask_irq(irq); | 464 | mask_irq(data); |
459 | } | 465 | } |
460 | 466 | ||
461 | #define iosapic_enable_edge_irq unmask_irq | 467 | #define iosapic_enable_edge_irq unmask_irq |
462 | #define iosapic_disable_edge_irq nop | 468 | #define iosapic_disable_edge_irq nop |
463 | 469 | ||
464 | static struct irq_chip irq_type_iosapic_edge = { | 470 | static struct irq_chip irq_type_iosapic_edge = { |
465 | .name = "IO-SAPIC-edge", | 471 | .name = "IO-SAPIC-edge", |
466 | .startup = iosapic_startup_edge_irq, | 472 | .irq_startup = iosapic_startup_edge_irq, |
467 | .shutdown = iosapic_disable_edge_irq, | 473 | .irq_shutdown = iosapic_disable_edge_irq, |
468 | .enable = iosapic_enable_edge_irq, | 474 | .irq_enable = iosapic_enable_edge_irq, |
469 | .disable = iosapic_disable_edge_irq, | 475 | .irq_disable = iosapic_disable_edge_irq, |
470 | .ack = iosapic_ack_edge_irq, | 476 | .irq_ack = iosapic_ack_edge_irq, |
471 | .mask = mask_irq, | 477 | .irq_mask = mask_irq, |
472 | .unmask = unmask_irq, | 478 | .irq_unmask = unmask_irq, |
473 | .set_affinity = iosapic_set_affinity | 479 | .irq_set_affinity = iosapic_set_affinity |
474 | }; | 480 | }; |
475 | 481 | ||
476 | static unsigned int | 482 | static unsigned int |