diff options
author | Russ Anderson <rja@sgi.com> | 2006-12-07 14:06:35 -0500 |
---|---|---|
committer | Tony Luck <tony.luck@intel.com> | 2006-12-07 14:06:35 -0500 |
commit | 895309ff6f22a9d107e007521e44aac4400b365d (patch) | |
tree | c15bb4563f8216ebd15eb3f156cab61b2b8bf208 /arch/ia64 | |
parent | 6533bdedac9ae2049ae77ebd7c28c65af3619de0 (diff) |
[IA64] Update processor_info features
Add the printing of additional processor features to proc_features.
Based on Rev 2.2 of Volume 2 of "Intel Itanium Architecture Software
Developer's Manual" (January 2006) fields (pages 2:430-2:432).
This patch gets the features back in sync with the spec.
Sample output before:
--------------------------------------------------------------
cobra:~ # cat /proc/pal/cpu0/processor_info
XIP,XPSR,XFS implemented : On NoCtrl
XR1-XR3 implemented : On NoCtrl
Disable dynamic predicate prediction : NotImpl
Disable processor physical number : NotImpl
Disable dynamic data cache prefetch : NotImpl
Disable dynamic inst cache prefetch : NotImpl
Disable dynamic branch prediction : NotImpl
Disable BINIT on processor time-out : On Ctrl
Disable dynamic power management (DPM) : NotImpl
Disable coherency : NotImpl
Disable cache : NotImpl
Enable CMCI promotion : Off Ctrl
Enable MCA to BINIT promotion : Off Ctrl
Enable MCA promotion : NotImpl
Enable BERR promotion : NotImpl
cobra:~ #
--------------------------------------------------------------
Sample output after:
--------------------------------------------------------------
cobra:~ # cat /proc/pal/cpu0/processor_info
Unimplemented instruction address fault : NotImpl
INIT, PMI, and LINT pins : NotImpl
Simple unimplimented instr addresses : On NoCtrl
Variable P-state performance : NotImpl
Virtual machine features implemeted : On NoCtrl
XIP,XPSR,XFS implemented : On NoCtrl
XR1-XR3 implemented : On NoCtrl
Disable dynamic predicate prediction : NotImpl
Disable processor physical number : NotImpl
Disable dynamic data cache prefetch : NotImpl
Disable dynamic inst cache prefetch : NotImpl
Disable dynamic branch prediction : NotImpl
Disable P-states : Off Ctrl
Enable MCA on Data Poisoning : Off Ctrl
Enable vmsw instruction : On Ctrl
Enable extern environmental notification : NotImpl
Disable BINIT on processor time-out : On Ctrl
Disable dynamic power management (DPM) : NotImpl
Disable coherency : NotImpl
Disable cache : NotImpl
Enable CMCI promotion : Off Ctrl
Enable MCA to BINIT promotion : Off Ctrl
Enable MCA promotion : NotImpl
Enable BERR promotion : NotImpl
cobra:~ #
--------------------------------------------------------------
Signed-off-by: Russ Anderson (rja@sgi.com)
Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/ia64')
-rw-r--r-- | arch/ia64/kernel/palinfo.c | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/arch/ia64/kernel/palinfo.c b/arch/ia64/kernel/palinfo.c index 0b546e2b36ac..ca1884ed5a06 100644 --- a/arch/ia64/kernel/palinfo.c +++ b/arch/ia64/kernel/palinfo.c | |||
@@ -16,6 +16,7 @@ | |||
16 | * 02/05/2001 S.Eranian fixed module support | 16 | * 02/05/2001 S.Eranian fixed module support |
17 | * 10/23/2001 S.Eranian updated pal_perf_mon_info bug fixes | 17 | * 10/23/2001 S.Eranian updated pal_perf_mon_info bug fixes |
18 | * 03/24/2004 Ashok Raj updated to work with CPU Hotplug | 18 | * 03/24/2004 Ashok Raj updated to work with CPU Hotplug |
19 | * 10/26/2006 Russ Anderson updated processor features to rev 2.2 spec | ||
19 | */ | 20 | */ |
20 | #include <linux/types.h> | 21 | #include <linux/types.h> |
21 | #include <linux/errno.h> | 22 | #include <linux/errno.h> |
@@ -467,7 +468,11 @@ static const char *proc_features[]={ | |||
467 | NULL,NULL,NULL,NULL,NULL,NULL,NULL, NULL,NULL, | 468 | NULL,NULL,NULL,NULL,NULL,NULL,NULL, NULL,NULL, |
468 | NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL, | 469 | NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL, |
469 | NULL,NULL,NULL,NULL,NULL, NULL,NULL,NULL,NULL, | 470 | NULL,NULL,NULL,NULL,NULL, NULL,NULL,NULL,NULL, |
470 | NULL,NULL,NULL,NULL,NULL, | 471 | "Unimplemented instruction address fault", |
472 | "INIT, PMI, and LINT pins", | ||
473 | "Simple unimplemented instr addresses", | ||
474 | "Variable P-state performance", | ||
475 | "Virtual machine features implemented", | ||
471 | "XIP,XPSR,XFS implemented", | 476 | "XIP,XPSR,XFS implemented", |
472 | "XR1-XR3 implemented", | 477 | "XR1-XR3 implemented", |
473 | "Disable dynamic predicate prediction", | 478 | "Disable dynamic predicate prediction", |
@@ -475,7 +480,11 @@ static const char *proc_features[]={ | |||
475 | "Disable dynamic data cache prefetch", | 480 | "Disable dynamic data cache prefetch", |
476 | "Disable dynamic inst cache prefetch", | 481 | "Disable dynamic inst cache prefetch", |
477 | "Disable dynamic branch prediction", | 482 | "Disable dynamic branch prediction", |
478 | NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, | 483 | NULL, NULL, NULL, NULL, |
484 | "Disable P-states", | ||
485 | "Enable MCA on Data Poisoning", | ||
486 | "Enable vmsw instruction", | ||
487 | "Enable extern environmental notification", | ||
479 | "Disable BINIT on processor time-out", | 488 | "Disable BINIT on processor time-out", |
480 | "Disable dynamic power management (DPM)", | 489 | "Disable dynamic power management (DPM)", |
481 | "Disable coherency", | 490 | "Disable coherency", |