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authorThomas Gleixner <tglx@linutronix.de>2011-05-14 06:06:36 -0400
committerThomas Gleixner <tglx@linutronix.de>2011-05-14 06:06:36 -0400
commita18f22a968de17b29f2310cdb7ba69163e65ec15 (patch)
treea7d56d88fad5e444d7661484109758a2f436129e /arch/ia64
parenta1c57e0fec53defe745e64417eacdbd3618c3e66 (diff)
parent798778b8653f64b7b2162ac70eca10367cff6ce8 (diff)
Merge branch 'consolidate-clksrc-i8253' of master.kernel.org:~rmk/linux-2.6-arm into timers/clocksource
Conflicts: arch/ia64/kernel/cyclone.c arch/mips/kernel/i8253.c arch/x86/kernel/i8253.c Reason: Resolve conflicts so further cleanups do not conflict further Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/ia64')
-rw-r--r--arch/ia64/Kconfig5
-rw-r--r--arch/ia64/configs/generic_defconfig1
-rw-r--r--arch/ia64/configs/gensparse_defconfig1
-rw-r--r--arch/ia64/hp/sim/hpsim_irq.c31
-rw-r--r--arch/ia64/hp/sim/simserial.c3
-rw-r--r--arch/ia64/include/asm/acpi.h6
-rw-r--r--arch/ia64/include/asm/bitops.h3
-rw-r--r--arch/ia64/include/asm/dma-mapping.h2
-rw-r--r--arch/ia64/include/asm/futex.h15
-rw-r--r--arch/ia64/include/asm/hw_irq.h3
-rw-r--r--arch/ia64/include/asm/pal.h2
-rw-r--r--arch/ia64/include/asm/perfmon.h2
-rw-r--r--arch/ia64/include/asm/perfmon_default_smpl.h4
-rw-r--r--arch/ia64/include/asm/rwsem.h37
-rw-r--r--arch/ia64/include/asm/sn/bte.h2
-rw-r--r--arch/ia64/include/asm/sn/shub_mmr.h2
-rw-r--r--arch/ia64/include/asm/sn/shubio.h4
-rw-r--r--arch/ia64/include/asm/thread_info.h14
-rw-r--r--arch/ia64/include/asm/types.h3
-rw-r--r--arch/ia64/include/asm/unistd.h6
-rw-r--r--arch/ia64/include/asm/xen/hypercall.h2
-rw-r--r--arch/ia64/kernel/acpi.c23
-rw-r--r--arch/ia64/kernel/crash_dump.c3
-rw-r--r--arch/ia64/kernel/efi.c1
-rw-r--r--arch/ia64/kernel/entry.S4
-rw-r--r--arch/ia64/kernel/iosapic.c119
-rw-r--r--arch/ia64/kernel/irq.c73
-rw-r--r--arch/ia64/kernel/irq_ia64.c10
-rw-r--r--arch/ia64/kernel/irq_lsapic.c23
-rw-r--r--arch/ia64/kernel/mca.c9
-rw-r--r--arch/ia64/kernel/msi_ia64.c49
-rw-r--r--arch/ia64/kernel/perfmon_default_smpl.c2
-rw-r--r--arch/ia64/kernel/setup.c18
-rw-r--r--arch/ia64/kernel/smpboot.c16
-rw-r--r--arch/ia64/kernel/time.c19
-rw-r--r--arch/ia64/kernel/topology.c2
-rw-r--r--arch/ia64/kernel/vmlinux.lds.S2
-rw-r--r--arch/ia64/kvm/Makefile4
-rw-r--r--arch/ia64/kvm/kvm-ia64.c2
-rw-r--r--arch/ia64/kvm/process.c2
-rw-r--r--arch/ia64/lib/do_csum.S2
-rw-r--r--arch/ia64/mm/contig.c2
-rw-r--r--arch/ia64/mm/discontig.c2
-rw-r--r--arch/ia64/sn/kernel/Makefile2
-rw-r--r--arch/ia64/sn/kernel/irq.c101
-rw-r--r--arch/ia64/sn/kernel/msi_sn.c32
-rw-r--r--arch/ia64/sn/kernel/setup.c2
-rw-r--r--arch/ia64/sn/kernel/sn2/Makefile2
-rw-r--r--arch/ia64/sn/kernel/sn2/sn_proc_fs.c42
-rw-r--r--arch/ia64/sn/pci/Makefile2
-rw-r--r--arch/ia64/sn/pci/pcibr/Makefile2
-rw-r--r--arch/ia64/sn/pci/pcibr/pcibr_dma.c2
-rw-r--r--arch/ia64/sn/pci/tioca_provider.c2
-rw-r--r--arch/ia64/uv/kernel/Makefile2
-rw-r--r--arch/ia64/xen/irq_xen.c4
-rw-r--r--arch/ia64/xen/suspend.c9
-rw-r--r--arch/ia64/xen/time.c13
57 files changed, 280 insertions, 472 deletions
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig
index fcf3b437a2d9..e5cc56ae6ce3 100644
--- a/arch/ia64/Kconfig
+++ b/arch/ia64/Kconfig
@@ -26,6 +26,7 @@ config IA64
26 select GENERIC_IRQ_PROBE 26 select GENERIC_IRQ_PROBE
27 select GENERIC_PENDING_IRQ if SMP 27 select GENERIC_PENDING_IRQ if SMP
28 select IRQ_PER_CPU 28 select IRQ_PER_CPU
29 select GENERIC_IRQ_SHOW
29 default y 30 default y
30 help 31 help
31 The Itanium Processor Family is Intel's 64-bit successor to 32 The Itanium Processor Family is Intel's 64-bit successor to
@@ -413,11 +414,11 @@ config PERMIT_BSP_REMOVE
413 support. 414 support.
414 415
415config FORCE_CPEI_RETARGET 416config FORCE_CPEI_RETARGET
416 bool "Force assumption that CPEI can be re-targetted" 417 bool "Force assumption that CPEI can be re-targeted"
417 depends on PERMIT_BSP_REMOVE 418 depends on PERMIT_BSP_REMOVE
418 default n 419 default n
419 ---help--- 420 ---help---
420 Say Y if you need to force the assumption that CPEI can be re-targetted to 421 Say Y if you need to force the assumption that CPEI can be re-targeted to
421 any cpu in the system. This hint is available via ACPI 3.0 specifications. 422 any cpu in the system. This hint is available via ACPI 3.0 specifications.
422 Tiger4 systems are capable of re-directing CPEI to any CPU other than BSP. 423 Tiger4 systems are capable of re-directing CPEI to any CPU other than BSP.
423 This option it useful to enable this feature on older BIOS's as well. 424 This option it useful to enable this feature on older BIOS's as well.
diff --git a/arch/ia64/configs/generic_defconfig b/arch/ia64/configs/generic_defconfig
index 3ded8fe62759..1d7bca0a396d 100644
--- a/arch/ia64/configs/generic_defconfig
+++ b/arch/ia64/configs/generic_defconfig
@@ -233,3 +233,4 @@ CONFIG_CRYPTO_PCBC=m
233CONFIG_CRYPTO_MD5=y 233CONFIG_CRYPTO_MD5=y
234# CONFIG_CRYPTO_ANSI_CPRNG is not set 234# CONFIG_CRYPTO_ANSI_CPRNG is not set
235CONFIG_CRC_T10DIF=y 235CONFIG_CRC_T10DIF=y
236CONFIG_MISC_DEVICES=y
diff --git a/arch/ia64/configs/gensparse_defconfig b/arch/ia64/configs/gensparse_defconfig
index 3a98b2dd58ac..b11fa880e4b6 100644
--- a/arch/ia64/configs/gensparse_defconfig
+++ b/arch/ia64/configs/gensparse_defconfig
@@ -208,3 +208,4 @@ CONFIG_MAGIC_SYSRQ=y
208CONFIG_DEBUG_KERNEL=y 208CONFIG_DEBUG_KERNEL=y
209CONFIG_DEBUG_MUTEXES=y 209CONFIG_DEBUG_MUTEXES=y
210CONFIG_CRYPTO_MD5=y 210CONFIG_CRYPTO_MD5=y
211CONFIG_MISC_DEVICES=y
diff --git a/arch/ia64/hp/sim/hpsim_irq.c b/arch/ia64/hp/sim/hpsim_irq.c
index b272261d77cc..4bd9a63260ee 100644
--- a/arch/ia64/hp/sim/hpsim_irq.c
+++ b/arch/ia64/hp/sim/hpsim_irq.c
@@ -11,42 +11,41 @@
11#include <linux/irq.h> 11#include <linux/irq.h>
12 12
13static unsigned int 13static unsigned int
14hpsim_irq_startup (unsigned int irq) 14hpsim_irq_startup(struct irq_data *data)
15{ 15{
16 return 0; 16 return 0;
17} 17}
18 18
19static void 19static void
20hpsim_irq_noop (unsigned int irq) 20hpsim_irq_noop(struct irq_data *data)
21{ 21{
22} 22}
23 23
24static int 24static int
25hpsim_set_affinity_noop(unsigned int a, const struct cpumask *b) 25hpsim_set_affinity_noop(struct irq_data *d, const struct cpumask *b, bool f)
26{ 26{
27 return 0; 27 return 0;
28} 28}
29 29
30static struct irq_chip irq_type_hp_sim = { 30static struct irq_chip irq_type_hp_sim = {
31 .name = "hpsim", 31 .name = "hpsim",
32 .startup = hpsim_irq_startup, 32 .irq_startup = hpsim_irq_startup,
33 .shutdown = hpsim_irq_noop, 33 .irq_shutdown = hpsim_irq_noop,
34 .enable = hpsim_irq_noop, 34 .irq_enable = hpsim_irq_noop,
35 .disable = hpsim_irq_noop, 35 .irq_disable = hpsim_irq_noop,
36 .ack = hpsim_irq_noop, 36 .irq_ack = hpsim_irq_noop,
37 .end = hpsim_irq_noop, 37 .irq_set_affinity = hpsim_set_affinity_noop,
38 .set_affinity = hpsim_set_affinity_noop,
39}; 38};
40 39
41void __init 40void __init
42hpsim_irq_init (void) 41hpsim_irq_init (void)
43{ 42{
44 struct irq_desc *idesc;
45 int i; 43 int i;
46 44
47 for (i = 0; i < NR_IRQS; ++i) { 45 for_each_active_irq(i) {
48 idesc = irq_desc + i; 46 struct irq_chip *chip = irq_get_chip(i);
49 if (idesc->chip == &no_irq_chip) 47
50 idesc->chip = &irq_type_hp_sim; 48 if (chip == &no_irq_chip)
49 irq_set_chip(i, &irq_type_hp_sim);
51 } 50 }
52} 51}
diff --git a/arch/ia64/hp/sim/simserial.c b/arch/ia64/hp/sim/simserial.c
index 13633da0d3de..bff0824cf8a4 100644
--- a/arch/ia64/hp/sim/simserial.c
+++ b/arch/ia64/hp/sim/simserial.c
@@ -390,8 +390,7 @@ static void rs_unthrottle(struct tty_struct * tty)
390} 390}
391 391
392 392
393static int rs_ioctl(struct tty_struct *tty, struct file * file, 393static int rs_ioctl(struct tty_struct *tty, unsigned int cmd, unsigned long arg)
394 unsigned int cmd, unsigned long arg)
395{ 394{
396 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) && 395 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
397 (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGSTRUCT) && 396 (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGSTRUCT) &&
diff --git a/arch/ia64/include/asm/acpi.h b/arch/ia64/include/asm/acpi.h
index 837dc82a013e..a06dfb13d518 100644
--- a/arch/ia64/include/asm/acpi.h
+++ b/arch/ia64/include/asm/acpi.h
@@ -128,9 +128,9 @@ static inline const char *acpi_get_sysname (void)
128int acpi_request_vector (u32 int_type); 128int acpi_request_vector (u32 int_type);
129int acpi_gsi_to_irq (u32 gsi, unsigned int *irq); 129int acpi_gsi_to_irq (u32 gsi, unsigned int *irq);
130 130
131/* routines for saving/restoring kernel state */ 131/* Low-level suspend routine. */
132extern int acpi_save_state_mem(void); 132extern int acpi_suspend_lowlevel(void);
133extern void acpi_restore_state_mem(void); 133
134extern unsigned long acpi_wakeup_address; 134extern unsigned long acpi_wakeup_address;
135 135
136/* 136/*
diff --git a/arch/ia64/include/asm/bitops.h b/arch/ia64/include/asm/bitops.h
index 9da3df6f1a52..b76f7e009218 100644
--- a/arch/ia64/include/asm/bitops.h
+++ b/arch/ia64/include/asm/bitops.h
@@ -456,12 +456,11 @@ static __inline__ unsigned long __arch_hweight64(unsigned long x)
456 456
457#ifdef __KERNEL__ 457#ifdef __KERNEL__
458 458
459#include <asm-generic/bitops/ext2-non-atomic.h> 459#include <asm-generic/bitops/le.h>
460 460
461#define ext2_set_bit_atomic(l,n,a) test_and_set_bit(n,a) 461#define ext2_set_bit_atomic(l,n,a) test_and_set_bit(n,a)
462#define ext2_clear_bit_atomic(l,n,a) test_and_clear_bit(n,a) 462#define ext2_clear_bit_atomic(l,n,a) test_and_clear_bit(n,a)
463 463
464#include <asm-generic/bitops/minix.h>
465#include <asm-generic/bitops/sched.h> 464#include <asm-generic/bitops/sched.h>
466 465
467#endif /* __KERNEL__ */ 466#endif /* __KERNEL__ */
diff --git a/arch/ia64/include/asm/dma-mapping.h b/arch/ia64/include/asm/dma-mapping.h
index a2e7368a0150..4336d080b241 100644
--- a/arch/ia64/include/asm/dma-mapping.h
+++ b/arch/ia64/include/asm/dma-mapping.h
@@ -12,6 +12,8 @@
12 12
13#define ARCH_HAS_DMA_GET_REQUIRED_MASK 13#define ARCH_HAS_DMA_GET_REQUIRED_MASK
14 14
15#define DMA_ERROR_CODE 0
16
15extern struct dma_map_ops *dma_ops; 17extern struct dma_map_ops *dma_ops;
16extern struct ia64_machine_vector ia64_mv; 18extern struct ia64_machine_vector ia64_mv;
17extern void set_iommu_machvec(void); 19extern void set_iommu_machvec(void);
diff --git a/arch/ia64/include/asm/futex.h b/arch/ia64/include/asm/futex.h
index c7f0f062239c..8428525ddb22 100644
--- a/arch/ia64/include/asm/futex.h
+++ b/arch/ia64/include/asm/futex.h
@@ -46,7 +46,7 @@ do { \
46} while (0) 46} while (0)
47 47
48static inline int 48static inline int
49futex_atomic_op_inuser (int encoded_op, int __user *uaddr) 49futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr)
50{ 50{
51 int op = (encoded_op >> 28) & 7; 51 int op = (encoded_op >> 28) & 7;
52 int cmp = (encoded_op >> 24) & 15; 52 int cmp = (encoded_op >> 24) & 15;
@@ -56,7 +56,7 @@ futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
56 if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28)) 56 if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
57 oparg = 1 << oparg; 57 oparg = 1 << oparg;
58 58
59 if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int))) 59 if (! access_ok (VERIFY_WRITE, uaddr, sizeof(u32)))
60 return -EFAULT; 60 return -EFAULT;
61 61
62 pagefault_disable(); 62 pagefault_disable();
@@ -100,23 +100,26 @@ futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
100} 100}
101 101
102static inline int 102static inline int
103futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval) 103futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
104 u32 oldval, u32 newval)
104{ 105{
105 if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int))) 106 if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
106 return -EFAULT; 107 return -EFAULT;
107 108
108 { 109 {
109 register unsigned long r8 __asm ("r8"); 110 register unsigned long r8 __asm ("r8") = 0;
111 unsigned long prev;
110 __asm__ __volatile__( 112 __asm__ __volatile__(
111 " mf;; \n" 113 " mf;; \n"
112 " mov ar.ccv=%3;; \n" 114 " mov ar.ccv=%3;; \n"
113 "[1:] cmpxchg4.acq %0=[%1],%2,ar.ccv \n" 115 "[1:] cmpxchg4.acq %0=[%1],%2,ar.ccv \n"
114 " .xdata4 \"__ex_table\", 1b-., 2f-. \n" 116 " .xdata4 \"__ex_table\", 1b-., 2f-. \n"
115 "[2:]" 117 "[2:]"
116 : "=r" (r8) 118 : "=r" (prev)
117 : "r" (uaddr), "r" (newval), 119 : "r" (uaddr), "r" (newval),
118 "rO" ((long) (unsigned) oldval) 120 "rO" ((long) (unsigned) oldval)
119 : "memory"); 121 : "memory");
122 *uval = prev;
120 return r8; 123 return r8;
121 } 124 }
122} 125}
diff --git a/arch/ia64/include/asm/hw_irq.h b/arch/ia64/include/asm/hw_irq.h
index bf2e37493e04..a681d02cb324 100644
--- a/arch/ia64/include/asm/hw_irq.h
+++ b/arch/ia64/include/asm/hw_irq.h
@@ -151,9 +151,6 @@ static inline void ia64_native_resend_irq(unsigned int vector)
151/* 151/*
152 * Default implementations for the irq-descriptor API: 152 * Default implementations for the irq-descriptor API:
153 */ 153 */
154
155extern struct irq_desc irq_desc[NR_IRQS];
156
157#ifndef CONFIG_IA64_GENERIC 154#ifndef CONFIG_IA64_GENERIC
158static inline ia64_vector __ia64_irq_to_vector(int irq) 155static inline ia64_vector __ia64_irq_to_vector(int irq)
159{ 156{
diff --git a/arch/ia64/include/asm/pal.h b/arch/ia64/include/asm/pal.h
index 6a292505b396..2e69284df8e7 100644
--- a/arch/ia64/include/asm/pal.h
+++ b/arch/ia64/include/asm/pal.h
@@ -1669,7 +1669,7 @@ typedef union pal_vp_info_u {
1669} pal_vp_info_u_t; 1669} pal_vp_info_u_t;
1670 1670
1671/* 1671/*
1672 * Returns infomation about virtual processor features 1672 * Returns information about virtual processor features
1673 */ 1673 */
1674static inline s64 1674static inline s64
1675ia64_pal_vp_info (u64 feature_set, u64 vp_buffer, u64 *vp_info, u64 *vmm_id) 1675ia64_pal_vp_info (u64 feature_set, u64 vp_buffer, u64 *vp_info, u64 *vmm_id)
diff --git a/arch/ia64/include/asm/perfmon.h b/arch/ia64/include/asm/perfmon.h
index 7f3333dd00e4..d551183fee90 100644
--- a/arch/ia64/include/asm/perfmon.h
+++ b/arch/ia64/include/asm/perfmon.h
@@ -7,7 +7,7 @@
7#define _ASM_IA64_PERFMON_H 7#define _ASM_IA64_PERFMON_H
8 8
9/* 9/*
10 * perfmon comamnds supported on all CPU models 10 * perfmon commands supported on all CPU models
11 */ 11 */
12#define PFM_WRITE_PMCS 0x01 12#define PFM_WRITE_PMCS 0x01
13#define PFM_WRITE_PMDS 0x02 13#define PFM_WRITE_PMDS 0x02
diff --git a/arch/ia64/include/asm/perfmon_default_smpl.h b/arch/ia64/include/asm/perfmon_default_smpl.h
index 74724b24c2b7..a2d560c67230 100644
--- a/arch/ia64/include/asm/perfmon_default_smpl.h
+++ b/arch/ia64/include/asm/perfmon_default_smpl.h
@@ -67,8 +67,8 @@ typedef struct {
67 unsigned long ip; /* where did the overflow interrupt happened */ 67 unsigned long ip; /* where did the overflow interrupt happened */
68 unsigned long tstamp; /* ar.itc when entering perfmon intr. handler */ 68 unsigned long tstamp; /* ar.itc when entering perfmon intr. handler */
69 69
70 unsigned short cpu; /* cpu on which the overflow occured */ 70 unsigned short cpu; /* cpu on which the overflow occurred */
71 unsigned short set; /* event set active when overflow ocurred */ 71 unsigned short set; /* event set active when overflow occurred */
72 int tgid; /* thread group id (for NPTL, this is getpid()) */ 72 int tgid; /* thread group id (for NPTL, this is getpid()) */
73} pfm_default_smpl_entry_t; 73} pfm_default_smpl_entry_t;
74 74
diff --git a/arch/ia64/include/asm/rwsem.h b/arch/ia64/include/asm/rwsem.h
index 215d5454c7d3..3027e7516d85 100644
--- a/arch/ia64/include/asm/rwsem.h
+++ b/arch/ia64/include/asm/rwsem.h
@@ -25,20 +25,8 @@
25#error "Please don't include <asm/rwsem.h> directly, use <linux/rwsem.h> instead." 25#error "Please don't include <asm/rwsem.h> directly, use <linux/rwsem.h> instead."
26#endif 26#endif
27 27
28#include <linux/list.h>
29#include <linux/spinlock.h>
30
31#include <asm/intrinsics.h> 28#include <asm/intrinsics.h>
32 29
33/*
34 * the semaphore definition
35 */
36struct rw_semaphore {
37 signed long count;
38 spinlock_t wait_lock;
39 struct list_head wait_list;
40};
41
42#define RWSEM_UNLOCKED_VALUE __IA64_UL_CONST(0x0000000000000000) 30#define RWSEM_UNLOCKED_VALUE __IA64_UL_CONST(0x0000000000000000)
43#define RWSEM_ACTIVE_BIAS (1L) 31#define RWSEM_ACTIVE_BIAS (1L)
44#define RWSEM_ACTIVE_MASK (0xffffffffL) 32#define RWSEM_ACTIVE_MASK (0xffffffffL)
@@ -46,26 +34,6 @@ struct rw_semaphore {
46#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS 34#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS
47#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS) 35#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
48 36
49#define __RWSEM_INITIALIZER(name) \
50 { RWSEM_UNLOCKED_VALUE, __SPIN_LOCK_UNLOCKED((name).wait_lock), \
51 LIST_HEAD_INIT((name).wait_list) }
52
53#define DECLARE_RWSEM(name) \
54 struct rw_semaphore name = __RWSEM_INITIALIZER(name)
55
56extern struct rw_semaphore *rwsem_down_read_failed(struct rw_semaphore *sem);
57extern struct rw_semaphore *rwsem_down_write_failed(struct rw_semaphore *sem);
58extern struct rw_semaphore *rwsem_wake(struct rw_semaphore *sem);
59extern struct rw_semaphore *rwsem_downgrade_wake(struct rw_semaphore *sem);
60
61static inline void
62init_rwsem (struct rw_semaphore *sem)
63{
64 sem->count = RWSEM_UNLOCKED_VALUE;
65 spin_lock_init(&sem->wait_lock);
66 INIT_LIST_HEAD(&sem->wait_list);
67}
68
69/* 37/*
70 * lock for reading 38 * lock for reading
71 */ 39 */
@@ -174,9 +142,4 @@ __downgrade_write (struct rw_semaphore *sem)
174#define rwsem_atomic_add(delta, sem) atomic64_add(delta, (atomic64_t *)(&(sem)->count)) 142#define rwsem_atomic_add(delta, sem) atomic64_add(delta, (atomic64_t *)(&(sem)->count))
175#define rwsem_atomic_update(delta, sem) atomic64_add_return(delta, (atomic64_t *)(&(sem)->count)) 143#define rwsem_atomic_update(delta, sem) atomic64_add_return(delta, (atomic64_t *)(&(sem)->count))
176 144
177static inline int rwsem_is_locked(struct rw_semaphore *sem)
178{
179 return (sem->count != 0);
180}
181
182#endif /* _ASM_IA64_RWSEM_H */ 145#endif /* _ASM_IA64_RWSEM_H */
diff --git a/arch/ia64/include/asm/sn/bte.h b/arch/ia64/include/asm/sn/bte.h
index 96798d2da7c2..cc6c4dbf53af 100644
--- a/arch/ia64/include/asm/sn/bte.h
+++ b/arch/ia64/include/asm/sn/bte.h
@@ -216,7 +216,7 @@ extern void bte_error_handler(unsigned long);
216 bte_copy(0, dest, len, ((mode) | BTE_ZERO_FILL), notification) 216 bte_copy(0, dest, len, ((mode) | BTE_ZERO_FILL), notification)
217 217
218/* 218/*
219 * The following is the prefered way of calling bte_unaligned_copy 219 * The following is the preferred way of calling bte_unaligned_copy
220 * If the copy is fully cache line aligned, then bte_copy is 220 * If the copy is fully cache line aligned, then bte_copy is
221 * used instead. Since bte_copy is inlined, this saves a call 221 * used instead. Since bte_copy is inlined, this saves a call
222 * stack. NOTE: bte_copy is called synchronously and does block 222 * stack. NOTE: bte_copy is called synchronously and does block
diff --git a/arch/ia64/include/asm/sn/shub_mmr.h b/arch/ia64/include/asm/sn/shub_mmr.h
index 7de1d1d4b71a..a84d870f4294 100644
--- a/arch/ia64/include/asm/sn/shub_mmr.h
+++ b/arch/ia64/include/asm/sn/shub_mmr.h
@@ -459,7 +459,7 @@
459/* ==================================================================== */ 459/* ==================================================================== */
460/* Some MMRs are functionally identical (or close enough) on both SHUB1 */ 460/* Some MMRs are functionally identical (or close enough) on both SHUB1 */
461/* and SHUB2 that it makes sense to define a geberic name for the MMR. */ 461/* and SHUB2 that it makes sense to define a geberic name for the MMR. */
462/* It is acceptible to use (for example) SH_IPI_INT to reference the */ 462/* It is acceptable to use (for example) SH_IPI_INT to reference the */
463/* the IPI MMR. The value of SH_IPI_INT is determined at runtime based */ 463/* the IPI MMR. The value of SH_IPI_INT is determined at runtime based */
464/* on the type of the SHUB. Do not use these #defines in performance */ 464/* on the type of the SHUB. Do not use these #defines in performance */
465/* critical code or loops - there is a small performance penalty. */ 465/* critical code or loops - there is a small performance penalty. */
diff --git a/arch/ia64/include/asm/sn/shubio.h b/arch/ia64/include/asm/sn/shubio.h
index 6052422a22b3..ecb8a49476b6 100644
--- a/arch/ia64/include/asm/sn/shubio.h
+++ b/arch/ia64/include/asm/sn/shubio.h
@@ -1383,7 +1383,7 @@ typedef union ii_ibcr_u {
1383 * response is capture in IXSM and IXSS, and IXSS[VALID] is set. The * 1383 * response is capture in IXSM and IXSS, and IXSS[VALID] is set. The *
1384 * errant header is thereby captured, and no further spurious read * 1384 * errant header is thereby captured, and no further spurious read *
1385 * respones are captured until IXSS[VALID] is cleared by setting the * 1385 * respones are captured until IXSS[VALID] is cleared by setting the *
1386 * appropriate bit in IECLR.Everytime a spurious read response is * 1386 * appropriate bit in IECLR. Every time a spurious read response is *
1387 * detected, the SPUR_RD bit of the PRB corresponding to the incoming * 1387 * detected, the SPUR_RD bit of the PRB corresponding to the incoming *
1388 * message's SIDN field is set. This always happens, regarless of * 1388 * message's SIDN field is set. This always happens, regarless of *
1389 * whether a header is captured. The programmer should check * 1389 * whether a header is captured. The programmer should check *
@@ -2738,7 +2738,7 @@ typedef union ii_ippr_u {
2738/************************************************************************ 2738/************************************************************************
2739 * * 2739 * *
2740 * The following defines which were not formed into structures are * 2740 * The following defines which were not formed into structures are *
2741 * probably indentical to another register, and the name of the * 2741 * probably identical to another register, and the name of the *
2742 * register is provided against each of these registers. This * 2742 * register is provided against each of these registers. This *
2743 * information needs to be checked carefully * 2743 * information needs to be checked carefully *
2744 * * 2744 * *
diff --git a/arch/ia64/include/asm/thread_info.h b/arch/ia64/include/asm/thread_info.h
index b6a5ba2aca34..ff0cc84e7bcc 100644
--- a/arch/ia64/include/asm/thread_info.h
+++ b/arch/ia64/include/asm/thread_info.h
@@ -59,11 +59,12 @@ struct thread_info {
59#ifndef ASM_OFFSETS_C 59#ifndef ASM_OFFSETS_C
60/* how to get the thread information struct from C */ 60/* how to get the thread information struct from C */
61#define current_thread_info() ((struct thread_info *) ((char *) current + IA64_TASK_SIZE)) 61#define current_thread_info() ((struct thread_info *) ((char *) current + IA64_TASK_SIZE))
62#define alloc_thread_info(tsk) ((struct thread_info *) ((char *) (tsk) + IA64_TASK_SIZE)) 62#define alloc_thread_info_node(tsk, node) \
63 ((struct thread_info *) ((char *) (tsk) + IA64_TASK_SIZE))
63#define task_thread_info(tsk) ((struct thread_info *) ((char *) (tsk) + IA64_TASK_SIZE)) 64#define task_thread_info(tsk) ((struct thread_info *) ((char *) (tsk) + IA64_TASK_SIZE))
64#else 65#else
65#define current_thread_info() ((struct thread_info *) 0) 66#define current_thread_info() ((struct thread_info *) 0)
66#define alloc_thread_info(tsk) ((struct thread_info *) 0) 67#define alloc_thread_info_node(tsk, node) ((struct thread_info *) 0)
67#define task_thread_info(tsk) ((struct thread_info *) 0) 68#define task_thread_info(tsk) ((struct thread_info *) 0)
68#endif 69#endif
69#define free_thread_info(ti) /* nothing */ 70#define free_thread_info(ti) /* nothing */
@@ -84,7 +85,14 @@ struct thread_info {
84#define end_of_stack(p) (unsigned long *)((void *)(p) + IA64_RBS_OFFSET) 85#define end_of_stack(p) (unsigned long *)((void *)(p) + IA64_RBS_OFFSET)
85 86
86#define __HAVE_ARCH_TASK_STRUCT_ALLOCATOR 87#define __HAVE_ARCH_TASK_STRUCT_ALLOCATOR
87#define alloc_task_struct() ((struct task_struct *)__get_free_pages(GFP_KERNEL | __GFP_COMP, KERNEL_STACK_SIZE_ORDER)) 88#define alloc_task_struct_node(node) \
89({ \
90 struct page *page = alloc_pages_node(node, GFP_KERNEL | __GFP_COMP, \
91 KERNEL_STACK_SIZE_ORDER); \
92 struct task_struct *ret = page ? page_address(page) : NULL; \
93 \
94 ret; \
95})
88#define free_task_struct(tsk) free_pages((unsigned long) (tsk), KERNEL_STACK_SIZE_ORDER) 96#define free_task_struct(tsk) free_pages((unsigned long) (tsk), KERNEL_STACK_SIZE_ORDER)
89 97
90#endif /* !__ASSEMBLY */ 98#endif /* !__ASSEMBLY */
diff --git a/arch/ia64/include/asm/types.h b/arch/ia64/include/asm/types.h
index 93773fd37be0..82b3939d2718 100644
--- a/arch/ia64/include/asm/types.h
+++ b/arch/ia64/include/asm/types.h
@@ -40,9 +40,6 @@ struct fnptr {
40 unsigned long gp; 40 unsigned long gp;
41}; 41};
42 42
43/* DMA addresses are 64-bits wide, in general. */
44typedef u64 dma_addr_t;
45
46# endif /* __KERNEL__ */ 43# endif /* __KERNEL__ */
47#endif /* !__ASSEMBLY__ */ 44#endif /* !__ASSEMBLY__ */
48 45
diff --git a/arch/ia64/include/asm/unistd.h b/arch/ia64/include/asm/unistd.h
index 954d398a54b4..404d037c5e10 100644
--- a/arch/ia64/include/asm/unistd.h
+++ b/arch/ia64/include/asm/unistd.h
@@ -315,11 +315,15 @@
315#define __NR_fanotify_init 1323 315#define __NR_fanotify_init 1323
316#define __NR_fanotify_mark 1324 316#define __NR_fanotify_mark 1324
317#define __NR_prlimit64 1325 317#define __NR_prlimit64 1325
318#define __NR_name_to_handle_at 1326
319#define __NR_open_by_handle_at 1327
320#define __NR_clock_adjtime 1328
321#define __NR_syncfs 1329
318 322
319#ifdef __KERNEL__ 323#ifdef __KERNEL__
320 324
321 325
322#define NR_syscalls 302 /* length of syscall table */ 326#define NR_syscalls 306 /* length of syscall table */
323 327
324/* 328/*
325 * The following defines stop scripts/checksyscalls.sh from complaining about 329 * The following defines stop scripts/checksyscalls.sh from complaining about
diff --git a/arch/ia64/include/asm/xen/hypercall.h b/arch/ia64/include/asm/xen/hypercall.h
index 96fc62366aa4..ed28bcd5bb85 100644
--- a/arch/ia64/include/asm/xen/hypercall.h
+++ b/arch/ia64/include/asm/xen/hypercall.h
@@ -107,7 +107,7 @@ extern unsigned long __hypercall(unsigned long a1, unsigned long a2,
107static inline int 107static inline int
108xencomm_arch_hypercall_sched_op(int cmd, struct xencomm_handle *arg) 108xencomm_arch_hypercall_sched_op(int cmd, struct xencomm_handle *arg)
109{ 109{
110 return _hypercall2(int, sched_op_new, cmd, arg); 110 return _hypercall2(int, sched_op, cmd, arg);
111} 111}
112 112
113static inline long 113static inline long
diff --git a/arch/ia64/kernel/acpi.c b/arch/ia64/kernel/acpi.c
index 90ebceb899a0..3be485a300b1 100644
--- a/arch/ia64/kernel/acpi.c
+++ b/arch/ia64/kernel/acpi.c
@@ -803,7 +803,7 @@ int acpi_isa_irq_to_gsi(unsigned isa_irq, u32 *gsi)
803 * ACPI based hotplug CPU support 803 * ACPI based hotplug CPU support
804 */ 804 */
805#ifdef CONFIG_ACPI_HOTPLUG_CPU 805#ifdef CONFIG_ACPI_HOTPLUG_CPU
806static 806static __cpuinit
807int acpi_map_cpu2node(acpi_handle handle, int cpu, int physid) 807int acpi_map_cpu2node(acpi_handle handle, int cpu, int physid)
808{ 808{
809#ifdef CONFIG_ACPI_NUMA 809#ifdef CONFIG_ACPI_NUMA
@@ -878,7 +878,7 @@ __init void prefill_possible_map(void)
878 set_cpu_possible(i, true); 878 set_cpu_possible(i, true);
879} 879}
880 880
881int acpi_map_lsapic(acpi_handle handle, int *pcpu) 881static int __cpuinit _acpi_map_lsapic(acpi_handle handle, int *pcpu)
882{ 882{
883 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; 883 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
884 union acpi_object *obj; 884 union acpi_object *obj;
@@ -929,6 +929,11 @@ int acpi_map_lsapic(acpi_handle handle, int *pcpu)
929 return (0); 929 return (0);
930} 930}
931 931
932/* wrapper to silence section mismatch warning */
933int __ref acpi_map_lsapic(acpi_handle handle, int *pcpu)
934{
935 return _acpi_map_lsapic(handle, pcpu);
936}
932EXPORT_SYMBOL(acpi_map_lsapic); 937EXPORT_SYMBOL(acpi_map_lsapic);
933 938
934int acpi_unmap_lsapic(int cpu) 939int acpi_unmap_lsapic(int cpu)
@@ -1034,18 +1039,8 @@ int acpi_unregister_ioapic(acpi_handle handle, u32 gsi_base)
1034EXPORT_SYMBOL(acpi_unregister_ioapic); 1039EXPORT_SYMBOL(acpi_unregister_ioapic);
1035 1040
1036/* 1041/*
1037 * acpi_save_state_mem() - save kernel state 1042 * acpi_suspend_lowlevel() - save kernel state and suspend.
1038 * 1043 *
1039 * TBD when when IA64 starts to support suspend... 1044 * TBD when when IA64 starts to support suspend...
1040 */ 1045 */
1041int acpi_save_state_mem(void) { return 0; } 1046int acpi_suspend_lowlevel(void) { return 0; }
1042
1043/*
1044 * acpi_restore_state()
1045 */
1046void acpi_restore_state_mem(void) {}
1047
1048/*
1049 * do_suspend_lowlevel()
1050 */
1051void do_suspend_lowlevel(void) {}
diff --git a/arch/ia64/kernel/crash_dump.c b/arch/ia64/kernel/crash_dump.c
index 23e91290e41f..c8c9298666fb 100644
--- a/arch/ia64/kernel/crash_dump.c
+++ b/arch/ia64/kernel/crash_dump.c
@@ -13,9 +13,6 @@
13#include <asm/page.h> 13#include <asm/page.h>
14#include <asm/uaccess.h> 14#include <asm/uaccess.h>
15 15
16/* Stores the physical address of elf header of crash image. */
17unsigned long long elfcorehdr_addr = ELFCORE_ADDR_MAX;
18
19/** 16/**
20 * copy_oldmem_page - copy one page from "oldmem" 17 * copy_oldmem_page - copy one page from "oldmem"
21 * @pfn: page frame number to be copied 18 * @pfn: page frame number to be copied
diff --git a/arch/ia64/kernel/efi.c b/arch/ia64/kernel/efi.c
index a0f001928502..6fc03aff046c 100644
--- a/arch/ia64/kernel/efi.c
+++ b/arch/ia64/kernel/efi.c
@@ -23,6 +23,7 @@
23 */ 23 */
24#include <linux/module.h> 24#include <linux/module.h>
25#include <linux/bootmem.h> 25#include <linux/bootmem.h>
26#include <linux/crash_dump.h>
26#include <linux/kernel.h> 27#include <linux/kernel.h>
27#include <linux/init.h> 28#include <linux/init.h>
28#include <linux/types.h> 29#include <linux/types.h>
diff --git a/arch/ia64/kernel/entry.S b/arch/ia64/kernel/entry.S
index 244704a174de..6de2e23b3636 100644
--- a/arch/ia64/kernel/entry.S
+++ b/arch/ia64/kernel/entry.S
@@ -1771,6 +1771,10 @@ sys_call_table:
1771 data8 sys_fanotify_init 1771 data8 sys_fanotify_init
1772 data8 sys_fanotify_mark 1772 data8 sys_fanotify_mark
1773 data8 sys_prlimit64 // 1325 1773 data8 sys_prlimit64 // 1325
1774 data8 sys_name_to_handle_at
1775 data8 sys_open_by_handle_at
1776 data8 sys_clock_adjtime
1777 data8 sys_syncfs
1774 1778
1775 .org sys_call_table + 8*NR_syscalls // guard against failures to increase NR_syscalls 1779 .org sys_call_table + 8*NR_syscalls // guard against failures to increase NR_syscalls
1776#endif /* __IA64_ASM_PARAVIRTUALIZED_NATIVE */ 1780#endif /* __IA64_ASM_PARAVIRTUALIZED_NATIVE */
diff --git a/arch/ia64/kernel/iosapic.c b/arch/ia64/kernel/iosapic.c
index 22c38404f539..b0f9afebb146 100644
--- a/arch/ia64/kernel/iosapic.c
+++ b/arch/ia64/kernel/iosapic.c
@@ -257,7 +257,7 @@ set_rte (unsigned int gsi, unsigned int irq, unsigned int dest, int mask)
257} 257}
258 258
259static void 259static void
260nop (unsigned int irq) 260nop (struct irq_data *data)
261{ 261{
262 /* do nothing... */ 262 /* do nothing... */
263} 263}
@@ -287,8 +287,9 @@ kexec_disable_iosapic(void)
287#endif 287#endif
288 288
289static void 289static void
290mask_irq (unsigned int irq) 290mask_irq (struct irq_data *data)
291{ 291{
292 unsigned int irq = data->irq;
292 u32 low32; 293 u32 low32;
293 int rte_index; 294 int rte_index;
294 struct iosapic_rte_info *rte; 295 struct iosapic_rte_info *rte;
@@ -305,8 +306,9 @@ mask_irq (unsigned int irq)
305} 306}
306 307
307static void 308static void
308unmask_irq (unsigned int irq) 309unmask_irq (struct irq_data *data)
309{ 310{
311 unsigned int irq = data->irq;
310 u32 low32; 312 u32 low32;
311 int rte_index; 313 int rte_index;
312 struct iosapic_rte_info *rte; 314 struct iosapic_rte_info *rte;
@@ -323,9 +325,11 @@ unmask_irq (unsigned int irq)
323 325
324 326
325static int 327static int
326iosapic_set_affinity(unsigned int irq, const struct cpumask *mask) 328iosapic_set_affinity(struct irq_data *data, const struct cpumask *mask,
329 bool force)
327{ 330{
328#ifdef CONFIG_SMP 331#ifdef CONFIG_SMP
332 unsigned int irq = data->irq;
329 u32 high32, low32; 333 u32 high32, low32;
330 int cpu, dest, rte_index; 334 int cpu, dest, rte_index;
331 int redir = (irq & IA64_IRQ_REDIRECTED) ? 1 : 0; 335 int redir = (irq & IA64_IRQ_REDIRECTED) ? 1 : 0;
@@ -379,32 +383,33 @@ iosapic_set_affinity(unsigned int irq, const struct cpumask *mask)
379 */ 383 */
380 384
381static unsigned int 385static unsigned int
382iosapic_startup_level_irq (unsigned int irq) 386iosapic_startup_level_irq (struct irq_data *data)
383{ 387{
384 unmask_irq(irq); 388 unmask_irq(data);
385 return 0; 389 return 0;
386} 390}
387 391
388static void 392static void
389iosapic_unmask_level_irq (unsigned int irq) 393iosapic_unmask_level_irq (struct irq_data *data)
390{ 394{
395 unsigned int irq = data->irq;
391 ia64_vector vec = irq_to_vector(irq); 396 ia64_vector vec = irq_to_vector(irq);
392 struct iosapic_rte_info *rte; 397 struct iosapic_rte_info *rte;
393 int do_unmask_irq = 0; 398 int do_unmask_irq = 0;
394 399
395 irq_complete_move(irq); 400 irq_complete_move(irq);
396 if (unlikely(irq_desc[irq].status & IRQ_MOVE_PENDING)) { 401 if (unlikely(irqd_is_setaffinity_pending(data))) {
397 do_unmask_irq = 1; 402 do_unmask_irq = 1;
398 mask_irq(irq); 403 mask_irq(data);
399 } else 404 } else
400 unmask_irq(irq); 405 unmask_irq(data);
401 406
402 list_for_each_entry(rte, &iosapic_intr_info[irq].rtes, rte_list) 407 list_for_each_entry(rte, &iosapic_intr_info[irq].rtes, rte_list)
403 iosapic_eoi(rte->iosapic->addr, vec); 408 iosapic_eoi(rte->iosapic->addr, vec);
404 409
405 if (unlikely(do_unmask_irq)) { 410 if (unlikely(do_unmask_irq)) {
406 move_masked_irq(irq); 411 irq_move_masked_irq(data);
407 unmask_irq(irq); 412 unmask_irq(data);
408 } 413 }
409} 414}
410 415
@@ -414,15 +419,15 @@ iosapic_unmask_level_irq (unsigned int irq)
414#define iosapic_ack_level_irq nop 419#define iosapic_ack_level_irq nop
415 420
416static struct irq_chip irq_type_iosapic_level = { 421static struct irq_chip irq_type_iosapic_level = {
417 .name = "IO-SAPIC-level", 422 .name = "IO-SAPIC-level",
418 .startup = iosapic_startup_level_irq, 423 .irq_startup = iosapic_startup_level_irq,
419 .shutdown = iosapic_shutdown_level_irq, 424 .irq_shutdown = iosapic_shutdown_level_irq,
420 .enable = iosapic_enable_level_irq, 425 .irq_enable = iosapic_enable_level_irq,
421 .disable = iosapic_disable_level_irq, 426 .irq_disable = iosapic_disable_level_irq,
422 .ack = iosapic_ack_level_irq, 427 .irq_ack = iosapic_ack_level_irq,
423 .mask = mask_irq, 428 .irq_mask = mask_irq,
424 .unmask = iosapic_unmask_level_irq, 429 .irq_unmask = iosapic_unmask_level_irq,
425 .set_affinity = iosapic_set_affinity 430 .irq_set_affinity = iosapic_set_affinity
426}; 431};
427 432
428/* 433/*
@@ -430,9 +435,9 @@ static struct irq_chip irq_type_iosapic_level = {
430 */ 435 */
431 436
432static unsigned int 437static unsigned int
433iosapic_startup_edge_irq (unsigned int irq) 438iosapic_startup_edge_irq (struct irq_data *data)
434{ 439{
435 unmask_irq(irq); 440 unmask_irq(data);
436 /* 441 /*
437 * IOSAPIC simply drops interrupts pended while the 442 * IOSAPIC simply drops interrupts pended while the
438 * corresponding pin was masked, so we can't know if an 443 * corresponding pin was masked, so we can't know if an
@@ -442,37 +447,25 @@ iosapic_startup_edge_irq (unsigned int irq)
442} 447}
443 448
444static void 449static void
445iosapic_ack_edge_irq (unsigned int irq) 450iosapic_ack_edge_irq (struct irq_data *data)
446{ 451{
447 struct irq_desc *idesc = irq_desc + irq; 452 irq_complete_move(data->irq);
448 453 irq_move_irq(data);
449 irq_complete_move(irq);
450 move_native_irq(irq);
451 /*
452 * Once we have recorded IRQ_PENDING already, we can mask the
453 * interrupt for real. This prevents IRQ storms from unhandled
454 * devices.
455 */
456 if ((idesc->status & (IRQ_PENDING|IRQ_DISABLED)) ==
457 (IRQ_PENDING|IRQ_DISABLED))
458 mask_irq(irq);
459} 454}
460 455
461#define iosapic_enable_edge_irq unmask_irq 456#define iosapic_enable_edge_irq unmask_irq
462#define iosapic_disable_edge_irq nop 457#define iosapic_disable_edge_irq nop
463#define iosapic_end_edge_irq nop
464 458
465static struct irq_chip irq_type_iosapic_edge = { 459static struct irq_chip irq_type_iosapic_edge = {
466 .name = "IO-SAPIC-edge", 460 .name = "IO-SAPIC-edge",
467 .startup = iosapic_startup_edge_irq, 461 .irq_startup = iosapic_startup_edge_irq,
468 .shutdown = iosapic_disable_edge_irq, 462 .irq_shutdown = iosapic_disable_edge_irq,
469 .enable = iosapic_enable_edge_irq, 463 .irq_enable = iosapic_enable_edge_irq,
470 .disable = iosapic_disable_edge_irq, 464 .irq_disable = iosapic_disable_edge_irq,
471 .ack = iosapic_ack_edge_irq, 465 .irq_ack = iosapic_ack_edge_irq,
472 .end = iosapic_end_edge_irq, 466 .irq_mask = mask_irq,
473 .mask = mask_irq, 467 .irq_unmask = unmask_irq,
474 .unmask = unmask_irq, 468 .irq_set_affinity = iosapic_set_affinity
475 .set_affinity = iosapic_set_affinity
476}; 469};
477 470
478static unsigned int 471static unsigned int
@@ -562,8 +555,7 @@ static int
562register_intr (unsigned int gsi, int irq, unsigned char delivery, 555register_intr (unsigned int gsi, int irq, unsigned char delivery,
563 unsigned long polarity, unsigned long trigger) 556 unsigned long polarity, unsigned long trigger)
564{ 557{
565 struct irq_desc *idesc; 558 struct irq_chip *chip, *irq_type;
566 struct irq_chip *irq_type;
567 int index; 559 int index;
568 struct iosapic_rte_info *rte; 560 struct iosapic_rte_info *rte;
569 561
@@ -610,19 +602,18 @@ register_intr (unsigned int gsi, int irq, unsigned char delivery,
610 602
611 irq_type = iosapic_get_irq_chip(trigger); 603 irq_type = iosapic_get_irq_chip(trigger);
612 604
613 idesc = irq_desc + irq; 605 chip = irq_get_chip(irq);
614 if (irq_type != NULL && idesc->chip != irq_type) { 606 if (irq_type != NULL && chip != irq_type) {
615 if (idesc->chip != &no_irq_chip) 607 if (chip != &no_irq_chip)
616 printk(KERN_WARNING 608 printk(KERN_WARNING
617 "%s: changing vector %d from %s to %s\n", 609 "%s: changing vector %d from %s to %s\n",
618 __func__, irq_to_vector(irq), 610 __func__, irq_to_vector(irq),
619 idesc->chip->name, irq_type->name); 611 chip->name, irq_type->name);
620 idesc->chip = irq_type; 612 chip = irq_type;
621 } 613 }
622 if (trigger == IOSAPIC_EDGE) 614 __irq_set_chip_handler_name_locked(irq, chip, trigger == IOSAPIC_EDGE ?
623 __set_irq_handler_unlocked(irq, handle_edge_irq); 615 handle_edge_irq : handle_level_irq,
624 else 616 NULL);
625 __set_irq_handler_unlocked(irq, handle_level_irq);
626 return 0; 617 return 0;
627} 618}
628 619
@@ -732,6 +723,7 @@ iosapic_register_intr (unsigned int gsi,
732 struct iosapic_rte_info *rte; 723 struct iosapic_rte_info *rte;
733 u32 low32; 724 u32 low32;
734 unsigned char dmode; 725 unsigned char dmode;
726 struct irq_desc *desc;
735 727
736 /* 728 /*
737 * If this GSI has already been registered (i.e., it's a 729 * If this GSI has already been registered (i.e., it's a
@@ -759,12 +751,13 @@ iosapic_register_intr (unsigned int gsi,
759 goto unlock_iosapic_lock; 751 goto unlock_iosapic_lock;
760 } 752 }
761 753
762 raw_spin_lock(&irq_desc[irq].lock); 754 desc = irq_to_desc(irq);
755 raw_spin_lock(&desc->lock);
763 dest = get_target_cpu(gsi, irq); 756 dest = get_target_cpu(gsi, irq);
764 dmode = choose_dmode(); 757 dmode = choose_dmode();
765 err = register_intr(gsi, irq, dmode, polarity, trigger); 758 err = register_intr(gsi, irq, dmode, polarity, trigger);
766 if (err < 0) { 759 if (err < 0) {
767 raw_spin_unlock(&irq_desc[irq].lock); 760 raw_spin_unlock(&desc->lock);
768 irq = err; 761 irq = err;
769 goto unlock_iosapic_lock; 762 goto unlock_iosapic_lock;
770 } 763 }
@@ -783,7 +776,7 @@ iosapic_register_intr (unsigned int gsi,
783 (polarity == IOSAPIC_POL_HIGH ? "high" : "low"), 776 (polarity == IOSAPIC_POL_HIGH ? "high" : "low"),
784 cpu_logical_id(dest), dest, irq_to_vector(irq)); 777 cpu_logical_id(dest), dest, irq_to_vector(irq));
785 778
786 raw_spin_unlock(&irq_desc[irq].lock); 779 raw_spin_unlock(&desc->lock);
787 unlock_iosapic_lock: 780 unlock_iosapic_lock:
788 spin_unlock_irqrestore(&iosapic_lock, flags); 781 spin_unlock_irqrestore(&iosapic_lock, flags);
789 return irq; 782 return irq;
@@ -794,7 +787,6 @@ iosapic_unregister_intr (unsigned int gsi)
794{ 787{
795 unsigned long flags; 788 unsigned long flags;
796 int irq, index; 789 int irq, index;
797 struct irq_desc *idesc;
798 u32 low32; 790 u32 low32;
799 unsigned long trigger, polarity; 791 unsigned long trigger, polarity;
800 unsigned int dest; 792 unsigned int dest;
@@ -824,7 +816,6 @@ iosapic_unregister_intr (unsigned int gsi)
824 if (--rte->refcnt > 0) 816 if (--rte->refcnt > 0)
825 goto out; 817 goto out;
826 818
827 idesc = irq_desc + irq;
828 rte->refcnt = NO_REF_RTE; 819 rte->refcnt = NO_REF_RTE;
829 820
830 /* Mask the interrupt */ 821 /* Mask the interrupt */
@@ -848,7 +839,7 @@ iosapic_unregister_intr (unsigned int gsi)
848 if (iosapic_intr_info[irq].count == 0) { 839 if (iosapic_intr_info[irq].count == 0) {
849#ifdef CONFIG_SMP 840#ifdef CONFIG_SMP
850 /* Clear affinity */ 841 /* Clear affinity */
851 cpumask_setall(idesc->affinity); 842 cpumask_setall(irq_get_irq_data(irq)->affinity);
852#endif 843#endif
853 /* Clear the interrupt information */ 844 /* Clear the interrupt information */
854 iosapic_intr_info[irq].dest = 0; 845 iosapic_intr_info[irq].dest = 0;
diff --git a/arch/ia64/kernel/irq.c b/arch/ia64/kernel/irq.c
index 94ee9d067cbd..ad69606613eb 100644
--- a/arch/ia64/kernel/irq.c
+++ b/arch/ia64/kernel/irq.c
@@ -53,47 +53,9 @@ atomic_t irq_err_count;
53/* 53/*
54 * /proc/interrupts printing: 54 * /proc/interrupts printing:
55 */ 55 */
56 56int arch_show_interrupts(struct seq_file *p, int prec)
57int show_interrupts(struct seq_file *p, void *v)
58{ 57{
59 int i = *(loff_t *) v, j; 58 seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
60 struct irqaction * action;
61 unsigned long flags;
62
63 if (i == 0) {
64 char cpuname[16];
65 seq_printf(p, " ");
66 for_each_online_cpu(j) {
67 snprintf(cpuname, 10, "CPU%d", j);
68 seq_printf(p, "%10s ", cpuname);
69 }
70 seq_putc(p, '\n');
71 }
72
73 if (i < NR_IRQS) {
74 raw_spin_lock_irqsave(&irq_desc[i].lock, flags);
75 action = irq_desc[i].action;
76 if (!action)
77 goto skip;
78 seq_printf(p, "%3d: ",i);
79#ifndef CONFIG_SMP
80 seq_printf(p, "%10u ", kstat_irqs(i));
81#else
82 for_each_online_cpu(j) {
83 seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
84 }
85#endif
86 seq_printf(p, " %14s", irq_desc[i].chip->name);
87 seq_printf(p, " %s", action->name);
88
89 for (action=action->next; action; action = action->next)
90 seq_printf(p, ", %s", action->name);
91
92 seq_putc(p, '\n');
93skip:
94 raw_spin_unlock_irqrestore(&irq_desc[i].lock, flags);
95 } else if (i == NR_IRQS)
96 seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
97 return 0; 59 return 0;
98} 60}
99 61
@@ -103,7 +65,7 @@ static char irq_redir [NR_IRQS]; // = { [0 ... NR_IRQS-1] = 1 };
103void set_irq_affinity_info (unsigned int irq, int hwid, int redir) 65void set_irq_affinity_info (unsigned int irq, int hwid, int redir)
104{ 66{
105 if (irq < NR_IRQS) { 67 if (irq < NR_IRQS) {
106 cpumask_copy(irq_desc[irq].affinity, 68 cpumask_copy(irq_get_irq_data(irq)->affinity,
107 cpumask_of(cpu_logical_id(hwid))); 69 cpumask_of(cpu_logical_id(hwid)));
108 irq_redir[irq] = (char) (redir & 0xff); 70 irq_redir[irq] = (char) (redir & 0xff);
109 } 71 }
@@ -130,13 +92,14 @@ unsigned int vectors_in_migration[NR_IRQS];
130 */ 92 */
131static void migrate_irqs(void) 93static void migrate_irqs(void)
132{ 94{
133 struct irq_desc *desc;
134 int irq, new_cpu; 95 int irq, new_cpu;
135 96
136 for (irq=0; irq < NR_IRQS; irq++) { 97 for (irq=0; irq < NR_IRQS; irq++) {
137 desc = irq_desc + irq; 98 struct irq_desc *desc = irq_to_desc(irq);
99 struct irq_data *data = irq_desc_get_irq_data(desc);
100 struct irq_chip *chip = irq_data_get_irq_chip(data);
138 101
139 if (desc->status == IRQ_DISABLED) 102 if (irqd_irq_disabled(data))
140 continue; 103 continue;
141 104
142 /* 105 /*
@@ -145,10 +108,10 @@ static void migrate_irqs(void)
145 * tell CPU not to respond to these local intr sources. 108 * tell CPU not to respond to these local intr sources.
146 * such as ITV,CPEI,MCA etc. 109 * such as ITV,CPEI,MCA etc.
147 */ 110 */
148 if (desc->status == IRQ_PER_CPU) 111 if (irqd_is_per_cpu(data))
149 continue; 112 continue;
150 113
151 if (cpumask_any_and(irq_desc[irq].affinity, cpu_online_mask) 114 if (cpumask_any_and(data->affinity, cpu_online_mask)
152 >= nr_cpu_ids) { 115 >= nr_cpu_ids) {
153 /* 116 /*
154 * Save it for phase 2 processing 117 * Save it for phase 2 processing
@@ -160,16 +123,16 @@ static void migrate_irqs(void)
160 /* 123 /*
161 * Al three are essential, currently WARN_ON.. maybe panic? 124 * Al three are essential, currently WARN_ON.. maybe panic?
162 */ 125 */
163 if (desc->chip && desc->chip->disable && 126 if (chip && chip->irq_disable &&
164 desc->chip->enable && desc->chip->set_affinity) { 127 chip->irq_enable && chip->irq_set_affinity) {
165 desc->chip->disable(irq); 128 chip->irq_disable(data);
166 desc->chip->set_affinity(irq, 129 chip->irq_set_affinity(data,
167 cpumask_of(new_cpu)); 130 cpumask_of(new_cpu), false);
168 desc->chip->enable(irq); 131 chip->irq_enable(data);
169 } else { 132 } else {
170 WARN_ON((!(desc->chip) || !(desc->chip->disable) || 133 WARN_ON((!chip || !chip->irq_disable ||
171 !(desc->chip->enable) || 134 !chip->irq_enable ||
172 !(desc->chip->set_affinity))); 135 !chip->irq_set_affinity));
173 } 136 }
174 } 137 }
175 } 138 }
diff --git a/arch/ia64/kernel/irq_ia64.c b/arch/ia64/kernel/irq_ia64.c
index 38c07b866901..5b704740f160 100644
--- a/arch/ia64/kernel/irq_ia64.c
+++ b/arch/ia64/kernel/irq_ia64.c
@@ -343,7 +343,7 @@ static irqreturn_t smp_irq_move_cleanup_interrupt(int irq, void *dev_id)
343 if (irq < 0) 343 if (irq < 0)
344 continue; 344 continue;
345 345
346 desc = irq_desc + irq; 346 desc = irq_to_desc(irq);
347 cfg = irq_cfg + irq; 347 cfg = irq_cfg + irq;
348 raw_spin_lock(&desc->lock); 348 raw_spin_lock(&desc->lock);
349 if (!cfg->move_cleanup_count) 349 if (!cfg->move_cleanup_count)
@@ -626,17 +626,15 @@ static struct irqaction tlb_irqaction = {
626void 626void
627ia64_native_register_percpu_irq (ia64_vector vec, struct irqaction *action) 627ia64_native_register_percpu_irq (ia64_vector vec, struct irqaction *action)
628{ 628{
629 struct irq_desc *desc;
630 unsigned int irq; 629 unsigned int irq;
631 630
632 irq = vec; 631 irq = vec;
633 BUG_ON(bind_irq_vector(irq, vec, CPU_MASK_ALL)); 632 BUG_ON(bind_irq_vector(irq, vec, CPU_MASK_ALL));
634 desc = irq_desc + irq; 633 irq_set_status_flags(irq, IRQ_PER_CPU);
635 desc->status |= IRQ_PER_CPU; 634 irq_set_chip(irq, &irq_type_ia64_lsapic);
636 set_irq_chip(irq, &irq_type_ia64_lsapic);
637 if (action) 635 if (action)
638 setup_irq(irq, action); 636 setup_irq(irq, action);
639 set_irq_handler(irq, handle_percpu_irq); 637 irq_set_handler(irq, handle_percpu_irq);
640} 638}
641 639
642void __init 640void __init
diff --git a/arch/ia64/kernel/irq_lsapic.c b/arch/ia64/kernel/irq_lsapic.c
index fc1549d4564d..1b3a776e5161 100644
--- a/arch/ia64/kernel/irq_lsapic.c
+++ b/arch/ia64/kernel/irq_lsapic.c
@@ -15,31 +15,30 @@
15#include <linux/irq.h> 15#include <linux/irq.h>
16 16
17static unsigned int 17static unsigned int
18lsapic_noop_startup (unsigned int irq) 18lsapic_noop_startup (struct irq_data *data)
19{ 19{
20 return 0; 20 return 0;
21} 21}
22 22
23static void 23static void
24lsapic_noop (unsigned int irq) 24lsapic_noop (struct irq_data *data)
25{ 25{
26 /* nothing to do... */ 26 /* nothing to do... */
27} 27}
28 28
29static int lsapic_retrigger(unsigned int irq) 29static int lsapic_retrigger(struct irq_data *data)
30{ 30{
31 ia64_resend_irq(irq); 31 ia64_resend_irq(data->irq);
32 32
33 return 1; 33 return 1;
34} 34}
35 35
36struct irq_chip irq_type_ia64_lsapic = { 36struct irq_chip irq_type_ia64_lsapic = {
37 .name = "LSAPIC", 37 .name = "LSAPIC",
38 .startup = lsapic_noop_startup, 38 .irq_startup = lsapic_noop_startup,
39 .shutdown = lsapic_noop, 39 .irq_shutdown = lsapic_noop,
40 .enable = lsapic_noop, 40 .irq_enable = lsapic_noop,
41 .disable = lsapic_noop, 41 .irq_disable = lsapic_noop,
42 .ack = lsapic_noop, 42 .irq_ack = lsapic_noop,
43 .end = lsapic_noop, 43 .irq_retrigger = lsapic_retrigger,
44 .retrigger = lsapic_retrigger,
45}; 44};
diff --git a/arch/ia64/kernel/mca.c b/arch/ia64/kernel/mca.c
index 1753f6a30d55..84fb405eee87 100644
--- a/arch/ia64/kernel/mca.c
+++ b/arch/ia64/kernel/mca.c
@@ -582,6 +582,8 @@ out:
582 /* Get the CPE error record and log it */ 582 /* Get the CPE error record and log it */
583 ia64_mca_log_sal_error_record(SAL_INFO_TYPE_CPE); 583 ia64_mca_log_sal_error_record(SAL_INFO_TYPE_CPE);
584 584
585 local_irq_disable();
586
585 return IRQ_HANDLED; 587 return IRQ_HANDLED;
586} 588}
587 589
@@ -1859,7 +1861,8 @@ ia64_mca_cpu_init(void *cpu_data)
1859 data = mca_bootmem(); 1861 data = mca_bootmem();
1860 first_time = 0; 1862 first_time = 0;
1861 } else 1863 } else
1862 data = __get_free_pages(GFP_KERNEL, get_order(sz)); 1864 data = (void *)__get_free_pages(GFP_KERNEL,
1865 get_order(sz));
1863 if (!data) 1866 if (!data)
1864 panic("Could not allocate MCA memory for cpu %d\n", 1867 panic("Could not allocate MCA memory for cpu %d\n",
1865 cpu); 1868 cpu);
@@ -2122,7 +2125,6 @@ ia64_mca_late_init(void)
2122 cpe_poll_timer.function = ia64_mca_cpe_poll; 2125 cpe_poll_timer.function = ia64_mca_cpe_poll;
2123 2126
2124 { 2127 {
2125 struct irq_desc *desc;
2126 unsigned int irq; 2128 unsigned int irq;
2127 2129
2128 if (cpe_vector >= 0) { 2130 if (cpe_vector >= 0) {
@@ -2130,8 +2132,7 @@ ia64_mca_late_init(void)
2130 irq = local_vector_to_irq(cpe_vector); 2132 irq = local_vector_to_irq(cpe_vector);
2131 if (irq > 0) { 2133 if (irq > 0) {
2132 cpe_poll_enabled = 0; 2134 cpe_poll_enabled = 0;
2133 desc = irq_desc + irq; 2135 irq_set_status_flags(irq, IRQ_PER_CPU);
2134 desc->status |= IRQ_PER_CPU;
2135 setup_irq(irq, &mca_cpe_irqaction); 2136 setup_irq(irq, &mca_cpe_irqaction);
2136 ia64_cpe_irq = irq; 2137 ia64_cpe_irq = irq;
2137 ia64_mca_register_cpev(cpe_vector); 2138 ia64_mca_register_cpev(cpe_vector);
diff --git a/arch/ia64/kernel/msi_ia64.c b/arch/ia64/kernel/msi_ia64.c
index 00b19a416eab..009df5434a7a 100644
--- a/arch/ia64/kernel/msi_ia64.c
+++ b/arch/ia64/kernel/msi_ia64.c
@@ -12,12 +12,13 @@
12static struct irq_chip ia64_msi_chip; 12static struct irq_chip ia64_msi_chip;
13 13
14#ifdef CONFIG_SMP 14#ifdef CONFIG_SMP
15static int ia64_set_msi_irq_affinity(unsigned int irq, 15static int ia64_set_msi_irq_affinity(struct irq_data *idata,
16 const cpumask_t *cpu_mask) 16 const cpumask_t *cpu_mask, bool force)
17{ 17{
18 struct msi_msg msg; 18 struct msi_msg msg;
19 u32 addr, data; 19 u32 addr, data;
20 int cpu = first_cpu(*cpu_mask); 20 int cpu = first_cpu(*cpu_mask);
21 unsigned int irq = idata->irq;
21 22
22 if (!cpu_online(cpu)) 23 if (!cpu_online(cpu))
23 return -1; 24 return -1;
@@ -38,7 +39,7 @@ static int ia64_set_msi_irq_affinity(unsigned int irq,
38 msg.data = data; 39 msg.data = data;
39 40
40 write_msi_msg(irq, &msg); 41 write_msi_msg(irq, &msg);
41 cpumask_copy(irq_desc[irq].affinity, cpumask_of(cpu)); 42 cpumask_copy(idata->affinity, cpumask_of(cpu));
42 43
43 return 0; 44 return 0;
44} 45}
@@ -55,7 +56,7 @@ int ia64_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
55 if (irq < 0) 56 if (irq < 0)
56 return irq; 57 return irq;
57 58
58 set_irq_msi(irq, desc); 59 irq_set_msi_desc(irq, desc);
59 cpus_and(mask, irq_to_domain(irq), cpu_online_map); 60 cpus_and(mask, irq_to_domain(irq), cpu_online_map);
60 dest_phys_id = cpu_physical_id(first_cpu(mask)); 61 dest_phys_id = cpu_physical_id(first_cpu(mask));
61 vector = irq_to_vector(irq); 62 vector = irq_to_vector(irq);
@@ -74,7 +75,7 @@ int ia64_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
74 MSI_DATA_VECTOR(vector); 75 MSI_DATA_VECTOR(vector);
75 76
76 write_msi_msg(irq, &msg); 77 write_msi_msg(irq, &msg);
77 set_irq_chip_and_handler(irq, &ia64_msi_chip, handle_edge_irq); 78 irq_set_chip_and_handler(irq, &ia64_msi_chip, handle_edge_irq);
78 79
79 return 0; 80 return 0;
80} 81}
@@ -84,16 +85,16 @@ void ia64_teardown_msi_irq(unsigned int irq)
84 destroy_irq(irq); 85 destroy_irq(irq);
85} 86}
86 87
87static void ia64_ack_msi_irq(unsigned int irq) 88static void ia64_ack_msi_irq(struct irq_data *data)
88{ 89{
89 irq_complete_move(irq); 90 irq_complete_move(data->irq);
90 move_native_irq(irq); 91 irq_move_irq(data);
91 ia64_eoi(); 92 ia64_eoi();
92} 93}
93 94
94static int ia64_msi_retrigger_irq(unsigned int irq) 95static int ia64_msi_retrigger_irq(struct irq_data *data)
95{ 96{
96 unsigned int vector = irq_to_vector(irq); 97 unsigned int vector = irq_to_vector(data->irq);
97 ia64_resend_irq(vector); 98 ia64_resend_irq(vector);
98 99
99 return 1; 100 return 1;
@@ -103,14 +104,14 @@ static int ia64_msi_retrigger_irq(unsigned int irq)
103 * Generic ops used on most IA64 platforms. 104 * Generic ops used on most IA64 platforms.
104 */ 105 */
105static struct irq_chip ia64_msi_chip = { 106static struct irq_chip ia64_msi_chip = {
106 .name = "PCI-MSI", 107 .name = "PCI-MSI",
107 .irq_mask = mask_msi_irq, 108 .irq_mask = mask_msi_irq,
108 .irq_unmask = unmask_msi_irq, 109 .irq_unmask = unmask_msi_irq,
109 .ack = ia64_ack_msi_irq, 110 .irq_ack = ia64_ack_msi_irq,
110#ifdef CONFIG_SMP 111#ifdef CONFIG_SMP
111 .set_affinity = ia64_set_msi_irq_affinity, 112 .irq_set_affinity = ia64_set_msi_irq_affinity,
112#endif 113#endif
113 .retrigger = ia64_msi_retrigger_irq, 114 .irq_retrigger = ia64_msi_retrigger_irq,
114}; 115};
115 116
116 117
@@ -132,8 +133,10 @@ void arch_teardown_msi_irq(unsigned int irq)
132 133
133#ifdef CONFIG_DMAR 134#ifdef CONFIG_DMAR
134#ifdef CONFIG_SMP 135#ifdef CONFIG_SMP
135static int dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask) 136static int dmar_msi_set_affinity(struct irq_data *data,
137 const struct cpumask *mask, bool force)
136{ 138{
139 unsigned int irq = data->irq;
137 struct irq_cfg *cfg = irq_cfg + irq; 140 struct irq_cfg *cfg = irq_cfg + irq;
138 struct msi_msg msg; 141 struct msi_msg msg;
139 int cpu = cpumask_first(mask); 142 int cpu = cpumask_first(mask);
@@ -152,7 +155,7 @@ static int dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask)
152 msg.address_lo |= MSI_ADDR_DEST_ID_CPU(cpu_physical_id(cpu)); 155 msg.address_lo |= MSI_ADDR_DEST_ID_CPU(cpu_physical_id(cpu));
153 156
154 dmar_msi_write(irq, &msg); 157 dmar_msi_write(irq, &msg);
155 cpumask_copy(irq_desc[irq].affinity, mask); 158 cpumask_copy(data->affinity, mask);
156 159
157 return 0; 160 return 0;
158} 161}
@@ -162,11 +165,11 @@ static struct irq_chip dmar_msi_type = {
162 .name = "DMAR_MSI", 165 .name = "DMAR_MSI",
163 .irq_unmask = dmar_msi_unmask, 166 .irq_unmask = dmar_msi_unmask,
164 .irq_mask = dmar_msi_mask, 167 .irq_mask = dmar_msi_mask,
165 .ack = ia64_ack_msi_irq, 168 .irq_ack = ia64_ack_msi_irq,
166#ifdef CONFIG_SMP 169#ifdef CONFIG_SMP
167 .set_affinity = dmar_msi_set_affinity, 170 .irq_set_affinity = dmar_msi_set_affinity,
168#endif 171#endif
169 .retrigger = ia64_msi_retrigger_irq, 172 .irq_retrigger = ia64_msi_retrigger_irq,
170}; 173};
171 174
172static int 175static int
@@ -203,8 +206,8 @@ int arch_setup_dmar_msi(unsigned int irq)
203 if (ret < 0) 206 if (ret < 0)
204 return ret; 207 return ret;
205 dmar_msi_write(irq, &msg); 208 dmar_msi_write(irq, &msg);
206 set_irq_chip_and_handler_name(irq, &dmar_msi_type, handle_edge_irq, 209 irq_set_chip_and_handler_name(irq, &dmar_msi_type, handle_edge_irq,
207 "edge"); 210 "edge");
208 return 0; 211 return 0;
209} 212}
210#endif /* CONFIG_DMAR */ 213#endif /* CONFIG_DMAR */
diff --git a/arch/ia64/kernel/perfmon_default_smpl.c b/arch/ia64/kernel/perfmon_default_smpl.c
index 5f637bbfcccd..30c644ea44c9 100644
--- a/arch/ia64/kernel/perfmon_default_smpl.c
+++ b/arch/ia64/kernel/perfmon_default_smpl.c
@@ -150,7 +150,7 @@ default_handler(struct task_struct *task, void *buf, pfm_ovfl_arg_t *arg, struct
150 * current = task running at the time of the overflow. 150 * current = task running at the time of the overflow.
151 * 151 *
152 * per-task mode: 152 * per-task mode:
153 * - this is ususally the task being monitored. 153 * - this is usually the task being monitored.
154 * Under certain conditions, it might be a different task 154 * Under certain conditions, it might be a different task
155 * 155 *
156 * system-wide: 156 * system-wide:
diff --git a/arch/ia64/kernel/setup.c b/arch/ia64/kernel/setup.c
index 911cf9749700..5e2c72498c51 100644
--- a/arch/ia64/kernel/setup.c
+++ b/arch/ia64/kernel/setup.c
@@ -479,25 +479,7 @@ static __init int setup_nomca(char *s)
479} 479}
480early_param("nomca", setup_nomca); 480early_param("nomca", setup_nomca);
481 481
482/*
483 * Note: elfcorehdr_addr is not just limited to vmcore. It is also used by
484 * is_kdump_kernel() to determine if we are booting after a panic. Hence
485 * ifdef it under CONFIG_CRASH_DUMP and not CONFIG_PROC_VMCORE.
486 */
487#ifdef CONFIG_CRASH_DUMP 482#ifdef CONFIG_CRASH_DUMP
488/* elfcorehdr= specifies the location of elf core header
489 * stored by the crashed kernel.
490 */
491static int __init parse_elfcorehdr(char *arg)
492{
493 if (!arg)
494 return -EINVAL;
495
496 elfcorehdr_addr = memparse(arg, &arg);
497 return 0;
498}
499early_param("elfcorehdr", parse_elfcorehdr);
500
501int __init reserve_elfcorehdr(u64 *start, u64 *end) 483int __init reserve_elfcorehdr(u64 *start, u64 *end)
502{ 484{
503 u64 length; 485 u64 length;
diff --git a/arch/ia64/kernel/smpboot.c b/arch/ia64/kernel/smpboot.c
index d003b502a432..14ec641003da 100644
--- a/arch/ia64/kernel/smpboot.c
+++ b/arch/ia64/kernel/smpboot.c
@@ -677,7 +677,7 @@ extern void fixup_irqs(void);
677int migrate_platform_irqs(unsigned int cpu) 677int migrate_platform_irqs(unsigned int cpu)
678{ 678{
679 int new_cpei_cpu; 679 int new_cpei_cpu;
680 struct irq_desc *desc = NULL; 680 struct irq_data *data = NULL;
681 const struct cpumask *mask; 681 const struct cpumask *mask;
682 int retval = 0; 682 int retval = 0;
683 683
@@ -693,20 +693,20 @@ int migrate_platform_irqs(unsigned int cpu)
693 new_cpei_cpu = any_online_cpu(cpu_online_map); 693 new_cpei_cpu = any_online_cpu(cpu_online_map);
694 mask = cpumask_of(new_cpei_cpu); 694 mask = cpumask_of(new_cpei_cpu);
695 set_cpei_target_cpu(new_cpei_cpu); 695 set_cpei_target_cpu(new_cpei_cpu);
696 desc = irq_desc + ia64_cpe_irq; 696 data = irq_get_irq_data(ia64_cpe_irq);
697 /* 697 /*
698 * Switch for now, immediately, we need to do fake intr 698 * Switch for now, immediately, we need to do fake intr
699 * as other interrupts, but need to study CPEI behaviour with 699 * as other interrupts, but need to study CPEI behaviour with
700 * polling before making changes. 700 * polling before making changes.
701 */ 701 */
702 if (desc) { 702 if (data && data->chip) {
703 desc->chip->disable(ia64_cpe_irq); 703 data->chip->irq_disable(data);
704 desc->chip->set_affinity(ia64_cpe_irq, mask); 704 data->chip->irq_set_affinity(data, mask, false);
705 desc->chip->enable(ia64_cpe_irq); 705 data->chip->irq_enable(data);
706 printk ("Re-targetting CPEI to cpu %d\n", new_cpei_cpu); 706 printk ("Re-targeting CPEI to cpu %d\n", new_cpei_cpu);
707 } 707 }
708 } 708 }
709 if (!desc) { 709 if (!data) {
710 printk ("Unable to retarget CPEI, offline cpu [%d] failed\n", cpu); 710 printk ("Unable to retarget CPEI, offline cpu [%d] failed\n", cpu);
711 retval = -EBUSY; 711 retval = -EBUSY;
712 } 712 }
diff --git a/arch/ia64/kernel/time.c b/arch/ia64/kernel/time.c
index 41c40f0e4796..04440cc09b40 100644
--- a/arch/ia64/kernel/time.c
+++ b/arch/ia64/kernel/time.c
@@ -188,19 +188,10 @@ timer_interrupt (int irq, void *dev_id)
188 188
189 new_itm += local_cpu_data->itm_delta; 189 new_itm += local_cpu_data->itm_delta;
190 190
191 if (smp_processor_id() == time_keeper_id) { 191 if (smp_processor_id() == time_keeper_id)
192 /* 192 xtime_update(1);
193 * Here we are in the timer irq handler. We have irqs locally 193
194 * disabled, but we don't know if the timer_bh is running on 194 local_cpu_data->itm_next = new_itm;
195 * another CPU. We need to avoid to SMP race by acquiring the
196 * xtime_lock.
197 */
198 write_seqlock(&xtime_lock);
199 do_timer(1);
200 local_cpu_data->itm_next = new_itm;
201 write_sequnlock(&xtime_lock);
202 } else
203 local_cpu_data->itm_next = new_itm;
204 195
205 if (time_after(new_itm, ia64_get_itc())) 196 if (time_after(new_itm, ia64_get_itc()))
206 break; 197 break;
@@ -220,7 +211,7 @@ skip_process_time_accounting:
220 * comfort, we increase the safety margin by 211 * comfort, we increase the safety margin by
221 * intentionally dropping the next tick(s). We do NOT 212 * intentionally dropping the next tick(s). We do NOT
222 * update itm.next because that would force us to call 213 * update itm.next because that would force us to call
223 * do_timer() which in turn would let our clock run 214 * xtime_update() which in turn would let our clock run
224 * too fast (with the potentially devastating effect 215 * too fast (with the potentially devastating effect
225 * of losing monotony of time). 216 * of losing monotony of time).
226 */ 217 */
diff --git a/arch/ia64/kernel/topology.c b/arch/ia64/kernel/topology.c
index 0baa1bbb65fe..0e0e0cc9e392 100644
--- a/arch/ia64/kernel/topology.c
+++ b/arch/ia64/kernel/topology.c
@@ -43,7 +43,7 @@ int __ref arch_register_cpu(int num)
43{ 43{
44#ifdef CONFIG_ACPI 44#ifdef CONFIG_ACPI
45 /* 45 /*
46 * If CPEI can be re-targetted or if this is not 46 * If CPEI can be re-targeted or if this is not
47 * CPEI target, then it is hotpluggable 47 * CPEI target, then it is hotpluggable
48 */ 48 */
49 if (can_cpei_retarget() || !is_cpu_cpei_target(num)) 49 if (can_cpei_retarget() || !is_cpu_cpei_target(num))
diff --git a/arch/ia64/kernel/vmlinux.lds.S b/arch/ia64/kernel/vmlinux.lds.S
index 5a4d044dcb1c..787de4a77d82 100644
--- a/arch/ia64/kernel/vmlinux.lds.S
+++ b/arch/ia64/kernel/vmlinux.lds.S
@@ -198,7 +198,7 @@ SECTIONS {
198 198
199 /* Per-cpu data: */ 199 /* Per-cpu data: */
200 . = ALIGN(PERCPU_PAGE_SIZE); 200 . = ALIGN(PERCPU_PAGE_SIZE);
201 PERCPU_VADDR(PERCPU_ADDR, :percpu) 201 PERCPU_VADDR(SMP_CACHE_BYTES, PERCPU_ADDR, :percpu)
202 __phys_per_cpu_start = __per_cpu_load; 202 __phys_per_cpu_start = __per_cpu_load;
203 /* 203 /*
204 * ensure percpu data fits 204 * ensure percpu data fits
diff --git a/arch/ia64/kvm/Makefile b/arch/ia64/kvm/Makefile
index 1089b3e918ac..db3d7c5d1071 100644
--- a/arch/ia64/kvm/Makefile
+++ b/arch/ia64/kvm/Makefile
@@ -45,8 +45,8 @@ FORCE : $(obj)/$(offsets-file)
45# Makefile for Kernel-based Virtual Machine module 45# Makefile for Kernel-based Virtual Machine module
46# 46#
47 47
48EXTRA_CFLAGS += -Ivirt/kvm -Iarch/ia64/kvm/ 48ccflags-y := -Ivirt/kvm -Iarch/ia64/kvm/
49EXTRA_AFLAGS += -Ivirt/kvm -Iarch/ia64/kvm/ 49asflags-y := -Ivirt/kvm -Iarch/ia64/kvm/
50 50
51common-objs = $(addprefix ../../../virt/kvm/, kvm_main.o ioapic.o \ 51common-objs = $(addprefix ../../../virt/kvm/, kvm_main.o ioapic.o \
52 coalesced_mmio.o irq_comm.o assigned-dev.o) 52 coalesced_mmio.o irq_comm.o assigned-dev.o)
diff --git a/arch/ia64/kvm/kvm-ia64.c b/arch/ia64/kvm/kvm-ia64.c
index 70d224d4264c..8213efe1998c 100644
--- a/arch/ia64/kvm/kvm-ia64.c
+++ b/arch/ia64/kvm/kvm-ia64.c
@@ -662,6 +662,7 @@ again:
662 goto vcpu_run_fail; 662 goto vcpu_run_fail;
663 663
664 srcu_read_unlock(&vcpu->kvm->srcu, idx); 664 srcu_read_unlock(&vcpu->kvm->srcu, idx);
665 vcpu->mode = IN_GUEST_MODE;
665 kvm_guest_enter(); 666 kvm_guest_enter();
666 667
667 /* 668 /*
@@ -683,6 +684,7 @@ again:
683 */ 684 */
684 barrier(); 685 barrier();
685 kvm_guest_exit(); 686 kvm_guest_exit();
687 vcpu->mode = OUTSIDE_GUEST_MODE;
686 preempt_enable(); 688 preempt_enable();
687 689
688 idx = srcu_read_lock(&vcpu->kvm->srcu); 690 idx = srcu_read_lock(&vcpu->kvm->srcu);
diff --git a/arch/ia64/kvm/process.c b/arch/ia64/kvm/process.c
index bb862fb224f2..b0398740b48d 100644
--- a/arch/ia64/kvm/process.c
+++ b/arch/ia64/kvm/process.c
@@ -987,7 +987,7 @@ static void vmm_sanity_check(struct kvm_vcpu *vcpu)
987 987
988static void kvm_do_resume_op(struct kvm_vcpu *vcpu) 988static void kvm_do_resume_op(struct kvm_vcpu *vcpu)
989{ 989{
990 vmm_sanity_check(vcpu); /*Guarantee vcpu runing on healthy vmm!*/ 990 vmm_sanity_check(vcpu); /*Guarantee vcpu running on healthy vmm!*/
991 991
992 if (test_and_clear_bit(KVM_REQ_RESUME, &vcpu->requests)) { 992 if (test_and_clear_bit(KVM_REQ_RESUME, &vcpu->requests)) {
993 vcpu_do_resume(vcpu); 993 vcpu_do_resume(vcpu);
diff --git a/arch/ia64/lib/do_csum.S b/arch/ia64/lib/do_csum.S
index 6bec2fc9f5b2..1a431a5cf86f 100644
--- a/arch/ia64/lib/do_csum.S
+++ b/arch/ia64/lib/do_csum.S
@@ -201,7 +201,7 @@ GLOBAL_ENTRY(do_csum)
201 ;; 201 ;;
202(p6) adds result1[0]=1,result1[0] 202(p6) adds result1[0]=1,result1[0]
203(p9) br.cond.sptk .do_csum_exit // if (count == 1) exit 203(p9) br.cond.sptk .do_csum_exit // if (count == 1) exit
204 // Fall through to caluculate the checksum, feeding result1[0] as 204 // Fall through to calculate the checksum, feeding result1[0] as
205 // the initial value in result1[0]. 205 // the initial value in result1[0].
206 // 206 //
207 // Calculate the checksum loading two 8-byte words per loop. 207 // Calculate the checksum loading two 8-byte words per loop.
diff --git a/arch/ia64/mm/contig.c b/arch/ia64/mm/contig.c
index 54bf54059811..9a018cde5d84 100644
--- a/arch/ia64/mm/contig.c
+++ b/arch/ia64/mm/contig.c
@@ -36,7 +36,7 @@ static unsigned long max_gap;
36 * Shows a simple page count of reserved and used pages in the system. 36 * Shows a simple page count of reserved and used pages in the system.
37 * For discontig machines, it does this on a per-pgdat basis. 37 * For discontig machines, it does this on a per-pgdat basis.
38 */ 38 */
39void show_mem(void) 39void show_mem(unsigned int filter)
40{ 40{
41 int i, total_reserved = 0; 41 int i, total_reserved = 0;
42 int total_shared = 0, total_cached = 0; 42 int total_shared = 0, total_cached = 0;
diff --git a/arch/ia64/mm/discontig.c b/arch/ia64/mm/discontig.c
index 61620323bb60..82ab1bc6afb1 100644
--- a/arch/ia64/mm/discontig.c
+++ b/arch/ia64/mm/discontig.c
@@ -614,7 +614,7 @@ void __cpuinit *per_cpu_init(void)
614 * Shows a simple page count of reserved and used pages in the system. 614 * Shows a simple page count of reserved and used pages in the system.
615 * For discontig machines, it does this on a per-pgdat basis. 615 * For discontig machines, it does this on a per-pgdat basis.
616 */ 616 */
617void show_mem(void) 617void show_mem(unsigned int filter)
618{ 618{
619 int i, total_reserved = 0; 619 int i, total_reserved = 0;
620 int total_shared = 0, total_cached = 0; 620 int total_shared = 0, total_cached = 0;
diff --git a/arch/ia64/sn/kernel/Makefile b/arch/ia64/sn/kernel/Makefile
index 0591038735af..d27df1d45da7 100644
--- a/arch/ia64/sn/kernel/Makefile
+++ b/arch/ia64/sn/kernel/Makefile
@@ -7,7 +7,7 @@
7# Copyright (C) 1999,2001-2006,2008 Silicon Graphics, Inc. All Rights Reserved. 7# Copyright (C) 1999,2001-2006,2008 Silicon Graphics, Inc. All Rights Reserved.
8# 8#
9 9
10EXTRA_CFLAGS += -Iarch/ia64/sn/include 10ccflags-y := -Iarch/ia64/sn/include
11 11
12obj-y += setup.o bte.o bte_error.o irq.o mca.o idle.o \ 12obj-y += setup.o bte.o bte_error.o irq.o mca.o idle.o \
13 huberror.o io_acpi_init.o io_common.o \ 13 huberror.o io_acpi_init.o io_common.o \
diff --git a/arch/ia64/sn/kernel/irq.c b/arch/ia64/sn/kernel/irq.c
index 13c15d968098..81a1f4e6bcd8 100644
--- a/arch/ia64/sn/kernel/irq.c
+++ b/arch/ia64/sn/kernel/irq.c
@@ -23,11 +23,9 @@
23#include <asm/sn/sn_sal.h> 23#include <asm/sn/sn_sal.h>
24#include <asm/sn/sn_feature_sets.h> 24#include <asm/sn/sn_feature_sets.h>
25 25
26static void force_interrupt(int irq);
27static void register_intr_pda(struct sn_irq_info *sn_irq_info); 26static void register_intr_pda(struct sn_irq_info *sn_irq_info);
28static void unregister_intr_pda(struct sn_irq_info *sn_irq_info); 27static void unregister_intr_pda(struct sn_irq_info *sn_irq_info);
29 28
30int sn_force_interrupt_flag = 1;
31extern int sn_ioif_inited; 29extern int sn_ioif_inited;
32struct list_head **sn_irq_lh; 30struct list_head **sn_irq_lh;
33static DEFINE_SPINLOCK(sn_irq_info_lock); /* non-IRQ lock */ 31static DEFINE_SPINLOCK(sn_irq_info_lock); /* non-IRQ lock */
@@ -78,62 +76,40 @@ u64 sn_intr_redirect(nasid_t local_nasid, int local_widget,
78 return ret_stuff.status; 76 return ret_stuff.status;
79} 77}
80 78
81static unsigned int sn_startup_irq(unsigned int irq) 79static unsigned int sn_startup_irq(struct irq_data *data)
82{ 80{
83 return 0; 81 return 0;
84} 82}
85 83
86static void sn_shutdown_irq(unsigned int irq) 84static void sn_shutdown_irq(struct irq_data *data)
87{ 85{
88} 86}
89 87
90extern void ia64_mca_register_cpev(int); 88extern void ia64_mca_register_cpev(int);
91 89
92static void sn_disable_irq(unsigned int irq) 90static void sn_disable_irq(struct irq_data *data)
93{ 91{
94 if (irq == local_vector_to_irq(IA64_CPE_VECTOR)) 92 if (data->irq == local_vector_to_irq(IA64_CPE_VECTOR))
95 ia64_mca_register_cpev(0); 93 ia64_mca_register_cpev(0);
96} 94}
97 95
98static void sn_enable_irq(unsigned int irq) 96static void sn_enable_irq(struct irq_data *data)
99{ 97{
100 if (irq == local_vector_to_irq(IA64_CPE_VECTOR)) 98 if (data->irq == local_vector_to_irq(IA64_CPE_VECTOR))
101 ia64_mca_register_cpev(irq); 99 ia64_mca_register_cpev(data->irq);
102} 100}
103 101
104static void sn_ack_irq(unsigned int irq) 102static void sn_ack_irq(struct irq_data *data)
105{ 103{
106 u64 event_occurred, mask; 104 u64 event_occurred, mask;
105 unsigned int irq = data->irq & 0xff;
107 106
108 irq = irq & 0xff;
109 event_occurred = HUB_L((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED)); 107 event_occurred = HUB_L((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED));
110 mask = event_occurred & SH_ALL_INT_MASK; 108 mask = event_occurred & SH_ALL_INT_MASK;
111 HUB_S((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED_ALIAS), mask); 109 HUB_S((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED_ALIAS), mask);
112 __set_bit(irq, (volatile void *)pda->sn_in_service_ivecs); 110 __set_bit(irq, (volatile void *)pda->sn_in_service_ivecs);
113 111
114 move_native_irq(irq); 112 irq_move_irq(data);
115}
116
117static void sn_end_irq(unsigned int irq)
118{
119 int ivec;
120 u64 event_occurred;
121
122 ivec = irq & 0xff;
123 if (ivec == SGI_UART_VECTOR) {
124 event_occurred = HUB_L((u64*)LOCAL_MMR_ADDR (SH_EVENT_OCCURRED));
125 /* If the UART bit is set here, we may have received an
126 * interrupt from the UART that the driver missed. To
127 * make sure, we IPI ourselves to force us to look again.
128 */
129 if (event_occurred & SH_EVENT_OCCURRED_UART_INT_MASK) {
130 platform_send_ipi(smp_processor_id(), SGI_UART_VECTOR,
131 IA64_IPI_DM_INT, 0);
132 }
133 }
134 __clear_bit(ivec, (volatile void *)pda->sn_in_service_ivecs);
135 if (sn_force_interrupt_flag)
136 force_interrupt(irq);
137} 113}
138 114
139static void sn_irq_info_free(struct rcu_head *head); 115static void sn_irq_info_free(struct rcu_head *head);
@@ -228,9 +204,11 @@ finish_up:
228 return new_irq_info; 204 return new_irq_info;
229} 205}
230 206
231static int sn_set_affinity_irq(unsigned int irq, const struct cpumask *mask) 207static int sn_set_affinity_irq(struct irq_data *data,
208 const struct cpumask *mask, bool force)
232{ 209{
233 struct sn_irq_info *sn_irq_info, *sn_irq_info_safe; 210 struct sn_irq_info *sn_irq_info, *sn_irq_info_safe;
211 unsigned int irq = data->irq;
234 nasid_t nasid; 212 nasid_t nasid;
235 int slice; 213 int slice;
236 214
@@ -249,7 +227,7 @@ void sn_set_err_irq_affinity(unsigned int irq)
249{ 227{
250 /* 228 /*
251 * On systems which support CPU disabling (SHub2), all error interrupts 229 * On systems which support CPU disabling (SHub2), all error interrupts
252 * are targetted at the boot CPU. 230 * are targeted at the boot CPU.
253 */ 231 */
254 if (is_shub2() && sn_prom_feature_available(PRF_CPU_DISABLE_SUPPORT)) 232 if (is_shub2() && sn_prom_feature_available(PRF_CPU_DISABLE_SUPPORT))
255 set_irq_affinity_info(irq, cpu_physical_id(0), 0); 233 set_irq_affinity_info(irq, cpu_physical_id(0), 0);
@@ -259,26 +237,25 @@ void sn_set_err_irq_affinity(unsigned int irq) { }
259#endif 237#endif
260 238
261static void 239static void
262sn_mask_irq(unsigned int irq) 240sn_mask_irq(struct irq_data *data)
263{ 241{
264} 242}
265 243
266static void 244static void
267sn_unmask_irq(unsigned int irq) 245sn_unmask_irq(struct irq_data *data)
268{ 246{
269} 247}
270 248
271struct irq_chip irq_type_sn = { 249struct irq_chip irq_type_sn = {
272 .name = "SN hub", 250 .name = "SN hub",
273 .startup = sn_startup_irq, 251 .irq_startup = sn_startup_irq,
274 .shutdown = sn_shutdown_irq, 252 .irq_shutdown = sn_shutdown_irq,
275 .enable = sn_enable_irq, 253 .irq_enable = sn_enable_irq,
276 .disable = sn_disable_irq, 254 .irq_disable = sn_disable_irq,
277 .ack = sn_ack_irq, 255 .irq_ack = sn_ack_irq,
278 .end = sn_end_irq, 256 .irq_mask = sn_mask_irq,
279 .mask = sn_mask_irq, 257 .irq_unmask = sn_unmask_irq,
280 .unmask = sn_unmask_irq, 258 .irq_set_affinity = sn_set_affinity_irq
281 .set_affinity = sn_set_affinity_irq
282}; 259};
283 260
284ia64_vector sn_irq_to_vector(int irq) 261ia64_vector sn_irq_to_vector(int irq)
@@ -296,15 +273,13 @@ unsigned int sn_local_vector_to_irq(u8 vector)
296void sn_irq_init(void) 273void sn_irq_init(void)
297{ 274{
298 int i; 275 int i;
299 struct irq_desc *base_desc = irq_desc;
300 276
301 ia64_first_device_vector = IA64_SN2_FIRST_DEVICE_VECTOR; 277 ia64_first_device_vector = IA64_SN2_FIRST_DEVICE_VECTOR;
302 ia64_last_device_vector = IA64_SN2_LAST_DEVICE_VECTOR; 278 ia64_last_device_vector = IA64_SN2_LAST_DEVICE_VECTOR;
303 279
304 for (i = 0; i < NR_IRQS; i++) { 280 for (i = 0; i < NR_IRQS; i++) {
305 if (base_desc[i].chip == &no_irq_chip) { 281 if (irq_get_chip(i) == &no_irq_chip)
306 base_desc[i].chip = &irq_type_sn; 282 irq_set_chip(i, &irq_type_sn);
307 }
308 } 283 }
309} 284}
310 285
@@ -378,7 +353,6 @@ void sn_irq_fixup(struct pci_dev *pci_dev, struct sn_irq_info *sn_irq_info)
378 int cpu = nasid_slice_to_cpuid(nasid, slice); 353 int cpu = nasid_slice_to_cpuid(nasid, slice);
379#ifdef CONFIG_SMP 354#ifdef CONFIG_SMP
380 int cpuphys; 355 int cpuphys;
381 struct irq_desc *desc;
382#endif 356#endif
383 357
384 pci_dev_get(pci_dev); 358 pci_dev_get(pci_dev);
@@ -395,12 +369,11 @@ void sn_irq_fixup(struct pci_dev *pci_dev, struct sn_irq_info *sn_irq_info)
395#ifdef CONFIG_SMP 369#ifdef CONFIG_SMP
396 cpuphys = cpu_physical_id(cpu); 370 cpuphys = cpu_physical_id(cpu);
397 set_irq_affinity_info(sn_irq_info->irq_irq, cpuphys, 0); 371 set_irq_affinity_info(sn_irq_info->irq_irq, cpuphys, 0);
398 desc = irq_to_desc(sn_irq_info->irq_irq);
399 /* 372 /*
400 * Affinity was set by the PROM, prevent it from 373 * Affinity was set by the PROM, prevent it from
401 * being reset by the request_irq() path. 374 * being reset by the request_irq() path.
402 */ 375 */
403 desc->status |= IRQ_AFFINITY_SET; 376 irqd_mark_affinity_was_set(irq_get_irq_data(sn_irq_info->irq_irq));
404#endif 377#endif
405} 378}
406 379
@@ -439,25 +412,11 @@ sn_call_force_intr_provider(struct sn_irq_info *sn_irq_info)
439 pci_provider = sn_pci_provider[sn_irq_info->irq_bridge_type]; 412 pci_provider = sn_pci_provider[sn_irq_info->irq_bridge_type];
440 413
441 /* Don't force an interrupt if the irq has been disabled */ 414 /* Don't force an interrupt if the irq has been disabled */
442 if (!(irq_desc[sn_irq_info->irq_irq].status & IRQ_DISABLED) && 415 if (!irqd_irq_disabled(irq_get_irq_data(sn_irq_info->irq_irq)) &&
443 pci_provider && pci_provider->force_interrupt) 416 pci_provider && pci_provider->force_interrupt)
444 (*pci_provider->force_interrupt)(sn_irq_info); 417 (*pci_provider->force_interrupt)(sn_irq_info);
445} 418}
446 419
447static void force_interrupt(int irq)
448{
449 struct sn_irq_info *sn_irq_info;
450
451 if (!sn_ioif_inited)
452 return;
453
454 rcu_read_lock();
455 list_for_each_entry_rcu(sn_irq_info, sn_irq_lh[irq], list)
456 sn_call_force_intr_provider(sn_irq_info);
457
458 rcu_read_unlock();
459}
460
461/* 420/*
462 * Check for lost interrupts. If the PIC int_status reg. says that 421 * Check for lost interrupts. If the PIC int_status reg. says that
463 * an interrupt has been sent, but not handled, and the interrupt 422 * an interrupt has been sent, but not handled, and the interrupt
@@ -476,7 +435,7 @@ static void sn_check_intr(int irq, struct sn_irq_info *sn_irq_info)
476 /* 435 /*
477 * Bridge types attached to TIO (anything but PIC) do not need this WAR 436 * Bridge types attached to TIO (anything but PIC) do not need this WAR
478 * since they do not target Shub II interrupt registers. If that 437 * since they do not target Shub II interrupt registers. If that
479 * ever changes, this check needs to accomodate. 438 * ever changes, this check needs to accommodate.
480 */ 439 */
481 if (sn_irq_info->irq_bridge_type != PCIIO_ASIC_TYPE_PIC) 440 if (sn_irq_info->irq_bridge_type != PCIIO_ASIC_TYPE_PIC)
482 return; 441 return;
diff --git a/arch/ia64/sn/kernel/msi_sn.c b/arch/ia64/sn/kernel/msi_sn.c
index a5e500f02853..2b98b9e088de 100644
--- a/arch/ia64/sn/kernel/msi_sn.c
+++ b/arch/ia64/sn/kernel/msi_sn.c
@@ -144,16 +144,16 @@ int sn_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *entry)
144 */ 144 */
145 msg.data = 0x100 + irq; 145 msg.data = 0x100 + irq;
146 146
147 set_irq_msi(irq, entry); 147 irq_set_msi_desc(irq, entry);
148 write_msi_msg(irq, &msg); 148 write_msi_msg(irq, &msg);
149 set_irq_chip_and_handler(irq, &sn_msi_chip, handle_edge_irq); 149 irq_set_chip_and_handler(irq, &sn_msi_chip, handle_edge_irq);
150 150
151 return 0; 151 return 0;
152} 152}
153 153
154#ifdef CONFIG_SMP 154#ifdef CONFIG_SMP
155static int sn_set_msi_irq_affinity(unsigned int irq, 155static int sn_set_msi_irq_affinity(struct irq_data *data,
156 const struct cpumask *cpu_mask) 156 const struct cpumask *cpu_mask, bool force)
157{ 157{
158 struct msi_msg msg; 158 struct msi_msg msg;
159 int slice; 159 int slice;
@@ -164,7 +164,7 @@ static int sn_set_msi_irq_affinity(unsigned int irq,
164 struct sn_irq_info *sn_irq_info; 164 struct sn_irq_info *sn_irq_info;
165 struct sn_irq_info *new_irq_info; 165 struct sn_irq_info *new_irq_info;
166 struct sn_pcibus_provider *provider; 166 struct sn_pcibus_provider *provider;
167 unsigned int cpu; 167 unsigned int cpu, irq = data->irq;
168 168
169 cpu = cpumask_first(cpu_mask); 169 cpu = cpumask_first(cpu_mask);
170 sn_irq_info = sn_msi_info[irq].sn_irq_info; 170 sn_irq_info = sn_msi_info[irq].sn_irq_info;
@@ -206,33 +206,33 @@ static int sn_set_msi_irq_affinity(unsigned int irq,
206 msg.address_lo = (u32)(bus_addr & 0x00000000ffffffff); 206 msg.address_lo = (u32)(bus_addr & 0x00000000ffffffff);
207 207
208 write_msi_msg(irq, &msg); 208 write_msi_msg(irq, &msg);
209 cpumask_copy(irq_desc[irq].affinity, cpu_mask); 209 cpumask_copy(data->affinity, cpu_mask);
210 210
211 return 0; 211 return 0;
212} 212}
213#endif /* CONFIG_SMP */ 213#endif /* CONFIG_SMP */
214 214
215static void sn_ack_msi_irq(unsigned int irq) 215static void sn_ack_msi_irq(struct irq_data *data)
216{ 216{
217 move_native_irq(irq); 217 irq_move_irq(data);
218 ia64_eoi(); 218 ia64_eoi();
219} 219}
220 220
221static int sn_msi_retrigger_irq(unsigned int irq) 221static int sn_msi_retrigger_irq(struct irq_data *data)
222{ 222{
223 unsigned int vector = irq; 223 unsigned int vector = data->irq;
224 ia64_resend_irq(vector); 224 ia64_resend_irq(vector);
225 225
226 return 1; 226 return 1;
227} 227}
228 228
229static struct irq_chip sn_msi_chip = { 229static struct irq_chip sn_msi_chip = {
230 .name = "PCI-MSI", 230 .name = "PCI-MSI",
231 .irq_mask = mask_msi_irq, 231 .irq_mask = mask_msi_irq,
232 .irq_unmask = unmask_msi_irq, 232 .irq_unmask = unmask_msi_irq,
233 .ack = sn_ack_msi_irq, 233 .irq_ack = sn_ack_msi_irq,
234#ifdef CONFIG_SMP 234#ifdef CONFIG_SMP
235 .set_affinity = sn_set_msi_irq_affinity, 235 .irq_set_affinity = sn_set_msi_irq_affinity,
236#endif 236#endif
237 .retrigger = sn_msi_retrigger_irq, 237 .irq_retrigger = sn_msi_retrigger_irq,
238}; 238};
diff --git a/arch/ia64/sn/kernel/setup.c b/arch/ia64/sn/kernel/setup.c
index dbc4cbecb5ed..77db0b514fa4 100644
--- a/arch/ia64/sn/kernel/setup.c
+++ b/arch/ia64/sn/kernel/setup.c
@@ -592,7 +592,7 @@ void __cpuinit sn_cpu_init(void)
592 /* 592 /*
593 * Don't check status. The SAL call is not supported on all PROMs 593 * Don't check status. The SAL call is not supported on all PROMs
594 * but a failure is harmless. 594 * but a failure is harmless.
595 * Architechtuallly, cpu_init is always called twice on cpu 0. We 595 * Architecturally, cpu_init is always called twice on cpu 0. We
596 * should set cpu_number on cpu 0 once. 596 * should set cpu_number on cpu 0 once.
597 */ 597 */
598 if (cpuid == 0) { 598 if (cpuid == 0) {
diff --git a/arch/ia64/sn/kernel/sn2/Makefile b/arch/ia64/sn/kernel/sn2/Makefile
index 08e6565dc908..3d09108d4277 100644
--- a/arch/ia64/sn/kernel/sn2/Makefile
+++ b/arch/ia64/sn/kernel/sn2/Makefile
@@ -9,7 +9,7 @@
9# sn2 specific kernel files 9# sn2 specific kernel files
10# 10#
11 11
12EXTRA_CFLAGS += -Iarch/ia64/sn/include 12ccflags-y := -Iarch/ia64/sn/include
13 13
14obj-y += cache.o io.o ptc_deadlock.o sn2_smp.o sn_proc_fs.o \ 14obj-y += cache.o io.o ptc_deadlock.o sn2_smp.o sn_proc_fs.o \
15 prominfo_proc.o timer.o timer_interrupt.o sn_hwperf.o 15 prominfo_proc.o timer.o timer_interrupt.o sn_hwperf.o
diff --git a/arch/ia64/sn/kernel/sn2/sn_proc_fs.c b/arch/ia64/sn/kernel/sn2/sn_proc_fs.c
index c76d8dc3aea3..7aab87f48060 100644
--- a/arch/ia64/sn/kernel/sn2/sn_proc_fs.c
+++ b/arch/ia64/sn/kernel/sn2/sn_proc_fs.c
@@ -45,38 +45,6 @@ static int licenseID_open(struct inode *inode, struct file *file)
45 return single_open(file, licenseID_show, NULL); 45 return single_open(file, licenseID_show, NULL);
46} 46}
47 47
48/*
49 * Enable forced interrupt by default.
50 * When set, the sn interrupt handler writes the force interrupt register on
51 * the bridge chip. The hardware will then send an interrupt message if the
52 * interrupt line is active. This mimics a level sensitive interrupt.
53 */
54extern int sn_force_interrupt_flag;
55
56static int sn_force_interrupt_show(struct seq_file *s, void *p)
57{
58 seq_printf(s, "Force interrupt is %s\n",
59 sn_force_interrupt_flag ? "enabled" : "disabled");
60 return 0;
61}
62
63static ssize_t sn_force_interrupt_write_proc(struct file *file,
64 const char __user *buffer, size_t count, loff_t *data)
65{
66 char val;
67
68 if (copy_from_user(&val, buffer, 1))
69 return -EFAULT;
70
71 sn_force_interrupt_flag = (val == '0') ? 0 : 1;
72 return count;
73}
74
75static int sn_force_interrupt_open(struct inode *inode, struct file *file)
76{
77 return single_open(file, sn_force_interrupt_show, NULL);
78}
79
80static int coherence_id_show(struct seq_file *s, void *p) 48static int coherence_id_show(struct seq_file *s, void *p)
81{ 49{
82 seq_printf(s, "%d\n", partition_coherence_id()); 50 seq_printf(s, "%d\n", partition_coherence_id());
@@ -114,14 +82,6 @@ static const struct file_operations proc_license_id_fops = {
114 .release = single_release, 82 .release = single_release,
115}; 83};
116 84
117static const struct file_operations proc_sn_force_intr_fops = {
118 .open = sn_force_interrupt_open,
119 .read = seq_read,
120 .write = sn_force_interrupt_write_proc,
121 .llseek = seq_lseek,
122 .release = single_release,
123};
124
125static const struct file_operations proc_coherence_id_fops = { 85static const struct file_operations proc_coherence_id_fops = {
126 .open = coherence_id_open, 86 .open = coherence_id_open,
127 .read = seq_read, 87 .read = seq_read,
@@ -149,8 +109,6 @@ void register_sn_procfs(void)
149 proc_create("system_serial_number", 0444, sgi_proc_dir, 109 proc_create("system_serial_number", 0444, sgi_proc_dir,
150 &proc_system_sn_fops); 110 &proc_system_sn_fops);
151 proc_create("licenseID", 0444, sgi_proc_dir, &proc_license_id_fops); 111 proc_create("licenseID", 0444, sgi_proc_dir, &proc_license_id_fops);
152 proc_create("sn_force_interrupt", 0644, sgi_proc_dir,
153 &proc_sn_force_intr_fops);
154 proc_create("coherence_id", 0444, sgi_proc_dir, 112 proc_create("coherence_id", 0444, sgi_proc_dir,
155 &proc_coherence_id_fops); 113 &proc_coherence_id_fops);
156 proc_create("sn_topology", 0444, sgi_proc_dir, &proc_sn_topo_fops); 114 proc_create("sn_topology", 0444, sgi_proc_dir, &proc_sn_topo_fops);
diff --git a/arch/ia64/sn/pci/Makefile b/arch/ia64/sn/pci/Makefile
index ad4ef34dfe26..df2a90145426 100644
--- a/arch/ia64/sn/pci/Makefile
+++ b/arch/ia64/sn/pci/Makefile
@@ -7,6 +7,6 @@
7# 7#
8# Makefile for the sn pci general routines. 8# Makefile for the sn pci general routines.
9 9
10EXTRA_CFLAGS += -Iarch/ia64/sn/include 10ccflags-y := -Iarch/ia64/sn/include
11 11
12obj-y := pci_dma.o tioca_provider.o tioce_provider.o pcibr/ 12obj-y := pci_dma.o tioca_provider.o tioce_provider.o pcibr/
diff --git a/arch/ia64/sn/pci/pcibr/Makefile b/arch/ia64/sn/pci/pcibr/Makefile
index 01192d3247dd..396bcae36309 100644
--- a/arch/ia64/sn/pci/pcibr/Makefile
+++ b/arch/ia64/sn/pci/pcibr/Makefile
@@ -7,7 +7,7 @@
7# 7#
8# Makefile for the sn2 io routines. 8# Makefile for the sn2 io routines.
9 9
10EXTRA_CFLAGS += -Iarch/ia64/sn/include 10ccflags-y := -Iarch/ia64/sn/include
11 11
12obj-y += pcibr_dma.o pcibr_reg.o \ 12obj-y += pcibr_dma.o pcibr_reg.o \
13 pcibr_ate.o pcibr_provider.o 13 pcibr_ate.o pcibr_provider.o
diff --git a/arch/ia64/sn/pci/pcibr/pcibr_dma.c b/arch/ia64/sn/pci/pcibr/pcibr_dma.c
index c659ad5613a0..33def666a664 100644
--- a/arch/ia64/sn/pci/pcibr/pcibr_dma.c
+++ b/arch/ia64/sn/pci/pcibr/pcibr_dma.c
@@ -227,7 +227,7 @@ pcibr_dma_unmap(struct pci_dev *hwdev, dma_addr_t dma_handle, int direction)
227 * after doing the read. For PIC this routine then forces a fake interrupt 227 * after doing the read. For PIC this routine then forces a fake interrupt
228 * on another line, which is logically associated with the slot that the PIO 228 * on another line, which is logically associated with the slot that the PIO
229 * is addressed to. It then spins while watching the memory location that 229 * is addressed to. It then spins while watching the memory location that
230 * the interrupt is targetted to. When the interrupt response arrives, we 230 * the interrupt is targeted to. When the interrupt response arrives, we
231 * are sure that the DMA has landed in memory and it is safe for the driver 231 * are sure that the DMA has landed in memory and it is safe for the driver
232 * to proceed. For TIOCP use the Device(x) Write Request Buffer Flush 232 * to proceed. For TIOCP use the Device(x) Write Request Buffer Flush
233 * Bridge register since it ensures the data has entered the coherence domain, 233 * Bridge register since it ensures the data has entered the coherence domain,
diff --git a/arch/ia64/sn/pci/tioca_provider.c b/arch/ia64/sn/pci/tioca_provider.c
index 4d4536e3b6f3..9c271be9919a 100644
--- a/arch/ia64/sn/pci/tioca_provider.c
+++ b/arch/ia64/sn/pci/tioca_provider.c
@@ -509,7 +509,7 @@ tioca_dma_unmap(struct pci_dev *pdev, dma_addr_t bus_addr, int dir)
509 * use the GART mapped mode. 509 * use the GART mapped mode.
510 */ 510 */
511static u64 511static u64
512tioca_dma_map(struct pci_dev *pdev, u64 paddr, size_t byte_count, int dma_flags) 512tioca_dma_map(struct pci_dev *pdev, unsigned long paddr, size_t byte_count, int dma_flags)
513{ 513{
514 u64 mapaddr; 514 u64 mapaddr;
515 515
diff --git a/arch/ia64/uv/kernel/Makefile b/arch/ia64/uv/kernel/Makefile
index 8d92b4684d8e..124e441d383d 100644
--- a/arch/ia64/uv/kernel/Makefile
+++ b/arch/ia64/uv/kernel/Makefile
@@ -7,7 +7,7 @@
7# Copyright (C) 2008 Silicon Graphics, Inc. All Rights Reserved. 7# Copyright (C) 2008 Silicon Graphics, Inc. All Rights Reserved.
8# 8#
9 9
10EXTRA_CFLAGS += -Iarch/ia64/sn/include 10ccflags-y := -Iarch/ia64/sn/include
11 11
12obj-y += setup.o 12obj-y += setup.o
13obj-$(CONFIG_IA64_GENERIC) += machvec.o 13obj-$(CONFIG_IA64_GENERIC) += machvec.o
diff --git a/arch/ia64/xen/irq_xen.c b/arch/ia64/xen/irq_xen.c
index a3fb7cf9ae1d..108bb858acf2 100644
--- a/arch/ia64/xen/irq_xen.c
+++ b/arch/ia64/xen/irq_xen.c
@@ -138,7 +138,6 @@ static void
138__xen_register_percpu_irq(unsigned int cpu, unsigned int vec, 138__xen_register_percpu_irq(unsigned int cpu, unsigned int vec,
139 struct irqaction *action, int save) 139 struct irqaction *action, int save)
140{ 140{
141 struct irq_desc *desc;
142 int irq = 0; 141 int irq = 0;
143 142
144 if (xen_slab_ready) { 143 if (xen_slab_ready) {
@@ -223,8 +222,7 @@ __xen_register_percpu_irq(unsigned int cpu, unsigned int vec,
223 * mark the interrupt for migrations and trigger it 222 * mark the interrupt for migrations and trigger it
224 * on cpu hotplug. 223 * on cpu hotplug.
225 */ 224 */
226 desc = irq_desc + irq; 225 irq_set_status_flags(irq, IRQ_PER_CPU);
227 desc->status |= IRQ_PER_CPU;
228 } 226 }
229 } 227 }
230 228
diff --git a/arch/ia64/xen/suspend.c b/arch/ia64/xen/suspend.c
index fd66b048c6fa..419c8620945a 100644
--- a/arch/ia64/xen/suspend.c
+++ b/arch/ia64/xen/suspend.c
@@ -37,19 +37,14 @@ xen_mm_unpin_all(void)
37 /* nothing */ 37 /* nothing */
38} 38}
39 39
40void xen_pre_device_suspend(void)
41{
42 /* nothing */
43}
44
45void 40void
46xen_pre_suspend() 41xen_arch_pre_suspend()
47{ 42{
48 /* nothing */ 43 /* nothing */
49} 44}
50 45
51void 46void
52xen_post_suspend(int suspend_cancelled) 47xen_arch_post_suspend(int suspend_cancelled)
53{ 48{
54 if (suspend_cancelled) 49 if (suspend_cancelled)
55 return; 50 return;
diff --git a/arch/ia64/xen/time.c b/arch/ia64/xen/time.c
index c1c544513e8d..1f8244a78bee 100644
--- a/arch/ia64/xen/time.c
+++ b/arch/ia64/xen/time.c
@@ -139,14 +139,11 @@ consider_steal_time(unsigned long new_itm)
139 run_posix_cpu_timers(p); 139 run_posix_cpu_timers(p);
140 delta_itm += local_cpu_data->itm_delta * (stolen + blocked); 140 delta_itm += local_cpu_data->itm_delta * (stolen + blocked);
141 141
142 if (cpu == time_keeper_id) { 142 if (cpu == time_keeper_id)
143 write_seqlock(&xtime_lock); 143 xtime_update(stolen + blocked);
144 do_timer(stolen + blocked); 144
145 local_cpu_data->itm_next = delta_itm + new_itm; 145 local_cpu_data->itm_next = delta_itm + new_itm;
146 write_sequnlock(&xtime_lock); 146
147 } else {
148 local_cpu_data->itm_next = delta_itm + new_itm;
149 }
150 per_cpu(xen_stolen_time, cpu) += NS_PER_TICK * stolen; 147 per_cpu(xen_stolen_time, cpu) += NS_PER_TICK * stolen;
151 per_cpu(xen_blocked_time, cpu) += NS_PER_TICK * blocked; 148 per_cpu(xen_blocked_time, cpu) += NS_PER_TICK * blocked;
152 } 149 }