percpu: align percpu readmostly subsection to cacheline

Currently percpu readmostly subsection may share cachelines with other
percpu subsections which may result in unnecessary cacheline bounce
and performance degradation.

This patch adds @cacheline parameter to PERCPU() and PERCPU_VADDR()
linker macros, makes each arch linker scripts specify its cacheline
size and use it to align percpu subsections.

This is based on Shaohua's x86 only patch.

Signed-off-by: Tejun Heo <tj@kernel.org>
Cc: Shaohua Li <shaohua.li@intel.com>

1 files changed, 1 insertions, 1 deletions

diff --git a/arch/ia64/kernel/vmlinux.lds.S b/arch/ia64/kernel/vmlinux.lds.S
index 5a4d044dcb1c..787de4a77d82 100644
--- a/arch/ia64/kernel/vmlinux.lds.S
+++ b/arch/ia64/kernel/vmlinux.lds.S
@@ -198,7 +198,7 @@ SECTIONS {
 
         /* Per-cpu data: */
         . = ALIGN(PERCPU_PAGE_SIZE);
-        PERCPU_VADDR(PERCPU_ADDR, :percpu)
+        PERCPU_VADDR(SMP_CACHE_BYTES, PERCPU_ADDR, :percpu)
         __phys_per_cpu_start = __per_cpu_load;
         /*
          * ensure percpu data fits