[IA64-SGI] fix SGI Altix tioce_bus_fixup() bug

The following patch fixes a bug in the SGI Altix tioce_bus_fixup()
code.  ce_dre_comp_err_addr needs to be zero'd out not ~0ULL.  As
a result completion errors weren't being captured.

Signed-off-by: Mike Habeck <habeck@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>

1 files changed, 2 insertions, 2 deletions

diff --git a/arch/ia64/sn/pci/tioce_provider.c b/arch/ia64/sn/pci/tioce_provider.c
index 833295624e5d..85f3b3d4c606 100644
--- a/arch/ia64/sn/pci/tioce_provider.c
+++ b/arch/ia64/sn/pci/tioce_provider.c
@@ -3,7 +3,7 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 2003-2005 Silicon Graphics, Inc.  All Rights Reserved.
+ * Copyright (C) 2003-2006 Silicon Graphics, Inc.  All Rights Reserved.
  */
 
 #include <linux/types.h>
@@ -1002,7 +1002,7 @@ tioce_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *cont
         tioce_mmr_seti(tioce_kern, &tioce_mmr->ce_adm_int_status_alias, ~0ULL);
         tioce_mmr_seti(tioce_kern, &tioce_mmr->ce_adm_error_summary_alias,
                        ~0ULL);
-        tioce_mmr_seti(tioce_kern, &tioce_mmr->ce_dre_comp_err_addr, ~0ULL);
+        tioce_mmr_seti(tioce_kern, &tioce_mmr->ce_dre_comp_err_addr, 0ULL);
 
         if (request_irq(SGI_PCIASIC_ERROR,
                         tioce_error_intr_handler,